omap_hwmod.c 61 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - handle IO mapping
  120. * - bus throughput & module latency measurement code
  121. *
  122. * XXX add tests at the beginning of each function to ensure the hwmod is
  123. * in the appropriate state
  124. * XXX error return values should be checked to ensure that they are
  125. * appropriate
  126. */
  127. #undef DEBUG
  128. #include <linux/kernel.h>
  129. #include <linux/errno.h>
  130. #include <linux/io.h>
  131. #include <linux/clk.h>
  132. #include <linux/delay.h>
  133. #include <linux/err.h>
  134. #include <linux/list.h>
  135. #include <linux/mutex.h>
  136. #include <linux/spinlock.h>
  137. #include <plat/common.h>
  138. #include <plat/cpu.h>
  139. #include "clockdomain.h"
  140. #include "powerdomain.h"
  141. #include <plat/clock.h>
  142. #include <plat/omap_hwmod.h>
  143. #include <plat/prcm.h>
  144. #include "cm2xxx_3xxx.h"
  145. #include "cm44xx.h"
  146. #include "prm2xxx_3xxx.h"
  147. #include "prm44xx.h"
  148. #include "mux.h"
  149. /* Maximum microseconds to wait for OMAP module to softreset */
  150. #define MAX_MODULE_SOFTRESET_WAIT 10000
  151. /* Name of the OMAP hwmod for the MPU */
  152. #define MPU_INITIATOR_NAME "mpu"
  153. /* omap_hwmod_list contains all registered struct omap_hwmods */
  154. static LIST_HEAD(omap_hwmod_list);
  155. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  156. static struct omap_hwmod *mpu_oh;
  157. /* Private functions */
  158. /**
  159. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  160. * @oh: struct omap_hwmod *
  161. *
  162. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  163. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  164. * OCP_SYSCONFIG register or 0 upon success.
  165. */
  166. static int _update_sysc_cache(struct omap_hwmod *oh)
  167. {
  168. if (!oh->class->sysc) {
  169. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  170. return -EINVAL;
  171. }
  172. /* XXX ensure module interface clock is up */
  173. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  174. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  175. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  176. return 0;
  177. }
  178. /**
  179. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  180. * @v: OCP_SYSCONFIG value to write
  181. * @oh: struct omap_hwmod *
  182. *
  183. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  184. * one. No return value.
  185. */
  186. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  187. {
  188. if (!oh->class->sysc) {
  189. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  190. return;
  191. }
  192. /* XXX ensure module interface clock is up */
  193. /* Module might have lost context, always update cache and register */
  194. oh->_sysc_cache = v;
  195. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  196. }
  197. /**
  198. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  199. * @oh: struct omap_hwmod *
  200. * @standbymode: MIDLEMODE field bits
  201. * @v: pointer to register contents to modify
  202. *
  203. * Update the master standby mode bits in @v to be @standbymode for
  204. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  205. * upon error or 0 upon success.
  206. */
  207. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  208. u32 *v)
  209. {
  210. u32 mstandby_mask;
  211. u8 mstandby_shift;
  212. if (!oh->class->sysc ||
  213. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  214. return -EINVAL;
  215. if (!oh->class->sysc->sysc_fields) {
  216. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  217. return -EINVAL;
  218. }
  219. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  220. mstandby_mask = (0x3 << mstandby_shift);
  221. *v &= ~mstandby_mask;
  222. *v |= __ffs(standbymode) << mstandby_shift;
  223. return 0;
  224. }
  225. /**
  226. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  227. * @oh: struct omap_hwmod *
  228. * @idlemode: SIDLEMODE field bits
  229. * @v: pointer to register contents to modify
  230. *
  231. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  232. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  233. * or 0 upon success.
  234. */
  235. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  236. {
  237. u32 sidle_mask;
  238. u8 sidle_shift;
  239. if (!oh->class->sysc ||
  240. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  241. return -EINVAL;
  242. if (!oh->class->sysc->sysc_fields) {
  243. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  244. return -EINVAL;
  245. }
  246. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  247. sidle_mask = (0x3 << sidle_shift);
  248. *v &= ~sidle_mask;
  249. *v |= __ffs(idlemode) << sidle_shift;
  250. return 0;
  251. }
  252. /**
  253. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  254. * @oh: struct omap_hwmod *
  255. * @clockact: CLOCKACTIVITY field bits
  256. * @v: pointer to register contents to modify
  257. *
  258. * Update the clockactivity mode bits in @v to be @clockact for the
  259. * @oh hwmod. Used for additional powersaving on some modules. Does
  260. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  261. * success.
  262. */
  263. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  264. {
  265. u32 clkact_mask;
  266. u8 clkact_shift;
  267. if (!oh->class->sysc ||
  268. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  269. return -EINVAL;
  270. if (!oh->class->sysc->sysc_fields) {
  271. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  272. return -EINVAL;
  273. }
  274. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  275. clkact_mask = (0x3 << clkact_shift);
  276. *v &= ~clkact_mask;
  277. *v |= clockact << clkact_shift;
  278. return 0;
  279. }
  280. /**
  281. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  282. * @oh: struct omap_hwmod *
  283. * @v: pointer to register contents to modify
  284. *
  285. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  286. * error or 0 upon success.
  287. */
  288. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  289. {
  290. u32 softrst_mask;
  291. if (!oh->class->sysc ||
  292. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  293. return -EINVAL;
  294. if (!oh->class->sysc->sysc_fields) {
  295. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  296. return -EINVAL;
  297. }
  298. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  299. *v |= softrst_mask;
  300. return 0;
  301. }
  302. /**
  303. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  304. * @oh: struct omap_hwmod *
  305. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  306. * @v: pointer to register contents to modify
  307. *
  308. * Update the module autoidle bit in @v to be @autoidle for the @oh
  309. * hwmod. The autoidle bit controls whether the module can gate
  310. * internal clocks automatically when it isn't doing anything; the
  311. * exact function of this bit varies on a per-module basis. This
  312. * function does not write to the hardware. Returns -EINVAL upon
  313. * error or 0 upon success.
  314. */
  315. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  316. u32 *v)
  317. {
  318. u32 autoidle_mask;
  319. u8 autoidle_shift;
  320. if (!oh->class->sysc ||
  321. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  322. return -EINVAL;
  323. if (!oh->class->sysc->sysc_fields) {
  324. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  325. return -EINVAL;
  326. }
  327. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  328. autoidle_mask = (0x3 << autoidle_shift);
  329. *v &= ~autoidle_mask;
  330. *v |= autoidle << autoidle_shift;
  331. return 0;
  332. }
  333. /**
  334. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  335. * @oh: struct omap_hwmod *
  336. *
  337. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  338. * upon error or 0 upon success.
  339. */
  340. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  341. {
  342. u32 wakeup_mask;
  343. if (!oh->class->sysc ||
  344. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  345. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  346. return -EINVAL;
  347. if (!oh->class->sysc->sysc_fields) {
  348. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  349. return -EINVAL;
  350. }
  351. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  352. *v |= wakeup_mask;
  353. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  354. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  355. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  356. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  357. return 0;
  358. }
  359. /**
  360. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  361. * @oh: struct omap_hwmod *
  362. *
  363. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  364. * upon error or 0 upon success.
  365. */
  366. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  367. {
  368. u32 wakeup_mask;
  369. if (!oh->class->sysc ||
  370. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  371. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  372. return -EINVAL;
  373. if (!oh->class->sysc->sysc_fields) {
  374. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  375. return -EINVAL;
  376. }
  377. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  378. *v &= ~wakeup_mask;
  379. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  380. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  381. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  382. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  383. return 0;
  384. }
  385. /**
  386. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  387. * @oh: struct omap_hwmod *
  388. *
  389. * Prevent the hardware module @oh from entering idle while the
  390. * hardare module initiator @init_oh is active. Useful when a module
  391. * will be accessed by a particular initiator (e.g., if a module will
  392. * be accessed by the IVA, there should be a sleepdep between the IVA
  393. * initiator and the module). Only applies to modules in smart-idle
  394. * mode. Returns -EINVAL upon error or passes along
  395. * clkdm_add_sleepdep() value upon success.
  396. */
  397. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  398. {
  399. if (!oh->_clk)
  400. return -EINVAL;
  401. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  402. }
  403. /**
  404. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  405. * @oh: struct omap_hwmod *
  406. *
  407. * Allow the hardware module @oh to enter idle while the hardare
  408. * module initiator @init_oh is active. Useful when a module will not
  409. * be accessed by a particular initiator (e.g., if a module will not
  410. * be accessed by the IVA, there should be no sleepdep between the IVA
  411. * initiator and the module). Only applies to modules in smart-idle
  412. * mode. Returns -EINVAL upon error or passes along
  413. * clkdm_del_sleepdep() value upon success.
  414. */
  415. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  416. {
  417. if (!oh->_clk)
  418. return -EINVAL;
  419. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  420. }
  421. /**
  422. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  423. * @oh: struct omap_hwmod *
  424. *
  425. * Called from _init_clocks(). Populates the @oh _clk (main
  426. * functional clock pointer) if a main_clk is present. Returns 0 on
  427. * success or -EINVAL on error.
  428. */
  429. static int _init_main_clk(struct omap_hwmod *oh)
  430. {
  431. int ret = 0;
  432. if (!oh->main_clk)
  433. return 0;
  434. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  435. if (!oh->_clk) {
  436. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  437. oh->name, oh->main_clk);
  438. return -EINVAL;
  439. }
  440. if (!oh->_clk->clkdm)
  441. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  442. oh->main_clk, oh->_clk->name);
  443. return ret;
  444. }
  445. /**
  446. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  447. * @oh: struct omap_hwmod *
  448. *
  449. * Called from _init_clocks(). Populates the @oh OCP slave interface
  450. * clock pointers. Returns 0 on success or -EINVAL on error.
  451. */
  452. static int _init_interface_clks(struct omap_hwmod *oh)
  453. {
  454. struct clk *c;
  455. int i;
  456. int ret = 0;
  457. if (oh->slaves_cnt == 0)
  458. return 0;
  459. for (i = 0; i < oh->slaves_cnt; i++) {
  460. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  461. if (!os->clk)
  462. continue;
  463. c = omap_clk_get_by_name(os->clk);
  464. if (!c) {
  465. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  466. oh->name, os->clk);
  467. ret = -EINVAL;
  468. }
  469. os->_clk = c;
  470. }
  471. return ret;
  472. }
  473. /**
  474. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  475. * @oh: struct omap_hwmod *
  476. *
  477. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  478. * clock pointers. Returns 0 on success or -EINVAL on error.
  479. */
  480. static int _init_opt_clks(struct omap_hwmod *oh)
  481. {
  482. struct omap_hwmod_opt_clk *oc;
  483. struct clk *c;
  484. int i;
  485. int ret = 0;
  486. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  487. c = omap_clk_get_by_name(oc->clk);
  488. if (!c) {
  489. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  490. oh->name, oc->clk);
  491. ret = -EINVAL;
  492. }
  493. oc->_clk = c;
  494. }
  495. return ret;
  496. }
  497. /**
  498. * _enable_clocks - enable hwmod main clock and interface clocks
  499. * @oh: struct omap_hwmod *
  500. *
  501. * Enables all clocks necessary for register reads and writes to succeed
  502. * on the hwmod @oh. Returns 0.
  503. */
  504. static int _enable_clocks(struct omap_hwmod *oh)
  505. {
  506. int i;
  507. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  508. if (oh->_clk)
  509. clk_enable(oh->_clk);
  510. if (oh->slaves_cnt > 0) {
  511. for (i = 0; i < oh->slaves_cnt; i++) {
  512. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  513. struct clk *c = os->_clk;
  514. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  515. clk_enable(c);
  516. }
  517. }
  518. /* The opt clocks are controlled by the device driver. */
  519. return 0;
  520. }
  521. /**
  522. * _disable_clocks - disable hwmod main clock and interface clocks
  523. * @oh: struct omap_hwmod *
  524. *
  525. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  526. */
  527. static int _disable_clocks(struct omap_hwmod *oh)
  528. {
  529. int i;
  530. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  531. if (oh->_clk)
  532. clk_disable(oh->_clk);
  533. if (oh->slaves_cnt > 0) {
  534. for (i = 0; i < oh->slaves_cnt; i++) {
  535. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  536. struct clk *c = os->_clk;
  537. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  538. clk_disable(c);
  539. }
  540. }
  541. /* The opt clocks are controlled by the device driver. */
  542. return 0;
  543. }
  544. static void _enable_optional_clocks(struct omap_hwmod *oh)
  545. {
  546. struct omap_hwmod_opt_clk *oc;
  547. int i;
  548. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  549. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  550. if (oc->_clk) {
  551. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  552. oc->_clk->name);
  553. clk_enable(oc->_clk);
  554. }
  555. }
  556. static void _disable_optional_clocks(struct omap_hwmod *oh)
  557. {
  558. struct omap_hwmod_opt_clk *oc;
  559. int i;
  560. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  561. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  562. if (oc->_clk) {
  563. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  564. oc->_clk->name);
  565. clk_disable(oc->_clk);
  566. }
  567. }
  568. /**
  569. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  570. * @oh: struct omap_hwmod *
  571. *
  572. * Returns the array index of the OCP slave port that the MPU
  573. * addresses the device on, or -EINVAL upon error or not found.
  574. */
  575. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  576. {
  577. int i;
  578. int found = 0;
  579. if (!oh || oh->slaves_cnt == 0)
  580. return -EINVAL;
  581. for (i = 0; i < oh->slaves_cnt; i++) {
  582. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  583. if (os->user & OCP_USER_MPU) {
  584. found = 1;
  585. break;
  586. }
  587. }
  588. if (found)
  589. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  590. oh->name, i);
  591. else
  592. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  593. oh->name);
  594. return (found) ? i : -EINVAL;
  595. }
  596. /**
  597. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  598. * @oh: struct omap_hwmod *
  599. *
  600. * Return the virtual address of the base of the register target of
  601. * device @oh, or NULL on error.
  602. */
  603. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  604. {
  605. struct omap_hwmod_ocp_if *os;
  606. struct omap_hwmod_addr_space *mem;
  607. int i;
  608. int found = 0;
  609. void __iomem *va_start;
  610. if (!oh || oh->slaves_cnt == 0)
  611. return NULL;
  612. os = oh->slaves[index];
  613. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  614. if (mem->flags & ADDR_TYPE_RT) {
  615. found = 1;
  616. break;
  617. }
  618. }
  619. if (found) {
  620. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  621. if (!va_start) {
  622. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  623. return NULL;
  624. }
  625. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  626. oh->name, va_start);
  627. } else {
  628. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  629. oh->name);
  630. }
  631. return (found) ? va_start : NULL;
  632. }
  633. /**
  634. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  635. * @oh: struct omap_hwmod *
  636. *
  637. * If module is marked as SWSUP_SIDLE, force the module out of slave
  638. * idle; otherwise, configure it for smart-idle. If module is marked
  639. * as SWSUP_MSUSPEND, force the module out of master standby;
  640. * otherwise, configure it for smart-standby. No return value.
  641. */
  642. static void _enable_sysc(struct omap_hwmod *oh)
  643. {
  644. u8 idlemode, sf;
  645. u32 v;
  646. if (!oh->class->sysc)
  647. return;
  648. v = oh->_sysc_cache;
  649. sf = oh->class->sysc->sysc_flags;
  650. if (sf & SYSC_HAS_SIDLEMODE) {
  651. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  652. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  653. _set_slave_idlemode(oh, idlemode, &v);
  654. }
  655. if (sf & SYSC_HAS_MIDLEMODE) {
  656. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  657. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  658. _set_master_standbymode(oh, idlemode, &v);
  659. }
  660. /*
  661. * XXX The clock framework should handle this, by
  662. * calling into this code. But this must wait until the
  663. * clock structures are tagged with omap_hwmod entries
  664. */
  665. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  666. (sf & SYSC_HAS_CLOCKACTIVITY))
  667. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  668. /* If slave is in SMARTIDLE, also enable wakeup */
  669. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  670. _enable_wakeup(oh, &v);
  671. _write_sysconfig(v, oh);
  672. /*
  673. * Set the autoidle bit only after setting the smartidle bit
  674. * Setting this will not have any impact on the other modules.
  675. */
  676. if (sf & SYSC_HAS_AUTOIDLE) {
  677. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  678. 0 : 1;
  679. _set_module_autoidle(oh, idlemode, &v);
  680. _write_sysconfig(v, oh);
  681. }
  682. }
  683. /**
  684. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  685. * @oh: struct omap_hwmod *
  686. *
  687. * If module is marked as SWSUP_SIDLE, force the module into slave
  688. * idle; otherwise, configure it for smart-idle. If module is marked
  689. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  690. * configure it for smart-standby. No return value.
  691. */
  692. static void _idle_sysc(struct omap_hwmod *oh)
  693. {
  694. u8 idlemode, sf;
  695. u32 v;
  696. if (!oh->class->sysc)
  697. return;
  698. v = oh->_sysc_cache;
  699. sf = oh->class->sysc->sysc_flags;
  700. if (sf & SYSC_HAS_SIDLEMODE) {
  701. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  702. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  703. _set_slave_idlemode(oh, idlemode, &v);
  704. }
  705. if (sf & SYSC_HAS_MIDLEMODE) {
  706. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  707. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  708. _set_master_standbymode(oh, idlemode, &v);
  709. }
  710. /* If slave is in SMARTIDLE, also enable wakeup */
  711. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  712. _enable_wakeup(oh, &v);
  713. _write_sysconfig(v, oh);
  714. }
  715. /**
  716. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  717. * @oh: struct omap_hwmod *
  718. *
  719. * Force the module into slave idle and master suspend. No return
  720. * value.
  721. */
  722. static void _shutdown_sysc(struct omap_hwmod *oh)
  723. {
  724. u32 v;
  725. u8 sf;
  726. if (!oh->class->sysc)
  727. return;
  728. v = oh->_sysc_cache;
  729. sf = oh->class->sysc->sysc_flags;
  730. if (sf & SYSC_HAS_SIDLEMODE)
  731. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  732. if (sf & SYSC_HAS_MIDLEMODE)
  733. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  734. if (sf & SYSC_HAS_AUTOIDLE)
  735. _set_module_autoidle(oh, 1, &v);
  736. _write_sysconfig(v, oh);
  737. }
  738. /**
  739. * _lookup - find an omap_hwmod by name
  740. * @name: find an omap_hwmod by name
  741. *
  742. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  743. */
  744. static struct omap_hwmod *_lookup(const char *name)
  745. {
  746. struct omap_hwmod *oh, *temp_oh;
  747. oh = NULL;
  748. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  749. if (!strcmp(name, temp_oh->name)) {
  750. oh = temp_oh;
  751. break;
  752. }
  753. }
  754. return oh;
  755. }
  756. /**
  757. * _init_clocks - clk_get() all clocks associated with this hwmod
  758. * @oh: struct omap_hwmod *
  759. * @data: not used; pass NULL
  760. *
  761. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  762. * Resolves all clock names embedded in the hwmod. Returns 0 on
  763. * success, or a negative error code on failure.
  764. */
  765. static int _init_clocks(struct omap_hwmod *oh, void *data)
  766. {
  767. int ret = 0;
  768. if (oh->_state != _HWMOD_STATE_REGISTERED)
  769. return 0;
  770. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  771. ret |= _init_main_clk(oh);
  772. ret |= _init_interface_clks(oh);
  773. ret |= _init_opt_clks(oh);
  774. if (!ret)
  775. oh->_state = _HWMOD_STATE_CLKS_INITED;
  776. return 0;
  777. }
  778. /**
  779. * _wait_target_ready - wait for a module to leave slave idle
  780. * @oh: struct omap_hwmod *
  781. *
  782. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  783. * does not have an IDLEST bit or if the module successfully leaves
  784. * slave idle; otherwise, pass along the return value of the
  785. * appropriate *_cm_wait_module_ready() function.
  786. */
  787. static int _wait_target_ready(struct omap_hwmod *oh)
  788. {
  789. struct omap_hwmod_ocp_if *os;
  790. int ret;
  791. if (!oh)
  792. return -EINVAL;
  793. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  794. return 0;
  795. os = oh->slaves[oh->_mpu_port_index];
  796. if (oh->flags & HWMOD_NO_IDLEST)
  797. return 0;
  798. /* XXX check module SIDLEMODE */
  799. /* XXX check clock enable states */
  800. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  801. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  802. oh->prcm.omap2.idlest_reg_id,
  803. oh->prcm.omap2.idlest_idle_bit);
  804. } else if (cpu_is_omap44xx()) {
  805. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  806. } else {
  807. BUG();
  808. };
  809. return ret;
  810. }
  811. /**
  812. * _lookup_hardreset - return the register bit shift for this hwmod/reset line
  813. * @oh: struct omap_hwmod *
  814. * @name: name of the reset line in the context of this hwmod
  815. *
  816. * Return the bit position of the reset line that match the
  817. * input name. Return -ENOENT if not found.
  818. */
  819. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
  820. {
  821. int i;
  822. for (i = 0; i < oh->rst_lines_cnt; i++) {
  823. const char *rst_line = oh->rst_lines[i].name;
  824. if (!strcmp(rst_line, name)) {
  825. u8 shift = oh->rst_lines[i].rst_shift;
  826. pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
  827. oh->name, rst_line, shift);
  828. return shift;
  829. }
  830. }
  831. return -ENOENT;
  832. }
  833. /**
  834. * _assert_hardreset - assert the HW reset line of submodules
  835. * contained in the hwmod module.
  836. * @oh: struct omap_hwmod *
  837. * @name: name of the reset line to lookup and assert
  838. *
  839. * Some IP like dsp, ipu or iva contain processor that require
  840. * an HW reset line to be assert / deassert in order to enable fully
  841. * the IP.
  842. */
  843. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  844. {
  845. u8 shift;
  846. if (!oh)
  847. return -EINVAL;
  848. shift = _lookup_hardreset(oh, name);
  849. if (IS_ERR_VALUE(shift))
  850. return shift;
  851. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  852. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  853. shift);
  854. else if (cpu_is_omap44xx())
  855. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  856. shift);
  857. else
  858. return -EINVAL;
  859. }
  860. /**
  861. * _deassert_hardreset - deassert the HW reset line of submodules contained
  862. * in the hwmod module.
  863. * @oh: struct omap_hwmod *
  864. * @name: name of the reset line to look up and deassert
  865. *
  866. * Some IP like dsp, ipu or iva contain processor that require
  867. * an HW reset line to be assert / deassert in order to enable fully
  868. * the IP.
  869. */
  870. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  871. {
  872. u8 shift;
  873. int r;
  874. if (!oh)
  875. return -EINVAL;
  876. shift = _lookup_hardreset(oh, name);
  877. if (IS_ERR_VALUE(shift))
  878. return shift;
  879. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  880. r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  881. shift);
  882. else if (cpu_is_omap44xx())
  883. r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  884. shift);
  885. else
  886. return -EINVAL;
  887. if (r == -EBUSY)
  888. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  889. return r;
  890. }
  891. /**
  892. * _read_hardreset - read the HW reset line state of submodules
  893. * contained in the hwmod module
  894. * @oh: struct omap_hwmod *
  895. * @name: name of the reset line to look up and read
  896. *
  897. * Return the state of the reset line.
  898. */
  899. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  900. {
  901. u8 shift;
  902. if (!oh)
  903. return -EINVAL;
  904. shift = _lookup_hardreset(oh, name);
  905. if (IS_ERR_VALUE(shift))
  906. return shift;
  907. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  908. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  909. shift);
  910. } else if (cpu_is_omap44xx()) {
  911. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  912. shift);
  913. } else {
  914. return -EINVAL;
  915. }
  916. }
  917. /**
  918. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  919. * @oh: struct omap_hwmod *
  920. *
  921. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  922. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  923. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  924. * the module did not reset in time, or 0 upon success.
  925. *
  926. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  927. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  928. * use the SYSCONFIG softreset bit to provide the status.
  929. *
  930. * Note that some IP like McBSP do have reset control but don't have
  931. * reset status.
  932. */
  933. static int _ocp_softreset(struct omap_hwmod *oh)
  934. {
  935. u32 v;
  936. int c = 0;
  937. int ret = 0;
  938. if (!oh->class->sysc ||
  939. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  940. return -EINVAL;
  941. /* clocks must be on for this operation */
  942. if (oh->_state != _HWMOD_STATE_ENABLED) {
  943. pr_warning("omap_hwmod: %s: reset can only be entered from "
  944. "enabled state\n", oh->name);
  945. return -EINVAL;
  946. }
  947. /* For some modules, all optionnal clocks need to be enabled as well */
  948. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  949. _enable_optional_clocks(oh);
  950. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  951. v = oh->_sysc_cache;
  952. ret = _set_softreset(oh, &v);
  953. if (ret)
  954. goto dis_opt_clks;
  955. _write_sysconfig(v, oh);
  956. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  957. omap_test_timeout((omap_hwmod_read(oh,
  958. oh->class->sysc->syss_offs)
  959. & SYSS_RESETDONE_MASK),
  960. MAX_MODULE_SOFTRESET_WAIT, c);
  961. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  962. omap_test_timeout(!(omap_hwmod_read(oh,
  963. oh->class->sysc->sysc_offs)
  964. & SYSC_TYPE2_SOFTRESET_MASK),
  965. MAX_MODULE_SOFTRESET_WAIT, c);
  966. if (c == MAX_MODULE_SOFTRESET_WAIT)
  967. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  968. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  969. else
  970. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  971. /*
  972. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  973. * _wait_target_ready() or _reset()
  974. */
  975. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  976. dis_opt_clks:
  977. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  978. _disable_optional_clocks(oh);
  979. return ret;
  980. }
  981. /**
  982. * _reset - reset an omap_hwmod
  983. * @oh: struct omap_hwmod *
  984. *
  985. * Resets an omap_hwmod @oh. The default software reset mechanism for
  986. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  987. * bit. However, some hwmods cannot be reset via this method: some
  988. * are not targets and therefore have no OCP header registers to
  989. * access; others (like the IVA) have idiosyncratic reset sequences.
  990. * So for these relatively rare cases, custom reset code can be
  991. * supplied in the struct omap_hwmod_class .reset function pointer.
  992. * Passes along the return value from either _reset() or the custom
  993. * reset function - these must return -EINVAL if the hwmod cannot be
  994. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  995. * the module did not reset in time, or 0 upon success.
  996. */
  997. static int _reset(struct omap_hwmod *oh)
  998. {
  999. int ret;
  1000. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1001. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1002. return ret;
  1003. }
  1004. /**
  1005. * _enable - enable an omap_hwmod
  1006. * @oh: struct omap_hwmod *
  1007. *
  1008. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1009. * register target. Returns -EINVAL if the hwmod is in the wrong
  1010. * state or passes along the return value of _wait_target_ready().
  1011. */
  1012. static int _enable(struct omap_hwmod *oh)
  1013. {
  1014. int r;
  1015. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1016. oh->_state != _HWMOD_STATE_IDLE &&
  1017. oh->_state != _HWMOD_STATE_DISABLED) {
  1018. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1019. "from initialized, idle, or disabled state\n", oh->name);
  1020. return -EINVAL;
  1021. }
  1022. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1023. /*
  1024. * If an IP contains only one HW reset line, then de-assert it in order
  1025. * to allow to enable the clocks. Otherwise the PRCM will return
  1026. * Intransition status, and the init will failed.
  1027. */
  1028. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1029. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1030. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1031. /* Mux pins for device runtime if populated */
  1032. if (oh->mux)
  1033. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1034. _add_initiator_dep(oh, mpu_oh);
  1035. _enable_clocks(oh);
  1036. r = _wait_target_ready(oh);
  1037. if (!r) {
  1038. oh->_state = _HWMOD_STATE_ENABLED;
  1039. /* Access the sysconfig only if the target is ready */
  1040. if (oh->class->sysc) {
  1041. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1042. _update_sysc_cache(oh);
  1043. _enable_sysc(oh);
  1044. }
  1045. } else {
  1046. _disable_clocks(oh);
  1047. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1048. oh->name, r);
  1049. }
  1050. return r;
  1051. }
  1052. /**
  1053. * _idle - idle an omap_hwmod
  1054. * @oh: struct omap_hwmod *
  1055. *
  1056. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1057. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1058. * state or returns 0.
  1059. */
  1060. static int _idle(struct omap_hwmod *oh)
  1061. {
  1062. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1063. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1064. "enabled state\n", oh->name);
  1065. return -EINVAL;
  1066. }
  1067. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1068. if (oh->class->sysc)
  1069. _idle_sysc(oh);
  1070. _del_initiator_dep(oh, mpu_oh);
  1071. _disable_clocks(oh);
  1072. /* Mux pins for device idle if populated */
  1073. if (oh->mux)
  1074. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1075. oh->_state = _HWMOD_STATE_IDLE;
  1076. return 0;
  1077. }
  1078. /**
  1079. * _shutdown - shutdown an omap_hwmod
  1080. * @oh: struct omap_hwmod *
  1081. *
  1082. * Shut down an omap_hwmod @oh. This should be called when the driver
  1083. * used for the hwmod is removed or unloaded or if the driver is not
  1084. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1085. * state or returns 0.
  1086. */
  1087. static int _shutdown(struct omap_hwmod *oh)
  1088. {
  1089. int ret;
  1090. u8 prev_state;
  1091. if (oh->_state != _HWMOD_STATE_IDLE &&
  1092. oh->_state != _HWMOD_STATE_ENABLED) {
  1093. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1094. "from idle, or enabled state\n", oh->name);
  1095. return -EINVAL;
  1096. }
  1097. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1098. if (oh->class->pre_shutdown) {
  1099. prev_state = oh->_state;
  1100. if (oh->_state == _HWMOD_STATE_IDLE)
  1101. _enable(oh);
  1102. ret = oh->class->pre_shutdown(oh);
  1103. if (ret) {
  1104. if (prev_state == _HWMOD_STATE_IDLE)
  1105. _idle(oh);
  1106. return ret;
  1107. }
  1108. }
  1109. if (oh->class->sysc)
  1110. _shutdown_sysc(oh);
  1111. /*
  1112. * If an IP contains only one HW reset line, then assert it
  1113. * before disabling the clocks and shutting down the IP.
  1114. */
  1115. if (oh->rst_lines_cnt == 1)
  1116. _assert_hardreset(oh, oh->rst_lines[0].name);
  1117. /* clocks and deps are already disabled in idle */
  1118. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1119. _del_initiator_dep(oh, mpu_oh);
  1120. /* XXX what about the other system initiators here? dma, dsp */
  1121. _disable_clocks(oh);
  1122. }
  1123. /* XXX Should this code also force-disable the optional clocks? */
  1124. /* Mux pins to safe mode or use populated off mode values */
  1125. if (oh->mux)
  1126. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1127. oh->_state = _HWMOD_STATE_DISABLED;
  1128. return 0;
  1129. }
  1130. /**
  1131. * _setup - do initial configuration of omap_hwmod
  1132. * @oh: struct omap_hwmod *
  1133. *
  1134. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1135. * OCP_SYSCONFIG register. Returns 0.
  1136. */
  1137. static int _setup(struct omap_hwmod *oh, void *data)
  1138. {
  1139. int i, r;
  1140. u8 postsetup_state;
  1141. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1142. return 0;
  1143. /* Set iclk autoidle mode */
  1144. if (oh->slaves_cnt > 0) {
  1145. for (i = 0; i < oh->slaves_cnt; i++) {
  1146. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1147. struct clk *c = os->_clk;
  1148. if (!c)
  1149. continue;
  1150. if (os->flags & OCPIF_SWSUP_IDLE) {
  1151. /* XXX omap_iclk_deny_idle(c); */
  1152. } else {
  1153. /* XXX omap_iclk_allow_idle(c); */
  1154. clk_enable(c);
  1155. }
  1156. }
  1157. }
  1158. oh->_state = _HWMOD_STATE_INITIALIZED;
  1159. /*
  1160. * In the case of hwmod with hardreset that should not be
  1161. * de-assert at boot time, we have to keep the module
  1162. * initialized, because we cannot enable it properly with the
  1163. * reset asserted. Exit without warning because that behavior is
  1164. * expected.
  1165. */
  1166. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1167. return 0;
  1168. r = _enable(oh);
  1169. if (r) {
  1170. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1171. oh->name, oh->_state);
  1172. return 0;
  1173. }
  1174. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1175. _reset(oh);
  1176. /*
  1177. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1178. * The _enable() function should be split to
  1179. * avoid the rewrite of the OCP_SYSCONFIG register.
  1180. */
  1181. if (oh->class->sysc) {
  1182. _update_sysc_cache(oh);
  1183. _enable_sysc(oh);
  1184. }
  1185. }
  1186. postsetup_state = oh->_postsetup_state;
  1187. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1188. postsetup_state = _HWMOD_STATE_ENABLED;
  1189. /*
  1190. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1191. * it should be set by the core code as a runtime flag during startup
  1192. */
  1193. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1194. (postsetup_state == _HWMOD_STATE_IDLE))
  1195. postsetup_state = _HWMOD_STATE_ENABLED;
  1196. if (postsetup_state == _HWMOD_STATE_IDLE)
  1197. _idle(oh);
  1198. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1199. _shutdown(oh);
  1200. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1201. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1202. oh->name, postsetup_state);
  1203. return 0;
  1204. }
  1205. /**
  1206. * _register - register a struct omap_hwmod
  1207. * @oh: struct omap_hwmod *
  1208. *
  1209. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1210. * already has been registered by the same name; -EINVAL if the
  1211. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1212. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1213. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1214. * success.
  1215. *
  1216. * XXX The data should be copied into bootmem, so the original data
  1217. * should be marked __initdata and freed after init. This would allow
  1218. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1219. * that the copy process would be relatively complex due to the large number
  1220. * of substructures.
  1221. */
  1222. static int __init _register(struct omap_hwmod *oh)
  1223. {
  1224. int ms_id;
  1225. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1226. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1227. return -EINVAL;
  1228. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1229. if (_lookup(oh->name))
  1230. return -EEXIST;
  1231. ms_id = _find_mpu_port_index(oh);
  1232. if (!IS_ERR_VALUE(ms_id))
  1233. oh->_mpu_port_index = ms_id;
  1234. else
  1235. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1236. list_add_tail(&oh->node, &omap_hwmod_list);
  1237. spin_lock_init(&oh->_lock);
  1238. oh->_state = _HWMOD_STATE_REGISTERED;
  1239. /*
  1240. * XXX Rather than doing a strcmp(), this should test a flag
  1241. * set in the hwmod data, inserted by the autogenerator code.
  1242. */
  1243. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1244. mpu_oh = oh;
  1245. return 0;
  1246. }
  1247. /* Public functions */
  1248. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1249. {
  1250. if (oh->flags & HWMOD_16BIT_REG)
  1251. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1252. else
  1253. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1254. }
  1255. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1256. {
  1257. if (oh->flags & HWMOD_16BIT_REG)
  1258. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1259. else
  1260. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1261. }
  1262. /**
  1263. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1264. * @oh: struct omap_hwmod *
  1265. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1266. *
  1267. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1268. * local copy. Intended to be used by drivers that have some erratum
  1269. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1270. * -EINVAL if @oh is null, or passes along the return value from
  1271. * _set_slave_idlemode().
  1272. *
  1273. * XXX Does this function have any current users? If not, we should
  1274. * remove it; it is better to let the rest of the hwmod code handle this.
  1275. * Any users of this function should be scrutinized carefully.
  1276. */
  1277. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1278. {
  1279. u32 v;
  1280. int retval = 0;
  1281. if (!oh)
  1282. return -EINVAL;
  1283. v = oh->_sysc_cache;
  1284. retval = _set_slave_idlemode(oh, idlemode, &v);
  1285. if (!retval)
  1286. _write_sysconfig(v, oh);
  1287. return retval;
  1288. }
  1289. /**
  1290. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1291. * @name: name of the omap_hwmod to look up
  1292. *
  1293. * Given a @name of an omap_hwmod, return a pointer to the registered
  1294. * struct omap_hwmod *, or NULL upon error.
  1295. */
  1296. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1297. {
  1298. struct omap_hwmod *oh;
  1299. if (!name)
  1300. return NULL;
  1301. oh = _lookup(name);
  1302. return oh;
  1303. }
  1304. /**
  1305. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1306. * @fn: pointer to a callback function
  1307. * @data: void * data to pass to callback function
  1308. *
  1309. * Call @fn for each registered omap_hwmod, passing @data to each
  1310. * function. @fn must return 0 for success or any other value for
  1311. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1312. * will stop and the non-zero return value will be passed to the
  1313. * caller of omap_hwmod_for_each(). @fn is called with
  1314. * omap_hwmod_for_each() held.
  1315. */
  1316. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1317. void *data)
  1318. {
  1319. struct omap_hwmod *temp_oh;
  1320. int ret;
  1321. if (!fn)
  1322. return -EINVAL;
  1323. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1324. ret = (*fn)(temp_oh, data);
  1325. if (ret)
  1326. break;
  1327. }
  1328. return ret;
  1329. }
  1330. /**
  1331. * omap_hwmod_register - register an array of hwmods
  1332. * @ohs: pointer to an array of omap_hwmods to register
  1333. *
  1334. * Intended to be called early in boot before the clock framework is
  1335. * initialized. If @ohs is not null, will register all omap_hwmods
  1336. * listed in @ohs that are valid for this chip. Returns 0.
  1337. */
  1338. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1339. {
  1340. int r, i;
  1341. if (!ohs)
  1342. return 0;
  1343. i = 0;
  1344. do {
  1345. if (!omap_chip_is(ohs[i]->omap_chip))
  1346. continue;
  1347. r = _register(ohs[i]);
  1348. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1349. r);
  1350. } while (ohs[++i]);
  1351. return 0;
  1352. }
  1353. /*
  1354. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1355. *
  1356. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1357. * Assumes the caller takes care of locking if needed.
  1358. */
  1359. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1360. {
  1361. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1362. return 0;
  1363. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1364. return 0;
  1365. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1366. if (!oh->_mpu_rt_va)
  1367. pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
  1368. __func__, oh->name);
  1369. return 0;
  1370. }
  1371. /**
  1372. * omap_hwmod_setup_one - set up a single hwmod
  1373. * @oh_name: const char * name of the already-registered hwmod to set up
  1374. *
  1375. * Must be called after omap2_clk_init(). Resolves the struct clk
  1376. * names to struct clk pointers for each registered omap_hwmod. Also
  1377. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1378. * success.
  1379. */
  1380. int __init omap_hwmod_setup_one(const char *oh_name)
  1381. {
  1382. struct omap_hwmod *oh;
  1383. int r;
  1384. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1385. if (!mpu_oh) {
  1386. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1387. oh_name, MPU_INITIATOR_NAME);
  1388. return -EINVAL;
  1389. }
  1390. oh = _lookup(oh_name);
  1391. if (!oh) {
  1392. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1393. return -EINVAL;
  1394. }
  1395. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1396. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1397. r = _populate_mpu_rt_base(oh, NULL);
  1398. if (IS_ERR_VALUE(r)) {
  1399. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1400. return -EINVAL;
  1401. }
  1402. r = _init_clocks(oh, NULL);
  1403. if (IS_ERR_VALUE(r)) {
  1404. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1405. return -EINVAL;
  1406. }
  1407. _setup(oh, NULL);
  1408. return 0;
  1409. }
  1410. /**
  1411. * omap_hwmod_setup - do some post-clock framework initialization
  1412. *
  1413. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1414. * to struct clk pointers for each registered omap_hwmod. Also calls
  1415. * _setup() on each hwmod. Returns 0 upon success.
  1416. */
  1417. static int __init omap_hwmod_setup_all(void)
  1418. {
  1419. int r;
  1420. if (!mpu_oh) {
  1421. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1422. __func__, MPU_INITIATOR_NAME);
  1423. return -EINVAL;
  1424. }
  1425. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1426. r = omap_hwmod_for_each(_init_clocks, NULL);
  1427. WARN(IS_ERR_VALUE(r),
  1428. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1429. omap_hwmod_for_each(_setup, NULL);
  1430. return 0;
  1431. }
  1432. core_initcall(omap_hwmod_setup_all);
  1433. /**
  1434. * omap_hwmod_enable - enable an omap_hwmod
  1435. * @oh: struct omap_hwmod *
  1436. *
  1437. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1438. * Returns -EINVAL on error or passes along the return value from _enable().
  1439. */
  1440. int omap_hwmod_enable(struct omap_hwmod *oh)
  1441. {
  1442. int r;
  1443. unsigned long flags;
  1444. if (!oh)
  1445. return -EINVAL;
  1446. spin_lock_irqsave(&oh->_lock, flags);
  1447. r = _enable(oh);
  1448. spin_unlock_irqrestore(&oh->_lock, flags);
  1449. return r;
  1450. }
  1451. /**
  1452. * omap_hwmod_idle - idle an omap_hwmod
  1453. * @oh: struct omap_hwmod *
  1454. *
  1455. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1456. * Returns -EINVAL on error or passes along the return value from _idle().
  1457. */
  1458. int omap_hwmod_idle(struct omap_hwmod *oh)
  1459. {
  1460. unsigned long flags;
  1461. if (!oh)
  1462. return -EINVAL;
  1463. spin_lock_irqsave(&oh->_lock, flags);
  1464. _idle(oh);
  1465. spin_unlock_irqrestore(&oh->_lock, flags);
  1466. return 0;
  1467. }
  1468. /**
  1469. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1470. * @oh: struct omap_hwmod *
  1471. *
  1472. * Shutdown an omap_hwmod @oh. Intended to be called by
  1473. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1474. * the return value from _shutdown().
  1475. */
  1476. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1477. {
  1478. unsigned long flags;
  1479. if (!oh)
  1480. return -EINVAL;
  1481. spin_lock_irqsave(&oh->_lock, flags);
  1482. _shutdown(oh);
  1483. spin_unlock_irqrestore(&oh->_lock, flags);
  1484. return 0;
  1485. }
  1486. /**
  1487. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1488. * @oh: struct omap_hwmod *oh
  1489. *
  1490. * Intended to be called by the omap_device code.
  1491. */
  1492. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1493. {
  1494. unsigned long flags;
  1495. spin_lock_irqsave(&oh->_lock, flags);
  1496. _enable_clocks(oh);
  1497. spin_unlock_irqrestore(&oh->_lock, flags);
  1498. return 0;
  1499. }
  1500. /**
  1501. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1502. * @oh: struct omap_hwmod *oh
  1503. *
  1504. * Intended to be called by the omap_device code.
  1505. */
  1506. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1507. {
  1508. unsigned long flags;
  1509. spin_lock_irqsave(&oh->_lock, flags);
  1510. _disable_clocks(oh);
  1511. spin_unlock_irqrestore(&oh->_lock, flags);
  1512. return 0;
  1513. }
  1514. /**
  1515. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1516. * @oh: struct omap_hwmod *oh
  1517. *
  1518. * Intended to be called by drivers and core code when all posted
  1519. * writes to a device must complete before continuing further
  1520. * execution (for example, after clearing some device IRQSTATUS
  1521. * register bits)
  1522. *
  1523. * XXX what about targets with multiple OCP threads?
  1524. */
  1525. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1526. {
  1527. BUG_ON(!oh);
  1528. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1529. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1530. "device configuration\n", oh->name);
  1531. return;
  1532. }
  1533. /*
  1534. * Forces posted writes to complete on the OCP thread handling
  1535. * register writes
  1536. */
  1537. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1538. }
  1539. /**
  1540. * omap_hwmod_reset - reset the hwmod
  1541. * @oh: struct omap_hwmod *
  1542. *
  1543. * Under some conditions, a driver may wish to reset the entire device.
  1544. * Called from omap_device code. Returns -EINVAL on error or passes along
  1545. * the return value from _reset().
  1546. */
  1547. int omap_hwmod_reset(struct omap_hwmod *oh)
  1548. {
  1549. int r;
  1550. unsigned long flags;
  1551. if (!oh)
  1552. return -EINVAL;
  1553. spin_lock_irqsave(&oh->_lock, flags);
  1554. r = _reset(oh);
  1555. spin_unlock_irqrestore(&oh->_lock, flags);
  1556. return r;
  1557. }
  1558. /**
  1559. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1560. * @oh: struct omap_hwmod *
  1561. * @res: pointer to the first element of an array of struct resource to fill
  1562. *
  1563. * Count the number of struct resource array elements necessary to
  1564. * contain omap_hwmod @oh resources. Intended to be called by code
  1565. * that registers omap_devices. Intended to be used to determine the
  1566. * size of a dynamically-allocated struct resource array, before
  1567. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1568. * resource array elements needed.
  1569. *
  1570. * XXX This code is not optimized. It could attempt to merge adjacent
  1571. * resource IDs.
  1572. *
  1573. */
  1574. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1575. {
  1576. int ret, i;
  1577. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1578. for (i = 0; i < oh->slaves_cnt; i++)
  1579. ret += oh->slaves[i]->addr_cnt;
  1580. return ret;
  1581. }
  1582. /**
  1583. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1584. * @oh: struct omap_hwmod *
  1585. * @res: pointer to the first element of an array of struct resource to fill
  1586. *
  1587. * Fill the struct resource array @res with resource data from the
  1588. * omap_hwmod @oh. Intended to be called by code that registers
  1589. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1590. * number of array elements filled.
  1591. */
  1592. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1593. {
  1594. int i, j;
  1595. int r = 0;
  1596. /* For each IRQ, DMA, memory area, fill in array.*/
  1597. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1598. (res + r)->name = (oh->mpu_irqs + i)->name;
  1599. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1600. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1601. (res + r)->flags = IORESOURCE_IRQ;
  1602. r++;
  1603. }
  1604. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1605. (res + r)->name = (oh->sdma_reqs + i)->name;
  1606. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1607. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1608. (res + r)->flags = IORESOURCE_DMA;
  1609. r++;
  1610. }
  1611. for (i = 0; i < oh->slaves_cnt; i++) {
  1612. struct omap_hwmod_ocp_if *os;
  1613. os = oh->slaves[i];
  1614. for (j = 0; j < os->addr_cnt; j++) {
  1615. (res + r)->name = (os->addr + j)->name;
  1616. (res + r)->start = (os->addr + j)->pa_start;
  1617. (res + r)->end = (os->addr + j)->pa_end;
  1618. (res + r)->flags = IORESOURCE_MEM;
  1619. r++;
  1620. }
  1621. }
  1622. return r;
  1623. }
  1624. /**
  1625. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1626. * @oh: struct omap_hwmod *
  1627. *
  1628. * Return the powerdomain pointer associated with the OMAP module
  1629. * @oh's main clock. If @oh does not have a main clk, return the
  1630. * powerdomain associated with the interface clock associated with the
  1631. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1632. * instead?) Returns NULL on error, or a struct powerdomain * on
  1633. * success.
  1634. */
  1635. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1636. {
  1637. struct clk *c;
  1638. if (!oh)
  1639. return NULL;
  1640. if (oh->_clk) {
  1641. c = oh->_clk;
  1642. } else {
  1643. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1644. return NULL;
  1645. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1646. }
  1647. if (!c->clkdm)
  1648. return NULL;
  1649. return c->clkdm->pwrdm.ptr;
  1650. }
  1651. /**
  1652. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1653. * @oh: struct omap_hwmod *
  1654. *
  1655. * Returns the virtual address corresponding to the beginning of the
  1656. * module's register target, in the address range that is intended to
  1657. * be used by the MPU. Returns the virtual address upon success or NULL
  1658. * upon error.
  1659. */
  1660. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1661. {
  1662. if (!oh)
  1663. return NULL;
  1664. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1665. return NULL;
  1666. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1667. return NULL;
  1668. return oh->_mpu_rt_va;
  1669. }
  1670. /**
  1671. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1672. * @oh: struct omap_hwmod *
  1673. * @init_oh: struct omap_hwmod * (initiator)
  1674. *
  1675. * Add a sleep dependency between the initiator @init_oh and @oh.
  1676. * Intended to be called by DSP/Bridge code via platform_data for the
  1677. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1678. * code needs to add/del initiator dependencies dynamically
  1679. * before/after accessing a device. Returns the return value from
  1680. * _add_initiator_dep().
  1681. *
  1682. * XXX Keep a usecount in the clockdomain code
  1683. */
  1684. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1685. struct omap_hwmod *init_oh)
  1686. {
  1687. return _add_initiator_dep(oh, init_oh);
  1688. }
  1689. /*
  1690. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1691. * for context save/restore operations?
  1692. */
  1693. /**
  1694. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1695. * @oh: struct omap_hwmod *
  1696. * @init_oh: struct omap_hwmod * (initiator)
  1697. *
  1698. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1699. * Intended to be called by DSP/Bridge code via platform_data for the
  1700. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1701. * code needs to add/del initiator dependencies dynamically
  1702. * before/after accessing a device. Returns the return value from
  1703. * _del_initiator_dep().
  1704. *
  1705. * XXX Keep a usecount in the clockdomain code
  1706. */
  1707. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1708. struct omap_hwmod *init_oh)
  1709. {
  1710. return _del_initiator_dep(oh, init_oh);
  1711. }
  1712. /**
  1713. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1714. * @oh: struct omap_hwmod *
  1715. *
  1716. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1717. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1718. * registers to cause the PRCM to receive wakeup events from the
  1719. * module. Does not set any wakeup routing registers beyond this
  1720. * point - if the module is to wake up any other module or subsystem,
  1721. * that must be set separately. Called by omap_device code. Returns
  1722. * -EINVAL on error or 0 upon success.
  1723. */
  1724. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1725. {
  1726. unsigned long flags;
  1727. u32 v;
  1728. if (!oh->class->sysc ||
  1729. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1730. return -EINVAL;
  1731. spin_lock_irqsave(&oh->_lock, flags);
  1732. v = oh->_sysc_cache;
  1733. _enable_wakeup(oh, &v);
  1734. _write_sysconfig(v, oh);
  1735. spin_unlock_irqrestore(&oh->_lock, flags);
  1736. return 0;
  1737. }
  1738. /**
  1739. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1740. * @oh: struct omap_hwmod *
  1741. *
  1742. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1743. * from sending wakeups to the PRCM. Eventually this should clear
  1744. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1745. * from the module. Does not set any wakeup routing registers beyond
  1746. * this point - if the module is to wake up any other module or
  1747. * subsystem, that must be set separately. Called by omap_device
  1748. * code. Returns -EINVAL on error or 0 upon success.
  1749. */
  1750. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1751. {
  1752. unsigned long flags;
  1753. u32 v;
  1754. if (!oh->class->sysc ||
  1755. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1756. return -EINVAL;
  1757. spin_lock_irqsave(&oh->_lock, flags);
  1758. v = oh->_sysc_cache;
  1759. _disable_wakeup(oh, &v);
  1760. _write_sysconfig(v, oh);
  1761. spin_unlock_irqrestore(&oh->_lock, flags);
  1762. return 0;
  1763. }
  1764. /**
  1765. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1766. * contained in the hwmod module.
  1767. * @oh: struct omap_hwmod *
  1768. * @name: name of the reset line to lookup and assert
  1769. *
  1770. * Some IP like dsp, ipu or iva contain processor that require
  1771. * an HW reset line to be assert / deassert in order to enable fully
  1772. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1773. * yet supported on this OMAP; otherwise, passes along the return value
  1774. * from _assert_hardreset().
  1775. */
  1776. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1777. {
  1778. int ret;
  1779. unsigned long flags;
  1780. if (!oh)
  1781. return -EINVAL;
  1782. spin_lock_irqsave(&oh->_lock, flags);
  1783. ret = _assert_hardreset(oh, name);
  1784. spin_unlock_irqrestore(&oh->_lock, flags);
  1785. return ret;
  1786. }
  1787. /**
  1788. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1789. * contained in the hwmod module.
  1790. * @oh: struct omap_hwmod *
  1791. * @name: name of the reset line to look up and deassert
  1792. *
  1793. * Some IP like dsp, ipu or iva contain processor that require
  1794. * an HW reset line to be assert / deassert in order to enable fully
  1795. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1796. * yet supported on this OMAP; otherwise, passes along the return value
  1797. * from _deassert_hardreset().
  1798. */
  1799. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1800. {
  1801. int ret;
  1802. unsigned long flags;
  1803. if (!oh)
  1804. return -EINVAL;
  1805. spin_lock_irqsave(&oh->_lock, flags);
  1806. ret = _deassert_hardreset(oh, name);
  1807. spin_unlock_irqrestore(&oh->_lock, flags);
  1808. return ret;
  1809. }
  1810. /**
  1811. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1812. * contained in the hwmod module
  1813. * @oh: struct omap_hwmod *
  1814. * @name: name of the reset line to look up and read
  1815. *
  1816. * Return the current state of the hwmod @oh's reset line named @name:
  1817. * returns -EINVAL upon parameter error or if this operation
  1818. * is unsupported on the current OMAP; otherwise, passes along the return
  1819. * value from _read_hardreset().
  1820. */
  1821. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1822. {
  1823. int ret;
  1824. unsigned long flags;
  1825. if (!oh)
  1826. return -EINVAL;
  1827. spin_lock_irqsave(&oh->_lock, flags);
  1828. ret = _read_hardreset(oh, name);
  1829. spin_unlock_irqrestore(&oh->_lock, flags);
  1830. return ret;
  1831. }
  1832. /**
  1833. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1834. * @classname: struct omap_hwmod_class name to search for
  1835. * @fn: callback function pointer to call for each hwmod in class @classname
  1836. * @user: arbitrary context data to pass to the callback function
  1837. *
  1838. * For each omap_hwmod of class @classname, call @fn.
  1839. * If the callback function returns something other than
  1840. * zero, the iterator is terminated, and the callback function's return
  1841. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1842. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1843. */
  1844. int omap_hwmod_for_each_by_class(const char *classname,
  1845. int (*fn)(struct omap_hwmod *oh,
  1846. void *user),
  1847. void *user)
  1848. {
  1849. struct omap_hwmod *temp_oh;
  1850. int ret = 0;
  1851. if (!classname || !fn)
  1852. return -EINVAL;
  1853. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1854. __func__, classname);
  1855. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1856. if (!strcmp(temp_oh->class->name, classname)) {
  1857. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1858. __func__, temp_oh->name);
  1859. ret = (*fn)(temp_oh, user);
  1860. if (ret)
  1861. break;
  1862. }
  1863. }
  1864. if (ret)
  1865. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1866. __func__, ret);
  1867. return ret;
  1868. }
  1869. /**
  1870. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1871. * @oh: struct omap_hwmod *
  1872. * @state: state that _setup() should leave the hwmod in
  1873. *
  1874. * Sets the hwmod state that @oh will enter at the end of _setup()
  1875. * (called by omap_hwmod_setup_*()). Only valid to call between
  1876. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  1877. * 0 upon success or -EINVAL if there is a problem with the arguments
  1878. * or if the hwmod is in the wrong state.
  1879. */
  1880. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1881. {
  1882. int ret;
  1883. unsigned long flags;
  1884. if (!oh)
  1885. return -EINVAL;
  1886. if (state != _HWMOD_STATE_DISABLED &&
  1887. state != _HWMOD_STATE_ENABLED &&
  1888. state != _HWMOD_STATE_IDLE)
  1889. return -EINVAL;
  1890. spin_lock_irqsave(&oh->_lock, flags);
  1891. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1892. ret = -EINVAL;
  1893. goto ohsps_unlock;
  1894. }
  1895. oh->_postsetup_state = state;
  1896. ret = 0;
  1897. ohsps_unlock:
  1898. spin_unlock_irqrestore(&oh->_lock, flags);
  1899. return ret;
  1900. }
  1901. /**
  1902. * omap_hwmod_get_context_loss_count - get lost context count
  1903. * @oh: struct omap_hwmod *
  1904. *
  1905. * Query the powerdomain of of @oh to get the context loss
  1906. * count for this device.
  1907. *
  1908. * Returns the context loss count of the powerdomain assocated with @oh
  1909. * upon success, or zero if no powerdomain exists for @oh.
  1910. */
  1911. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  1912. {
  1913. struct powerdomain *pwrdm;
  1914. int ret = 0;
  1915. pwrdm = omap_hwmod_get_pwrdm(oh);
  1916. if (pwrdm)
  1917. ret = pwrdm_get_context_loss_count(pwrdm);
  1918. return ret;
  1919. }