devices.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/io.h>
  15. #include <linux/clk.h>
  16. #include <linux/err.h>
  17. #include <linux/slab.h>
  18. #include <mach/hardware.h>
  19. #include <mach/irqs.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/mach/map.h>
  22. #include <asm/pmu.h>
  23. #include <plat/tc.h>
  24. #include <plat/board.h>
  25. #include <plat/mcbsp.h>
  26. #include <mach/gpio.h>
  27. #include <plat/mmc.h>
  28. #include <plat/dma.h>
  29. #include <plat/omap_hwmod.h>
  30. #include <plat/omap_device.h>
  31. #include <plat/omap4-keypad.h>
  32. #include "mux.h"
  33. #include "control.h"
  34. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  35. static struct resource cam_resources[] = {
  36. {
  37. .start = OMAP24XX_CAMERA_BASE,
  38. .end = OMAP24XX_CAMERA_BASE + 0xfff,
  39. .flags = IORESOURCE_MEM,
  40. },
  41. {
  42. .start = INT_24XX_CAM_IRQ,
  43. .flags = IORESOURCE_IRQ,
  44. }
  45. };
  46. static struct platform_device omap_cam_device = {
  47. .name = "omap24xxcam",
  48. .id = -1,
  49. .num_resources = ARRAY_SIZE(cam_resources),
  50. .resource = cam_resources,
  51. };
  52. static inline void omap_init_camera(void)
  53. {
  54. platform_device_register(&omap_cam_device);
  55. }
  56. #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
  57. static struct resource omap3isp_resources[] = {
  58. {
  59. .start = OMAP3430_ISP_BASE,
  60. .end = OMAP3430_ISP_END,
  61. .flags = IORESOURCE_MEM,
  62. },
  63. {
  64. .start = OMAP3430_ISP_CBUFF_BASE,
  65. .end = OMAP3430_ISP_CBUFF_END,
  66. .flags = IORESOURCE_MEM,
  67. },
  68. {
  69. .start = OMAP3430_ISP_CCP2_BASE,
  70. .end = OMAP3430_ISP_CCP2_END,
  71. .flags = IORESOURCE_MEM,
  72. },
  73. {
  74. .start = OMAP3430_ISP_CCDC_BASE,
  75. .end = OMAP3430_ISP_CCDC_END,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. {
  79. .start = OMAP3430_ISP_HIST_BASE,
  80. .end = OMAP3430_ISP_HIST_END,
  81. .flags = IORESOURCE_MEM,
  82. },
  83. {
  84. .start = OMAP3430_ISP_H3A_BASE,
  85. .end = OMAP3430_ISP_H3A_END,
  86. .flags = IORESOURCE_MEM,
  87. },
  88. {
  89. .start = OMAP3430_ISP_PREV_BASE,
  90. .end = OMAP3430_ISP_PREV_END,
  91. .flags = IORESOURCE_MEM,
  92. },
  93. {
  94. .start = OMAP3430_ISP_RESZ_BASE,
  95. .end = OMAP3430_ISP_RESZ_END,
  96. .flags = IORESOURCE_MEM,
  97. },
  98. {
  99. .start = OMAP3430_ISP_SBL_BASE,
  100. .end = OMAP3430_ISP_SBL_END,
  101. .flags = IORESOURCE_MEM,
  102. },
  103. {
  104. .start = OMAP3430_ISP_CSI2A_BASE,
  105. .end = OMAP3430_ISP_CSI2A_END,
  106. .flags = IORESOURCE_MEM,
  107. },
  108. {
  109. .start = OMAP3430_ISP_CSI2PHY_BASE,
  110. .end = OMAP3430_ISP_CSI2PHY_END,
  111. .flags = IORESOURCE_MEM,
  112. },
  113. {
  114. .start = INT_34XX_CAM_IRQ,
  115. .flags = IORESOURCE_IRQ,
  116. }
  117. };
  118. static struct platform_device omap3isp_device = {
  119. .name = "omap3isp",
  120. .id = -1,
  121. .num_resources = ARRAY_SIZE(omap3isp_resources),
  122. .resource = omap3isp_resources,
  123. };
  124. static inline void omap_init_camera(void)
  125. {
  126. platform_device_register(&omap3isp_device);
  127. }
  128. #else
  129. static inline void omap_init_camera(void)
  130. {
  131. }
  132. #endif
  133. struct omap_device_pm_latency omap_keyboard_latency[] = {
  134. {
  135. .deactivate_func = omap_device_idle_hwmods,
  136. .activate_func = omap_device_enable_hwmods,
  137. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  138. },
  139. };
  140. int __init omap4_keyboard_init(struct omap4_keypad_platform_data
  141. *sdp4430_keypad_data)
  142. {
  143. struct omap_device *od;
  144. struct omap_hwmod *oh;
  145. struct omap4_keypad_platform_data *keypad_data;
  146. unsigned int id = -1;
  147. char *oh_name = "kbd";
  148. char *name = "omap4-keypad";
  149. oh = omap_hwmod_lookup(oh_name);
  150. if (!oh) {
  151. pr_err("Could not look up %s\n", oh_name);
  152. return -ENODEV;
  153. }
  154. keypad_data = sdp4430_keypad_data;
  155. od = omap_device_build(name, id, oh, keypad_data,
  156. sizeof(struct omap4_keypad_platform_data),
  157. omap_keyboard_latency,
  158. ARRAY_SIZE(omap_keyboard_latency), 0);
  159. if (IS_ERR(od)) {
  160. WARN(1, "Cant build omap_device for %s:%s.\n",
  161. name, oh->name);
  162. return PTR_ERR(od);
  163. }
  164. return 0;
  165. }
  166. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  167. static struct omap_device_pm_latency mbox_latencies[] = {
  168. [0] = {
  169. .activate_func = omap_device_enable_hwmods,
  170. .deactivate_func = omap_device_idle_hwmods,
  171. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  172. },
  173. };
  174. static inline void omap_init_mbox(void)
  175. {
  176. struct omap_hwmod *oh;
  177. struct omap_device *od;
  178. oh = omap_hwmod_lookup("mailbox");
  179. if (!oh) {
  180. pr_err("%s: unable to find hwmod\n", __func__);
  181. return;
  182. }
  183. od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
  184. mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
  185. WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
  186. __func__, PTR_ERR(od));
  187. }
  188. #else
  189. static inline void omap_init_mbox(void) { }
  190. #endif /* CONFIG_OMAP_MBOX_FWK */
  191. static inline void omap_init_sti(void) {}
  192. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  193. static struct platform_device omap_pcm = {
  194. .name = "omap-pcm-audio",
  195. .id = -1,
  196. };
  197. /*
  198. * OMAP2420 has 2 McBSP ports
  199. * OMAP2430 has 5 McBSP ports
  200. * OMAP3 has 5 McBSP ports
  201. * OMAP4 has 4 McBSP ports
  202. */
  203. OMAP_MCBSP_PLATFORM_DEVICE(1);
  204. OMAP_MCBSP_PLATFORM_DEVICE(2);
  205. OMAP_MCBSP_PLATFORM_DEVICE(3);
  206. OMAP_MCBSP_PLATFORM_DEVICE(4);
  207. OMAP_MCBSP_PLATFORM_DEVICE(5);
  208. static void omap_init_audio(void)
  209. {
  210. platform_device_register(&omap_mcbsp1);
  211. platform_device_register(&omap_mcbsp2);
  212. if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
  213. platform_device_register(&omap_mcbsp3);
  214. platform_device_register(&omap_mcbsp4);
  215. }
  216. if (cpu_is_omap243x() || cpu_is_omap34xx())
  217. platform_device_register(&omap_mcbsp5);
  218. platform_device_register(&omap_pcm);
  219. }
  220. #else
  221. static inline void omap_init_audio(void) {}
  222. #endif
  223. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  224. #include <plat/mcspi.h>
  225. struct omap_device_pm_latency omap_mcspi_latency[] = {
  226. [0] = {
  227. .deactivate_func = omap_device_idle_hwmods,
  228. .activate_func = omap_device_enable_hwmods,
  229. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  230. },
  231. };
  232. static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
  233. {
  234. struct omap_device *od;
  235. char *name = "omap2_mcspi";
  236. struct omap2_mcspi_platform_config *pdata;
  237. static int spi_num;
  238. struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
  239. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  240. if (!pdata) {
  241. pr_err("Memory allocation for McSPI device failed\n");
  242. return -ENOMEM;
  243. }
  244. pdata->num_cs = mcspi_attrib->num_chipselect;
  245. switch (oh->class->rev) {
  246. case OMAP2_MCSPI_REV:
  247. case OMAP3_MCSPI_REV:
  248. pdata->regs_offset = 0;
  249. break;
  250. case OMAP4_MCSPI_REV:
  251. pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  252. break;
  253. default:
  254. pr_err("Invalid McSPI Revision value\n");
  255. return -EINVAL;
  256. }
  257. spi_num++;
  258. od = omap_device_build(name, spi_num, oh, pdata,
  259. sizeof(*pdata), omap_mcspi_latency,
  260. ARRAY_SIZE(omap_mcspi_latency), 0);
  261. WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n",
  262. name, oh->name);
  263. kfree(pdata);
  264. return 0;
  265. }
  266. static void omap_init_mcspi(void)
  267. {
  268. omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
  269. }
  270. #else
  271. static inline void omap_init_mcspi(void) {}
  272. #endif
  273. static struct resource omap2_pmu_resource = {
  274. .start = 3,
  275. .end = 3,
  276. .flags = IORESOURCE_IRQ,
  277. };
  278. static struct resource omap3_pmu_resource = {
  279. .start = INT_34XX_BENCH_MPU_EMUL,
  280. .end = INT_34XX_BENCH_MPU_EMUL,
  281. .flags = IORESOURCE_IRQ,
  282. };
  283. static struct platform_device omap_pmu_device = {
  284. .name = "arm-pmu",
  285. .id = ARM_PMU_DEVICE_CPU,
  286. .num_resources = 1,
  287. };
  288. static void omap_init_pmu(void)
  289. {
  290. if (cpu_is_omap24xx())
  291. omap_pmu_device.resource = &omap2_pmu_resource;
  292. else if (cpu_is_omap34xx())
  293. omap_pmu_device.resource = &omap3_pmu_resource;
  294. else
  295. return;
  296. platform_device_register(&omap_pmu_device);
  297. }
  298. #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
  299. #ifdef CONFIG_ARCH_OMAP2
  300. static struct resource omap2_sham_resources[] = {
  301. {
  302. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  303. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  304. .flags = IORESOURCE_MEM,
  305. },
  306. {
  307. .start = INT_24XX_SHA1MD5,
  308. .flags = IORESOURCE_IRQ,
  309. }
  310. };
  311. static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
  312. #else
  313. #define omap2_sham_resources NULL
  314. #define omap2_sham_resources_sz 0
  315. #endif
  316. #ifdef CONFIG_ARCH_OMAP3
  317. static struct resource omap3_sham_resources[] = {
  318. {
  319. .start = OMAP34XX_SEC_SHA1MD5_BASE,
  320. .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
  321. .flags = IORESOURCE_MEM,
  322. },
  323. {
  324. .start = INT_34XX_SHA1MD52_IRQ,
  325. .flags = IORESOURCE_IRQ,
  326. },
  327. {
  328. .start = OMAP34XX_DMA_SHA1MD5_RX,
  329. .flags = IORESOURCE_DMA,
  330. }
  331. };
  332. static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
  333. #else
  334. #define omap3_sham_resources NULL
  335. #define omap3_sham_resources_sz 0
  336. #endif
  337. static struct platform_device sham_device = {
  338. .name = "omap-sham",
  339. .id = -1,
  340. };
  341. static void omap_init_sham(void)
  342. {
  343. if (cpu_is_omap24xx()) {
  344. sham_device.resource = omap2_sham_resources;
  345. sham_device.num_resources = omap2_sham_resources_sz;
  346. } else if (cpu_is_omap34xx()) {
  347. sham_device.resource = omap3_sham_resources;
  348. sham_device.num_resources = omap3_sham_resources_sz;
  349. } else {
  350. pr_err("%s: platform not supported\n", __func__);
  351. return;
  352. }
  353. platform_device_register(&sham_device);
  354. }
  355. #else
  356. static inline void omap_init_sham(void) { }
  357. #endif
  358. #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
  359. #ifdef CONFIG_ARCH_OMAP2
  360. static struct resource omap2_aes_resources[] = {
  361. {
  362. .start = OMAP24XX_SEC_AES_BASE,
  363. .end = OMAP24XX_SEC_AES_BASE + 0x4C,
  364. .flags = IORESOURCE_MEM,
  365. },
  366. {
  367. .start = OMAP24XX_DMA_AES_TX,
  368. .flags = IORESOURCE_DMA,
  369. },
  370. {
  371. .start = OMAP24XX_DMA_AES_RX,
  372. .flags = IORESOURCE_DMA,
  373. }
  374. };
  375. static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
  376. #else
  377. #define omap2_aes_resources NULL
  378. #define omap2_aes_resources_sz 0
  379. #endif
  380. #ifdef CONFIG_ARCH_OMAP3
  381. static struct resource omap3_aes_resources[] = {
  382. {
  383. .start = OMAP34XX_SEC_AES_BASE,
  384. .end = OMAP34XX_SEC_AES_BASE + 0x4C,
  385. .flags = IORESOURCE_MEM,
  386. },
  387. {
  388. .start = OMAP34XX_DMA_AES2_TX,
  389. .flags = IORESOURCE_DMA,
  390. },
  391. {
  392. .start = OMAP34XX_DMA_AES2_RX,
  393. .flags = IORESOURCE_DMA,
  394. }
  395. };
  396. static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
  397. #else
  398. #define omap3_aes_resources NULL
  399. #define omap3_aes_resources_sz 0
  400. #endif
  401. static struct platform_device aes_device = {
  402. .name = "omap-aes",
  403. .id = -1,
  404. };
  405. static void omap_init_aes(void)
  406. {
  407. if (cpu_is_omap24xx()) {
  408. aes_device.resource = omap2_aes_resources;
  409. aes_device.num_resources = omap2_aes_resources_sz;
  410. } else if (cpu_is_omap34xx()) {
  411. aes_device.resource = omap3_aes_resources;
  412. aes_device.num_resources = omap3_aes_resources_sz;
  413. } else {
  414. pr_err("%s: platform not supported\n", __func__);
  415. return;
  416. }
  417. platform_device_register(&aes_device);
  418. }
  419. #else
  420. static inline void omap_init_aes(void) { }
  421. #endif
  422. /*-------------------------------------------------------------------------*/
  423. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  424. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  425. *mmc_controller)
  426. {
  427. if ((mmc_controller->slots[0].switch_pin > 0) && \
  428. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  429. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  430. OMAP_PIN_INPUT_PULLUP);
  431. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  432. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  433. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  434. OMAP_PIN_INPUT_PULLUP);
  435. omap_mux_init_signal("sdmmc_cmd", 0);
  436. omap_mux_init_signal("sdmmc_clki", 0);
  437. omap_mux_init_signal("sdmmc_clko", 0);
  438. omap_mux_init_signal("sdmmc_dat0", 0);
  439. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  440. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  441. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  442. omap_mux_init_signal("sdmmc_dat1", 0);
  443. omap_mux_init_signal("sdmmc_dat2", 0);
  444. omap_mux_init_signal("sdmmc_dat3", 0);
  445. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  446. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  447. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  448. }
  449. /*
  450. * Use internal loop-back in MMC/SDIO Module Input Clock
  451. * selection
  452. */
  453. if (mmc_controller->slots[0].internal_clock) {
  454. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  455. v |= (1 << 24);
  456. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  457. }
  458. }
  459. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  460. {
  461. char *name = "mmci-omap";
  462. if (!mmc_data[0]) {
  463. pr_err("%s fails: Incomplete platform data\n", __func__);
  464. return;
  465. }
  466. omap242x_mmc_mux(mmc_data[0]);
  467. omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
  468. INT_24XX_MMC_IRQ, mmc_data[0]);
  469. }
  470. #endif
  471. /*-------------------------------------------------------------------------*/
  472. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  473. #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
  474. #define OMAP_HDQ_BASE 0x480B2000
  475. #endif
  476. static struct resource omap_hdq_resources[] = {
  477. {
  478. .start = OMAP_HDQ_BASE,
  479. .end = OMAP_HDQ_BASE + 0x1C,
  480. .flags = IORESOURCE_MEM,
  481. },
  482. {
  483. .start = INT_24XX_HDQ_IRQ,
  484. .flags = IORESOURCE_IRQ,
  485. },
  486. };
  487. static struct platform_device omap_hdq_dev = {
  488. .name = "omap_hdq",
  489. .id = 0,
  490. .dev = {
  491. .platform_data = NULL,
  492. },
  493. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  494. .resource = omap_hdq_resources,
  495. };
  496. static inline void omap_hdq_init(void)
  497. {
  498. (void) platform_device_register(&omap_hdq_dev);
  499. }
  500. #else
  501. static inline void omap_hdq_init(void) {}
  502. #endif
  503. /*---------------------------------------------------------------------------*/
  504. #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
  505. defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
  506. #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
  507. static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
  508. };
  509. #else
  510. static struct resource omap_vout_resource[2] = {
  511. };
  512. #endif
  513. static struct platform_device omap_vout_device = {
  514. .name = "omap_vout",
  515. .num_resources = ARRAY_SIZE(omap_vout_resource),
  516. .resource = &omap_vout_resource[0],
  517. .id = -1,
  518. };
  519. static void omap_init_vout(void)
  520. {
  521. if (platform_device_register(&omap_vout_device) < 0)
  522. printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
  523. }
  524. #else
  525. static inline void omap_init_vout(void) {}
  526. #endif
  527. /*-------------------------------------------------------------------------*/
  528. static int __init omap2_init_devices(void)
  529. {
  530. /*
  531. * please keep these calls, and their implementations above,
  532. * in alphabetical order so they're easier to sort through.
  533. */
  534. omap_init_audio();
  535. omap_init_camera();
  536. omap_init_mbox();
  537. omap_init_mcspi();
  538. omap_init_pmu();
  539. omap_hdq_init();
  540. omap_init_sti();
  541. omap_init_sham();
  542. omap_init_aes();
  543. omap_init_vout();
  544. return 0;
  545. }
  546. arch_initcall(omap2_init_devices);
  547. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  548. static struct omap_device_pm_latency omap_wdt_latency[] = {
  549. [0] = {
  550. .deactivate_func = omap_device_idle_hwmods,
  551. .activate_func = omap_device_enable_hwmods,
  552. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  553. },
  554. };
  555. static int __init omap_init_wdt(void)
  556. {
  557. int id = -1;
  558. struct omap_device *od;
  559. struct omap_hwmod *oh;
  560. char *oh_name = "wd_timer2";
  561. char *dev_name = "omap_wdt";
  562. if (!cpu_class_is_omap2())
  563. return 0;
  564. oh = omap_hwmod_lookup(oh_name);
  565. if (!oh) {
  566. pr_err("Could not look up wd_timer%d hwmod\n", id);
  567. return -EINVAL;
  568. }
  569. od = omap_device_build(dev_name, id, oh, NULL, 0,
  570. omap_wdt_latency,
  571. ARRAY_SIZE(omap_wdt_latency), 0);
  572. WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n",
  573. dev_name, oh->name);
  574. return 0;
  575. }
  576. subsys_initcall(omap_init_wdt);
  577. #endif