twl6040.c 30 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163
  1. /*
  2. * ALSA SoC TWL6040 codec driver
  3. *
  4. * Author: Misael Lopez Cruz <x0052729@ti.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/pm.h>
  26. #include <linux/i2c.h>
  27. #include <linux/gpio.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/slab.h>
  30. #include <linux/i2c/twl.h>
  31. #include <sound/core.h>
  32. #include <sound/pcm.h>
  33. #include <sound/pcm_params.h>
  34. #include <sound/soc.h>
  35. #include <sound/initval.h>
  36. #include <sound/tlv.h>
  37. #include "twl6040.h"
  38. #define TWL6040_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  39. #define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
  40. /* codec private data */
  41. struct twl6040_data {
  42. int audpwron;
  43. int naudint;
  44. int codec_powered;
  45. int pll;
  46. int non_lp;
  47. unsigned int sysclk;
  48. struct snd_pcm_hw_constraint_list *sysclk_constraints;
  49. struct completion ready;
  50. };
  51. /*
  52. * twl6040 register cache & default register settings
  53. */
  54. static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
  55. 0x00, /* not used 0x00 */
  56. 0x4B, /* TWL6040_ASICID (ro) 0x01 */
  57. 0x00, /* TWL6040_ASICREV (ro) 0x02 */
  58. 0x00, /* TWL6040_INTID 0x03 */
  59. 0x00, /* TWL6040_INTMR 0x04 */
  60. 0x00, /* TWL6040_NCPCTRL 0x05 */
  61. 0x00, /* TWL6040_LDOCTL 0x06 */
  62. 0x60, /* TWL6040_HPPLLCTL 0x07 */
  63. 0x00, /* TWL6040_LPPLLCTL 0x08 */
  64. 0x4A, /* TWL6040_LPPLLDIV 0x09 */
  65. 0x00, /* TWL6040_AMICBCTL 0x0A */
  66. 0x00, /* TWL6040_DMICBCTL 0x0B */
  67. 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */
  68. 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */
  69. 0x00, /* TWL6040_MICGAIN 0x0E */
  70. 0x1B, /* TWL6040_LINEGAIN 0x0F */
  71. 0x00, /* TWL6040_HSLCTL 0x10 */
  72. 0x00, /* TWL6040_HSRCTL 0x11 */
  73. 0x00, /* TWL6040_HSGAIN 0x12 */
  74. 0x00, /* TWL6040_EARCTL 0x13 */
  75. 0x00, /* TWL6040_HFLCTL 0x14 */
  76. 0x00, /* TWL6040_HFLGAIN 0x15 */
  77. 0x00, /* TWL6040_HFRCTL 0x16 */
  78. 0x00, /* TWL6040_HFRGAIN 0x17 */
  79. 0x00, /* TWL6040_VIBCTLL 0x18 */
  80. 0x00, /* TWL6040_VIBDATL 0x19 */
  81. 0x00, /* TWL6040_VIBCTLR 0x1A */
  82. 0x00, /* TWL6040_VIBDATR 0x1B */
  83. 0x00, /* TWL6040_HKCTL1 0x1C */
  84. 0x00, /* TWL6040_HKCTL2 0x1D */
  85. 0x00, /* TWL6040_GPOCTL 0x1E */
  86. 0x00, /* TWL6040_ALB 0x1F */
  87. 0x00, /* TWL6040_DLB 0x20 */
  88. 0x00, /* not used 0x21 */
  89. 0x00, /* not used 0x22 */
  90. 0x00, /* not used 0x23 */
  91. 0x00, /* not used 0x24 */
  92. 0x00, /* not used 0x25 */
  93. 0x00, /* not used 0x26 */
  94. 0x00, /* not used 0x27 */
  95. 0x00, /* TWL6040_TRIM1 0x28 */
  96. 0x00, /* TWL6040_TRIM2 0x29 */
  97. 0x00, /* TWL6040_TRIM3 0x2A */
  98. 0x00, /* TWL6040_HSOTRIM 0x2B */
  99. 0x00, /* TWL6040_HFOTRIM 0x2C */
  100. 0x09, /* TWL6040_ACCCTL 0x2D */
  101. 0x00, /* TWL6040_STATUS (ro) 0x2E */
  102. };
  103. /*
  104. * twl6040 vio/gnd registers:
  105. * registers under vio/gnd supply can be accessed
  106. * before the power-up sequence, after NRESPWRON goes high
  107. */
  108. static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = {
  109. TWL6040_REG_ASICID,
  110. TWL6040_REG_ASICREV,
  111. TWL6040_REG_INTID,
  112. TWL6040_REG_INTMR,
  113. TWL6040_REG_NCPCTL,
  114. TWL6040_REG_LDOCTL,
  115. TWL6040_REG_AMICBCTL,
  116. TWL6040_REG_DMICBCTL,
  117. TWL6040_REG_HKCTL1,
  118. TWL6040_REG_HKCTL2,
  119. TWL6040_REG_GPOCTL,
  120. TWL6040_REG_TRIM1,
  121. TWL6040_REG_TRIM2,
  122. TWL6040_REG_TRIM3,
  123. TWL6040_REG_HSOTRIM,
  124. TWL6040_REG_HFOTRIM,
  125. TWL6040_REG_ACCCTL,
  126. TWL6040_REG_STATUS,
  127. };
  128. /*
  129. * twl6040 vdd/vss registers:
  130. * registers under vdd/vss supplies can only be accessed
  131. * after the power-up sequence
  132. */
  133. static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = {
  134. TWL6040_REG_HPPLLCTL,
  135. TWL6040_REG_LPPLLCTL,
  136. TWL6040_REG_LPPLLDIV,
  137. TWL6040_REG_MICLCTL,
  138. TWL6040_REG_MICRCTL,
  139. TWL6040_REG_MICGAIN,
  140. TWL6040_REG_LINEGAIN,
  141. TWL6040_REG_HSLCTL,
  142. TWL6040_REG_HSRCTL,
  143. TWL6040_REG_HSGAIN,
  144. TWL6040_REG_EARCTL,
  145. TWL6040_REG_HFLCTL,
  146. TWL6040_REG_HFLGAIN,
  147. TWL6040_REG_HFRCTL,
  148. TWL6040_REG_HFRGAIN,
  149. TWL6040_REG_VIBCTLL,
  150. TWL6040_REG_VIBDATL,
  151. TWL6040_REG_VIBCTLR,
  152. TWL6040_REG_VIBDATR,
  153. TWL6040_REG_ALB,
  154. TWL6040_REG_DLB,
  155. };
  156. /*
  157. * read twl6040 register cache
  158. */
  159. static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
  160. unsigned int reg)
  161. {
  162. u8 *cache = codec->reg_cache;
  163. if (reg >= TWL6040_CACHEREGNUM)
  164. return -EIO;
  165. return cache[reg];
  166. }
  167. /*
  168. * write twl6040 register cache
  169. */
  170. static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
  171. u8 reg, u8 value)
  172. {
  173. u8 *cache = codec->reg_cache;
  174. if (reg >= TWL6040_CACHEREGNUM)
  175. return;
  176. cache[reg] = value;
  177. }
  178. /*
  179. * read from twl6040 hardware register
  180. */
  181. static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
  182. unsigned int reg)
  183. {
  184. u8 value;
  185. if (reg >= TWL6040_CACHEREGNUM)
  186. return -EIO;
  187. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
  188. twl6040_write_reg_cache(codec, reg, value);
  189. return value;
  190. }
  191. /*
  192. * write to the twl6040 register space
  193. */
  194. static int twl6040_write(struct snd_soc_codec *codec,
  195. unsigned int reg, unsigned int value)
  196. {
  197. if (reg >= TWL6040_CACHEREGNUM)
  198. return -EIO;
  199. twl6040_write_reg_cache(codec, reg, value);
  200. return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
  201. }
  202. static void twl6040_init_vio_regs(struct snd_soc_codec *codec)
  203. {
  204. u8 *cache = codec->reg_cache;
  205. int reg, i;
  206. /* allow registers to be accessed by i2c */
  207. twl6040_write(codec, TWL6040_REG_ACCCTL, cache[TWL6040_REG_ACCCTL]);
  208. for (i = 0; i < TWL6040_VIOREGNUM; i++) {
  209. reg = twl6040_vio_reg[i];
  210. /* skip read-only registers (ASICID, ASICREV, STATUS) */
  211. switch (reg) {
  212. case TWL6040_REG_ASICID:
  213. case TWL6040_REG_ASICREV:
  214. case TWL6040_REG_STATUS:
  215. continue;
  216. default:
  217. break;
  218. }
  219. twl6040_write(codec, reg, cache[reg]);
  220. }
  221. }
  222. static void twl6040_init_vdd_regs(struct snd_soc_codec *codec)
  223. {
  224. u8 *cache = codec->reg_cache;
  225. int reg, i;
  226. for (i = 0; i < TWL6040_VDDREGNUM; i++) {
  227. reg = twl6040_vdd_reg[i];
  228. twl6040_write(codec, reg, cache[reg]);
  229. }
  230. }
  231. /* twl6040 codec manual power-up sequence */
  232. static void twl6040_power_up(struct snd_soc_codec *codec)
  233. {
  234. u8 ncpctl, ldoctl, lppllctl, accctl;
  235. ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
  236. ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
  237. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  238. accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
  239. /* enable reference system */
  240. ldoctl |= TWL6040_REFENA;
  241. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  242. msleep(10);
  243. /* enable internal oscillator */
  244. ldoctl |= TWL6040_OSCENA;
  245. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  246. udelay(10);
  247. /* enable high-side ldo */
  248. ldoctl |= TWL6040_HSLDOENA;
  249. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  250. udelay(244);
  251. /* enable negative charge pump */
  252. ncpctl |= TWL6040_NCPENA | TWL6040_NCPOPEN;
  253. twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
  254. udelay(488);
  255. /* enable low-side ldo */
  256. ldoctl |= TWL6040_LSLDOENA;
  257. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  258. udelay(244);
  259. /* enable low-power pll */
  260. lppllctl |= TWL6040_LPLLENA;
  261. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  262. /* reset state machine */
  263. accctl |= TWL6040_RESETSPLIT;
  264. twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
  265. mdelay(5);
  266. accctl &= ~TWL6040_RESETSPLIT;
  267. twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
  268. /* disable internal oscillator */
  269. ldoctl &= ~TWL6040_OSCENA;
  270. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  271. }
  272. /* twl6040 codec manual power-down sequence */
  273. static void twl6040_power_down(struct snd_soc_codec *codec)
  274. {
  275. u8 ncpctl, ldoctl, lppllctl, accctl;
  276. ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
  277. ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
  278. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  279. accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
  280. /* enable internal oscillator */
  281. ldoctl |= TWL6040_OSCENA;
  282. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  283. udelay(10);
  284. /* disable low-power pll */
  285. lppllctl &= ~TWL6040_LPLLENA;
  286. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  287. /* disable low-side ldo */
  288. ldoctl &= ~TWL6040_LSLDOENA;
  289. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  290. udelay(244);
  291. /* disable negative charge pump */
  292. ncpctl &= ~(TWL6040_NCPENA | TWL6040_NCPOPEN);
  293. twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
  294. udelay(488);
  295. /* disable high-side ldo */
  296. ldoctl &= ~TWL6040_HSLDOENA;
  297. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  298. udelay(244);
  299. /* disable internal oscillator */
  300. ldoctl &= ~TWL6040_OSCENA;
  301. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  302. /* disable reference system */
  303. ldoctl &= ~TWL6040_REFENA;
  304. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  305. msleep(10);
  306. }
  307. /* set headset dac and driver power mode */
  308. static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
  309. {
  310. int hslctl, hsrctl;
  311. int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
  312. hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
  313. hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
  314. if (high_perf) {
  315. hslctl &= ~mask;
  316. hsrctl &= ~mask;
  317. } else {
  318. hslctl |= mask;
  319. hsrctl |= mask;
  320. }
  321. twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
  322. twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
  323. return 0;
  324. }
  325. static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
  326. struct snd_kcontrol *kcontrol, int event)
  327. {
  328. msleep(1);
  329. return 0;
  330. }
  331. static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
  332. struct snd_kcontrol *kcontrol, int event)
  333. {
  334. struct snd_soc_codec *codec = w->codec;
  335. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  336. if (SND_SOC_DAPM_EVENT_ON(event))
  337. priv->non_lp++;
  338. else
  339. priv->non_lp--;
  340. msleep(1);
  341. return 0;
  342. }
  343. /* audio interrupt handler */
  344. static irqreturn_t twl6040_naudint_handler(int irq, void *data)
  345. {
  346. struct snd_soc_codec *codec = data;
  347. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  348. u8 intid;
  349. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &intid, TWL6040_REG_INTID);
  350. switch (intid) {
  351. case TWL6040_THINT:
  352. dev_alert(codec->dev, "die temp over-limit detection\n");
  353. break;
  354. case TWL6040_PLUGINT:
  355. case TWL6040_UNPLUGINT:
  356. case TWL6040_HOOKINT:
  357. break;
  358. case TWL6040_HFINT:
  359. dev_alert(codec->dev, "hf drivers over current detection\n");
  360. break;
  361. case TWL6040_VIBINT:
  362. dev_alert(codec->dev, "vib drivers over current detection\n");
  363. break;
  364. case TWL6040_READYINT:
  365. complete(&priv->ready);
  366. break;
  367. default:
  368. dev_err(codec->dev, "unknown audio interrupt %d\n", intid);
  369. break;
  370. }
  371. return IRQ_HANDLED;
  372. }
  373. /*
  374. * MICATT volume control:
  375. * from -6 to 0 dB in 6 dB steps
  376. */
  377. static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
  378. /*
  379. * MICGAIN volume control:
  380. * from 6 to 30 dB in 6 dB steps
  381. */
  382. static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
  383. /*
  384. * HSGAIN volume control:
  385. * from -30 to 0 dB in 2 dB steps
  386. */
  387. static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
  388. /*
  389. * HFGAIN volume control:
  390. * from -52 to 6 dB in 2 dB steps
  391. */
  392. static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
  393. /*
  394. * EPGAIN volume control:
  395. * from -24 to 6 dB in 2 dB steps
  396. */
  397. static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
  398. /* Left analog microphone selection */
  399. static const char *twl6040_amicl_texts[] =
  400. {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
  401. /* Right analog microphone selection */
  402. static const char *twl6040_amicr_texts[] =
  403. {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
  404. static const struct soc_enum twl6040_enum[] = {
  405. SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 3, twl6040_amicl_texts),
  406. SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 3, twl6040_amicr_texts),
  407. };
  408. static const struct snd_kcontrol_new amicl_control =
  409. SOC_DAPM_ENUM("Route", twl6040_enum[0]);
  410. static const struct snd_kcontrol_new amicr_control =
  411. SOC_DAPM_ENUM("Route", twl6040_enum[1]);
  412. /* Headset DAC playback switches */
  413. static const struct snd_kcontrol_new hsdacl_switch_controls =
  414. SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSLCTL, 5, 1, 0);
  415. static const struct snd_kcontrol_new hsdacr_switch_controls =
  416. SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSRCTL, 5, 1, 0);
  417. /* Handsfree DAC playback switches */
  418. static const struct snd_kcontrol_new hfdacl_switch_controls =
  419. SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 2, 1, 0);
  420. static const struct snd_kcontrol_new hfdacr_switch_controls =
  421. SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 2, 1, 0);
  422. static const struct snd_kcontrol_new ep_driver_switch_controls =
  423. SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0);
  424. static const struct snd_kcontrol_new twl6040_snd_controls[] = {
  425. /* Capture gains */
  426. SOC_DOUBLE_TLV("Capture Preamplifier Volume",
  427. TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
  428. SOC_DOUBLE_TLV("Capture Volume",
  429. TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
  430. /* Playback gains */
  431. SOC_DOUBLE_TLV("Headset Playback Volume",
  432. TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
  433. SOC_DOUBLE_R_TLV("Handsfree Playback Volume",
  434. TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
  435. SOC_SINGLE_TLV("Earphone Playback Volume",
  436. TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
  437. };
  438. static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
  439. /* Inputs */
  440. SND_SOC_DAPM_INPUT("MAINMIC"),
  441. SND_SOC_DAPM_INPUT("HSMIC"),
  442. SND_SOC_DAPM_INPUT("SUBMIC"),
  443. SND_SOC_DAPM_INPUT("AFML"),
  444. SND_SOC_DAPM_INPUT("AFMR"),
  445. /* Outputs */
  446. SND_SOC_DAPM_OUTPUT("HSOL"),
  447. SND_SOC_DAPM_OUTPUT("HSOR"),
  448. SND_SOC_DAPM_OUTPUT("HFL"),
  449. SND_SOC_DAPM_OUTPUT("HFR"),
  450. SND_SOC_DAPM_OUTPUT("EP"),
  451. /* Analog input muxes for the capture amplifiers */
  452. SND_SOC_DAPM_MUX("Analog Left Capture Route",
  453. SND_SOC_NOPM, 0, 0, &amicl_control),
  454. SND_SOC_DAPM_MUX("Analog Right Capture Route",
  455. SND_SOC_NOPM, 0, 0, &amicr_control),
  456. /* Analog capture PGAs */
  457. SND_SOC_DAPM_PGA("MicAmpL",
  458. TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
  459. SND_SOC_DAPM_PGA("MicAmpR",
  460. TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
  461. /* ADCs */
  462. SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
  463. TWL6040_REG_MICLCTL, 2, 0),
  464. SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
  465. TWL6040_REG_MICRCTL, 2, 0),
  466. /* Microphone bias */
  467. SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
  468. TWL6040_REG_AMICBCTL, 0, 0),
  469. SND_SOC_DAPM_MICBIAS("Main Mic Bias",
  470. TWL6040_REG_AMICBCTL, 4, 0),
  471. SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
  472. TWL6040_REG_DMICBCTL, 0, 0),
  473. SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
  474. TWL6040_REG_DMICBCTL, 4, 0),
  475. /* DACs */
  476. SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
  477. TWL6040_REG_HSLCTL, 0, 0,
  478. twl6040_hs_dac_event,
  479. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  480. SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
  481. TWL6040_REG_HSRCTL, 0, 0,
  482. twl6040_hs_dac_event,
  483. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  484. SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
  485. TWL6040_REG_HFLCTL, 0, 0,
  486. twl6040_power_mode_event,
  487. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  488. SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
  489. TWL6040_REG_HFRCTL, 0, 0,
  490. twl6040_power_mode_event,
  491. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  492. /* Analog playback switches */
  493. SND_SOC_DAPM_SWITCH("HSDAC Left Playback",
  494. SND_SOC_NOPM, 0, 0, &hsdacl_switch_controls),
  495. SND_SOC_DAPM_SWITCH("HSDAC Right Playback",
  496. SND_SOC_NOPM, 0, 0, &hsdacr_switch_controls),
  497. SND_SOC_DAPM_SWITCH("HFDAC Left Playback",
  498. SND_SOC_NOPM, 0, 0, &hfdacl_switch_controls),
  499. SND_SOC_DAPM_SWITCH("HFDAC Right Playback",
  500. SND_SOC_NOPM, 0, 0, &hfdacr_switch_controls),
  501. /* Analog playback drivers */
  502. SND_SOC_DAPM_PGA_E("Handsfree Left Driver",
  503. TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
  504. twl6040_power_mode_event,
  505. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  506. SND_SOC_DAPM_PGA_E("Handsfree Right Driver",
  507. TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
  508. twl6040_power_mode_event,
  509. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  510. SND_SOC_DAPM_PGA("Headset Left Driver",
  511. TWL6040_REG_HSLCTL, 2, 0, NULL, 0),
  512. SND_SOC_DAPM_PGA("Headset Right Driver",
  513. TWL6040_REG_HSRCTL, 2, 0, NULL, 0),
  514. SND_SOC_DAPM_SWITCH_E("Earphone Driver",
  515. SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls,
  516. twl6040_power_mode_event,
  517. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  518. /* Analog playback PGAs */
  519. SND_SOC_DAPM_PGA("HFDAC Left PGA",
  520. TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
  521. SND_SOC_DAPM_PGA("HFDAC Right PGA",
  522. TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
  523. };
  524. static const struct snd_soc_dapm_route intercon[] = {
  525. /* Capture path */
  526. {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
  527. {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
  528. {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
  529. {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
  530. {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
  531. {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
  532. {"MicAmpL", NULL, "Analog Left Capture Route"},
  533. {"MicAmpR", NULL, "Analog Right Capture Route"},
  534. {"ADC Left", NULL, "MicAmpL"},
  535. {"ADC Right", NULL, "MicAmpR"},
  536. /* Headset playback path */
  537. {"HSDAC Left Playback", "Switch", "HSDAC Left"},
  538. {"HSDAC Right Playback", "Switch", "HSDAC Right"},
  539. {"Headset Left Driver", NULL, "HSDAC Left Playback"},
  540. {"Headset Right Driver", NULL, "HSDAC Right Playback"},
  541. {"HSOL", NULL, "Headset Left Driver"},
  542. {"HSOR", NULL, "Headset Right Driver"},
  543. /* Earphone playback path */
  544. {"Earphone Driver", "Switch", "HSDAC Left"},
  545. {"EP", NULL, "Earphone Driver"},
  546. /* Handsfree playback path */
  547. {"HFDAC Left Playback", "Switch", "HFDAC Left"},
  548. {"HFDAC Right Playback", "Switch", "HFDAC Right"},
  549. {"HFDAC Left PGA", NULL, "HFDAC Left Playback"},
  550. {"HFDAC Right PGA", NULL, "HFDAC Right Playback"},
  551. {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"},
  552. {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"},
  553. {"HFL", NULL, "Handsfree Left Driver"},
  554. {"HFR", NULL, "Handsfree Right Driver"},
  555. };
  556. static int twl6040_add_widgets(struct snd_soc_codec *codec)
  557. {
  558. struct snd_soc_dapm_context *dapm = &codec->dapm;
  559. snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
  560. ARRAY_SIZE(twl6040_dapm_widgets));
  561. snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
  562. snd_soc_dapm_new_widgets(dapm);
  563. return 0;
  564. }
  565. static int twl6040_power_up_completion(struct snd_soc_codec *codec,
  566. int naudint)
  567. {
  568. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  569. int time_left;
  570. u8 intid;
  571. time_left = wait_for_completion_timeout(&priv->ready,
  572. msecs_to_jiffies(48));
  573. if (!time_left) {
  574. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &intid,
  575. TWL6040_REG_INTID);
  576. if (!(intid & TWL6040_READYINT)) {
  577. dev_err(codec->dev, "timeout waiting for READYINT\n");
  578. return -ETIMEDOUT;
  579. }
  580. }
  581. priv->codec_powered = 1;
  582. return 0;
  583. }
  584. static int twl6040_set_bias_level(struct snd_soc_codec *codec,
  585. enum snd_soc_bias_level level)
  586. {
  587. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  588. int audpwron = priv->audpwron;
  589. int naudint = priv->naudint;
  590. int ret;
  591. switch (level) {
  592. case SND_SOC_BIAS_ON:
  593. break;
  594. case SND_SOC_BIAS_PREPARE:
  595. break;
  596. case SND_SOC_BIAS_STANDBY:
  597. if (priv->codec_powered)
  598. break;
  599. if (gpio_is_valid(audpwron)) {
  600. /* use AUDPWRON line */
  601. gpio_set_value(audpwron, 1);
  602. /* wait for power-up completion */
  603. ret = twl6040_power_up_completion(codec, naudint);
  604. if (ret)
  605. return ret;
  606. /* sync registers updated during power-up sequence */
  607. twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
  608. twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
  609. twl6040_read_reg_volatile(codec, TWL6040_REG_LPPLLCTL);
  610. } else {
  611. /* use manual power-up sequence */
  612. twl6040_power_up(codec);
  613. priv->codec_powered = 1;
  614. }
  615. /* initialize vdd/vss registers with reg_cache */
  616. twl6040_init_vdd_regs(codec);
  617. break;
  618. case SND_SOC_BIAS_OFF:
  619. if (!priv->codec_powered)
  620. break;
  621. if (gpio_is_valid(audpwron)) {
  622. /* use AUDPWRON line */
  623. gpio_set_value(audpwron, 0);
  624. /* power-down sequence latency */
  625. udelay(500);
  626. /* sync registers updated during power-down sequence */
  627. twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
  628. twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
  629. twl6040_write_reg_cache(codec, TWL6040_REG_LPPLLCTL,
  630. 0x00);
  631. } else {
  632. /* use manual power-down sequence */
  633. twl6040_power_down(codec);
  634. }
  635. priv->codec_powered = 0;
  636. break;
  637. }
  638. codec->dapm.bias_level = level;
  639. return 0;
  640. }
  641. /* set of rates for each pll: low-power and high-performance */
  642. static unsigned int lp_rates[] = {
  643. 88200,
  644. 96000,
  645. };
  646. static struct snd_pcm_hw_constraint_list lp_constraints = {
  647. .count = ARRAY_SIZE(lp_rates),
  648. .list = lp_rates,
  649. };
  650. static unsigned int hp_rates[] = {
  651. 96000,
  652. };
  653. static struct snd_pcm_hw_constraint_list hp_constraints = {
  654. .count = ARRAY_SIZE(hp_rates),
  655. .list = hp_rates,
  656. };
  657. static int twl6040_startup(struct snd_pcm_substream *substream,
  658. struct snd_soc_dai *dai)
  659. {
  660. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  661. struct snd_soc_codec *codec = rtd->codec;
  662. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  663. if (!priv->sysclk) {
  664. dev_err(codec->dev,
  665. "no mclk configured, call set_sysclk() on init\n");
  666. return -EINVAL;
  667. }
  668. /*
  669. * capture is not supported at 17.64 MHz,
  670. * it's reserved for headset low-power playback scenario
  671. */
  672. if ((priv->sysclk == 17640000) && substream->stream) {
  673. dev_err(codec->dev,
  674. "capture mode is not supported at %dHz\n",
  675. priv->sysclk);
  676. return -EINVAL;
  677. }
  678. snd_pcm_hw_constraint_list(substream->runtime, 0,
  679. SNDRV_PCM_HW_PARAM_RATE,
  680. priv->sysclk_constraints);
  681. return 0;
  682. }
  683. static int twl6040_hw_params(struct snd_pcm_substream *substream,
  684. struct snd_pcm_hw_params *params,
  685. struct snd_soc_dai *dai)
  686. {
  687. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  688. struct snd_soc_codec *codec = rtd->codec;
  689. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  690. u8 lppllctl;
  691. int rate;
  692. /* nothing to do for high-perf pll, it supports only 48 kHz */
  693. if (priv->pll == TWL6040_HPPLL_ID)
  694. return 0;
  695. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  696. rate = params_rate(params);
  697. switch (rate) {
  698. case 88200:
  699. lppllctl |= TWL6040_LPLLFIN;
  700. priv->sysclk = 17640000;
  701. break;
  702. case 96000:
  703. lppllctl &= ~TWL6040_LPLLFIN;
  704. priv->sysclk = 19200000;
  705. break;
  706. default:
  707. dev_err(codec->dev, "unsupported rate %d\n", rate);
  708. return -EINVAL;
  709. }
  710. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  711. return 0;
  712. }
  713. static int twl6040_trigger(struct snd_pcm_substream *substream,
  714. int cmd, struct snd_soc_dai *dai)
  715. {
  716. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  717. struct snd_soc_codec *codec = rtd->codec;
  718. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  719. switch (cmd) {
  720. case SNDRV_PCM_TRIGGER_START:
  721. case SNDRV_PCM_TRIGGER_RESUME:
  722. /*
  723. * low-power playback mode is restricted
  724. * for headset path only
  725. */
  726. if ((priv->sysclk == 17640000) && priv->non_lp) {
  727. dev_err(codec->dev,
  728. "some enabled paths aren't supported at %dHz\n",
  729. priv->sysclk);
  730. return -EPERM;
  731. }
  732. break;
  733. default:
  734. break;
  735. }
  736. return 0;
  737. }
  738. static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  739. int clk_id, unsigned int freq, int dir)
  740. {
  741. struct snd_soc_codec *codec = codec_dai->codec;
  742. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  743. u8 hppllctl, lppllctl;
  744. hppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_HPPLLCTL);
  745. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  746. switch (clk_id) {
  747. case TWL6040_SYSCLK_SEL_LPPLL:
  748. switch (freq) {
  749. case 32768:
  750. /* headset dac and driver must be in low-power mode */
  751. headset_power_mode(codec, 0);
  752. /* clk32k input requires low-power pll */
  753. lppllctl |= TWL6040_LPLLENA;
  754. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  755. mdelay(5);
  756. lppllctl &= ~TWL6040_HPLLSEL;
  757. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  758. hppllctl &= ~TWL6040_HPLLENA;
  759. twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
  760. break;
  761. default:
  762. dev_err(codec->dev, "unknown mclk freq %d\n", freq);
  763. return -EINVAL;
  764. }
  765. /* lppll divider */
  766. switch (priv->sysclk) {
  767. case 17640000:
  768. lppllctl |= TWL6040_LPLLFIN;
  769. break;
  770. case 19200000:
  771. lppllctl &= ~TWL6040_LPLLFIN;
  772. break;
  773. default:
  774. /* sysclk not yet configured */
  775. lppllctl &= ~TWL6040_LPLLFIN;
  776. priv->sysclk = 19200000;
  777. break;
  778. }
  779. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  780. priv->pll = TWL6040_LPPLL_ID;
  781. priv->sysclk_constraints = &lp_constraints;
  782. break;
  783. case TWL6040_SYSCLK_SEL_HPPLL:
  784. hppllctl &= ~TWL6040_MCLK_MSK;
  785. switch (freq) {
  786. case 12000000:
  787. /* mclk input, pll enabled */
  788. hppllctl |= TWL6040_MCLK_12000KHZ |
  789. TWL6040_HPLLSQRBP |
  790. TWL6040_HPLLENA;
  791. break;
  792. case 19200000:
  793. /* mclk input, pll disabled */
  794. hppllctl |= TWL6040_MCLK_19200KHZ |
  795. TWL6040_HPLLSQRENA |
  796. TWL6040_HPLLBP;
  797. break;
  798. case 26000000:
  799. /* mclk input, pll enabled */
  800. hppllctl |= TWL6040_MCLK_26000KHZ |
  801. TWL6040_HPLLSQRBP |
  802. TWL6040_HPLLENA;
  803. break;
  804. case 38400000:
  805. /* clk slicer, pll disabled */
  806. hppllctl |= TWL6040_MCLK_38400KHZ |
  807. TWL6040_HPLLSQRENA |
  808. TWL6040_HPLLBP;
  809. break;
  810. default:
  811. dev_err(codec->dev, "unknown mclk freq %d\n", freq);
  812. return -EINVAL;
  813. }
  814. /* headset dac and driver must be in high-performance mode */
  815. headset_power_mode(codec, 1);
  816. twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
  817. udelay(500);
  818. lppllctl |= TWL6040_HPLLSEL;
  819. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  820. lppllctl &= ~TWL6040_LPLLENA;
  821. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  822. /* high-performance pll can provide only 19.2 MHz */
  823. priv->pll = TWL6040_HPPLL_ID;
  824. priv->sysclk = 19200000;
  825. priv->sysclk_constraints = &hp_constraints;
  826. break;
  827. default:
  828. dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
  829. return -EINVAL;
  830. }
  831. return 0;
  832. }
  833. static struct snd_soc_dai_ops twl6040_dai_ops = {
  834. .startup = twl6040_startup,
  835. .hw_params = twl6040_hw_params,
  836. .trigger = twl6040_trigger,
  837. .set_sysclk = twl6040_set_dai_sysclk,
  838. };
  839. static struct snd_soc_dai_driver twl6040_dai = {
  840. .name = "twl6040-hifi",
  841. .playback = {
  842. .stream_name = "Playback",
  843. .channels_min = 1,
  844. .channels_max = 4,
  845. .rates = TWL6040_RATES,
  846. .formats = TWL6040_FORMATS,
  847. },
  848. .capture = {
  849. .stream_name = "Capture",
  850. .channels_min = 1,
  851. .channels_max = 2,
  852. .rates = TWL6040_RATES,
  853. .formats = TWL6040_FORMATS,
  854. },
  855. .ops = &twl6040_dai_ops,
  856. };
  857. #ifdef CONFIG_PM
  858. static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
  859. {
  860. twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
  861. return 0;
  862. }
  863. static int twl6040_resume(struct snd_soc_codec *codec)
  864. {
  865. twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  866. return 0;
  867. }
  868. #else
  869. #define twl6040_suspend NULL
  870. #define twl6040_resume NULL
  871. #endif
  872. static int twl6040_probe(struct snd_soc_codec *codec)
  873. {
  874. struct twl4030_codec_data *twl_codec = codec->dev->platform_data;
  875. struct twl6040_data *priv;
  876. int audpwron, naudint;
  877. int ret = 0;
  878. priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
  879. if (priv == NULL)
  880. return -ENOMEM;
  881. snd_soc_codec_set_drvdata(codec, priv);
  882. if (twl_codec) {
  883. audpwron = twl_codec->audpwron_gpio;
  884. naudint = twl_codec->naudint_irq;
  885. } else {
  886. audpwron = -EINVAL;
  887. naudint = 0;
  888. }
  889. priv->audpwron = audpwron;
  890. priv->naudint = naudint;
  891. init_completion(&priv->ready);
  892. if (gpio_is_valid(audpwron)) {
  893. ret = gpio_request(audpwron, "audpwron");
  894. if (ret)
  895. goto gpio1_err;
  896. ret = gpio_direction_output(audpwron, 0);
  897. if (ret)
  898. goto gpio2_err;
  899. priv->codec_powered = 0;
  900. }
  901. if (naudint) {
  902. /* audio interrupt */
  903. ret = request_threaded_irq(naudint, NULL,
  904. twl6040_naudint_handler,
  905. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  906. "twl6040_codec", codec);
  907. if (ret)
  908. goto gpio2_err;
  909. } else {
  910. if (gpio_is_valid(audpwron)) {
  911. /* enable only codec ready interrupt */
  912. twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
  913. ~TWL6040_READYMSK & TWL6040_ALLINT_MSK);
  914. } else {
  915. /* no interrupts at all */
  916. twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
  917. TWL6040_ALLINT_MSK);
  918. }
  919. }
  920. /* init vio registers */
  921. twl6040_init_vio_regs(codec);
  922. /* power on device */
  923. ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  924. if (ret)
  925. goto irq_err;
  926. snd_soc_add_controls(codec, twl6040_snd_controls,
  927. ARRAY_SIZE(twl6040_snd_controls));
  928. twl6040_add_widgets(codec);
  929. return 0;
  930. irq_err:
  931. if (naudint)
  932. free_irq(naudint, codec);
  933. gpio2_err:
  934. if (gpio_is_valid(audpwron))
  935. gpio_free(audpwron);
  936. gpio1_err:
  937. kfree(priv);
  938. return ret;
  939. }
  940. static int twl6040_remove(struct snd_soc_codec *codec)
  941. {
  942. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  943. int audpwron = priv->audpwron;
  944. int naudint = priv->naudint;
  945. twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
  946. if (gpio_is_valid(audpwron))
  947. gpio_free(audpwron);
  948. if (naudint)
  949. free_irq(naudint, codec);
  950. kfree(priv);
  951. return 0;
  952. }
  953. static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
  954. .probe = twl6040_probe,
  955. .remove = twl6040_remove,
  956. .suspend = twl6040_suspend,
  957. .resume = twl6040_resume,
  958. .read = twl6040_read_reg_cache,
  959. .write = twl6040_write,
  960. .set_bias_level = twl6040_set_bias_level,
  961. .reg_cache_size = ARRAY_SIZE(twl6040_reg),
  962. .reg_word_size = sizeof(u8),
  963. .reg_cache_default = twl6040_reg,
  964. };
  965. static int __devinit twl6040_codec_probe(struct platform_device *pdev)
  966. {
  967. return snd_soc_register_codec(&pdev->dev,
  968. &soc_codec_dev_twl6040, &twl6040_dai, 1);
  969. }
  970. static int __devexit twl6040_codec_remove(struct platform_device *pdev)
  971. {
  972. snd_soc_unregister_codec(&pdev->dev);
  973. return 0;
  974. }
  975. static struct platform_driver twl6040_codec_driver = {
  976. .driver = {
  977. .name = "twl6040-codec",
  978. .owner = THIS_MODULE,
  979. },
  980. .probe = twl6040_codec_probe,
  981. .remove = __devexit_p(twl6040_codec_remove),
  982. };
  983. static int __init twl6040_codec_init(void)
  984. {
  985. return platform_driver_register(&twl6040_codec_driver);
  986. }
  987. module_init(twl6040_codec_init);
  988. static void __exit twl6040_codec_exit(void)
  989. {
  990. platform_driver_unregister(&twl6040_codec_driver);
  991. }
  992. module_exit(twl6040_codec_exit);
  993. MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
  994. MODULE_AUTHOR("Misael Lopez Cruz");
  995. MODULE_LICENSE("GPL");