tlv320aic26.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458
  1. /*
  2. * Texas Instruments TLV320AIC26 low power audio CODEC
  3. * ALSA SoC CODEC driver
  4. *
  5. * Copyright (C) 2008 Secret Lab Technologies Ltd.
  6. */
  7. #include <linux/module.h>
  8. #include <linux/moduleparam.h>
  9. #include <linux/init.h>
  10. #include <linux/delay.h>
  11. #include <linux/pm.h>
  12. #include <linux/device.h>
  13. #include <linux/sysfs.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/slab.h>
  16. #include <sound/core.h>
  17. #include <sound/pcm.h>
  18. #include <sound/pcm_params.h>
  19. #include <sound/soc.h>
  20. #include <sound/initval.h>
  21. #include "tlv320aic26.h"
  22. MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
  23. MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  24. MODULE_LICENSE("GPL");
  25. /* AIC26 driver private data */
  26. struct aic26 {
  27. struct spi_device *spi;
  28. struct snd_soc_codec codec;
  29. u16 reg_cache[AIC26_NUM_REGS]; /* shadow registers */
  30. int master;
  31. int datfm;
  32. int mclk;
  33. /* Keyclick parameters */
  34. int keyclick_amplitude;
  35. int keyclick_freq;
  36. int keyclick_len;
  37. };
  38. /* ---------------------------------------------------------------------
  39. * Register access routines
  40. */
  41. static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
  42. unsigned int reg)
  43. {
  44. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  45. u16 *cache = codec->reg_cache;
  46. u16 cmd, value;
  47. u8 buffer[2];
  48. int rc;
  49. if (reg >= AIC26_NUM_REGS) {
  50. WARN_ON_ONCE(1);
  51. return 0;
  52. }
  53. /* Do SPI transfer; first 16bits are command; remaining is
  54. * register contents */
  55. cmd = AIC26_READ_COMMAND_WORD(reg);
  56. buffer[0] = (cmd >> 8) & 0xff;
  57. buffer[1] = cmd & 0xff;
  58. rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
  59. if (rc) {
  60. dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
  61. return -EIO;
  62. }
  63. value = (buffer[0] << 8) | buffer[1];
  64. /* Update the cache before returning with the value */
  65. cache[reg] = value;
  66. return value;
  67. }
  68. static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
  69. unsigned int reg)
  70. {
  71. u16 *cache = codec->reg_cache;
  72. if (reg >= AIC26_NUM_REGS) {
  73. WARN_ON_ONCE(1);
  74. return 0;
  75. }
  76. return cache[reg];
  77. }
  78. static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
  79. unsigned int value)
  80. {
  81. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  82. u16 *cache = codec->reg_cache;
  83. u16 cmd;
  84. u8 buffer[4];
  85. int rc;
  86. if (reg >= AIC26_NUM_REGS) {
  87. WARN_ON_ONCE(1);
  88. return -EINVAL;
  89. }
  90. /* Do SPI transfer; first 16bits are command; remaining is data
  91. * to write into register */
  92. cmd = AIC26_WRITE_COMMAND_WORD(reg);
  93. buffer[0] = (cmd >> 8) & 0xff;
  94. buffer[1] = cmd & 0xff;
  95. buffer[2] = value >> 8;
  96. buffer[3] = value;
  97. rc = spi_write(aic26->spi, buffer, 4);
  98. if (rc) {
  99. dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
  100. return -EIO;
  101. }
  102. /* update cache before returning */
  103. cache[reg] = value;
  104. return 0;
  105. }
  106. /* ---------------------------------------------------------------------
  107. * Digital Audio Interface Operations
  108. */
  109. static int aic26_hw_params(struct snd_pcm_substream *substream,
  110. struct snd_pcm_hw_params *params,
  111. struct snd_soc_dai *dai)
  112. {
  113. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  114. struct snd_soc_codec *codec = rtd->codec;
  115. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  116. int fsref, divisor, wlen, pval, jval, dval, qval;
  117. u16 reg;
  118. dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
  119. substream, params);
  120. dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
  121. params_format(params));
  122. switch (params_rate(params)) {
  123. case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
  124. case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
  125. case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
  126. case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
  127. case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
  128. case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
  129. case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
  130. case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
  131. case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
  132. default:
  133. dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
  134. }
  135. /* select data word length */
  136. switch (params_format(params)) {
  137. case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
  138. case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
  139. case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
  140. case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
  141. default:
  142. dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
  143. }
  144. /* Configure PLL */
  145. pval = 1;
  146. jval = (fsref == 44100) ? 7 : 8;
  147. dval = (fsref == 44100) ? 5264 : 1920;
  148. qval = 0;
  149. reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
  150. aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
  151. reg = dval << 2;
  152. aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);
  153. /* Audio Control 3 (master mode, fsref rate) */
  154. reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
  155. reg &= ~0xf800;
  156. if (aic26->master)
  157. reg |= 0x0800;
  158. if (fsref == 48000)
  159. reg |= 0x2000;
  160. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
  161. /* Audio Control 1 (FSref divisor) */
  162. reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
  163. reg &= ~0x0fff;
  164. reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
  165. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
  166. return 0;
  167. }
  168. /**
  169. * aic26_mute - Mute control to reduce noise when changing audio format
  170. */
  171. static int aic26_mute(struct snd_soc_dai *dai, int mute)
  172. {
  173. struct snd_soc_codec *codec = dai->codec;
  174. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  175. u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
  176. dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
  177. dai, mute);
  178. if (mute)
  179. reg |= 0x8080;
  180. else
  181. reg &= ~0x8080;
  182. aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);
  183. return 0;
  184. }
  185. static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
  186. int clk_id, unsigned int freq, int dir)
  187. {
  188. struct snd_soc_codec *codec = codec_dai->codec;
  189. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  190. dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
  191. " freq=%i, dir=%i)\n",
  192. codec_dai, clk_id, freq, dir);
  193. /* MCLK needs to fall between 2MHz and 50 MHz */
  194. if ((freq < 2000000) || (freq > 50000000))
  195. return -EINVAL;
  196. aic26->mclk = freq;
  197. return 0;
  198. }
  199. static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
  200. {
  201. struct snd_soc_codec *codec = codec_dai->codec;
  202. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  203. dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
  204. codec_dai, fmt);
  205. /* set master/slave audio interface */
  206. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  207. case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
  208. case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
  209. default:
  210. dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
  211. }
  212. /* interface format */
  213. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  214. case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
  215. case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
  216. case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
  217. case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
  218. default:
  219. dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
  220. }
  221. return 0;
  222. }
  223. /* ---------------------------------------------------------------------
  224. * Digital Audio Interface Definition
  225. */
  226. #define AIC26_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  227. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
  228. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
  229. SNDRV_PCM_RATE_48000)
  230. #define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\
  231. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
  232. static struct snd_soc_dai_ops aic26_dai_ops = {
  233. .hw_params = aic26_hw_params,
  234. .digital_mute = aic26_mute,
  235. .set_sysclk = aic26_set_sysclk,
  236. .set_fmt = aic26_set_fmt,
  237. };
  238. static struct snd_soc_dai_driver aic26_dai = {
  239. .name = "tlv320aic26-hifi",
  240. .playback = {
  241. .stream_name = "Playback",
  242. .channels_min = 2,
  243. .channels_max = 2,
  244. .rates = AIC26_RATES,
  245. .formats = AIC26_FORMATS,
  246. },
  247. .capture = {
  248. .stream_name = "Capture",
  249. .channels_min = 2,
  250. .channels_max = 2,
  251. .rates = AIC26_RATES,
  252. .formats = AIC26_FORMATS,
  253. },
  254. .ops = &aic26_dai_ops,
  255. };
  256. /* ---------------------------------------------------------------------
  257. * ALSA controls
  258. */
  259. static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
  260. static const struct soc_enum aic26_capture_src_enum =
  261. SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
  262. static const struct snd_kcontrol_new aic26_snd_controls[] = {
  263. /* Output */
  264. SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
  265. SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
  266. SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
  267. SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
  268. SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
  269. SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
  270. SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
  271. SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
  272. SOC_ENUM("Capture Source", aic26_capture_src_enum),
  273. };
  274. /* ---------------------------------------------------------------------
  275. * SPI device portion of driver: sysfs files for debugging
  276. */
  277. static ssize_t aic26_keyclick_show(struct device *dev,
  278. struct device_attribute *attr, char *buf)
  279. {
  280. struct aic26 *aic26 = dev_get_drvdata(dev);
  281. int val, amp, freq, len;
  282. val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
  283. amp = (val >> 12) & 0x7;
  284. freq = (125 << ((val >> 8) & 0x7)) >> 1;
  285. len = 2 * (1 + ((val >> 4) & 0xf));
  286. return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
  287. }
  288. /* Any write to the keyclick attribute will trigger the keyclick event */
  289. static ssize_t aic26_keyclick_set(struct device *dev,
  290. struct device_attribute *attr,
  291. const char *buf, size_t count)
  292. {
  293. struct aic26 *aic26 = dev_get_drvdata(dev);
  294. int val;
  295. val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
  296. val |= 0x8000;
  297. aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
  298. return count;
  299. }
  300. static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
  301. /* ---------------------------------------------------------------------
  302. * SoC CODEC portion of driver: probe and release routines
  303. */
  304. static int aic26_probe(struct snd_soc_codec *codec)
  305. {
  306. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  307. int ret, err, i, reg;
  308. dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
  309. /* Reset the codec to power on defaults */
  310. aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);
  311. /* Power up CODEC */
  312. aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);
  313. /* Audio Control 3 (master mode, fsref rate) */
  314. reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
  315. reg &= ~0xf800;
  316. reg |= 0x0800; /* set master mode */
  317. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
  318. /* Fill register cache */
  319. for (i = 0; i < ARRAY_SIZE(aic26->reg_cache); i++)
  320. aic26_reg_read(codec, i);
  321. /* Register the sysfs files for debugging */
  322. /* Create SysFS files */
  323. ret = device_create_file(codec->dev, &dev_attr_keyclick);
  324. if (ret)
  325. dev_info(codec->dev, "error creating sysfs files\n");
  326. /* register controls */
  327. dev_dbg(codec->dev, "Registering controls\n");
  328. err = snd_soc_add_controls(codec, aic26_snd_controls,
  329. ARRAY_SIZE(aic26_snd_controls));
  330. WARN_ON(err < 0);
  331. return 0;
  332. }
  333. static struct snd_soc_codec_driver aic26_soc_codec_dev = {
  334. .probe = aic26_probe,
  335. .read = aic26_reg_read,
  336. .write = aic26_reg_write,
  337. .reg_cache_size = AIC26_NUM_REGS,
  338. .reg_word_size = sizeof(u16),
  339. };
  340. /* ---------------------------------------------------------------------
  341. * SPI device portion of driver: probe and release routines and SPI
  342. * driver registration.
  343. */
  344. static int aic26_spi_probe(struct spi_device *spi)
  345. {
  346. struct aic26 *aic26;
  347. int ret;
  348. dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
  349. /* Allocate driver data */
  350. aic26 = kzalloc(sizeof *aic26, GFP_KERNEL);
  351. if (!aic26)
  352. return -ENOMEM;
  353. /* Initialize the driver data */
  354. aic26->spi = spi;
  355. dev_set_drvdata(&spi->dev, aic26);
  356. aic26->master = 1;
  357. ret = snd_soc_register_codec(&spi->dev,
  358. &aic26_soc_codec_dev, &aic26_dai, 1);
  359. if (ret < 0)
  360. kfree(aic26);
  361. return ret;
  362. dev_dbg(&spi->dev, "SPI device initialized\n");
  363. return 0;
  364. }
  365. static int aic26_spi_remove(struct spi_device *spi)
  366. {
  367. snd_soc_unregister_codec(&spi->dev);
  368. kfree(spi_get_drvdata(spi));
  369. return 0;
  370. }
  371. static struct spi_driver aic26_spi = {
  372. .driver = {
  373. .name = "tlv320aic26-codec",
  374. .owner = THIS_MODULE,
  375. },
  376. .probe = aic26_spi_probe,
  377. .remove = aic26_spi_remove,
  378. };
  379. static int __init aic26_init(void)
  380. {
  381. return spi_register_driver(&aic26_spi);
  382. }
  383. module_init(aic26_init);
  384. static void __exit aic26_exit(void)
  385. {
  386. spi_unregister_driver(&aic26_spi);
  387. }
  388. module_exit(aic26_exit);