cs42l51.c 18 KB

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  1. /*
  2. * cs42l51.c
  3. *
  4. * ASoC Driver for Cirrus Logic CS42L51 codecs
  5. *
  6. * Copyright (c) 2010 Arnaud Patard <apatard@mandriva.com>
  7. *
  8. * Based on cs4270.c - Copyright (c) Freescale Semiconductor
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * For now:
  20. * - Only I2C is support. Not SPI
  21. * - master mode *NOT* supported
  22. */
  23. #include <linux/module.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/slab.h>
  26. #include <sound/core.h>
  27. #include <sound/soc.h>
  28. #include <sound/tlv.h>
  29. #include <sound/initval.h>
  30. #include <sound/pcm_params.h>
  31. #include <sound/pcm.h>
  32. #include <linux/i2c.h>
  33. #include "cs42l51.h"
  34. enum master_slave_mode {
  35. MODE_SLAVE,
  36. MODE_SLAVE_AUTO,
  37. MODE_MASTER,
  38. };
  39. struct cs42l51_private {
  40. enum snd_soc_control_type control_type;
  41. void *control_data;
  42. unsigned int mclk;
  43. unsigned int audio_mode; /* The mode (I2S or left-justified) */
  44. enum master_slave_mode func;
  45. u8 reg_cache[CS42L51_NUMREGS];
  46. };
  47. #define CS42L51_FORMATS ( \
  48. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
  49. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
  50. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
  51. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
  52. static int cs42l51_fill_cache(struct snd_soc_codec *codec)
  53. {
  54. u8 *cache = codec->reg_cache + 1;
  55. struct i2c_client *i2c_client = codec->control_data;
  56. s32 length;
  57. length = i2c_smbus_read_i2c_block_data(i2c_client,
  58. CS42L51_FIRSTREG | 0x80, CS42L51_NUMREGS, cache);
  59. if (length != CS42L51_NUMREGS) {
  60. dev_err(&i2c_client->dev,
  61. "I2C read failure, addr=0x%x (ret=%d vs %d)\n",
  62. i2c_client->addr, length, CS42L51_NUMREGS);
  63. return -EIO;
  64. }
  65. return 0;
  66. }
  67. static int cs42l51_get_chan_mix(struct snd_kcontrol *kcontrol,
  68. struct snd_ctl_elem_value *ucontrol)
  69. {
  70. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  71. unsigned long value = snd_soc_read(codec, CS42L51_PCM_MIXER)&3;
  72. switch (value) {
  73. default:
  74. case 0:
  75. ucontrol->value.integer.value[0] = 0;
  76. break;
  77. /* same value : (L+R)/2 and (R+L)/2 */
  78. case 1:
  79. case 2:
  80. ucontrol->value.integer.value[0] = 1;
  81. break;
  82. case 3:
  83. ucontrol->value.integer.value[0] = 2;
  84. break;
  85. }
  86. return 0;
  87. }
  88. #define CHAN_MIX_NORMAL 0x00
  89. #define CHAN_MIX_BOTH 0x55
  90. #define CHAN_MIX_SWAP 0xFF
  91. static int cs42l51_set_chan_mix(struct snd_kcontrol *kcontrol,
  92. struct snd_ctl_elem_value *ucontrol)
  93. {
  94. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  95. unsigned char val;
  96. switch (ucontrol->value.integer.value[0]) {
  97. default:
  98. case 0:
  99. val = CHAN_MIX_NORMAL;
  100. break;
  101. case 1:
  102. val = CHAN_MIX_BOTH;
  103. break;
  104. case 2:
  105. val = CHAN_MIX_SWAP;
  106. break;
  107. }
  108. snd_soc_write(codec, CS42L51_PCM_MIXER, val);
  109. return 1;
  110. }
  111. static const DECLARE_TLV_DB_SCALE(adc_pcm_tlv, -5150, 50, 0);
  112. static const DECLARE_TLV_DB_SCALE(tone_tlv, -1050, 150, 0);
  113. /* This is a lie. after -102 db, it stays at -102 */
  114. /* maybe a range would be better */
  115. static const DECLARE_TLV_DB_SCALE(aout_tlv, -11550, 50, 0);
  116. static const DECLARE_TLV_DB_SCALE(boost_tlv, 1600, 1600, 0);
  117. static const char *chan_mix[] = {
  118. "L R",
  119. "L+R",
  120. "R L",
  121. };
  122. static const struct soc_enum cs42l51_chan_mix =
  123. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(chan_mix), chan_mix);
  124. static const struct snd_kcontrol_new cs42l51_snd_controls[] = {
  125. SOC_DOUBLE_R_SX_TLV("PCM Playback Volume",
  126. CS42L51_PCMA_VOL, CS42L51_PCMB_VOL,
  127. 7, 0xffffff99, 0x18, adc_pcm_tlv),
  128. SOC_DOUBLE_R("PCM Playback Switch",
  129. CS42L51_PCMA_VOL, CS42L51_PCMB_VOL, 7, 1, 1),
  130. SOC_DOUBLE_R_SX_TLV("Analog Playback Volume",
  131. CS42L51_AOUTA_VOL, CS42L51_AOUTB_VOL,
  132. 8, 0xffffff19, 0x18, aout_tlv),
  133. SOC_DOUBLE_R_SX_TLV("ADC Mixer Volume",
  134. CS42L51_ADCA_VOL, CS42L51_ADCB_VOL,
  135. 7, 0xffffff99, 0x18, adc_pcm_tlv),
  136. SOC_DOUBLE_R("ADC Mixer Switch",
  137. CS42L51_ADCA_VOL, CS42L51_ADCB_VOL, 7, 1, 1),
  138. SOC_SINGLE("Playback Deemphasis Switch", CS42L51_DAC_CTL, 3, 1, 0),
  139. SOC_SINGLE("Auto-Mute Switch", CS42L51_DAC_CTL, 2, 1, 0),
  140. SOC_SINGLE("Soft Ramp Switch", CS42L51_DAC_CTL, 1, 1, 0),
  141. SOC_SINGLE("Zero Cross Switch", CS42L51_DAC_CTL, 0, 0, 0),
  142. SOC_DOUBLE_TLV("Mic Boost Volume",
  143. CS42L51_MIC_CTL, 0, 1, 1, 0, boost_tlv),
  144. SOC_SINGLE_TLV("Bass Volume", CS42L51_TONE_CTL, 0, 0xf, 1, tone_tlv),
  145. SOC_SINGLE_TLV("Treble Volume", CS42L51_TONE_CTL, 4, 0xf, 1, tone_tlv),
  146. SOC_ENUM_EXT("PCM channel mixer",
  147. cs42l51_chan_mix,
  148. cs42l51_get_chan_mix, cs42l51_set_chan_mix),
  149. };
  150. /*
  151. * to power down, one must:
  152. * 1.) Enable the PDN bit
  153. * 2.) enable power-down for the select channels
  154. * 3.) disable the PDN bit.
  155. */
  156. static int cs42l51_pdn_event(struct snd_soc_dapm_widget *w,
  157. struct snd_kcontrol *kcontrol, int event)
  158. {
  159. unsigned long value;
  160. value = snd_soc_read(w->codec, CS42L51_POWER_CTL1);
  161. value &= ~CS42L51_POWER_CTL1_PDN;
  162. switch (event) {
  163. case SND_SOC_DAPM_PRE_PMD:
  164. value |= CS42L51_POWER_CTL1_PDN;
  165. break;
  166. default:
  167. case SND_SOC_DAPM_POST_PMD:
  168. break;
  169. }
  170. snd_soc_update_bits(w->codec, CS42L51_POWER_CTL1,
  171. CS42L51_POWER_CTL1_PDN, value);
  172. return 0;
  173. }
  174. static const char *cs42l51_dac_names[] = {"Direct PCM",
  175. "DSP PCM", "ADC"};
  176. static const struct soc_enum cs42l51_dac_mux_enum =
  177. SOC_ENUM_SINGLE(CS42L51_DAC_CTL, 6, 3, cs42l51_dac_names);
  178. static const struct snd_kcontrol_new cs42l51_dac_mux_controls =
  179. SOC_DAPM_ENUM("Route", cs42l51_dac_mux_enum);
  180. static const char *cs42l51_adcl_names[] = {"AIN1 Left", "AIN2 Left",
  181. "MIC Left", "MIC+preamp Left"};
  182. static const struct soc_enum cs42l51_adcl_mux_enum =
  183. SOC_ENUM_SINGLE(CS42L51_ADC_INPUT, 4, 4, cs42l51_adcl_names);
  184. static const struct snd_kcontrol_new cs42l51_adcl_mux_controls =
  185. SOC_DAPM_ENUM("Route", cs42l51_adcl_mux_enum);
  186. static const char *cs42l51_adcr_names[] = {"AIN1 Right", "AIN2 Right",
  187. "MIC Right", "MIC+preamp Right"};
  188. static const struct soc_enum cs42l51_adcr_mux_enum =
  189. SOC_ENUM_SINGLE(CS42L51_ADC_INPUT, 6, 4, cs42l51_adcr_names);
  190. static const struct snd_kcontrol_new cs42l51_adcr_mux_controls =
  191. SOC_DAPM_ENUM("Route", cs42l51_adcr_mux_enum);
  192. static const struct snd_soc_dapm_widget cs42l51_dapm_widgets[] = {
  193. SND_SOC_DAPM_MICBIAS("Mic Bias", CS42L51_MIC_POWER_CTL, 1, 1),
  194. SND_SOC_DAPM_PGA_E("Left PGA", CS42L51_POWER_CTL1, 3, 1, NULL, 0,
  195. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  196. SND_SOC_DAPM_PGA_E("Right PGA", CS42L51_POWER_CTL1, 4, 1, NULL, 0,
  197. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  198. SND_SOC_DAPM_ADC_E("Left ADC", "Left HiFi Capture",
  199. CS42L51_POWER_CTL1, 1, 1,
  200. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  201. SND_SOC_DAPM_ADC_E("Right ADC", "Right HiFi Capture",
  202. CS42L51_POWER_CTL1, 2, 1,
  203. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  204. SND_SOC_DAPM_DAC_E("Left DAC", "Left HiFi Playback",
  205. CS42L51_POWER_CTL1, 5, 1,
  206. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  207. SND_SOC_DAPM_DAC_E("Right DAC", "Right HiFi Playback",
  208. CS42L51_POWER_CTL1, 6, 1,
  209. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  210. /* analog/mic */
  211. SND_SOC_DAPM_INPUT("AIN1L"),
  212. SND_SOC_DAPM_INPUT("AIN1R"),
  213. SND_SOC_DAPM_INPUT("AIN2L"),
  214. SND_SOC_DAPM_INPUT("AIN2R"),
  215. SND_SOC_DAPM_INPUT("MICL"),
  216. SND_SOC_DAPM_INPUT("MICR"),
  217. SND_SOC_DAPM_MIXER("Mic Preamp Left",
  218. CS42L51_MIC_POWER_CTL, 2, 1, NULL, 0),
  219. SND_SOC_DAPM_MIXER("Mic Preamp Right",
  220. CS42L51_MIC_POWER_CTL, 3, 1, NULL, 0),
  221. /* HP */
  222. SND_SOC_DAPM_OUTPUT("HPL"),
  223. SND_SOC_DAPM_OUTPUT("HPR"),
  224. /* mux */
  225. SND_SOC_DAPM_MUX("DAC Mux", SND_SOC_NOPM, 0, 0,
  226. &cs42l51_dac_mux_controls),
  227. SND_SOC_DAPM_MUX("PGA-ADC Mux Left", SND_SOC_NOPM, 0, 0,
  228. &cs42l51_adcl_mux_controls),
  229. SND_SOC_DAPM_MUX("PGA-ADC Mux Right", SND_SOC_NOPM, 0, 0,
  230. &cs42l51_adcr_mux_controls),
  231. };
  232. static const struct snd_soc_dapm_route cs42l51_routes[] = {
  233. {"HPL", NULL, "Left DAC"},
  234. {"HPR", NULL, "Right DAC"},
  235. {"Left ADC", NULL, "Left PGA"},
  236. {"Right ADC", NULL, "Right PGA"},
  237. {"Mic Preamp Left", NULL, "MICL"},
  238. {"Mic Preamp Right", NULL, "MICR"},
  239. {"PGA-ADC Mux Left", "AIN1 Left", "AIN1L" },
  240. {"PGA-ADC Mux Left", "AIN2 Left", "AIN2L" },
  241. {"PGA-ADC Mux Left", "MIC Left", "MICL" },
  242. {"PGA-ADC Mux Left", "MIC+preamp Left", "Mic Preamp Left" },
  243. {"PGA-ADC Mux Right", "AIN1 Right", "AIN1R" },
  244. {"PGA-ADC Mux Right", "AIN2 Right", "AIN2R" },
  245. {"PGA-ADC Mux Right", "MIC Right", "MICR" },
  246. {"PGA-ADC Mux Right", "MIC+preamp Right", "Mic Preamp Right" },
  247. {"Left PGA", NULL, "PGA-ADC Mux Left"},
  248. {"Right PGA", NULL, "PGA-ADC Mux Right"},
  249. };
  250. static int cs42l51_set_dai_fmt(struct snd_soc_dai *codec_dai,
  251. unsigned int format)
  252. {
  253. struct snd_soc_codec *codec = codec_dai->codec;
  254. struct cs42l51_private *cs42l51 = snd_soc_codec_get_drvdata(codec);
  255. int ret = 0;
  256. switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
  257. case SND_SOC_DAIFMT_I2S:
  258. case SND_SOC_DAIFMT_LEFT_J:
  259. case SND_SOC_DAIFMT_RIGHT_J:
  260. cs42l51->audio_mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
  261. break;
  262. default:
  263. dev_err(codec->dev, "invalid DAI format\n");
  264. ret = -EINVAL;
  265. }
  266. switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
  267. case SND_SOC_DAIFMT_CBM_CFM:
  268. cs42l51->func = MODE_MASTER;
  269. break;
  270. case SND_SOC_DAIFMT_CBS_CFS:
  271. cs42l51->func = MODE_SLAVE_AUTO;
  272. break;
  273. default:
  274. ret = -EINVAL;
  275. break;
  276. }
  277. return ret;
  278. }
  279. struct cs42l51_ratios {
  280. unsigned int ratio;
  281. unsigned char speed_mode;
  282. unsigned char mclk;
  283. };
  284. static struct cs42l51_ratios slave_ratios[] = {
  285. { 512, CS42L51_QSM_MODE, 0 }, { 768, CS42L51_QSM_MODE, 0 },
  286. { 1024, CS42L51_QSM_MODE, 0 }, { 1536, CS42L51_QSM_MODE, 0 },
  287. { 2048, CS42L51_QSM_MODE, 0 }, { 3072, CS42L51_QSM_MODE, 0 },
  288. { 256, CS42L51_HSM_MODE, 0 }, { 384, CS42L51_HSM_MODE, 0 },
  289. { 512, CS42L51_HSM_MODE, 0 }, { 768, CS42L51_HSM_MODE, 0 },
  290. { 1024, CS42L51_HSM_MODE, 0 }, { 1536, CS42L51_HSM_MODE, 0 },
  291. { 128, CS42L51_SSM_MODE, 0 }, { 192, CS42L51_SSM_MODE, 0 },
  292. { 256, CS42L51_SSM_MODE, 0 }, { 384, CS42L51_SSM_MODE, 0 },
  293. { 512, CS42L51_SSM_MODE, 0 }, { 768, CS42L51_SSM_MODE, 0 },
  294. { 128, CS42L51_DSM_MODE, 0 }, { 192, CS42L51_DSM_MODE, 0 },
  295. { 256, CS42L51_DSM_MODE, 0 }, { 384, CS42L51_DSM_MODE, 0 },
  296. };
  297. static struct cs42l51_ratios slave_auto_ratios[] = {
  298. { 1024, CS42L51_QSM_MODE, 0 }, { 1536, CS42L51_QSM_MODE, 0 },
  299. { 2048, CS42L51_QSM_MODE, 1 }, { 3072, CS42L51_QSM_MODE, 1 },
  300. { 512, CS42L51_HSM_MODE, 0 }, { 768, CS42L51_HSM_MODE, 0 },
  301. { 1024, CS42L51_HSM_MODE, 1 }, { 1536, CS42L51_HSM_MODE, 1 },
  302. { 256, CS42L51_SSM_MODE, 0 }, { 384, CS42L51_SSM_MODE, 0 },
  303. { 512, CS42L51_SSM_MODE, 1 }, { 768, CS42L51_SSM_MODE, 1 },
  304. { 128, CS42L51_DSM_MODE, 0 }, { 192, CS42L51_DSM_MODE, 0 },
  305. { 256, CS42L51_DSM_MODE, 1 }, { 384, CS42L51_DSM_MODE, 1 },
  306. };
  307. static int cs42l51_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  308. int clk_id, unsigned int freq, int dir)
  309. {
  310. struct snd_soc_codec *codec = codec_dai->codec;
  311. struct cs42l51_private *cs42l51 = snd_soc_codec_get_drvdata(codec);
  312. cs42l51->mclk = freq;
  313. return 0;
  314. }
  315. static int cs42l51_hw_params(struct snd_pcm_substream *substream,
  316. struct snd_pcm_hw_params *params,
  317. struct snd_soc_dai *dai)
  318. {
  319. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  320. struct snd_soc_codec *codec = rtd->codec;
  321. struct cs42l51_private *cs42l51 = snd_soc_codec_get_drvdata(codec);
  322. int ret;
  323. unsigned int i;
  324. unsigned int rate;
  325. unsigned int ratio;
  326. struct cs42l51_ratios *ratios = NULL;
  327. int nr_ratios = 0;
  328. int intf_ctl, power_ctl, fmt;
  329. switch (cs42l51->func) {
  330. case MODE_MASTER:
  331. return -EINVAL;
  332. case MODE_SLAVE:
  333. ratios = slave_ratios;
  334. nr_ratios = ARRAY_SIZE(slave_ratios);
  335. break;
  336. case MODE_SLAVE_AUTO:
  337. ratios = slave_auto_ratios;
  338. nr_ratios = ARRAY_SIZE(slave_auto_ratios);
  339. break;
  340. }
  341. /* Figure out which MCLK/LRCK ratio to use */
  342. rate = params_rate(params); /* Sampling rate, in Hz */
  343. ratio = cs42l51->mclk / rate; /* MCLK/LRCK ratio */
  344. for (i = 0; i < nr_ratios; i++) {
  345. if (ratios[i].ratio == ratio)
  346. break;
  347. }
  348. if (i == nr_ratios) {
  349. /* We did not find a matching ratio */
  350. dev_err(codec->dev, "could not find matching ratio\n");
  351. return -EINVAL;
  352. }
  353. intf_ctl = snd_soc_read(codec, CS42L51_INTF_CTL);
  354. power_ctl = snd_soc_read(codec, CS42L51_MIC_POWER_CTL);
  355. intf_ctl &= ~(CS42L51_INTF_CTL_MASTER | CS42L51_INTF_CTL_ADC_I2S
  356. | CS42L51_INTF_CTL_DAC_FORMAT(7));
  357. power_ctl &= ~(CS42L51_MIC_POWER_CTL_SPEED(3)
  358. | CS42L51_MIC_POWER_CTL_MCLK_DIV2);
  359. switch (cs42l51->func) {
  360. case MODE_MASTER:
  361. intf_ctl |= CS42L51_INTF_CTL_MASTER;
  362. power_ctl |= CS42L51_MIC_POWER_CTL_SPEED(ratios[i].speed_mode);
  363. break;
  364. case MODE_SLAVE:
  365. power_ctl |= CS42L51_MIC_POWER_CTL_SPEED(ratios[i].speed_mode);
  366. break;
  367. case MODE_SLAVE_AUTO:
  368. power_ctl |= CS42L51_MIC_POWER_CTL_AUTO;
  369. break;
  370. }
  371. switch (cs42l51->audio_mode) {
  372. case SND_SOC_DAIFMT_I2S:
  373. intf_ctl |= CS42L51_INTF_CTL_ADC_I2S;
  374. intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_I2S);
  375. break;
  376. case SND_SOC_DAIFMT_LEFT_J:
  377. intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_LJ24);
  378. break;
  379. case SND_SOC_DAIFMT_RIGHT_J:
  380. switch (params_format(params)) {
  381. case SNDRV_PCM_FORMAT_S16_LE:
  382. case SNDRV_PCM_FORMAT_S16_BE:
  383. fmt = CS42L51_DAC_DIF_RJ16;
  384. break;
  385. case SNDRV_PCM_FORMAT_S18_3LE:
  386. case SNDRV_PCM_FORMAT_S18_3BE:
  387. fmt = CS42L51_DAC_DIF_RJ18;
  388. break;
  389. case SNDRV_PCM_FORMAT_S20_3LE:
  390. case SNDRV_PCM_FORMAT_S20_3BE:
  391. fmt = CS42L51_DAC_DIF_RJ20;
  392. break;
  393. case SNDRV_PCM_FORMAT_S24_LE:
  394. case SNDRV_PCM_FORMAT_S24_BE:
  395. fmt = CS42L51_DAC_DIF_RJ24;
  396. break;
  397. default:
  398. dev_err(codec->dev, "unknown format\n");
  399. return -EINVAL;
  400. }
  401. intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(fmt);
  402. break;
  403. default:
  404. dev_err(codec->dev, "unknown format\n");
  405. return -EINVAL;
  406. }
  407. if (ratios[i].mclk)
  408. power_ctl |= CS42L51_MIC_POWER_CTL_MCLK_DIV2;
  409. ret = snd_soc_write(codec, CS42L51_INTF_CTL, intf_ctl);
  410. if (ret < 0)
  411. return ret;
  412. ret = snd_soc_write(codec, CS42L51_MIC_POWER_CTL, power_ctl);
  413. if (ret < 0)
  414. return ret;
  415. return 0;
  416. }
  417. static int cs42l51_dai_mute(struct snd_soc_dai *dai, int mute)
  418. {
  419. struct snd_soc_codec *codec = dai->codec;
  420. int reg;
  421. int mask = CS42L51_DAC_OUT_CTL_DACA_MUTE|CS42L51_DAC_OUT_CTL_DACB_MUTE;
  422. reg = snd_soc_read(codec, CS42L51_DAC_OUT_CTL);
  423. if (mute)
  424. reg |= mask;
  425. else
  426. reg &= ~mask;
  427. return snd_soc_write(codec, CS42L51_DAC_OUT_CTL, reg);
  428. }
  429. static struct snd_soc_dai_ops cs42l51_dai_ops = {
  430. .hw_params = cs42l51_hw_params,
  431. .set_sysclk = cs42l51_set_dai_sysclk,
  432. .set_fmt = cs42l51_set_dai_fmt,
  433. .digital_mute = cs42l51_dai_mute,
  434. };
  435. static struct snd_soc_dai_driver cs42l51_dai = {
  436. .name = "cs42l51-hifi",
  437. .playback = {
  438. .stream_name = "Playback",
  439. .channels_min = 1,
  440. .channels_max = 2,
  441. .rates = SNDRV_PCM_RATE_8000_96000,
  442. .formats = CS42L51_FORMATS,
  443. },
  444. .capture = {
  445. .stream_name = "Capture",
  446. .channels_min = 1,
  447. .channels_max = 2,
  448. .rates = SNDRV_PCM_RATE_8000_96000,
  449. .formats = CS42L51_FORMATS,
  450. },
  451. .ops = &cs42l51_dai_ops,
  452. };
  453. static int cs42l51_probe(struct snd_soc_codec *codec)
  454. {
  455. struct cs42l51_private *cs42l51 = snd_soc_codec_get_drvdata(codec);
  456. struct snd_soc_dapm_context *dapm = &codec->dapm;
  457. int ret, reg;
  458. codec->control_data = cs42l51->control_data;
  459. ret = cs42l51_fill_cache(codec);
  460. if (ret < 0) {
  461. dev_err(codec->dev, "failed to fill register cache\n");
  462. return ret;
  463. }
  464. ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs42l51->control_type);
  465. if (ret < 0) {
  466. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  467. return ret;
  468. }
  469. /*
  470. * DAC configuration
  471. * - Use signal processor
  472. * - auto mute
  473. * - vol changes immediate
  474. * - no de-emphasize
  475. */
  476. reg = CS42L51_DAC_CTL_DATA_SEL(1)
  477. | CS42L51_DAC_CTL_AMUTE | CS42L51_DAC_CTL_DACSZ(0);
  478. ret = snd_soc_write(codec, CS42L51_DAC_CTL, reg);
  479. if (ret < 0)
  480. return ret;
  481. snd_soc_add_controls(codec, cs42l51_snd_controls,
  482. ARRAY_SIZE(cs42l51_snd_controls));
  483. snd_soc_dapm_new_controls(dapm, cs42l51_dapm_widgets,
  484. ARRAY_SIZE(cs42l51_dapm_widgets));
  485. snd_soc_dapm_add_routes(dapm, cs42l51_routes,
  486. ARRAY_SIZE(cs42l51_routes));
  487. return 0;
  488. }
  489. static struct snd_soc_codec_driver soc_codec_device_cs42l51 = {
  490. .probe = cs42l51_probe,
  491. .reg_cache_size = CS42L51_NUMREGS,
  492. .reg_word_size = sizeof(u8),
  493. };
  494. static int cs42l51_i2c_probe(struct i2c_client *i2c_client,
  495. const struct i2c_device_id *id)
  496. {
  497. struct cs42l51_private *cs42l51;
  498. int ret;
  499. /* Verify that we have a CS42L51 */
  500. ret = i2c_smbus_read_byte_data(i2c_client, CS42L51_CHIP_REV_ID);
  501. if (ret < 0) {
  502. dev_err(&i2c_client->dev, "failed to read I2C\n");
  503. goto error;
  504. }
  505. if ((ret != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_A)) &&
  506. (ret != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_B))) {
  507. dev_err(&i2c_client->dev, "Invalid chip id\n");
  508. ret = -ENODEV;
  509. goto error;
  510. }
  511. dev_info(&i2c_client->dev, "found device cs42l51 rev %d\n",
  512. ret & 7);
  513. cs42l51 = kzalloc(sizeof(struct cs42l51_private), GFP_KERNEL);
  514. if (!cs42l51) {
  515. dev_err(&i2c_client->dev, "could not allocate codec\n");
  516. return -ENOMEM;
  517. }
  518. i2c_set_clientdata(i2c_client, cs42l51);
  519. cs42l51->control_data = i2c_client;
  520. cs42l51->control_type = SND_SOC_I2C;
  521. ret = snd_soc_register_codec(&i2c_client->dev,
  522. &soc_codec_device_cs42l51, &cs42l51_dai, 1);
  523. if (ret < 0)
  524. kfree(cs42l51);
  525. error:
  526. return ret;
  527. }
  528. static int cs42l51_i2c_remove(struct i2c_client *client)
  529. {
  530. struct cs42l51_private *cs42l51 = i2c_get_clientdata(client);
  531. snd_soc_unregister_codec(&client->dev);
  532. kfree(cs42l51);
  533. return 0;
  534. }
  535. static const struct i2c_device_id cs42l51_id[] = {
  536. {"cs42l51", 0},
  537. {}
  538. };
  539. MODULE_DEVICE_TABLE(i2c, cs42l51_id);
  540. static struct i2c_driver cs42l51_i2c_driver = {
  541. .driver = {
  542. .name = "cs42l51-codec",
  543. .owner = THIS_MODULE,
  544. },
  545. .id_table = cs42l51_id,
  546. .probe = cs42l51_i2c_probe,
  547. .remove = cs42l51_i2c_remove,
  548. };
  549. static int __init cs42l51_init(void)
  550. {
  551. int ret;
  552. ret = i2c_add_driver(&cs42l51_i2c_driver);
  553. if (ret != 0) {
  554. printk(KERN_ERR "%s: can't add i2c driver\n", __func__);
  555. return ret;
  556. }
  557. return 0;
  558. }
  559. module_init(cs42l51_init);
  560. static void __exit cs42l51_exit(void)
  561. {
  562. i2c_del_driver(&cs42l51_i2c_driver);
  563. }
  564. module_exit(cs42l51_exit);
  565. MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
  566. MODULE_DESCRIPTION("Cirrus Logic CS42L51 ALSA SoC Codec Driver");
  567. MODULE_LICENSE("GPL");