atmel_serial.c 45 KB

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  1. /*
  2. * Driver for Atmel AT91 / AT32 Serial ports
  3. * Copyright (C) 2003 Rick Bronson
  4. *
  5. * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * DMA support added by Chip Coldwell.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <linux/module.h>
  26. #include <linux/tty.h>
  27. #include <linux/ioport.h>
  28. #include <linux/slab.h>
  29. #include <linux/init.h>
  30. #include <linux/serial.h>
  31. #include <linux/clk.h>
  32. #include <linux/console.h>
  33. #include <linux/sysrq.h>
  34. #include <linux/tty_flip.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/atmel_pdc.h>
  38. #include <linux/atmel_serial.h>
  39. #include <linux/uaccess.h>
  40. #include <asm/io.h>
  41. #include <asm/ioctls.h>
  42. #include <asm/mach/serial_at91.h>
  43. #include <mach/board.h>
  44. #ifdef CONFIG_ARM
  45. #include <mach/cpu.h>
  46. #include <mach/gpio.h>
  47. #endif
  48. #define PDC_BUFFER_SIZE 512
  49. /* Revisit: We should calculate this based on the actual port settings */
  50. #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
  51. #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  52. #define SUPPORT_SYSRQ
  53. #endif
  54. #include <linux/serial_core.h>
  55. static void atmel_start_rx(struct uart_port *port);
  56. static void atmel_stop_rx(struct uart_port *port);
  57. #ifdef CONFIG_SERIAL_ATMEL_TTYAT
  58. /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
  59. * should coexist with the 8250 driver, such as if we have an external 16C550
  60. * UART. */
  61. #define SERIAL_ATMEL_MAJOR 204
  62. #define MINOR_START 154
  63. #define ATMEL_DEVICENAME "ttyAT"
  64. #else
  65. /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
  66. * name, but it is legally reserved for the 8250 driver. */
  67. #define SERIAL_ATMEL_MAJOR TTY_MAJOR
  68. #define MINOR_START 64
  69. #define ATMEL_DEVICENAME "ttyS"
  70. #endif
  71. #define ATMEL_ISR_PASS_LIMIT 256
  72. /* UART registers. CR is write-only, hence no GET macro */
  73. #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
  74. #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
  75. #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
  76. #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
  77. #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
  78. #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
  79. #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
  80. #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
  81. #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
  82. #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
  83. #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
  84. #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
  85. #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
  86. /* PDC registers */
  87. #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
  88. #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
  89. #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
  90. #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
  91. #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
  92. #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
  93. #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
  94. #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
  95. #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
  96. #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
  97. static int (*atmel_open_hook)(struct uart_port *);
  98. static void (*atmel_close_hook)(struct uart_port *);
  99. struct atmel_dma_buffer {
  100. unsigned char *buf;
  101. dma_addr_t dma_addr;
  102. unsigned int dma_size;
  103. unsigned int ofs;
  104. };
  105. struct atmel_uart_char {
  106. u16 status;
  107. u16 ch;
  108. };
  109. #define ATMEL_SERIAL_RINGSIZE 1024
  110. /*
  111. * We wrap our port structure around the generic uart_port.
  112. */
  113. struct atmel_uart_port {
  114. struct uart_port uart; /* uart */
  115. struct clk *clk; /* uart clock */
  116. int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
  117. u32 backup_imr; /* IMR saved during suspend */
  118. int break_active; /* break being received */
  119. short use_dma_rx; /* enable PDC receiver */
  120. short pdc_rx_idx; /* current PDC RX buffer */
  121. struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
  122. short use_dma_tx; /* enable PDC transmitter */
  123. struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
  124. struct tasklet_struct tasklet;
  125. unsigned int irq_status;
  126. unsigned int irq_status_prev;
  127. struct circ_buf rx_ring;
  128. struct serial_rs485 rs485; /* rs485 settings */
  129. unsigned int tx_done_mask;
  130. };
  131. static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
  132. #ifdef SUPPORT_SYSRQ
  133. static struct console atmel_console;
  134. #endif
  135. static inline struct atmel_uart_port *
  136. to_atmel_uart_port(struct uart_port *uart)
  137. {
  138. return container_of(uart, struct atmel_uart_port, uart);
  139. }
  140. #ifdef CONFIG_SERIAL_ATMEL_PDC
  141. static bool atmel_use_dma_rx(struct uart_port *port)
  142. {
  143. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  144. return atmel_port->use_dma_rx;
  145. }
  146. static bool atmel_use_dma_tx(struct uart_port *port)
  147. {
  148. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  149. return atmel_port->use_dma_tx;
  150. }
  151. #else
  152. static bool atmel_use_dma_rx(struct uart_port *port)
  153. {
  154. return false;
  155. }
  156. static bool atmel_use_dma_tx(struct uart_port *port)
  157. {
  158. return false;
  159. }
  160. #endif
  161. /* Enable or disable the rs485 support */
  162. void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
  163. {
  164. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  165. unsigned int mode;
  166. spin_lock(&port->lock);
  167. /* Disable interrupts */
  168. UART_PUT_IDR(port, atmel_port->tx_done_mask);
  169. mode = UART_GET_MR(port);
  170. /* Resetting serial mode to RS232 (0x0) */
  171. mode &= ~ATMEL_US_USMODE;
  172. atmel_port->rs485 = *rs485conf;
  173. if (rs485conf->flags & SER_RS485_ENABLED) {
  174. dev_dbg(port->dev, "Setting UART to RS485\n");
  175. atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
  176. if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
  177. UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
  178. mode |= ATMEL_US_USMODE_RS485;
  179. } else {
  180. dev_dbg(port->dev, "Setting UART to RS232\n");
  181. if (atmel_use_dma_tx(port))
  182. atmel_port->tx_done_mask = ATMEL_US_ENDTX |
  183. ATMEL_US_TXBUFE;
  184. else
  185. atmel_port->tx_done_mask = ATMEL_US_TXRDY;
  186. }
  187. UART_PUT_MR(port, mode);
  188. /* Enable interrupts */
  189. UART_PUT_IER(port, atmel_port->tx_done_mask);
  190. spin_unlock(&port->lock);
  191. }
  192. /*
  193. * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
  194. */
  195. static u_int atmel_tx_empty(struct uart_port *port)
  196. {
  197. return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
  198. }
  199. /*
  200. * Set state of the modem control output lines
  201. */
  202. static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
  203. {
  204. unsigned int control = 0;
  205. unsigned int mode;
  206. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  207. #ifdef CONFIG_ARCH_AT91RM9200
  208. if (cpu_is_at91rm9200()) {
  209. /*
  210. * AT91RM9200 Errata #39: RTS0 is not internally connected
  211. * to PA21. We need to drive the pin manually.
  212. */
  213. if (port->mapbase == AT91RM9200_BASE_US0) {
  214. if (mctrl & TIOCM_RTS)
  215. at91_set_gpio_value(AT91_PIN_PA21, 0);
  216. else
  217. at91_set_gpio_value(AT91_PIN_PA21, 1);
  218. }
  219. }
  220. #endif
  221. if (mctrl & TIOCM_RTS)
  222. control |= ATMEL_US_RTSEN;
  223. else
  224. control |= ATMEL_US_RTSDIS;
  225. if (mctrl & TIOCM_DTR)
  226. control |= ATMEL_US_DTREN;
  227. else
  228. control |= ATMEL_US_DTRDIS;
  229. UART_PUT_CR(port, control);
  230. /* Local loopback mode? */
  231. mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
  232. if (mctrl & TIOCM_LOOP)
  233. mode |= ATMEL_US_CHMODE_LOC_LOOP;
  234. else
  235. mode |= ATMEL_US_CHMODE_NORMAL;
  236. /* Resetting serial mode to RS232 (0x0) */
  237. mode &= ~ATMEL_US_USMODE;
  238. if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
  239. dev_dbg(port->dev, "Setting UART to RS485\n");
  240. if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
  241. UART_PUT_TTGR(port,
  242. atmel_port->rs485.delay_rts_after_send);
  243. mode |= ATMEL_US_USMODE_RS485;
  244. } else {
  245. dev_dbg(port->dev, "Setting UART to RS232\n");
  246. }
  247. UART_PUT_MR(port, mode);
  248. }
  249. /*
  250. * Get state of the modem control input lines
  251. */
  252. static u_int atmel_get_mctrl(struct uart_port *port)
  253. {
  254. unsigned int status, ret = 0;
  255. status = UART_GET_CSR(port);
  256. /*
  257. * The control signals are active low.
  258. */
  259. if (!(status & ATMEL_US_DCD))
  260. ret |= TIOCM_CD;
  261. if (!(status & ATMEL_US_CTS))
  262. ret |= TIOCM_CTS;
  263. if (!(status & ATMEL_US_DSR))
  264. ret |= TIOCM_DSR;
  265. if (!(status & ATMEL_US_RI))
  266. ret |= TIOCM_RI;
  267. return ret;
  268. }
  269. /*
  270. * Stop transmitting.
  271. */
  272. static void atmel_stop_tx(struct uart_port *port)
  273. {
  274. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  275. if (atmel_use_dma_tx(port)) {
  276. /* disable PDC transmit */
  277. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  278. }
  279. /* Disable interrupts */
  280. UART_PUT_IDR(port, atmel_port->tx_done_mask);
  281. if (atmel_port->rs485.flags & SER_RS485_ENABLED)
  282. atmel_start_rx(port);
  283. }
  284. /*
  285. * Start transmitting.
  286. */
  287. static void atmel_start_tx(struct uart_port *port)
  288. {
  289. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  290. if (atmel_use_dma_tx(port)) {
  291. if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
  292. /* The transmitter is already running. Yes, we
  293. really need this.*/
  294. return;
  295. if (atmel_port->rs485.flags & SER_RS485_ENABLED)
  296. atmel_stop_rx(port);
  297. /* re-enable PDC transmit */
  298. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  299. }
  300. /* Enable interrupts */
  301. UART_PUT_IER(port, atmel_port->tx_done_mask);
  302. }
  303. /*
  304. * start receiving - port is in process of being opened.
  305. */
  306. static void atmel_start_rx(struct uart_port *port)
  307. {
  308. UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
  309. if (atmel_use_dma_rx(port)) {
  310. /* enable PDC controller */
  311. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
  312. port->read_status_mask);
  313. UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
  314. } else {
  315. UART_PUT_IER(port, ATMEL_US_RXRDY);
  316. }
  317. }
  318. /*
  319. * Stop receiving - port is in process of being closed.
  320. */
  321. static void atmel_stop_rx(struct uart_port *port)
  322. {
  323. if (atmel_use_dma_rx(port)) {
  324. /* disable PDC receive */
  325. UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
  326. UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
  327. port->read_status_mask);
  328. } else {
  329. UART_PUT_IDR(port, ATMEL_US_RXRDY);
  330. }
  331. }
  332. /*
  333. * Enable modem status interrupts
  334. */
  335. static void atmel_enable_ms(struct uart_port *port)
  336. {
  337. UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
  338. | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
  339. }
  340. /*
  341. * Control the transmission of a break signal
  342. */
  343. static void atmel_break_ctl(struct uart_port *port, int break_state)
  344. {
  345. if (break_state != 0)
  346. UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
  347. else
  348. UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
  349. }
  350. /*
  351. * Stores the incoming character in the ring buffer
  352. */
  353. static void
  354. atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
  355. unsigned int ch)
  356. {
  357. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  358. struct circ_buf *ring = &atmel_port->rx_ring;
  359. struct atmel_uart_char *c;
  360. if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
  361. /* Buffer overflow, ignore char */
  362. return;
  363. c = &((struct atmel_uart_char *)ring->buf)[ring->head];
  364. c->status = status;
  365. c->ch = ch;
  366. /* Make sure the character is stored before we update head. */
  367. smp_wmb();
  368. ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  369. }
  370. /*
  371. * Deal with parity, framing and overrun errors.
  372. */
  373. static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
  374. {
  375. /* clear error */
  376. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  377. if (status & ATMEL_US_RXBRK) {
  378. /* ignore side-effect */
  379. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  380. port->icount.brk++;
  381. }
  382. if (status & ATMEL_US_PARE)
  383. port->icount.parity++;
  384. if (status & ATMEL_US_FRAME)
  385. port->icount.frame++;
  386. if (status & ATMEL_US_OVRE)
  387. port->icount.overrun++;
  388. }
  389. /*
  390. * Characters received (called from interrupt handler)
  391. */
  392. static void atmel_rx_chars(struct uart_port *port)
  393. {
  394. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  395. unsigned int status, ch;
  396. status = UART_GET_CSR(port);
  397. while (status & ATMEL_US_RXRDY) {
  398. ch = UART_GET_CHAR(port);
  399. /*
  400. * note that the error handling code is
  401. * out of the main execution path
  402. */
  403. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  404. | ATMEL_US_OVRE | ATMEL_US_RXBRK)
  405. || atmel_port->break_active)) {
  406. /* clear error */
  407. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  408. if (status & ATMEL_US_RXBRK
  409. && !atmel_port->break_active) {
  410. atmel_port->break_active = 1;
  411. UART_PUT_IER(port, ATMEL_US_RXBRK);
  412. } else {
  413. /*
  414. * This is either the end-of-break
  415. * condition or we've received at
  416. * least one character without RXBRK
  417. * being set. In both cases, the next
  418. * RXBRK will indicate start-of-break.
  419. */
  420. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  421. status &= ~ATMEL_US_RXBRK;
  422. atmel_port->break_active = 0;
  423. }
  424. }
  425. atmel_buffer_rx_char(port, status, ch);
  426. status = UART_GET_CSR(port);
  427. }
  428. tasklet_schedule(&atmel_port->tasklet);
  429. }
  430. /*
  431. * Transmit characters (called from tasklet with TXRDY interrupt
  432. * disabled)
  433. */
  434. static void atmel_tx_chars(struct uart_port *port)
  435. {
  436. struct circ_buf *xmit = &port->state->xmit;
  437. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  438. if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
  439. UART_PUT_CHAR(port, port->x_char);
  440. port->icount.tx++;
  441. port->x_char = 0;
  442. }
  443. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  444. return;
  445. while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
  446. UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
  447. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  448. port->icount.tx++;
  449. if (uart_circ_empty(xmit))
  450. break;
  451. }
  452. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  453. uart_write_wakeup(port);
  454. if (!uart_circ_empty(xmit))
  455. /* Enable interrupts */
  456. UART_PUT_IER(port, atmel_port->tx_done_mask);
  457. }
  458. /*
  459. * receive interrupt handler.
  460. */
  461. static void
  462. atmel_handle_receive(struct uart_port *port, unsigned int pending)
  463. {
  464. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  465. if (atmel_use_dma_rx(port)) {
  466. /*
  467. * PDC receive. Just schedule the tasklet and let it
  468. * figure out the details.
  469. *
  470. * TODO: We're not handling error flags correctly at
  471. * the moment.
  472. */
  473. if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
  474. UART_PUT_IDR(port, (ATMEL_US_ENDRX
  475. | ATMEL_US_TIMEOUT));
  476. tasklet_schedule(&atmel_port->tasklet);
  477. }
  478. if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
  479. ATMEL_US_FRAME | ATMEL_US_PARE))
  480. atmel_pdc_rxerr(port, pending);
  481. }
  482. /* Interrupt receive */
  483. if (pending & ATMEL_US_RXRDY)
  484. atmel_rx_chars(port);
  485. else if (pending & ATMEL_US_RXBRK) {
  486. /*
  487. * End of break detected. If it came along with a
  488. * character, atmel_rx_chars will handle it.
  489. */
  490. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  491. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  492. atmel_port->break_active = 0;
  493. }
  494. }
  495. /*
  496. * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
  497. */
  498. static void
  499. atmel_handle_transmit(struct uart_port *port, unsigned int pending)
  500. {
  501. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  502. if (pending & atmel_port->tx_done_mask) {
  503. /* Either PDC or interrupt transmission */
  504. UART_PUT_IDR(port, atmel_port->tx_done_mask);
  505. tasklet_schedule(&atmel_port->tasklet);
  506. }
  507. }
  508. /*
  509. * status flags interrupt handler.
  510. */
  511. static void
  512. atmel_handle_status(struct uart_port *port, unsigned int pending,
  513. unsigned int status)
  514. {
  515. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  516. if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
  517. | ATMEL_US_CTSIC)) {
  518. atmel_port->irq_status = status;
  519. tasklet_schedule(&atmel_port->tasklet);
  520. }
  521. }
  522. /*
  523. * Interrupt handler
  524. */
  525. static irqreturn_t atmel_interrupt(int irq, void *dev_id)
  526. {
  527. struct uart_port *port = dev_id;
  528. unsigned int status, pending, pass_counter = 0;
  529. do {
  530. status = UART_GET_CSR(port);
  531. pending = status & UART_GET_IMR(port);
  532. if (!pending)
  533. break;
  534. atmel_handle_receive(port, pending);
  535. atmel_handle_status(port, pending, status);
  536. atmel_handle_transmit(port, pending);
  537. } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
  538. return pass_counter ? IRQ_HANDLED : IRQ_NONE;
  539. }
  540. /*
  541. * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
  542. */
  543. static void atmel_tx_dma(struct uart_port *port)
  544. {
  545. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  546. struct circ_buf *xmit = &port->state->xmit;
  547. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  548. int count;
  549. /* nothing left to transmit? */
  550. if (UART_GET_TCR(port))
  551. return;
  552. xmit->tail += pdc->ofs;
  553. xmit->tail &= UART_XMIT_SIZE - 1;
  554. port->icount.tx += pdc->ofs;
  555. pdc->ofs = 0;
  556. /* more to transmit - setup next transfer */
  557. /* disable PDC transmit */
  558. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  559. if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
  560. dma_sync_single_for_device(port->dev,
  561. pdc->dma_addr,
  562. pdc->dma_size,
  563. DMA_TO_DEVICE);
  564. count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  565. pdc->ofs = count;
  566. UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
  567. UART_PUT_TCR(port, count);
  568. /* re-enable PDC transmit */
  569. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  570. /* Enable interrupts */
  571. UART_PUT_IER(port, atmel_port->tx_done_mask);
  572. } else {
  573. if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
  574. /* DMA done, stop TX, start RX for RS485 */
  575. atmel_start_rx(port);
  576. }
  577. }
  578. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  579. uart_write_wakeup(port);
  580. }
  581. static void atmel_rx_from_ring(struct uart_port *port)
  582. {
  583. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  584. struct circ_buf *ring = &atmel_port->rx_ring;
  585. unsigned int flg;
  586. unsigned int status;
  587. while (ring->head != ring->tail) {
  588. struct atmel_uart_char c;
  589. /* Make sure c is loaded after head. */
  590. smp_rmb();
  591. c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
  592. ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  593. port->icount.rx++;
  594. status = c.status;
  595. flg = TTY_NORMAL;
  596. /*
  597. * note that the error handling code is
  598. * out of the main execution path
  599. */
  600. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  601. | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
  602. if (status & ATMEL_US_RXBRK) {
  603. /* ignore side-effect */
  604. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  605. port->icount.brk++;
  606. if (uart_handle_break(port))
  607. continue;
  608. }
  609. if (status & ATMEL_US_PARE)
  610. port->icount.parity++;
  611. if (status & ATMEL_US_FRAME)
  612. port->icount.frame++;
  613. if (status & ATMEL_US_OVRE)
  614. port->icount.overrun++;
  615. status &= port->read_status_mask;
  616. if (status & ATMEL_US_RXBRK)
  617. flg = TTY_BREAK;
  618. else if (status & ATMEL_US_PARE)
  619. flg = TTY_PARITY;
  620. else if (status & ATMEL_US_FRAME)
  621. flg = TTY_FRAME;
  622. }
  623. if (uart_handle_sysrq_char(port, c.ch))
  624. continue;
  625. uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
  626. }
  627. /*
  628. * Drop the lock here since it might end up calling
  629. * uart_start(), which takes the lock.
  630. */
  631. spin_unlock(&port->lock);
  632. tty_flip_buffer_push(port->state->port.tty);
  633. spin_lock(&port->lock);
  634. }
  635. static void atmel_rx_from_dma(struct uart_port *port)
  636. {
  637. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  638. struct tty_struct *tty = port->state->port.tty;
  639. struct atmel_dma_buffer *pdc;
  640. int rx_idx = atmel_port->pdc_rx_idx;
  641. unsigned int head;
  642. unsigned int tail;
  643. unsigned int count;
  644. do {
  645. /* Reset the UART timeout early so that we don't miss one */
  646. UART_PUT_CR(port, ATMEL_US_STTTO);
  647. pdc = &atmel_port->pdc_rx[rx_idx];
  648. head = UART_GET_RPR(port) - pdc->dma_addr;
  649. tail = pdc->ofs;
  650. /* If the PDC has switched buffers, RPR won't contain
  651. * any address within the current buffer. Since head
  652. * is unsigned, we just need a one-way comparison to
  653. * find out.
  654. *
  655. * In this case, we just need to consume the entire
  656. * buffer and resubmit it for DMA. This will clear the
  657. * ENDRX bit as well, so that we can safely re-enable
  658. * all interrupts below.
  659. */
  660. head = min(head, pdc->dma_size);
  661. if (likely(head != tail)) {
  662. dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
  663. pdc->dma_size, DMA_FROM_DEVICE);
  664. /*
  665. * head will only wrap around when we recycle
  666. * the DMA buffer, and when that happens, we
  667. * explicitly set tail to 0. So head will
  668. * always be greater than tail.
  669. */
  670. count = head - tail;
  671. tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
  672. dma_sync_single_for_device(port->dev, pdc->dma_addr,
  673. pdc->dma_size, DMA_FROM_DEVICE);
  674. port->icount.rx += count;
  675. pdc->ofs = head;
  676. }
  677. /*
  678. * If the current buffer is full, we need to check if
  679. * the next one contains any additional data.
  680. */
  681. if (head >= pdc->dma_size) {
  682. pdc->ofs = 0;
  683. UART_PUT_RNPR(port, pdc->dma_addr);
  684. UART_PUT_RNCR(port, pdc->dma_size);
  685. rx_idx = !rx_idx;
  686. atmel_port->pdc_rx_idx = rx_idx;
  687. }
  688. } while (head >= pdc->dma_size);
  689. /*
  690. * Drop the lock here since it might end up calling
  691. * uart_start(), which takes the lock.
  692. */
  693. spin_unlock(&port->lock);
  694. tty_flip_buffer_push(tty);
  695. spin_lock(&port->lock);
  696. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  697. }
  698. /*
  699. * tasklet handling tty stuff outside the interrupt handler.
  700. */
  701. static void atmel_tasklet_func(unsigned long data)
  702. {
  703. struct uart_port *port = (struct uart_port *)data;
  704. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  705. unsigned int status;
  706. unsigned int status_change;
  707. /* The interrupt handler does not take the lock */
  708. spin_lock(&port->lock);
  709. if (atmel_use_dma_tx(port))
  710. atmel_tx_dma(port);
  711. else
  712. atmel_tx_chars(port);
  713. status = atmel_port->irq_status;
  714. status_change = status ^ atmel_port->irq_status_prev;
  715. if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
  716. | ATMEL_US_DCD | ATMEL_US_CTS)) {
  717. /* TODO: All reads to CSR will clear these interrupts! */
  718. if (status_change & ATMEL_US_RI)
  719. port->icount.rng++;
  720. if (status_change & ATMEL_US_DSR)
  721. port->icount.dsr++;
  722. if (status_change & ATMEL_US_DCD)
  723. uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
  724. if (status_change & ATMEL_US_CTS)
  725. uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
  726. wake_up_interruptible(&port->state->port.delta_msr_wait);
  727. atmel_port->irq_status_prev = status;
  728. }
  729. if (atmel_use_dma_rx(port))
  730. atmel_rx_from_dma(port);
  731. else
  732. atmel_rx_from_ring(port);
  733. spin_unlock(&port->lock);
  734. }
  735. /*
  736. * Perform initialization and enable port for reception
  737. */
  738. static int atmel_startup(struct uart_port *port)
  739. {
  740. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  741. struct tty_struct *tty = port->state->port.tty;
  742. int retval;
  743. /*
  744. * Ensure that no interrupts are enabled otherwise when
  745. * request_irq() is called we could get stuck trying to
  746. * handle an unexpected interrupt
  747. */
  748. UART_PUT_IDR(port, -1);
  749. /*
  750. * Allocate the IRQ
  751. */
  752. retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
  753. tty ? tty->name : "atmel_serial", port);
  754. if (retval) {
  755. printk("atmel_serial: atmel_startup - Can't get irq\n");
  756. return retval;
  757. }
  758. /*
  759. * Initialize DMA (if necessary)
  760. */
  761. if (atmel_use_dma_rx(port)) {
  762. int i;
  763. for (i = 0; i < 2; i++) {
  764. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  765. pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
  766. if (pdc->buf == NULL) {
  767. if (i != 0) {
  768. dma_unmap_single(port->dev,
  769. atmel_port->pdc_rx[0].dma_addr,
  770. PDC_BUFFER_SIZE,
  771. DMA_FROM_DEVICE);
  772. kfree(atmel_port->pdc_rx[0].buf);
  773. }
  774. free_irq(port->irq, port);
  775. return -ENOMEM;
  776. }
  777. pdc->dma_addr = dma_map_single(port->dev,
  778. pdc->buf,
  779. PDC_BUFFER_SIZE,
  780. DMA_FROM_DEVICE);
  781. pdc->dma_size = PDC_BUFFER_SIZE;
  782. pdc->ofs = 0;
  783. }
  784. atmel_port->pdc_rx_idx = 0;
  785. UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
  786. UART_PUT_RCR(port, PDC_BUFFER_SIZE);
  787. UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
  788. UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
  789. }
  790. if (atmel_use_dma_tx(port)) {
  791. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  792. struct circ_buf *xmit = &port->state->xmit;
  793. pdc->buf = xmit->buf;
  794. pdc->dma_addr = dma_map_single(port->dev,
  795. pdc->buf,
  796. UART_XMIT_SIZE,
  797. DMA_TO_DEVICE);
  798. pdc->dma_size = UART_XMIT_SIZE;
  799. pdc->ofs = 0;
  800. }
  801. /*
  802. * If there is a specific "open" function (to register
  803. * control line interrupts)
  804. */
  805. if (atmel_open_hook) {
  806. retval = atmel_open_hook(port);
  807. if (retval) {
  808. free_irq(port->irq, port);
  809. return retval;
  810. }
  811. }
  812. /* Save current CSR for comparison in atmel_tasklet_func() */
  813. atmel_port->irq_status_prev = UART_GET_CSR(port);
  814. atmel_port->irq_status = atmel_port->irq_status_prev;
  815. /*
  816. * Finally, enable the serial port
  817. */
  818. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  819. /* enable xmit & rcvr */
  820. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  821. if (atmel_use_dma_rx(port)) {
  822. /* set UART timeout */
  823. UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
  824. UART_PUT_CR(port, ATMEL_US_STTTO);
  825. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  826. /* enable PDC controller */
  827. UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
  828. } else {
  829. /* enable receive only */
  830. UART_PUT_IER(port, ATMEL_US_RXRDY);
  831. }
  832. return 0;
  833. }
  834. /*
  835. * Disable the port
  836. */
  837. static void atmel_shutdown(struct uart_port *port)
  838. {
  839. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  840. /*
  841. * Ensure everything is stopped.
  842. */
  843. atmel_stop_rx(port);
  844. atmel_stop_tx(port);
  845. /*
  846. * Shut-down the DMA.
  847. */
  848. if (atmel_use_dma_rx(port)) {
  849. int i;
  850. for (i = 0; i < 2; i++) {
  851. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  852. dma_unmap_single(port->dev,
  853. pdc->dma_addr,
  854. pdc->dma_size,
  855. DMA_FROM_DEVICE);
  856. kfree(pdc->buf);
  857. }
  858. }
  859. if (atmel_use_dma_tx(port)) {
  860. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  861. dma_unmap_single(port->dev,
  862. pdc->dma_addr,
  863. pdc->dma_size,
  864. DMA_TO_DEVICE);
  865. }
  866. /*
  867. * Disable all interrupts, port and break condition.
  868. */
  869. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  870. UART_PUT_IDR(port, -1);
  871. /*
  872. * Free the interrupt
  873. */
  874. free_irq(port->irq, port);
  875. /*
  876. * If there is a specific "close" function (to unregister
  877. * control line interrupts)
  878. */
  879. if (atmel_close_hook)
  880. atmel_close_hook(port);
  881. }
  882. /*
  883. * Flush any TX data submitted for DMA. Called when the TX circular
  884. * buffer is reset.
  885. */
  886. static void atmel_flush_buffer(struct uart_port *port)
  887. {
  888. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  889. if (atmel_use_dma_tx(port)) {
  890. UART_PUT_TCR(port, 0);
  891. atmel_port->pdc_tx.ofs = 0;
  892. }
  893. }
  894. /*
  895. * Power / Clock management.
  896. */
  897. static void atmel_serial_pm(struct uart_port *port, unsigned int state,
  898. unsigned int oldstate)
  899. {
  900. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  901. switch (state) {
  902. case 0:
  903. /*
  904. * Enable the peripheral clock for this serial port.
  905. * This is called on uart_open() or a resume event.
  906. */
  907. clk_enable(atmel_port->clk);
  908. /* re-enable interrupts if we disabled some on suspend */
  909. UART_PUT_IER(port, atmel_port->backup_imr);
  910. break;
  911. case 3:
  912. /* Back up the interrupt mask and disable all interrupts */
  913. atmel_port->backup_imr = UART_GET_IMR(port);
  914. UART_PUT_IDR(port, -1);
  915. /*
  916. * Disable the peripheral clock for this serial port.
  917. * This is called on uart_close() or a suspend event.
  918. */
  919. clk_disable(atmel_port->clk);
  920. break;
  921. default:
  922. printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
  923. }
  924. }
  925. /*
  926. * Change the port parameters
  927. */
  928. static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
  929. struct ktermios *old)
  930. {
  931. unsigned long flags;
  932. unsigned int mode, imr, quot, baud;
  933. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  934. /* Get current mode register */
  935. mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
  936. | ATMEL_US_NBSTOP | ATMEL_US_PAR
  937. | ATMEL_US_USMODE);
  938. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  939. quot = uart_get_divisor(port, baud);
  940. if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
  941. quot /= 8;
  942. mode |= ATMEL_US_USCLKS_MCK_DIV8;
  943. }
  944. /* byte size */
  945. switch (termios->c_cflag & CSIZE) {
  946. case CS5:
  947. mode |= ATMEL_US_CHRL_5;
  948. break;
  949. case CS6:
  950. mode |= ATMEL_US_CHRL_6;
  951. break;
  952. case CS7:
  953. mode |= ATMEL_US_CHRL_7;
  954. break;
  955. default:
  956. mode |= ATMEL_US_CHRL_8;
  957. break;
  958. }
  959. /* stop bits */
  960. if (termios->c_cflag & CSTOPB)
  961. mode |= ATMEL_US_NBSTOP_2;
  962. /* parity */
  963. if (termios->c_cflag & PARENB) {
  964. /* Mark or Space parity */
  965. if (termios->c_cflag & CMSPAR) {
  966. if (termios->c_cflag & PARODD)
  967. mode |= ATMEL_US_PAR_MARK;
  968. else
  969. mode |= ATMEL_US_PAR_SPACE;
  970. } else if (termios->c_cflag & PARODD)
  971. mode |= ATMEL_US_PAR_ODD;
  972. else
  973. mode |= ATMEL_US_PAR_EVEN;
  974. } else
  975. mode |= ATMEL_US_PAR_NONE;
  976. /* hardware handshake (RTS/CTS) */
  977. if (termios->c_cflag & CRTSCTS)
  978. mode |= ATMEL_US_USMODE_HWHS;
  979. else
  980. mode |= ATMEL_US_USMODE_NORMAL;
  981. spin_lock_irqsave(&port->lock, flags);
  982. port->read_status_mask = ATMEL_US_OVRE;
  983. if (termios->c_iflag & INPCK)
  984. port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  985. if (termios->c_iflag & (BRKINT | PARMRK))
  986. port->read_status_mask |= ATMEL_US_RXBRK;
  987. if (atmel_use_dma_rx(port))
  988. /* need to enable error interrupts */
  989. UART_PUT_IER(port, port->read_status_mask);
  990. /*
  991. * Characters to ignore
  992. */
  993. port->ignore_status_mask = 0;
  994. if (termios->c_iflag & IGNPAR)
  995. port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  996. if (termios->c_iflag & IGNBRK) {
  997. port->ignore_status_mask |= ATMEL_US_RXBRK;
  998. /*
  999. * If we're ignoring parity and break indicators,
  1000. * ignore overruns too (for real raw support).
  1001. */
  1002. if (termios->c_iflag & IGNPAR)
  1003. port->ignore_status_mask |= ATMEL_US_OVRE;
  1004. }
  1005. /* TODO: Ignore all characters if CREAD is set.*/
  1006. /* update the per-port timeout */
  1007. uart_update_timeout(port, termios->c_cflag, baud);
  1008. /*
  1009. * save/disable interrupts. The tty layer will ensure that the
  1010. * transmitter is empty if requested by the caller, so there's
  1011. * no need to wait for it here.
  1012. */
  1013. imr = UART_GET_IMR(port);
  1014. UART_PUT_IDR(port, -1);
  1015. /* disable receiver and transmitter */
  1016. UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
  1017. /* Resetting serial mode to RS232 (0x0) */
  1018. mode &= ~ATMEL_US_USMODE;
  1019. if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
  1020. dev_dbg(port->dev, "Setting UART to RS485\n");
  1021. if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
  1022. UART_PUT_TTGR(port,
  1023. atmel_port->rs485.delay_rts_after_send);
  1024. mode |= ATMEL_US_USMODE_RS485;
  1025. } else {
  1026. dev_dbg(port->dev, "Setting UART to RS232\n");
  1027. }
  1028. /* set the parity, stop bits and data size */
  1029. UART_PUT_MR(port, mode);
  1030. /* set the baud rate */
  1031. UART_PUT_BRGR(port, quot);
  1032. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  1033. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  1034. /* restore interrupts */
  1035. UART_PUT_IER(port, imr);
  1036. /* CTS flow-control and modem-status interrupts */
  1037. if (UART_ENABLE_MS(port, termios->c_cflag))
  1038. port->ops->enable_ms(port);
  1039. spin_unlock_irqrestore(&port->lock, flags);
  1040. }
  1041. static void atmel_set_ldisc(struct uart_port *port, int new)
  1042. {
  1043. int line = port->line;
  1044. if (line >= port->state->port.tty->driver->num)
  1045. return;
  1046. if (port->state->port.tty->ldisc->ops->num == N_PPS) {
  1047. port->flags |= UPF_HARDPPS_CD;
  1048. atmel_enable_ms(port);
  1049. } else {
  1050. port->flags &= ~UPF_HARDPPS_CD;
  1051. }
  1052. }
  1053. /*
  1054. * Return string describing the specified port
  1055. */
  1056. static const char *atmel_type(struct uart_port *port)
  1057. {
  1058. return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
  1059. }
  1060. /*
  1061. * Release the memory region(s) being used by 'port'.
  1062. */
  1063. static void atmel_release_port(struct uart_port *port)
  1064. {
  1065. struct platform_device *pdev = to_platform_device(port->dev);
  1066. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  1067. release_mem_region(port->mapbase, size);
  1068. if (port->flags & UPF_IOREMAP) {
  1069. iounmap(port->membase);
  1070. port->membase = NULL;
  1071. }
  1072. }
  1073. /*
  1074. * Request the memory region(s) being used by 'port'.
  1075. */
  1076. static int atmel_request_port(struct uart_port *port)
  1077. {
  1078. struct platform_device *pdev = to_platform_device(port->dev);
  1079. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  1080. if (!request_mem_region(port->mapbase, size, "atmel_serial"))
  1081. return -EBUSY;
  1082. if (port->flags & UPF_IOREMAP) {
  1083. port->membase = ioremap(port->mapbase, size);
  1084. if (port->membase == NULL) {
  1085. release_mem_region(port->mapbase, size);
  1086. return -ENOMEM;
  1087. }
  1088. }
  1089. return 0;
  1090. }
  1091. /*
  1092. * Configure/autoconfigure the port.
  1093. */
  1094. static void atmel_config_port(struct uart_port *port, int flags)
  1095. {
  1096. if (flags & UART_CONFIG_TYPE) {
  1097. port->type = PORT_ATMEL;
  1098. atmel_request_port(port);
  1099. }
  1100. }
  1101. /*
  1102. * Verify the new serial_struct (for TIOCSSERIAL).
  1103. */
  1104. static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
  1105. {
  1106. int ret = 0;
  1107. if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
  1108. ret = -EINVAL;
  1109. if (port->irq != ser->irq)
  1110. ret = -EINVAL;
  1111. if (ser->io_type != SERIAL_IO_MEM)
  1112. ret = -EINVAL;
  1113. if (port->uartclk / 16 != ser->baud_base)
  1114. ret = -EINVAL;
  1115. if ((void *)port->mapbase != ser->iomem_base)
  1116. ret = -EINVAL;
  1117. if (port->iobase != ser->port)
  1118. ret = -EINVAL;
  1119. if (ser->hub6 != 0)
  1120. ret = -EINVAL;
  1121. return ret;
  1122. }
  1123. #ifdef CONFIG_CONSOLE_POLL
  1124. static int atmel_poll_get_char(struct uart_port *port)
  1125. {
  1126. while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
  1127. cpu_relax();
  1128. return UART_GET_CHAR(port);
  1129. }
  1130. static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
  1131. {
  1132. while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
  1133. cpu_relax();
  1134. UART_PUT_CHAR(port, ch);
  1135. }
  1136. #endif
  1137. static int
  1138. atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
  1139. {
  1140. struct serial_rs485 rs485conf;
  1141. switch (cmd) {
  1142. case TIOCSRS485:
  1143. if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
  1144. sizeof(rs485conf)))
  1145. return -EFAULT;
  1146. atmel_config_rs485(port, &rs485conf);
  1147. break;
  1148. case TIOCGRS485:
  1149. if (copy_to_user((struct serial_rs485 *) arg,
  1150. &(to_atmel_uart_port(port)->rs485),
  1151. sizeof(rs485conf)))
  1152. return -EFAULT;
  1153. break;
  1154. default:
  1155. return -ENOIOCTLCMD;
  1156. }
  1157. return 0;
  1158. }
  1159. static struct uart_ops atmel_pops = {
  1160. .tx_empty = atmel_tx_empty,
  1161. .set_mctrl = atmel_set_mctrl,
  1162. .get_mctrl = atmel_get_mctrl,
  1163. .stop_tx = atmel_stop_tx,
  1164. .start_tx = atmel_start_tx,
  1165. .stop_rx = atmel_stop_rx,
  1166. .enable_ms = atmel_enable_ms,
  1167. .break_ctl = atmel_break_ctl,
  1168. .startup = atmel_startup,
  1169. .shutdown = atmel_shutdown,
  1170. .flush_buffer = atmel_flush_buffer,
  1171. .set_termios = atmel_set_termios,
  1172. .set_ldisc = atmel_set_ldisc,
  1173. .type = atmel_type,
  1174. .release_port = atmel_release_port,
  1175. .request_port = atmel_request_port,
  1176. .config_port = atmel_config_port,
  1177. .verify_port = atmel_verify_port,
  1178. .pm = atmel_serial_pm,
  1179. .ioctl = atmel_ioctl,
  1180. #ifdef CONFIG_CONSOLE_POLL
  1181. .poll_get_char = atmel_poll_get_char,
  1182. .poll_put_char = atmel_poll_put_char,
  1183. #endif
  1184. };
  1185. /*
  1186. * Configure the port from the platform device resource info.
  1187. */
  1188. static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
  1189. struct platform_device *pdev)
  1190. {
  1191. struct uart_port *port = &atmel_port->uart;
  1192. struct atmel_uart_data *data = pdev->dev.platform_data;
  1193. port->iotype = UPIO_MEM;
  1194. port->flags = UPF_BOOT_AUTOCONF;
  1195. port->ops = &atmel_pops;
  1196. port->fifosize = 1;
  1197. port->line = data->num;
  1198. port->dev = &pdev->dev;
  1199. port->mapbase = pdev->resource[0].start;
  1200. port->irq = pdev->resource[1].start;
  1201. tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
  1202. (unsigned long)port);
  1203. memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
  1204. if (data->regs)
  1205. /* Already mapped by setup code */
  1206. port->membase = data->regs;
  1207. else {
  1208. port->flags |= UPF_IOREMAP;
  1209. port->membase = NULL;
  1210. }
  1211. /* for console, the clock could already be configured */
  1212. if (!atmel_port->clk) {
  1213. atmel_port->clk = clk_get(&pdev->dev, "usart");
  1214. clk_enable(atmel_port->clk);
  1215. port->uartclk = clk_get_rate(atmel_port->clk);
  1216. clk_disable(atmel_port->clk);
  1217. /* only enable clock when USART is in use */
  1218. }
  1219. atmel_port->use_dma_rx = data->use_dma_rx;
  1220. atmel_port->use_dma_tx = data->use_dma_tx;
  1221. atmel_port->rs485 = data->rs485;
  1222. /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
  1223. if (atmel_port->rs485.flags & SER_RS485_ENABLED)
  1224. atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
  1225. else if (atmel_use_dma_tx(port)) {
  1226. port->fifosize = PDC_BUFFER_SIZE;
  1227. atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
  1228. } else {
  1229. atmel_port->tx_done_mask = ATMEL_US_TXRDY;
  1230. }
  1231. }
  1232. /*
  1233. * Register board-specific modem-control line handlers.
  1234. */
  1235. void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
  1236. {
  1237. if (fns->enable_ms)
  1238. atmel_pops.enable_ms = fns->enable_ms;
  1239. if (fns->get_mctrl)
  1240. atmel_pops.get_mctrl = fns->get_mctrl;
  1241. if (fns->set_mctrl)
  1242. atmel_pops.set_mctrl = fns->set_mctrl;
  1243. atmel_open_hook = fns->open;
  1244. atmel_close_hook = fns->close;
  1245. atmel_pops.pm = fns->pm;
  1246. atmel_pops.set_wake = fns->set_wake;
  1247. }
  1248. #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
  1249. static void atmel_console_putchar(struct uart_port *port, int ch)
  1250. {
  1251. while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
  1252. cpu_relax();
  1253. UART_PUT_CHAR(port, ch);
  1254. }
  1255. /*
  1256. * Interrupts are disabled on entering
  1257. */
  1258. static void atmel_console_write(struct console *co, const char *s, u_int count)
  1259. {
  1260. struct uart_port *port = &atmel_ports[co->index].uart;
  1261. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1262. unsigned int status, imr;
  1263. unsigned int pdc_tx;
  1264. /*
  1265. * First, save IMR and then disable interrupts
  1266. */
  1267. imr = UART_GET_IMR(port);
  1268. UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
  1269. /* Store PDC transmit status and disable it */
  1270. pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
  1271. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  1272. uart_console_write(port, s, count, atmel_console_putchar);
  1273. /*
  1274. * Finally, wait for transmitter to become empty
  1275. * and restore IMR
  1276. */
  1277. do {
  1278. status = UART_GET_CSR(port);
  1279. } while (!(status & ATMEL_US_TXRDY));
  1280. /* Restore PDC transmit status */
  1281. if (pdc_tx)
  1282. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  1283. /* set interrupts back the way they were */
  1284. UART_PUT_IER(port, imr);
  1285. }
  1286. /*
  1287. * If the port was already initialised (eg, by a boot loader),
  1288. * try to determine the current setup.
  1289. */
  1290. static void __init atmel_console_get_options(struct uart_port *port, int *baud,
  1291. int *parity, int *bits)
  1292. {
  1293. unsigned int mr, quot;
  1294. /*
  1295. * If the baud rate generator isn't running, the port wasn't
  1296. * initialized by the boot loader.
  1297. */
  1298. quot = UART_GET_BRGR(port) & ATMEL_US_CD;
  1299. if (!quot)
  1300. return;
  1301. mr = UART_GET_MR(port) & ATMEL_US_CHRL;
  1302. if (mr == ATMEL_US_CHRL_8)
  1303. *bits = 8;
  1304. else
  1305. *bits = 7;
  1306. mr = UART_GET_MR(port) & ATMEL_US_PAR;
  1307. if (mr == ATMEL_US_PAR_EVEN)
  1308. *parity = 'e';
  1309. else if (mr == ATMEL_US_PAR_ODD)
  1310. *parity = 'o';
  1311. /*
  1312. * The serial core only rounds down when matching this to a
  1313. * supported baud rate. Make sure we don't end up slightly
  1314. * lower than one of those, as it would make us fall through
  1315. * to a much lower baud rate than we really want.
  1316. */
  1317. *baud = port->uartclk / (16 * (quot - 1));
  1318. }
  1319. static int __init atmel_console_setup(struct console *co, char *options)
  1320. {
  1321. struct uart_port *port = &atmel_ports[co->index].uart;
  1322. int baud = 115200;
  1323. int bits = 8;
  1324. int parity = 'n';
  1325. int flow = 'n';
  1326. if (port->membase == NULL) {
  1327. /* Port not initialized yet - delay setup */
  1328. return -ENODEV;
  1329. }
  1330. clk_enable(atmel_ports[co->index].clk);
  1331. UART_PUT_IDR(port, -1);
  1332. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  1333. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  1334. if (options)
  1335. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1336. else
  1337. atmel_console_get_options(port, &baud, &parity, &bits);
  1338. return uart_set_options(port, co, baud, parity, bits, flow);
  1339. }
  1340. static struct uart_driver atmel_uart;
  1341. static struct console atmel_console = {
  1342. .name = ATMEL_DEVICENAME,
  1343. .write = atmel_console_write,
  1344. .device = uart_console_device,
  1345. .setup = atmel_console_setup,
  1346. .flags = CON_PRINTBUFFER,
  1347. .index = -1,
  1348. .data = &atmel_uart,
  1349. };
  1350. #define ATMEL_CONSOLE_DEVICE (&atmel_console)
  1351. /*
  1352. * Early console initialization (before VM subsystem initialized).
  1353. */
  1354. static int __init atmel_console_init(void)
  1355. {
  1356. if (atmel_default_console_device) {
  1357. struct atmel_uart_data *pdata =
  1358. atmel_default_console_device->dev.platform_data;
  1359. add_preferred_console(ATMEL_DEVICENAME, pdata->num, NULL);
  1360. atmel_init_port(&atmel_ports[pdata->num],
  1361. atmel_default_console_device);
  1362. register_console(&atmel_console);
  1363. }
  1364. return 0;
  1365. }
  1366. console_initcall(atmel_console_init);
  1367. /*
  1368. * Late console initialization.
  1369. */
  1370. static int __init atmel_late_console_init(void)
  1371. {
  1372. if (atmel_default_console_device
  1373. && !(atmel_console.flags & CON_ENABLED))
  1374. register_console(&atmel_console);
  1375. return 0;
  1376. }
  1377. core_initcall(atmel_late_console_init);
  1378. static inline bool atmel_is_console_port(struct uart_port *port)
  1379. {
  1380. return port->cons && port->cons->index == port->line;
  1381. }
  1382. #else
  1383. #define ATMEL_CONSOLE_DEVICE NULL
  1384. static inline bool atmel_is_console_port(struct uart_port *port)
  1385. {
  1386. return false;
  1387. }
  1388. #endif
  1389. static struct uart_driver atmel_uart = {
  1390. .owner = THIS_MODULE,
  1391. .driver_name = "atmel_serial",
  1392. .dev_name = ATMEL_DEVICENAME,
  1393. .major = SERIAL_ATMEL_MAJOR,
  1394. .minor = MINOR_START,
  1395. .nr = ATMEL_MAX_UART,
  1396. .cons = ATMEL_CONSOLE_DEVICE,
  1397. };
  1398. #ifdef CONFIG_PM
  1399. static bool atmel_serial_clk_will_stop(void)
  1400. {
  1401. #ifdef CONFIG_ARCH_AT91
  1402. return at91_suspend_entering_slow_clock();
  1403. #else
  1404. return false;
  1405. #endif
  1406. }
  1407. static int atmel_serial_suspend(struct platform_device *pdev,
  1408. pm_message_t state)
  1409. {
  1410. struct uart_port *port = platform_get_drvdata(pdev);
  1411. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1412. if (atmel_is_console_port(port) && console_suspend_enabled) {
  1413. /* Drain the TX shifter */
  1414. while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
  1415. cpu_relax();
  1416. }
  1417. /* we can not wake up if we're running on slow clock */
  1418. atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
  1419. if (atmel_serial_clk_will_stop())
  1420. device_set_wakeup_enable(&pdev->dev, 0);
  1421. uart_suspend_port(&atmel_uart, port);
  1422. return 0;
  1423. }
  1424. static int atmel_serial_resume(struct platform_device *pdev)
  1425. {
  1426. struct uart_port *port = platform_get_drvdata(pdev);
  1427. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1428. uart_resume_port(&atmel_uart, port);
  1429. device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
  1430. return 0;
  1431. }
  1432. #else
  1433. #define atmel_serial_suspend NULL
  1434. #define atmel_serial_resume NULL
  1435. #endif
  1436. static int __devinit atmel_serial_probe(struct platform_device *pdev)
  1437. {
  1438. struct atmel_uart_port *port;
  1439. struct atmel_uart_data *pdata = pdev->dev.platform_data;
  1440. void *data;
  1441. int ret;
  1442. BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
  1443. port = &atmel_ports[pdata->num];
  1444. port->backup_imr = 0;
  1445. atmel_init_port(port, pdev);
  1446. if (!atmel_use_dma_rx(&port->uart)) {
  1447. ret = -ENOMEM;
  1448. data = kmalloc(sizeof(struct atmel_uart_char)
  1449. * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
  1450. if (!data)
  1451. goto err_alloc_ring;
  1452. port->rx_ring.buf = data;
  1453. }
  1454. ret = uart_add_one_port(&atmel_uart, &port->uart);
  1455. if (ret)
  1456. goto err_add_port;
  1457. #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
  1458. if (atmel_is_console_port(&port->uart)
  1459. && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
  1460. /*
  1461. * The serial core enabled the clock for us, so undo
  1462. * the clk_enable() in atmel_console_setup()
  1463. */
  1464. clk_disable(port->clk);
  1465. }
  1466. #endif
  1467. device_init_wakeup(&pdev->dev, 1);
  1468. platform_set_drvdata(pdev, port);
  1469. if (port->rs485.flags & SER_RS485_ENABLED) {
  1470. UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
  1471. UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
  1472. }
  1473. return 0;
  1474. err_add_port:
  1475. kfree(port->rx_ring.buf);
  1476. port->rx_ring.buf = NULL;
  1477. err_alloc_ring:
  1478. if (!atmel_is_console_port(&port->uart)) {
  1479. clk_put(port->clk);
  1480. port->clk = NULL;
  1481. }
  1482. return ret;
  1483. }
  1484. static int __devexit atmel_serial_remove(struct platform_device *pdev)
  1485. {
  1486. struct uart_port *port = platform_get_drvdata(pdev);
  1487. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1488. int ret = 0;
  1489. device_init_wakeup(&pdev->dev, 0);
  1490. platform_set_drvdata(pdev, NULL);
  1491. ret = uart_remove_one_port(&atmel_uart, port);
  1492. tasklet_kill(&atmel_port->tasklet);
  1493. kfree(atmel_port->rx_ring.buf);
  1494. /* "port" is allocated statically, so we shouldn't free it */
  1495. clk_put(atmel_port->clk);
  1496. return ret;
  1497. }
  1498. static struct platform_driver atmel_serial_driver = {
  1499. .probe = atmel_serial_probe,
  1500. .remove = __devexit_p(atmel_serial_remove),
  1501. .suspend = atmel_serial_suspend,
  1502. .resume = atmel_serial_resume,
  1503. .driver = {
  1504. .name = "atmel_usart",
  1505. .owner = THIS_MODULE,
  1506. },
  1507. };
  1508. static int __init atmel_serial_init(void)
  1509. {
  1510. int ret;
  1511. ret = uart_register_driver(&atmel_uart);
  1512. if (ret)
  1513. return ret;
  1514. ret = platform_driver_register(&atmel_serial_driver);
  1515. if (ret)
  1516. uart_unregister_driver(&atmel_uart);
  1517. return ret;
  1518. }
  1519. static void __exit atmel_serial_exit(void)
  1520. {
  1521. platform_driver_unregister(&atmel_serial_driver);
  1522. uart_unregister_driver(&atmel_uart);
  1523. }
  1524. module_init(atmel_serial_init);
  1525. module_exit(atmel_serial_exit);
  1526. MODULE_AUTHOR("Rick Bronson");
  1527. MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
  1528. MODULE_LICENSE("GPL");
  1529. MODULE_ALIAS("platform:atmel_usart");