s3c2410.c 4.5 KB

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  1. /* linux/arch/arm/mach-s3c2410/s3c2410.c
  2. *
  3. * Copyright (c) 2003-2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * http://www.simtec.co.uk/products/EB2410ITX/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/gpio.h>
  19. #include <linux/clk.h>
  20. #include <linux/sysdev.h>
  21. #include <linux/syscore_ops.h>
  22. #include <linux/serial_core.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/mach/map.h>
  27. #include <asm/mach/irq.h>
  28. #include <mach/hardware.h>
  29. #include <asm/irq.h>
  30. #include <plat/cpu-freq.h>
  31. #include <mach/regs-clock.h>
  32. #include <plat/regs-serial.h>
  33. #include <plat/s3c2410.h>
  34. #include <plat/cpu.h>
  35. #include <plat/devs.h>
  36. #include <plat/clock.h>
  37. #include <plat/pll.h>
  38. #include <plat/pm.h>
  39. #include <plat/watchdog-reset.h>
  40. #include <plat/gpio-core.h>
  41. #include <plat/gpio-cfg.h>
  42. #include <plat/gpio-cfg-helpers.h>
  43. /* Initial IO mappings */
  44. static struct map_desc s3c2410_iodesc[] __initdata = {
  45. IODESC_ENT(CLKPWR),
  46. IODESC_ENT(TIMER),
  47. IODESC_ENT(WATCHDOG),
  48. };
  49. /* our uart devices */
  50. /* uart registration process */
  51. void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  52. {
  53. s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
  54. }
  55. /* s3c2410_map_io
  56. *
  57. * register the standard cpu IO areas, and any passed in from the
  58. * machine specific initialisation.
  59. */
  60. void __init s3c2410_map_io(void)
  61. {
  62. s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
  63. s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
  64. iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
  65. }
  66. void __init_or_cpufreq s3c2410_setup_clocks(void)
  67. {
  68. struct clk *xtal_clk;
  69. unsigned long tmp;
  70. unsigned long xtal;
  71. unsigned long fclk;
  72. unsigned long hclk;
  73. unsigned long pclk;
  74. xtal_clk = clk_get(NULL, "xtal");
  75. xtal = clk_get_rate(xtal_clk);
  76. clk_put(xtal_clk);
  77. /* now we've got our machine bits initialised, work out what
  78. * clocks we've got */
  79. fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
  80. tmp = __raw_readl(S3C2410_CLKDIVN);
  81. /* work out clock scalings */
  82. hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
  83. pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
  84. /* print brieft summary of clocks, etc */
  85. printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
  86. print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
  87. /* initialise the clocks here, to allow other things like the
  88. * console to use them
  89. */
  90. s3c24xx_setup_clocks(fclk, hclk, pclk);
  91. }
  92. /* fake ARMCLK for use with cpufreq, etc. */
  93. static struct clk s3c2410_armclk = {
  94. .name = "armclk",
  95. .parent = &clk_f,
  96. .id = -1,
  97. };
  98. void __init s3c2410_init_clocks(int xtal)
  99. {
  100. s3c24xx_register_baseclocks(xtal);
  101. s3c2410_setup_clocks();
  102. s3c2410_baseclk_add();
  103. s3c24xx_register_clock(&s3c2410_armclk);
  104. }
  105. struct sysdev_class s3c2410_sysclass = {
  106. .name = "s3c2410-core",
  107. };
  108. /* Note, we would have liked to name this s3c2410-core, but we cannot
  109. * register two sysdev_class with the same name.
  110. */
  111. struct sysdev_class s3c2410a_sysclass = {
  112. .name = "s3c2410a-core",
  113. };
  114. static struct sys_device s3c2410_sysdev = {
  115. .cls = &s3c2410_sysclass,
  116. };
  117. /* need to register class before we actually register the device, and
  118. * we also need to ensure that it has been initialised before any of the
  119. * drivers even try to use it (even if not on an s3c2410 based system)
  120. * as a driver which may support both 2410 and 2440 may try and use it.
  121. */
  122. static int __init s3c2410_core_init(void)
  123. {
  124. return sysdev_class_register(&s3c2410_sysclass);
  125. }
  126. core_initcall(s3c2410_core_init);
  127. static int __init s3c2410a_core_init(void)
  128. {
  129. return sysdev_class_register(&s3c2410a_sysclass);
  130. }
  131. core_initcall(s3c2410a_core_init);
  132. int __init s3c2410_init(void)
  133. {
  134. printk("S3C2410: Initialising architecture\n");
  135. #ifdef CONFIG_PM
  136. register_syscore_ops(&s3c2410_pm_syscore_ops);
  137. #endif
  138. register_syscore_ops(&s3c24xx_irq_syscore_ops);
  139. return sysdev_register(&s3c2410_sysdev);
  140. }
  141. int __init s3c2410a_init(void)
  142. {
  143. s3c2410_sysdev.cls = &s3c2410a_sysclass;
  144. return s3c2410_init();
  145. }
  146. void s3c2410_restart(char mode, const char *cmd)
  147. {
  148. if (mode == 's') {
  149. soft_restart(0);
  150. }
  151. arch_wdt_reset();
  152. /* we'll take a jump through zero as a poor second */
  153. soft_restart(0);
  154. }