mach-vr1000.c 9.4 KB

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  1. /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
  2. *
  3. * Copyright (c) 2003-2008 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Machine support for Thorcom VR1000 board. Designed for Thorcom by
  7. * Simtec Electronics, http://www.simtec.co.uk/
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/list.h>
  18. #include <linux/timer.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/dm9000.h>
  22. #include <linux/i2c.h>
  23. #include <linux/serial.h>
  24. #include <linux/tty.h>
  25. #include <linux/serial_8250.h>
  26. #include <linux/serial_reg.h>
  27. #include <linux/io.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <asm/mach/irq.h>
  31. #include <mach/bast-map.h>
  32. #include <mach/vr1000-map.h>
  33. #include <mach/vr1000-irq.h>
  34. #include <mach/vr1000-cpld.h>
  35. #include <mach/hardware.h>
  36. #include <asm/irq.h>
  37. #include <asm/mach-types.h>
  38. #include <plat/regs-serial.h>
  39. #include <mach/regs-gpio.h>
  40. #include <mach/leds-gpio.h>
  41. #include <plat/clock.h>
  42. #include <plat/devs.h>
  43. #include <plat/cpu.h>
  44. #include <plat/iic.h>
  45. #include <plat/audio-simtec.h>
  46. #include "usb-simtec.h"
  47. #include "nor-simtec.h"
  48. #include "common.h"
  49. /* macros for virtual address mods for the io space entries */
  50. #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
  51. #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
  52. #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
  53. #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
  54. /* macros to modify the physical addresses for io space */
  55. #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
  56. #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
  57. #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
  58. #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
  59. static struct map_desc vr1000_iodesc[] __initdata = {
  60. /* ISA IO areas */
  61. {
  62. .virtual = (u32)S3C24XX_VA_ISA_BYTE,
  63. .pfn = PA_CS2(BAST_PA_ISAIO),
  64. .length = SZ_16M,
  65. .type = MT_DEVICE,
  66. }, {
  67. .virtual = (u32)S3C24XX_VA_ISA_WORD,
  68. .pfn = PA_CS3(BAST_PA_ISAIO),
  69. .length = SZ_16M,
  70. .type = MT_DEVICE,
  71. },
  72. /* CPLD control registers, and external interrupt controls */
  73. {
  74. .virtual = (u32)VR1000_VA_CTRL1,
  75. .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
  76. .length = SZ_1M,
  77. .type = MT_DEVICE,
  78. }, {
  79. .virtual = (u32)VR1000_VA_CTRL2,
  80. .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
  81. .length = SZ_1M,
  82. .type = MT_DEVICE,
  83. }, {
  84. .virtual = (u32)VR1000_VA_CTRL3,
  85. .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
  86. .length = SZ_1M,
  87. .type = MT_DEVICE,
  88. }, {
  89. .virtual = (u32)VR1000_VA_CTRL4,
  90. .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
  91. .length = SZ_1M,
  92. .type = MT_DEVICE,
  93. },
  94. };
  95. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  96. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  97. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  98. /* uart clock source(s) */
  99. static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
  100. [0] = {
  101. .name = "uclk",
  102. .divisor = 1,
  103. .min_baud = 0,
  104. .max_baud = 0,
  105. },
  106. [1] = {
  107. .name = "pclk",
  108. .divisor = 1,
  109. .min_baud = 0,
  110. .max_baud = 0.
  111. }
  112. };
  113. static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
  114. [0] = {
  115. .hwport = 0,
  116. .flags = 0,
  117. .ucon = UCON,
  118. .ulcon = ULCON,
  119. .ufcon = UFCON,
  120. .clocks = vr1000_serial_clocks,
  121. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  122. },
  123. [1] = {
  124. .hwport = 1,
  125. .flags = 0,
  126. .ucon = UCON,
  127. .ulcon = ULCON,
  128. .ufcon = UFCON,
  129. .clocks = vr1000_serial_clocks,
  130. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  131. },
  132. /* port 2 is not actually used */
  133. [2] = {
  134. .hwport = 2,
  135. .flags = 0,
  136. .ucon = UCON,
  137. .ulcon = ULCON,
  138. .ufcon = UFCON,
  139. .clocks = vr1000_serial_clocks,
  140. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  141. }
  142. };
  143. /* definitions for the vr1000 extra 16550 serial ports */
  144. #define VR1000_BAUDBASE (3692307)
  145. #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
  146. static struct plat_serial8250_port serial_platform_data[] = {
  147. [0] = {
  148. .mapbase = VR1000_SERIAL_MAPBASE(0),
  149. .irq = IRQ_VR1000_SERIAL + 0,
  150. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  151. .iotype = UPIO_MEM,
  152. .regshift = 0,
  153. .uartclk = VR1000_BAUDBASE,
  154. },
  155. [1] = {
  156. .mapbase = VR1000_SERIAL_MAPBASE(1),
  157. .irq = IRQ_VR1000_SERIAL + 1,
  158. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  159. .iotype = UPIO_MEM,
  160. .regshift = 0,
  161. .uartclk = VR1000_BAUDBASE,
  162. },
  163. [2] = {
  164. .mapbase = VR1000_SERIAL_MAPBASE(2),
  165. .irq = IRQ_VR1000_SERIAL + 2,
  166. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  167. .iotype = UPIO_MEM,
  168. .regshift = 0,
  169. .uartclk = VR1000_BAUDBASE,
  170. },
  171. [3] = {
  172. .mapbase = VR1000_SERIAL_MAPBASE(3),
  173. .irq = IRQ_VR1000_SERIAL + 3,
  174. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  175. .iotype = UPIO_MEM,
  176. .regshift = 0,
  177. .uartclk = VR1000_BAUDBASE,
  178. },
  179. { },
  180. };
  181. static struct platform_device serial_device = {
  182. .name = "serial8250",
  183. .id = PLAT8250_DEV_PLATFORM,
  184. .dev = {
  185. .platform_data = serial_platform_data,
  186. },
  187. };
  188. /* DM9000 ethernet devices */
  189. static struct resource vr1000_dm9k0_resource[] = {
  190. [0] = {
  191. .start = S3C2410_CS5 + VR1000_PA_DM9000,
  192. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
  193. .flags = IORESOURCE_MEM
  194. },
  195. [1] = {
  196. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
  197. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
  198. .flags = IORESOURCE_MEM
  199. },
  200. [2] = {
  201. .start = IRQ_VR1000_DM9000A,
  202. .end = IRQ_VR1000_DM9000A,
  203. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  204. }
  205. };
  206. static struct resource vr1000_dm9k1_resource[] = {
  207. [0] = {
  208. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
  209. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
  210. .flags = IORESOURCE_MEM
  211. },
  212. [1] = {
  213. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
  214. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
  215. .flags = IORESOURCE_MEM
  216. },
  217. [2] = {
  218. .start = IRQ_VR1000_DM9000N,
  219. .end = IRQ_VR1000_DM9000N,
  220. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  221. }
  222. };
  223. /* for the moment we limit ourselves to 16bit IO until some
  224. * better IO routines can be written and tested
  225. */
  226. static struct dm9000_plat_data vr1000_dm9k_platdata = {
  227. .flags = DM9000_PLATF_16BITONLY,
  228. };
  229. static struct platform_device vr1000_dm9k0 = {
  230. .name = "dm9000",
  231. .id = 0,
  232. .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
  233. .resource = vr1000_dm9k0_resource,
  234. .dev = {
  235. .platform_data = &vr1000_dm9k_platdata,
  236. }
  237. };
  238. static struct platform_device vr1000_dm9k1 = {
  239. .name = "dm9000",
  240. .id = 1,
  241. .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
  242. .resource = vr1000_dm9k1_resource,
  243. .dev = {
  244. .platform_data = &vr1000_dm9k_platdata,
  245. }
  246. };
  247. /* LEDS */
  248. static struct s3c24xx_led_platdata vr1000_led1_pdata = {
  249. .name = "led1",
  250. .gpio = S3C2410_GPB(0),
  251. .def_trigger = "",
  252. };
  253. static struct s3c24xx_led_platdata vr1000_led2_pdata = {
  254. .name = "led2",
  255. .gpio = S3C2410_GPB(1),
  256. .def_trigger = "",
  257. };
  258. static struct s3c24xx_led_platdata vr1000_led3_pdata = {
  259. .name = "led3",
  260. .gpio = S3C2410_GPB(2),
  261. .def_trigger = "",
  262. };
  263. static struct platform_device vr1000_led1 = {
  264. .name = "s3c24xx_led",
  265. .id = 1,
  266. .dev = {
  267. .platform_data = &vr1000_led1_pdata,
  268. },
  269. };
  270. static struct platform_device vr1000_led2 = {
  271. .name = "s3c24xx_led",
  272. .id = 2,
  273. .dev = {
  274. .platform_data = &vr1000_led2_pdata,
  275. },
  276. };
  277. static struct platform_device vr1000_led3 = {
  278. .name = "s3c24xx_led",
  279. .id = 3,
  280. .dev = {
  281. .platform_data = &vr1000_led3_pdata,
  282. },
  283. };
  284. /* I2C devices. */
  285. static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
  286. {
  287. I2C_BOARD_INFO("tlv320aic23", 0x1a),
  288. }, {
  289. I2C_BOARD_INFO("tmp101", 0x48),
  290. }, {
  291. I2C_BOARD_INFO("m41st87", 0x68),
  292. },
  293. };
  294. /* devices for this board */
  295. static struct platform_device *vr1000_devices[] __initdata = {
  296. &s3c_device_ohci,
  297. &s3c_device_lcd,
  298. &s3c_device_wdt,
  299. &s3c_device_i2c0,
  300. &s3c_device_adc,
  301. &serial_device,
  302. &vr1000_dm9k0,
  303. &vr1000_dm9k1,
  304. &vr1000_led1,
  305. &vr1000_led2,
  306. &vr1000_led3,
  307. };
  308. static struct clk *vr1000_clocks[] __initdata = {
  309. &s3c24xx_dclk0,
  310. &s3c24xx_dclk1,
  311. &s3c24xx_clkout0,
  312. &s3c24xx_clkout1,
  313. &s3c24xx_uclk,
  314. };
  315. static void vr1000_power_off(void)
  316. {
  317. gpio_direction_output(S3C2410_GPB(9), 1);
  318. }
  319. static void __init vr1000_map_io(void)
  320. {
  321. /* initialise clock sources */
  322. s3c24xx_dclk0.parent = &clk_upll;
  323. s3c24xx_dclk0.rate = 12*1000*1000;
  324. s3c24xx_dclk1.parent = NULL;
  325. s3c24xx_dclk1.rate = 3692307;
  326. s3c24xx_clkout0.parent = &s3c24xx_dclk0;
  327. s3c24xx_clkout1.parent = &s3c24xx_dclk1;
  328. s3c24xx_uclk.parent = &s3c24xx_clkout1;
  329. s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
  330. pm_power_off = vr1000_power_off;
  331. s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
  332. s3c24xx_init_clocks(0);
  333. s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
  334. }
  335. static void __init vr1000_init(void)
  336. {
  337. s3c_i2c0_set_platdata(NULL);
  338. platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
  339. i2c_register_board_info(0, vr1000_i2c_devs,
  340. ARRAY_SIZE(vr1000_i2c_devs));
  341. nor_simtec_init();
  342. simtec_audio_add(NULL, true, NULL);
  343. WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
  344. }
  345. MACHINE_START(VR1000, "Thorcom-VR1000")
  346. /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
  347. .atag_offset = 0x100,
  348. .map_io = vr1000_map_io,
  349. .init_machine = vr1000_init,
  350. .init_irq = s3c24xx_init_irq,
  351. .timer = &s3c24xx_timer,
  352. .restart = s3c2410_restart,
  353. MACHINE_END