cputable.c 30 KB

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  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/config.h>
  13. #include <linux/string.h>
  14. #include <linux/sched.h>
  15. #include <linux/threads.h>
  16. #include <linux/init.h>
  17. #include <linux/module.h>
  18. #include <asm/oprofile_impl.h>
  19. #include <asm/cputable.h>
  20. struct cpu_spec* cur_cpu_spec = NULL;
  21. EXPORT_SYMBOL(cur_cpu_spec);
  22. /* NOTE:
  23. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  24. * the responsibility of the appropriate CPU save/restore functions to
  25. * eventually copy these settings over. Those save/restore aren't yet
  26. * part of the cputable though. That has to be fixed for both ppc32
  27. * and ppc64
  28. */
  29. #ifdef CONFIG_PPC32
  30. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  31. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  32. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  33. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  37. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  38. #endif /* CONFIG_PPC32 */
  39. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  40. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  41. * ones as well...
  42. */
  43. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  44. PPC_FEATURE_HAS_MMU)
  45. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  46. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  47. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  48. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  49. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  50. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  51. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  52. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  53. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  54. PPC_FEATURE_BOOKE)
  55. /* We only set the spe features if the kernel was compiled with
  56. * spe support
  57. */
  58. #ifdef CONFIG_SPE
  59. #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
  60. #else
  61. #define PPC_FEATURE_SPE_COMP 0
  62. #endif
  63. struct cpu_spec cpu_specs[] = {
  64. #ifdef CONFIG_PPC64
  65. { /* Power3 */
  66. .pvr_mask = 0xffff0000,
  67. .pvr_value = 0x00400000,
  68. .cpu_name = "POWER3 (630)",
  69. .cpu_features = CPU_FTRS_POWER3,
  70. .cpu_user_features = COMMON_USER_PPC64,
  71. .icache_bsize = 128,
  72. .dcache_bsize = 128,
  73. .num_pmcs = 8,
  74. .oprofile_cpu_type = "ppc64/power3",
  75. .oprofile_type = PPC_OPROFILE_RS64,
  76. .platform = "power3",
  77. },
  78. { /* Power3+ */
  79. .pvr_mask = 0xffff0000,
  80. .pvr_value = 0x00410000,
  81. .cpu_name = "POWER3 (630+)",
  82. .cpu_features = CPU_FTRS_POWER3,
  83. .cpu_user_features = COMMON_USER_PPC64,
  84. .icache_bsize = 128,
  85. .dcache_bsize = 128,
  86. .num_pmcs = 8,
  87. .oprofile_cpu_type = "ppc64/power3",
  88. .oprofile_type = PPC_OPROFILE_RS64,
  89. .platform = "power3",
  90. },
  91. { /* Northstar */
  92. .pvr_mask = 0xffff0000,
  93. .pvr_value = 0x00330000,
  94. .cpu_name = "RS64-II (northstar)",
  95. .cpu_features = CPU_FTRS_RS64,
  96. .cpu_user_features = COMMON_USER_PPC64,
  97. .icache_bsize = 128,
  98. .dcache_bsize = 128,
  99. .num_pmcs = 8,
  100. .oprofile_cpu_type = "ppc64/rs64",
  101. .oprofile_type = PPC_OPROFILE_RS64,
  102. .platform = "rs64",
  103. },
  104. { /* Pulsar */
  105. .pvr_mask = 0xffff0000,
  106. .pvr_value = 0x00340000,
  107. .cpu_name = "RS64-III (pulsar)",
  108. .cpu_features = CPU_FTRS_RS64,
  109. .cpu_user_features = COMMON_USER_PPC64,
  110. .icache_bsize = 128,
  111. .dcache_bsize = 128,
  112. .num_pmcs = 8,
  113. .oprofile_cpu_type = "ppc64/rs64",
  114. .oprofile_type = PPC_OPROFILE_RS64,
  115. .platform = "rs64",
  116. },
  117. { /* I-star */
  118. .pvr_mask = 0xffff0000,
  119. .pvr_value = 0x00360000,
  120. .cpu_name = "RS64-III (icestar)",
  121. .cpu_features = CPU_FTRS_RS64,
  122. .cpu_user_features = COMMON_USER_PPC64,
  123. .icache_bsize = 128,
  124. .dcache_bsize = 128,
  125. .num_pmcs = 8,
  126. .oprofile_cpu_type = "ppc64/rs64",
  127. .oprofile_type = PPC_OPROFILE_RS64,
  128. .platform = "rs64",
  129. },
  130. { /* S-star */
  131. .pvr_mask = 0xffff0000,
  132. .pvr_value = 0x00370000,
  133. .cpu_name = "RS64-IV (sstar)",
  134. .cpu_features = CPU_FTRS_RS64,
  135. .cpu_user_features = COMMON_USER_PPC64,
  136. .icache_bsize = 128,
  137. .dcache_bsize = 128,
  138. .num_pmcs = 8,
  139. .oprofile_cpu_type = "ppc64/rs64",
  140. .oprofile_type = PPC_OPROFILE_RS64,
  141. .platform = "rs64",
  142. },
  143. { /* Power4 */
  144. .pvr_mask = 0xffff0000,
  145. .pvr_value = 0x00350000,
  146. .cpu_name = "POWER4 (gp)",
  147. .cpu_features = CPU_FTRS_POWER4,
  148. .cpu_user_features = COMMON_USER_POWER4,
  149. .icache_bsize = 128,
  150. .dcache_bsize = 128,
  151. .num_pmcs = 8,
  152. .oprofile_cpu_type = "ppc64/power4",
  153. .oprofile_type = PPC_OPROFILE_POWER4,
  154. .platform = "power4",
  155. },
  156. { /* Power4+ */
  157. .pvr_mask = 0xffff0000,
  158. .pvr_value = 0x00380000,
  159. .cpu_name = "POWER4+ (gq)",
  160. .cpu_features = CPU_FTRS_POWER4,
  161. .cpu_user_features = COMMON_USER_POWER4,
  162. .icache_bsize = 128,
  163. .dcache_bsize = 128,
  164. .num_pmcs = 8,
  165. .oprofile_cpu_type = "ppc64/power4",
  166. .oprofile_type = PPC_OPROFILE_POWER4,
  167. .platform = "power4",
  168. },
  169. { /* PPC970 */
  170. .pvr_mask = 0xffff0000,
  171. .pvr_value = 0x00390000,
  172. .cpu_name = "PPC970",
  173. .cpu_features = CPU_FTRS_PPC970,
  174. .cpu_user_features = COMMON_USER_POWER4 |
  175. PPC_FEATURE_HAS_ALTIVEC_COMP,
  176. .icache_bsize = 128,
  177. .dcache_bsize = 128,
  178. .num_pmcs = 8,
  179. .cpu_setup = __setup_cpu_ppc970,
  180. .oprofile_cpu_type = "ppc64/970",
  181. .oprofile_type = PPC_OPROFILE_POWER4,
  182. .platform = "ppc970",
  183. },
  184. #endif /* CONFIG_PPC64 */
  185. #if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
  186. { /* PPC970FX */
  187. .pvr_mask = 0xffff0000,
  188. .pvr_value = 0x003c0000,
  189. .cpu_name = "PPC970FX",
  190. #ifdef CONFIG_PPC32
  191. .cpu_features = CPU_FTRS_970_32,
  192. #else
  193. .cpu_features = CPU_FTRS_PPC970,
  194. #endif
  195. .cpu_user_features = COMMON_USER_POWER4 |
  196. PPC_FEATURE_HAS_ALTIVEC_COMP,
  197. .icache_bsize = 128,
  198. .dcache_bsize = 128,
  199. .num_pmcs = 8,
  200. .cpu_setup = __setup_cpu_ppc970,
  201. .oprofile_cpu_type = "ppc64/970",
  202. .oprofile_type = PPC_OPROFILE_POWER4,
  203. .platform = "ppc970",
  204. },
  205. #endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
  206. #ifdef CONFIG_PPC64
  207. { /* PPC970MP */
  208. .pvr_mask = 0xffff0000,
  209. .pvr_value = 0x00440000,
  210. .cpu_name = "PPC970MP",
  211. .cpu_features = CPU_FTRS_PPC970,
  212. .cpu_user_features = COMMON_USER_POWER4 |
  213. PPC_FEATURE_HAS_ALTIVEC_COMP,
  214. .icache_bsize = 128,
  215. .dcache_bsize = 128,
  216. .cpu_setup = __setup_cpu_ppc970,
  217. .oprofile_cpu_type = "ppc64/970",
  218. .oprofile_type = PPC_OPROFILE_POWER4,
  219. .platform = "ppc970",
  220. },
  221. { /* Power5 GR */
  222. .pvr_mask = 0xffff0000,
  223. .pvr_value = 0x003a0000,
  224. .cpu_name = "POWER5 (gr)",
  225. .cpu_features = CPU_FTRS_POWER5,
  226. .cpu_user_features = COMMON_USER_POWER5,
  227. .icache_bsize = 128,
  228. .dcache_bsize = 128,
  229. .num_pmcs = 6,
  230. .oprofile_cpu_type = "ppc64/power5",
  231. .oprofile_type = PPC_OPROFILE_POWER4,
  232. .platform = "power5",
  233. },
  234. { /* Power5 GS */
  235. .pvr_mask = 0xffff0000,
  236. .pvr_value = 0x003b0000,
  237. .cpu_name = "POWER5+ (gs)",
  238. .cpu_features = CPU_FTRS_POWER5,
  239. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  240. .icache_bsize = 128,
  241. .dcache_bsize = 128,
  242. .num_pmcs = 6,
  243. .oprofile_cpu_type = "ppc64/power5+",
  244. .oprofile_type = PPC_OPROFILE_POWER4,
  245. .platform = "power5+",
  246. },
  247. { /* Power6 */
  248. .pvr_mask = 0xffff0000,
  249. .pvr_value = 0x003e0000,
  250. .cpu_name = "POWER6",
  251. .cpu_features = CPU_FTRS_POWER6,
  252. .cpu_user_features = COMMON_USER_POWER6,
  253. .icache_bsize = 128,
  254. .dcache_bsize = 128,
  255. .num_pmcs = 6,
  256. .oprofile_cpu_type = "ppc64/power6",
  257. .oprofile_type = PPC_OPROFILE_POWER4,
  258. .platform = "power6",
  259. },
  260. { /* Cell Broadband Engine */
  261. .pvr_mask = 0xffff0000,
  262. .pvr_value = 0x00700000,
  263. .cpu_name = "Cell Broadband Engine",
  264. .cpu_features = CPU_FTRS_CELL,
  265. .cpu_user_features = COMMON_USER_PPC64 |
  266. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  267. PPC_FEATURE_SMT,
  268. .icache_bsize = 128,
  269. .dcache_bsize = 128,
  270. .platform = "ppc-cell-be",
  271. },
  272. { /* default match */
  273. .pvr_mask = 0x00000000,
  274. .pvr_value = 0x00000000,
  275. .cpu_name = "POWER4 (compatible)",
  276. .cpu_features = CPU_FTRS_COMPATIBLE,
  277. .cpu_user_features = COMMON_USER_PPC64,
  278. .icache_bsize = 128,
  279. .dcache_bsize = 128,
  280. .num_pmcs = 6,
  281. .platform = "power4",
  282. }
  283. #endif /* CONFIG_PPC64 */
  284. #ifdef CONFIG_PPC32
  285. #if CLASSIC_PPC
  286. { /* 601 */
  287. .pvr_mask = 0xffff0000,
  288. .pvr_value = 0x00010000,
  289. .cpu_name = "601",
  290. .cpu_features = CPU_FTRS_PPC601,
  291. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  292. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  293. .icache_bsize = 32,
  294. .dcache_bsize = 32,
  295. .platform = "ppc601",
  296. },
  297. { /* 603 */
  298. .pvr_mask = 0xffff0000,
  299. .pvr_value = 0x00030000,
  300. .cpu_name = "603",
  301. .cpu_features = CPU_FTRS_603,
  302. .cpu_user_features = COMMON_USER,
  303. .icache_bsize = 32,
  304. .dcache_bsize = 32,
  305. .cpu_setup = __setup_cpu_603,
  306. .platform = "ppc603",
  307. },
  308. { /* 603e */
  309. .pvr_mask = 0xffff0000,
  310. .pvr_value = 0x00060000,
  311. .cpu_name = "603e",
  312. .cpu_features = CPU_FTRS_603,
  313. .cpu_user_features = COMMON_USER,
  314. .icache_bsize = 32,
  315. .dcache_bsize = 32,
  316. .cpu_setup = __setup_cpu_603,
  317. .platform = "ppc603",
  318. },
  319. { /* 603ev */
  320. .pvr_mask = 0xffff0000,
  321. .pvr_value = 0x00070000,
  322. .cpu_name = "603ev",
  323. .cpu_features = CPU_FTRS_603,
  324. .cpu_user_features = COMMON_USER,
  325. .icache_bsize = 32,
  326. .dcache_bsize = 32,
  327. .cpu_setup = __setup_cpu_603,
  328. .platform = "ppc603",
  329. },
  330. { /* 604 */
  331. .pvr_mask = 0xffff0000,
  332. .pvr_value = 0x00040000,
  333. .cpu_name = "604",
  334. .cpu_features = CPU_FTRS_604,
  335. .cpu_user_features = COMMON_USER,
  336. .icache_bsize = 32,
  337. .dcache_bsize = 32,
  338. .num_pmcs = 2,
  339. .cpu_setup = __setup_cpu_604,
  340. .platform = "ppc604",
  341. },
  342. { /* 604e */
  343. .pvr_mask = 0xfffff000,
  344. .pvr_value = 0x00090000,
  345. .cpu_name = "604e",
  346. .cpu_features = CPU_FTRS_604,
  347. .cpu_user_features = COMMON_USER,
  348. .icache_bsize = 32,
  349. .dcache_bsize = 32,
  350. .num_pmcs = 4,
  351. .cpu_setup = __setup_cpu_604,
  352. .platform = "ppc604",
  353. },
  354. { /* 604r */
  355. .pvr_mask = 0xffff0000,
  356. .pvr_value = 0x00090000,
  357. .cpu_name = "604r",
  358. .cpu_features = CPU_FTRS_604,
  359. .cpu_user_features = COMMON_USER,
  360. .icache_bsize = 32,
  361. .dcache_bsize = 32,
  362. .num_pmcs = 4,
  363. .cpu_setup = __setup_cpu_604,
  364. .platform = "ppc604",
  365. },
  366. { /* 604ev */
  367. .pvr_mask = 0xffff0000,
  368. .pvr_value = 0x000a0000,
  369. .cpu_name = "604ev",
  370. .cpu_features = CPU_FTRS_604,
  371. .cpu_user_features = COMMON_USER,
  372. .icache_bsize = 32,
  373. .dcache_bsize = 32,
  374. .num_pmcs = 4,
  375. .cpu_setup = __setup_cpu_604,
  376. .platform = "ppc604",
  377. },
  378. { /* 740/750 (0x4202, don't support TAU ?) */
  379. .pvr_mask = 0xffffffff,
  380. .pvr_value = 0x00084202,
  381. .cpu_name = "740/750",
  382. .cpu_features = CPU_FTRS_740_NOTAU,
  383. .cpu_user_features = COMMON_USER,
  384. .icache_bsize = 32,
  385. .dcache_bsize = 32,
  386. .num_pmcs = 4,
  387. .cpu_setup = __setup_cpu_750,
  388. .platform = "ppc750",
  389. },
  390. { /* 750CX (80100 and 8010x?) */
  391. .pvr_mask = 0xfffffff0,
  392. .pvr_value = 0x00080100,
  393. .cpu_name = "750CX",
  394. .cpu_features = CPU_FTRS_750,
  395. .cpu_user_features = COMMON_USER,
  396. .icache_bsize = 32,
  397. .dcache_bsize = 32,
  398. .num_pmcs = 4,
  399. .cpu_setup = __setup_cpu_750cx,
  400. .platform = "ppc750",
  401. },
  402. { /* 750CX (82201 and 82202) */
  403. .pvr_mask = 0xfffffff0,
  404. .pvr_value = 0x00082200,
  405. .cpu_name = "750CX",
  406. .cpu_features = CPU_FTRS_750,
  407. .cpu_user_features = COMMON_USER,
  408. .icache_bsize = 32,
  409. .dcache_bsize = 32,
  410. .num_pmcs = 4,
  411. .cpu_setup = __setup_cpu_750cx,
  412. .platform = "ppc750",
  413. },
  414. { /* 750CXe (82214) */
  415. .pvr_mask = 0xfffffff0,
  416. .pvr_value = 0x00082210,
  417. .cpu_name = "750CXe",
  418. .cpu_features = CPU_FTRS_750,
  419. .cpu_user_features = COMMON_USER,
  420. .icache_bsize = 32,
  421. .dcache_bsize = 32,
  422. .num_pmcs = 4,
  423. .cpu_setup = __setup_cpu_750cx,
  424. .platform = "ppc750",
  425. },
  426. { /* 750CXe "Gekko" (83214) */
  427. .pvr_mask = 0xffffffff,
  428. .pvr_value = 0x00083214,
  429. .cpu_name = "750CXe",
  430. .cpu_features = CPU_FTRS_750,
  431. .cpu_user_features = COMMON_USER,
  432. .icache_bsize = 32,
  433. .dcache_bsize = 32,
  434. .num_pmcs = 4,
  435. .cpu_setup = __setup_cpu_750cx,
  436. .platform = "ppc750",
  437. },
  438. { /* 745/755 */
  439. .pvr_mask = 0xfffff000,
  440. .pvr_value = 0x00083000,
  441. .cpu_name = "745/755",
  442. .cpu_features = CPU_FTRS_750,
  443. .cpu_user_features = COMMON_USER,
  444. .icache_bsize = 32,
  445. .dcache_bsize = 32,
  446. .num_pmcs = 4,
  447. .cpu_setup = __setup_cpu_750,
  448. .platform = "ppc750",
  449. },
  450. { /* 750FX rev 1.x */
  451. .pvr_mask = 0xffffff00,
  452. .pvr_value = 0x70000100,
  453. .cpu_name = "750FX",
  454. .cpu_features = CPU_FTRS_750FX1,
  455. .cpu_user_features = COMMON_USER,
  456. .icache_bsize = 32,
  457. .dcache_bsize = 32,
  458. .num_pmcs = 4,
  459. .cpu_setup = __setup_cpu_750,
  460. .platform = "ppc750",
  461. },
  462. { /* 750FX rev 2.0 must disable HID0[DPM] */
  463. .pvr_mask = 0xffffffff,
  464. .pvr_value = 0x70000200,
  465. .cpu_name = "750FX",
  466. .cpu_features = CPU_FTRS_750FX2,
  467. .cpu_user_features = COMMON_USER,
  468. .icache_bsize = 32,
  469. .dcache_bsize = 32,
  470. .num_pmcs = 4,
  471. .cpu_setup = __setup_cpu_750,
  472. .platform = "ppc750",
  473. },
  474. { /* 750FX (All revs except 2.0) */
  475. .pvr_mask = 0xffff0000,
  476. .pvr_value = 0x70000000,
  477. .cpu_name = "750FX",
  478. .cpu_features = CPU_FTRS_750FX,
  479. .cpu_user_features = COMMON_USER,
  480. .icache_bsize = 32,
  481. .dcache_bsize = 32,
  482. .num_pmcs = 4,
  483. .cpu_setup = __setup_cpu_750fx,
  484. .platform = "ppc750",
  485. },
  486. { /* 750GX */
  487. .pvr_mask = 0xffff0000,
  488. .pvr_value = 0x70020000,
  489. .cpu_name = "750GX",
  490. .cpu_features = CPU_FTRS_750GX,
  491. .cpu_user_features = COMMON_USER,
  492. .icache_bsize = 32,
  493. .dcache_bsize = 32,
  494. .num_pmcs = 4,
  495. .cpu_setup = __setup_cpu_750fx,
  496. .platform = "ppc750",
  497. },
  498. { /* 740/750 (L2CR bit need fixup for 740) */
  499. .pvr_mask = 0xffff0000,
  500. .pvr_value = 0x00080000,
  501. .cpu_name = "740/750",
  502. .cpu_features = CPU_FTRS_740,
  503. .cpu_user_features = COMMON_USER,
  504. .icache_bsize = 32,
  505. .dcache_bsize = 32,
  506. .num_pmcs = 4,
  507. .cpu_setup = __setup_cpu_750,
  508. .platform = "ppc750",
  509. },
  510. { /* 7400 rev 1.1 ? (no TAU) */
  511. .pvr_mask = 0xffffffff,
  512. .pvr_value = 0x000c1101,
  513. .cpu_name = "7400 (1.1)",
  514. .cpu_features = CPU_FTRS_7400_NOTAU,
  515. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  516. .icache_bsize = 32,
  517. .dcache_bsize = 32,
  518. .num_pmcs = 4,
  519. .cpu_setup = __setup_cpu_7400,
  520. .platform = "ppc7400",
  521. },
  522. { /* 7400 */
  523. .pvr_mask = 0xffff0000,
  524. .pvr_value = 0x000c0000,
  525. .cpu_name = "7400",
  526. .cpu_features = CPU_FTRS_7400,
  527. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  528. .icache_bsize = 32,
  529. .dcache_bsize = 32,
  530. .num_pmcs = 4,
  531. .cpu_setup = __setup_cpu_7400,
  532. .platform = "ppc7400",
  533. },
  534. { /* 7410 */
  535. .pvr_mask = 0xffff0000,
  536. .pvr_value = 0x800c0000,
  537. .cpu_name = "7410",
  538. .cpu_features = CPU_FTRS_7400,
  539. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  540. .icache_bsize = 32,
  541. .dcache_bsize = 32,
  542. .num_pmcs = 4,
  543. .cpu_setup = __setup_cpu_7410,
  544. .platform = "ppc7400",
  545. },
  546. { /* 7450 2.0 - no doze/nap */
  547. .pvr_mask = 0xffffffff,
  548. .pvr_value = 0x80000200,
  549. .cpu_name = "7450",
  550. .cpu_features = CPU_FTRS_7450_20,
  551. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  552. .icache_bsize = 32,
  553. .dcache_bsize = 32,
  554. .num_pmcs = 6,
  555. .cpu_setup = __setup_cpu_745x,
  556. .oprofile_cpu_type = "ppc/7450",
  557. .oprofile_type = PPC_OPROFILE_G4,
  558. .platform = "ppc7450",
  559. },
  560. { /* 7450 2.1 */
  561. .pvr_mask = 0xffffffff,
  562. .pvr_value = 0x80000201,
  563. .cpu_name = "7450",
  564. .cpu_features = CPU_FTRS_7450_21,
  565. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  566. .icache_bsize = 32,
  567. .dcache_bsize = 32,
  568. .num_pmcs = 6,
  569. .cpu_setup = __setup_cpu_745x,
  570. .oprofile_cpu_type = "ppc/7450",
  571. .oprofile_type = PPC_OPROFILE_G4,
  572. .platform = "ppc7450",
  573. },
  574. { /* 7450 2.3 and newer */
  575. .pvr_mask = 0xffff0000,
  576. .pvr_value = 0x80000000,
  577. .cpu_name = "7450",
  578. .cpu_features = CPU_FTRS_7450_23,
  579. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  580. .icache_bsize = 32,
  581. .dcache_bsize = 32,
  582. .num_pmcs = 6,
  583. .cpu_setup = __setup_cpu_745x,
  584. .oprofile_cpu_type = "ppc/7450",
  585. .oprofile_type = PPC_OPROFILE_G4,
  586. .platform = "ppc7450",
  587. },
  588. { /* 7455 rev 1.x */
  589. .pvr_mask = 0xffffff00,
  590. .pvr_value = 0x80010100,
  591. .cpu_name = "7455",
  592. .cpu_features = CPU_FTRS_7455_1,
  593. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  594. .icache_bsize = 32,
  595. .dcache_bsize = 32,
  596. .num_pmcs = 6,
  597. .cpu_setup = __setup_cpu_745x,
  598. .oprofile_cpu_type = "ppc/7450",
  599. .oprofile_type = PPC_OPROFILE_G4,
  600. .platform = "ppc7450",
  601. },
  602. { /* 7455 rev 2.0 */
  603. .pvr_mask = 0xffffffff,
  604. .pvr_value = 0x80010200,
  605. .cpu_name = "7455",
  606. .cpu_features = CPU_FTRS_7455_20,
  607. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  608. .icache_bsize = 32,
  609. .dcache_bsize = 32,
  610. .num_pmcs = 6,
  611. .cpu_setup = __setup_cpu_745x,
  612. .oprofile_cpu_type = "ppc/7450",
  613. .oprofile_type = PPC_OPROFILE_G4,
  614. .platform = "ppc7450",
  615. },
  616. { /* 7455 others */
  617. .pvr_mask = 0xffff0000,
  618. .pvr_value = 0x80010000,
  619. .cpu_name = "7455",
  620. .cpu_features = CPU_FTRS_7455,
  621. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  622. .icache_bsize = 32,
  623. .dcache_bsize = 32,
  624. .num_pmcs = 6,
  625. .cpu_setup = __setup_cpu_745x,
  626. .oprofile_cpu_type = "ppc/7450",
  627. .oprofile_type = PPC_OPROFILE_G4,
  628. .platform = "ppc7450",
  629. },
  630. { /* 7447/7457 Rev 1.0 */
  631. .pvr_mask = 0xffffffff,
  632. .pvr_value = 0x80020100,
  633. .cpu_name = "7447/7457",
  634. .cpu_features = CPU_FTRS_7447_10,
  635. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  636. .icache_bsize = 32,
  637. .dcache_bsize = 32,
  638. .num_pmcs = 6,
  639. .cpu_setup = __setup_cpu_745x,
  640. .oprofile_cpu_type = "ppc/7450",
  641. .oprofile_type = PPC_OPROFILE_G4,
  642. .platform = "ppc7450",
  643. },
  644. { /* 7447/7457 Rev 1.1 */
  645. .pvr_mask = 0xffffffff,
  646. .pvr_value = 0x80020101,
  647. .cpu_name = "7447/7457",
  648. .cpu_features = CPU_FTRS_7447_10,
  649. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  650. .icache_bsize = 32,
  651. .dcache_bsize = 32,
  652. .num_pmcs = 6,
  653. .cpu_setup = __setup_cpu_745x,
  654. .oprofile_cpu_type = "ppc/7450",
  655. .oprofile_type = PPC_OPROFILE_G4,
  656. .platform = "ppc7450",
  657. },
  658. { /* 7447/7457 Rev 1.2 and later */
  659. .pvr_mask = 0xffff0000,
  660. .pvr_value = 0x80020000,
  661. .cpu_name = "7447/7457",
  662. .cpu_features = CPU_FTRS_7447,
  663. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  664. .icache_bsize = 32,
  665. .dcache_bsize = 32,
  666. .num_pmcs = 6,
  667. .cpu_setup = __setup_cpu_745x,
  668. .oprofile_cpu_type = "ppc/7450",
  669. .oprofile_type = PPC_OPROFILE_G4,
  670. .platform = "ppc7450",
  671. },
  672. { /* 7447A */
  673. .pvr_mask = 0xffff0000,
  674. .pvr_value = 0x80030000,
  675. .cpu_name = "7447A",
  676. .cpu_features = CPU_FTRS_7447A,
  677. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  678. .icache_bsize = 32,
  679. .dcache_bsize = 32,
  680. .num_pmcs = 6,
  681. .cpu_setup = __setup_cpu_745x,
  682. .oprofile_cpu_type = "ppc/7450",
  683. .oprofile_type = PPC_OPROFILE_G4,
  684. .platform = "ppc7450",
  685. },
  686. { /* 7448 */
  687. .pvr_mask = 0xffff0000,
  688. .pvr_value = 0x80040000,
  689. .cpu_name = "7448",
  690. .cpu_features = CPU_FTRS_7447A,
  691. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  692. .icache_bsize = 32,
  693. .dcache_bsize = 32,
  694. .num_pmcs = 6,
  695. .cpu_setup = __setup_cpu_745x,
  696. .oprofile_cpu_type = "ppc/7450",
  697. .oprofile_type = PPC_OPROFILE_G4,
  698. .platform = "ppc7450",
  699. },
  700. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  701. .pvr_mask = 0x7fff0000,
  702. .pvr_value = 0x00810000,
  703. .cpu_name = "82xx",
  704. .cpu_features = CPU_FTRS_82XX,
  705. .cpu_user_features = COMMON_USER,
  706. .icache_bsize = 32,
  707. .dcache_bsize = 32,
  708. .cpu_setup = __setup_cpu_603,
  709. .platform = "ppc603",
  710. },
  711. { /* All G2_LE (603e core, plus some) have the same pvr */
  712. .pvr_mask = 0x7fff0000,
  713. .pvr_value = 0x00820000,
  714. .cpu_name = "G2_LE",
  715. .cpu_features = CPU_FTRS_G2_LE,
  716. .cpu_user_features = COMMON_USER,
  717. .icache_bsize = 32,
  718. .dcache_bsize = 32,
  719. .cpu_setup = __setup_cpu_603,
  720. .platform = "ppc603",
  721. },
  722. { /* e300 (a 603e core, plus some) on 83xx */
  723. .pvr_mask = 0x7fff0000,
  724. .pvr_value = 0x00830000,
  725. .cpu_name = "e300",
  726. .cpu_features = CPU_FTRS_E300,
  727. .cpu_user_features = COMMON_USER,
  728. .icache_bsize = 32,
  729. .dcache_bsize = 32,
  730. .cpu_setup = __setup_cpu_603,
  731. .platform = "ppc603",
  732. },
  733. { /* default match, we assume split I/D cache & TB (non-601)... */
  734. .pvr_mask = 0x00000000,
  735. .pvr_value = 0x00000000,
  736. .cpu_name = "(generic PPC)",
  737. .cpu_features = CPU_FTRS_CLASSIC32,
  738. .cpu_user_features = COMMON_USER,
  739. .icache_bsize = 32,
  740. .dcache_bsize = 32,
  741. .platform = "ppc603",
  742. },
  743. #endif /* CLASSIC_PPC */
  744. #ifdef CONFIG_8xx
  745. { /* 8xx */
  746. .pvr_mask = 0xffff0000,
  747. .pvr_value = 0x00500000,
  748. .cpu_name = "8xx",
  749. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  750. * if the 8xx code is there.... */
  751. .cpu_features = CPU_FTRS_8XX,
  752. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  753. .icache_bsize = 16,
  754. .dcache_bsize = 16,
  755. .platform = "ppc823",
  756. },
  757. #endif /* CONFIG_8xx */
  758. #ifdef CONFIG_40x
  759. { /* 403GC */
  760. .pvr_mask = 0xffffff00,
  761. .pvr_value = 0x00200200,
  762. .cpu_name = "403GC",
  763. .cpu_features = CPU_FTRS_40X,
  764. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  765. .icache_bsize = 16,
  766. .dcache_bsize = 16,
  767. .platform = "ppc403",
  768. },
  769. { /* 403GCX */
  770. .pvr_mask = 0xffffff00,
  771. .pvr_value = 0x00201400,
  772. .cpu_name = "403GCX",
  773. .cpu_features = CPU_FTRS_40X,
  774. .cpu_user_features = PPC_FEATURE_32 |
  775. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  776. .icache_bsize = 16,
  777. .dcache_bsize = 16,
  778. .platform = "ppc403",
  779. },
  780. { /* 403G ?? */
  781. .pvr_mask = 0xffff0000,
  782. .pvr_value = 0x00200000,
  783. .cpu_name = "403G ??",
  784. .cpu_features = CPU_FTRS_40X,
  785. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  786. .icache_bsize = 16,
  787. .dcache_bsize = 16,
  788. .platform = "ppc403",
  789. },
  790. { /* 405GP */
  791. .pvr_mask = 0xffff0000,
  792. .pvr_value = 0x40110000,
  793. .cpu_name = "405GP",
  794. .cpu_features = CPU_FTRS_40X,
  795. .cpu_user_features = PPC_FEATURE_32 |
  796. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  797. .icache_bsize = 32,
  798. .dcache_bsize = 32,
  799. .platform = "ppc405",
  800. },
  801. { /* STB 03xxx */
  802. .pvr_mask = 0xffff0000,
  803. .pvr_value = 0x40130000,
  804. .cpu_name = "STB03xxx",
  805. .cpu_features = CPU_FTRS_40X,
  806. .cpu_user_features = PPC_FEATURE_32 |
  807. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  808. .icache_bsize = 32,
  809. .dcache_bsize = 32,
  810. .platform = "ppc405",
  811. },
  812. { /* STB 04xxx */
  813. .pvr_mask = 0xffff0000,
  814. .pvr_value = 0x41810000,
  815. .cpu_name = "STB04xxx",
  816. .cpu_features = CPU_FTRS_40X,
  817. .cpu_user_features = PPC_FEATURE_32 |
  818. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  819. .icache_bsize = 32,
  820. .dcache_bsize = 32,
  821. .platform = "ppc405",
  822. },
  823. { /* NP405L */
  824. .pvr_mask = 0xffff0000,
  825. .pvr_value = 0x41610000,
  826. .cpu_name = "NP405L",
  827. .cpu_features = CPU_FTRS_40X,
  828. .cpu_user_features = PPC_FEATURE_32 |
  829. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  830. .icache_bsize = 32,
  831. .dcache_bsize = 32,
  832. .platform = "ppc405",
  833. },
  834. { /* NP4GS3 */
  835. .pvr_mask = 0xffff0000,
  836. .pvr_value = 0x40B10000,
  837. .cpu_name = "NP4GS3",
  838. .cpu_features = CPU_FTRS_40X,
  839. .cpu_user_features = PPC_FEATURE_32 |
  840. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  841. .icache_bsize = 32,
  842. .dcache_bsize = 32,
  843. .platform = "ppc405",
  844. },
  845. { /* NP405H */
  846. .pvr_mask = 0xffff0000,
  847. .pvr_value = 0x41410000,
  848. .cpu_name = "NP405H",
  849. .cpu_features = CPU_FTRS_40X,
  850. .cpu_user_features = PPC_FEATURE_32 |
  851. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  852. .icache_bsize = 32,
  853. .dcache_bsize = 32,
  854. .platform = "ppc405",
  855. },
  856. { /* 405GPr */
  857. .pvr_mask = 0xffff0000,
  858. .pvr_value = 0x50910000,
  859. .cpu_name = "405GPr",
  860. .cpu_features = CPU_FTRS_40X,
  861. .cpu_user_features = PPC_FEATURE_32 |
  862. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  863. .icache_bsize = 32,
  864. .dcache_bsize = 32,
  865. .platform = "ppc405",
  866. },
  867. { /* STBx25xx */
  868. .pvr_mask = 0xffff0000,
  869. .pvr_value = 0x51510000,
  870. .cpu_name = "STBx25xx",
  871. .cpu_features = CPU_FTRS_40X,
  872. .cpu_user_features = PPC_FEATURE_32 |
  873. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  874. .icache_bsize = 32,
  875. .dcache_bsize = 32,
  876. .platform = "ppc405",
  877. },
  878. { /* 405LP */
  879. .pvr_mask = 0xffff0000,
  880. .pvr_value = 0x41F10000,
  881. .cpu_name = "405LP",
  882. .cpu_features = CPU_FTRS_40X,
  883. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  884. .icache_bsize = 32,
  885. .dcache_bsize = 32,
  886. .platform = "ppc405",
  887. },
  888. { /* Xilinx Virtex-II Pro */
  889. .pvr_mask = 0xfffff000,
  890. .pvr_value = 0x20010000,
  891. .cpu_name = "Virtex-II Pro",
  892. .cpu_features = CPU_FTRS_40X,
  893. .cpu_user_features = PPC_FEATURE_32 |
  894. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  895. .icache_bsize = 32,
  896. .dcache_bsize = 32,
  897. .platform = "ppc405",
  898. },
  899. { /* Xilinx Virtex-4 FX */
  900. .pvr_mask = 0xfffff000,
  901. .pvr_value = 0x20011000,
  902. .cpu_name = "Virtex-4 FX",
  903. .cpu_features = CPU_FTRS_40X,
  904. .cpu_user_features = PPC_FEATURE_32 |
  905. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  906. .icache_bsize = 32,
  907. .dcache_bsize = 32,
  908. },
  909. { /* 405EP */
  910. .pvr_mask = 0xffff0000,
  911. .pvr_value = 0x51210000,
  912. .cpu_name = "405EP",
  913. .cpu_features = CPU_FTRS_40X,
  914. .cpu_user_features = PPC_FEATURE_32 |
  915. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  916. .icache_bsize = 32,
  917. .dcache_bsize = 32,
  918. .platform = "ppc405",
  919. },
  920. #endif /* CONFIG_40x */
  921. #ifdef CONFIG_44x
  922. {
  923. .pvr_mask = 0xf0000fff,
  924. .pvr_value = 0x40000850,
  925. .cpu_name = "440EP Rev. A",
  926. .cpu_features = CPU_FTRS_44X,
  927. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  928. .icache_bsize = 32,
  929. .dcache_bsize = 32,
  930. .platform = "ppc440",
  931. },
  932. {
  933. .pvr_mask = 0xf0000fff,
  934. .pvr_value = 0x400008d3,
  935. .cpu_name = "440EP Rev. B",
  936. .cpu_features = CPU_FTRS_44X,
  937. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  938. .icache_bsize = 32,
  939. .dcache_bsize = 32,
  940. .platform = "ppc440",
  941. },
  942. { /* 440GP Rev. B */
  943. .pvr_mask = 0xf0000fff,
  944. .pvr_value = 0x40000440,
  945. .cpu_name = "440GP Rev. B",
  946. .cpu_features = CPU_FTRS_44X,
  947. .cpu_user_features = COMMON_USER_BOOKE,
  948. .icache_bsize = 32,
  949. .dcache_bsize = 32,
  950. .platform = "ppc440gp",
  951. },
  952. { /* 440GP Rev. C */
  953. .pvr_mask = 0xf0000fff,
  954. .pvr_value = 0x40000481,
  955. .cpu_name = "440GP Rev. C",
  956. .cpu_features = CPU_FTRS_44X,
  957. .cpu_user_features = COMMON_USER_BOOKE,
  958. .icache_bsize = 32,
  959. .dcache_bsize = 32,
  960. .platform = "ppc440gp",
  961. },
  962. { /* 440GX Rev. A */
  963. .pvr_mask = 0xf0000fff,
  964. .pvr_value = 0x50000850,
  965. .cpu_name = "440GX Rev. A",
  966. .cpu_features = CPU_FTRS_44X,
  967. .cpu_user_features = COMMON_USER_BOOKE,
  968. .icache_bsize = 32,
  969. .dcache_bsize = 32,
  970. .platform = "ppc440",
  971. },
  972. { /* 440GX Rev. B */
  973. .pvr_mask = 0xf0000fff,
  974. .pvr_value = 0x50000851,
  975. .cpu_name = "440GX Rev. B",
  976. .cpu_features = CPU_FTRS_44X,
  977. .cpu_user_features = COMMON_USER_BOOKE,
  978. .icache_bsize = 32,
  979. .dcache_bsize = 32,
  980. .platform = "ppc440",
  981. },
  982. { /* 440GX Rev. C */
  983. .pvr_mask = 0xf0000fff,
  984. .pvr_value = 0x50000892,
  985. .cpu_name = "440GX Rev. C",
  986. .cpu_features = CPU_FTRS_44X,
  987. .cpu_user_features = COMMON_USER_BOOKE,
  988. .icache_bsize = 32,
  989. .dcache_bsize = 32,
  990. .platform = "ppc440",
  991. },
  992. { /* 440GX Rev. F */
  993. .pvr_mask = 0xf0000fff,
  994. .pvr_value = 0x50000894,
  995. .cpu_name = "440GX Rev. F",
  996. .cpu_features = CPU_FTRS_44X,
  997. .cpu_user_features = COMMON_USER_BOOKE,
  998. .icache_bsize = 32,
  999. .dcache_bsize = 32,
  1000. .platform = "ppc440",
  1001. },
  1002. { /* 440SP Rev. A */
  1003. .pvr_mask = 0xff000fff,
  1004. .pvr_value = 0x53000891,
  1005. .cpu_name = "440SP Rev. A",
  1006. .cpu_features = CPU_FTRS_44X,
  1007. .cpu_user_features = COMMON_USER_BOOKE,
  1008. .icache_bsize = 32,
  1009. .dcache_bsize = 32,
  1010. .platform = "ppc440",
  1011. },
  1012. { /* 440SPe Rev. A */
  1013. .pvr_mask = 0xff000fff,
  1014. .pvr_value = 0x53000890,
  1015. .cpu_name = "440SPe Rev. A",
  1016. .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
  1017. CPU_FTR_USE_TB,
  1018. .cpu_user_features = COMMON_USER_BOOKE,
  1019. .icache_bsize = 32,
  1020. .dcache_bsize = 32,
  1021. .platform = "ppc440",
  1022. },
  1023. #endif /* CONFIG_44x */
  1024. #ifdef CONFIG_FSL_BOOKE
  1025. { /* e200z5 */
  1026. .pvr_mask = 0xfff00000,
  1027. .pvr_value = 0x81000000,
  1028. .cpu_name = "e200z5",
  1029. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1030. .cpu_features = CPU_FTRS_E200,
  1031. .cpu_user_features = COMMON_USER_BOOKE |
  1032. PPC_FEATURE_HAS_EFP_SINGLE |
  1033. PPC_FEATURE_UNIFIED_CACHE,
  1034. .dcache_bsize = 32,
  1035. .platform = "ppc5554",
  1036. },
  1037. { /* e200z6 */
  1038. .pvr_mask = 0xfff00000,
  1039. .pvr_value = 0x81100000,
  1040. .cpu_name = "e200z6",
  1041. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1042. .cpu_features = CPU_FTRS_E200,
  1043. .cpu_user_features = COMMON_USER_BOOKE |
  1044. PPC_FEATURE_SPE_COMP |
  1045. PPC_FEATURE_HAS_EFP_SINGLE |
  1046. PPC_FEATURE_UNIFIED_CACHE,
  1047. .dcache_bsize = 32,
  1048. .platform = "ppc5554",
  1049. },
  1050. { /* e500 */
  1051. .pvr_mask = 0xffff0000,
  1052. .pvr_value = 0x80200000,
  1053. .cpu_name = "e500",
  1054. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1055. .cpu_features = CPU_FTRS_E500,
  1056. .cpu_user_features = COMMON_USER_BOOKE |
  1057. PPC_FEATURE_SPE_COMP |
  1058. PPC_FEATURE_HAS_EFP_SINGLE,
  1059. .icache_bsize = 32,
  1060. .dcache_bsize = 32,
  1061. .num_pmcs = 4,
  1062. .oprofile_cpu_type = "ppc/e500",
  1063. .oprofile_type = PPC_OPROFILE_BOOKE,
  1064. .platform = "ppc8540",
  1065. },
  1066. { /* e500v2 */
  1067. .pvr_mask = 0xffff0000,
  1068. .pvr_value = 0x80210000,
  1069. .cpu_name = "e500v2",
  1070. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1071. .cpu_features = CPU_FTRS_E500_2,
  1072. .cpu_user_features = COMMON_USER_BOOKE |
  1073. PPC_FEATURE_SPE_COMP |
  1074. PPC_FEATURE_HAS_EFP_SINGLE |
  1075. PPC_FEATURE_HAS_EFP_DOUBLE,
  1076. .icache_bsize = 32,
  1077. .dcache_bsize = 32,
  1078. .num_pmcs = 4,
  1079. .oprofile_cpu_type = "ppc/e500",
  1080. .oprofile_type = PPC_OPROFILE_BOOKE,
  1081. .platform = "ppc8548",
  1082. },
  1083. #endif
  1084. #if !CLASSIC_PPC
  1085. { /* default match */
  1086. .pvr_mask = 0x00000000,
  1087. .pvr_value = 0x00000000,
  1088. .cpu_name = "(generic PPC)",
  1089. .cpu_features = CPU_FTRS_GENERIC_32,
  1090. .cpu_user_features = PPC_FEATURE_32,
  1091. .icache_bsize = 32,
  1092. .dcache_bsize = 32,
  1093. .platform = "powerpc",
  1094. }
  1095. #endif /* !CLASSIC_PPC */
  1096. #endif /* CONFIG_PPC32 */
  1097. };