rtc-ds1307.c 24 KB

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  1. /*
  2. * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3. *
  4. * Copyright (C) 2005 James Chapman (ds1337 core)
  5. * Copyright (C) 2006 David Brownell
  6. * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/i2c.h>
  16. #include <linux/string.h>
  17. #include <linux/rtc.h>
  18. #include <linux/bcd.h>
  19. /* We can't determine type by probing, but if we expect pre-Linux code
  20. * to have set the chip up as a clock (turning on the oscillator and
  21. * setting the date and time), Linux can ignore the non-clock features.
  22. * That's a natural job for a factory or repair bench.
  23. */
  24. enum ds_type {
  25. ds_1307,
  26. ds_1337,
  27. ds_1338,
  28. ds_1339,
  29. ds_1340,
  30. ds_1388,
  31. ds_3231,
  32. m41t00,
  33. mcp7941x,
  34. rx_8025,
  35. last_ds_type /* always last */
  36. // rs5c372 too? different address...
  37. };
  38. /* RTC registers don't differ much, except for the century flag */
  39. #define DS1307_REG_SECS 0x00 /* 00-59 */
  40. # define DS1307_BIT_CH 0x80
  41. # define DS1340_BIT_nEOSC 0x80
  42. # define MCP7941X_BIT_ST 0x80
  43. #define DS1307_REG_MIN 0x01 /* 00-59 */
  44. #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
  45. # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
  46. # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
  47. # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
  48. # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
  49. #define DS1307_REG_WDAY 0x03 /* 01-07 */
  50. # define MCP7941X_BIT_VBATEN 0x08
  51. #define DS1307_REG_MDAY 0x04 /* 01-31 */
  52. #define DS1307_REG_MONTH 0x05 /* 01-12 */
  53. # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
  54. #define DS1307_REG_YEAR 0x06 /* 00-99 */
  55. /* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  56. * start at 7, and they differ a LOT. Only control and status matter for
  57. * basic RTC date and time functionality; be careful using them.
  58. */
  59. #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
  60. # define DS1307_BIT_OUT 0x80
  61. # define DS1338_BIT_OSF 0x20
  62. # define DS1307_BIT_SQWE 0x10
  63. # define DS1307_BIT_RS1 0x02
  64. # define DS1307_BIT_RS0 0x01
  65. #define DS1337_REG_CONTROL 0x0e
  66. # define DS1337_BIT_nEOSC 0x80
  67. # define DS1339_BIT_BBSQI 0x20
  68. # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
  69. # define DS1337_BIT_RS2 0x10
  70. # define DS1337_BIT_RS1 0x08
  71. # define DS1337_BIT_INTCN 0x04
  72. # define DS1337_BIT_A2IE 0x02
  73. # define DS1337_BIT_A1IE 0x01
  74. #define DS1340_REG_CONTROL 0x07
  75. # define DS1340_BIT_OUT 0x80
  76. # define DS1340_BIT_FT 0x40
  77. # define DS1340_BIT_CALIB_SIGN 0x20
  78. # define DS1340_M_CALIBRATION 0x1f
  79. #define DS1340_REG_FLAG 0x09
  80. # define DS1340_BIT_OSF 0x80
  81. #define DS1337_REG_STATUS 0x0f
  82. # define DS1337_BIT_OSF 0x80
  83. # define DS1337_BIT_A2I 0x02
  84. # define DS1337_BIT_A1I 0x01
  85. #define DS1339_REG_ALARM1_SECS 0x07
  86. #define DS1339_REG_TRICKLE 0x10
  87. #define RX8025_REG_CTRL1 0x0e
  88. # define RX8025_BIT_2412 0x20
  89. #define RX8025_REG_CTRL2 0x0f
  90. # define RX8025_BIT_PON 0x10
  91. # define RX8025_BIT_VDET 0x40
  92. # define RX8025_BIT_XST 0x20
  93. struct ds1307 {
  94. u8 offset; /* register's offset */
  95. u8 regs[11];
  96. enum ds_type type;
  97. unsigned long flags;
  98. #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
  99. #define HAS_ALARM 1 /* bit 1 == irq claimed */
  100. struct i2c_client *client;
  101. struct rtc_device *rtc;
  102. struct work_struct work;
  103. s32 (*read_block_data)(const struct i2c_client *client, u8 command,
  104. u8 length, u8 *values);
  105. s32 (*write_block_data)(const struct i2c_client *client, u8 command,
  106. u8 length, const u8 *values);
  107. };
  108. struct chip_desc {
  109. unsigned nvram56:1;
  110. unsigned alarm:1;
  111. };
  112. static const struct chip_desc chips[last_ds_type] = {
  113. [ds_1307] = {
  114. .nvram56 = 1,
  115. },
  116. [ds_1337] = {
  117. .alarm = 1,
  118. },
  119. [ds_1338] = {
  120. .nvram56 = 1,
  121. },
  122. [ds_1339] = {
  123. .alarm = 1,
  124. },
  125. [ds_3231] = {
  126. .alarm = 1,
  127. },
  128. };
  129. static const struct i2c_device_id ds1307_id[] = {
  130. { "ds1307", ds_1307 },
  131. { "ds1337", ds_1337 },
  132. { "ds1338", ds_1338 },
  133. { "ds1339", ds_1339 },
  134. { "ds1388", ds_1388 },
  135. { "ds1340", ds_1340 },
  136. { "ds3231", ds_3231 },
  137. { "m41t00", m41t00 },
  138. { "mcp7941x", mcp7941x },
  139. { "pt7c4338", ds_1307 },
  140. { "rx8025", rx_8025 },
  141. { }
  142. };
  143. MODULE_DEVICE_TABLE(i2c, ds1307_id);
  144. /*----------------------------------------------------------------------*/
  145. #define BLOCK_DATA_MAX_TRIES 10
  146. static s32 ds1307_read_block_data_once(const struct i2c_client *client,
  147. u8 command, u8 length, u8 *values)
  148. {
  149. s32 i, data;
  150. for (i = 0; i < length; i++) {
  151. data = i2c_smbus_read_byte_data(client, command + i);
  152. if (data < 0)
  153. return data;
  154. values[i] = data;
  155. }
  156. return i;
  157. }
  158. static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
  159. u8 length, u8 *values)
  160. {
  161. u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
  162. s32 ret;
  163. int tries = 0;
  164. dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
  165. ret = ds1307_read_block_data_once(client, command, length, values);
  166. if (ret < 0)
  167. return ret;
  168. do {
  169. if (++tries > BLOCK_DATA_MAX_TRIES) {
  170. dev_err(&client->dev,
  171. "ds1307_read_block_data failed\n");
  172. return -EIO;
  173. }
  174. memcpy(oldvalues, values, length);
  175. ret = ds1307_read_block_data_once(client, command, length,
  176. values);
  177. if (ret < 0)
  178. return ret;
  179. } while (memcmp(oldvalues, values, length));
  180. return length;
  181. }
  182. static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
  183. u8 length, const u8 *values)
  184. {
  185. u8 currvalues[I2C_SMBUS_BLOCK_MAX];
  186. int tries = 0;
  187. dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
  188. do {
  189. s32 i, ret;
  190. if (++tries > BLOCK_DATA_MAX_TRIES) {
  191. dev_err(&client->dev,
  192. "ds1307_write_block_data failed\n");
  193. return -EIO;
  194. }
  195. for (i = 0; i < length; i++) {
  196. ret = i2c_smbus_write_byte_data(client, command + i,
  197. values[i]);
  198. if (ret < 0)
  199. return ret;
  200. }
  201. ret = ds1307_read_block_data_once(client, command, length,
  202. currvalues);
  203. if (ret < 0)
  204. return ret;
  205. } while (memcmp(currvalues, values, length));
  206. return length;
  207. }
  208. /*----------------------------------------------------------------------*/
  209. /*
  210. * The IRQ logic includes a "real" handler running in IRQ context just
  211. * long enough to schedule this workqueue entry. We need a task context
  212. * to talk to the RTC, since I2C I/O calls require that; and disable the
  213. * IRQ until we clear its status on the chip, so that this handler can
  214. * work with any type of triggering (not just falling edge).
  215. *
  216. * The ds1337 and ds1339 both have two alarms, but we only use the first
  217. * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
  218. * signal; ds1339 chips have only one alarm signal.
  219. */
  220. static void ds1307_work(struct work_struct *work)
  221. {
  222. struct ds1307 *ds1307;
  223. struct i2c_client *client;
  224. struct mutex *lock;
  225. int stat, control;
  226. ds1307 = container_of(work, struct ds1307, work);
  227. client = ds1307->client;
  228. lock = &ds1307->rtc->ops_lock;
  229. mutex_lock(lock);
  230. stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
  231. if (stat < 0)
  232. goto out;
  233. if (stat & DS1337_BIT_A1I) {
  234. stat &= ~DS1337_BIT_A1I;
  235. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
  236. control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  237. if (control < 0)
  238. goto out;
  239. control &= ~DS1337_BIT_A1IE;
  240. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
  241. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  242. }
  243. out:
  244. if (test_bit(HAS_ALARM, &ds1307->flags))
  245. enable_irq(client->irq);
  246. mutex_unlock(lock);
  247. }
  248. static irqreturn_t ds1307_irq(int irq, void *dev_id)
  249. {
  250. struct i2c_client *client = dev_id;
  251. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  252. disable_irq_nosync(irq);
  253. schedule_work(&ds1307->work);
  254. return IRQ_HANDLED;
  255. }
  256. /*----------------------------------------------------------------------*/
  257. static int ds1307_get_time(struct device *dev, struct rtc_time *t)
  258. {
  259. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  260. int tmp;
  261. /* read the RTC date and time registers all at once */
  262. tmp = ds1307->read_block_data(ds1307->client,
  263. ds1307->offset, 7, ds1307->regs);
  264. if (tmp != 7) {
  265. dev_err(dev, "%s error %d\n", "read", tmp);
  266. return -EIO;
  267. }
  268. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  269. "read",
  270. ds1307->regs[0], ds1307->regs[1],
  271. ds1307->regs[2], ds1307->regs[3],
  272. ds1307->regs[4], ds1307->regs[5],
  273. ds1307->regs[6]);
  274. t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
  275. t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
  276. tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
  277. t->tm_hour = bcd2bin(tmp);
  278. t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
  279. t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
  280. tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
  281. t->tm_mon = bcd2bin(tmp) - 1;
  282. /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
  283. t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
  284. dev_dbg(dev, "%s secs=%d, mins=%d, "
  285. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  286. "read", t->tm_sec, t->tm_min,
  287. t->tm_hour, t->tm_mday,
  288. t->tm_mon, t->tm_year, t->tm_wday);
  289. /* initial clock setting can be undefined */
  290. return rtc_valid_tm(t);
  291. }
  292. static int ds1307_set_time(struct device *dev, struct rtc_time *t)
  293. {
  294. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  295. int result;
  296. int tmp;
  297. u8 *buf = ds1307->regs;
  298. dev_dbg(dev, "%s secs=%d, mins=%d, "
  299. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  300. "write", t->tm_sec, t->tm_min,
  301. t->tm_hour, t->tm_mday,
  302. t->tm_mon, t->tm_year, t->tm_wday);
  303. buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
  304. buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
  305. buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
  306. buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
  307. buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
  308. buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
  309. /* assume 20YY not 19YY */
  310. tmp = t->tm_year - 100;
  311. buf[DS1307_REG_YEAR] = bin2bcd(tmp);
  312. switch (ds1307->type) {
  313. case ds_1337:
  314. case ds_1339:
  315. case ds_3231:
  316. buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
  317. break;
  318. case ds_1340:
  319. buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
  320. | DS1340_BIT_CENTURY;
  321. break;
  322. case mcp7941x:
  323. buf[DS1307_REG_SECS] |= MCP7941X_BIT_ST;
  324. buf[DS1307_REG_WDAY] |= MCP7941X_BIT_VBATEN;
  325. break;
  326. default:
  327. break;
  328. }
  329. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  330. "write", buf[0], buf[1], buf[2], buf[3],
  331. buf[4], buf[5], buf[6]);
  332. result = ds1307->write_block_data(ds1307->client,
  333. ds1307->offset, 7, buf);
  334. if (result < 0) {
  335. dev_err(dev, "%s error %d\n", "write", result);
  336. return result;
  337. }
  338. return 0;
  339. }
  340. static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  341. {
  342. struct i2c_client *client = to_i2c_client(dev);
  343. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  344. int ret;
  345. if (!test_bit(HAS_ALARM, &ds1307->flags))
  346. return -EINVAL;
  347. /* read all ALARM1, ALARM2, and status registers at once */
  348. ret = ds1307->read_block_data(client,
  349. DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
  350. if (ret != 9) {
  351. dev_err(dev, "%s error %d\n", "alarm read", ret);
  352. return -EIO;
  353. }
  354. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  355. "alarm read",
  356. ds1307->regs[0], ds1307->regs[1],
  357. ds1307->regs[2], ds1307->regs[3],
  358. ds1307->regs[4], ds1307->regs[5],
  359. ds1307->regs[6], ds1307->regs[7],
  360. ds1307->regs[8]);
  361. /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
  362. * and that all four fields are checked matches
  363. */
  364. t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
  365. t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
  366. t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
  367. t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
  368. t->time.tm_mon = -1;
  369. t->time.tm_year = -1;
  370. t->time.tm_wday = -1;
  371. t->time.tm_yday = -1;
  372. t->time.tm_isdst = -1;
  373. /* ... and status */
  374. t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
  375. t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
  376. dev_dbg(dev, "%s secs=%d, mins=%d, "
  377. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  378. "alarm read", t->time.tm_sec, t->time.tm_min,
  379. t->time.tm_hour, t->time.tm_mday,
  380. t->enabled, t->pending);
  381. return 0;
  382. }
  383. static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  384. {
  385. struct i2c_client *client = to_i2c_client(dev);
  386. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  387. unsigned char *buf = ds1307->regs;
  388. u8 control, status;
  389. int ret;
  390. if (!test_bit(HAS_ALARM, &ds1307->flags))
  391. return -EINVAL;
  392. dev_dbg(dev, "%s secs=%d, mins=%d, "
  393. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  394. "alarm set", t->time.tm_sec, t->time.tm_min,
  395. t->time.tm_hour, t->time.tm_mday,
  396. t->enabled, t->pending);
  397. /* read current status of both alarms and the chip */
  398. ret = ds1307->read_block_data(client,
  399. DS1339_REG_ALARM1_SECS, 9, buf);
  400. if (ret != 9) {
  401. dev_err(dev, "%s error %d\n", "alarm write", ret);
  402. return -EIO;
  403. }
  404. control = ds1307->regs[7];
  405. status = ds1307->regs[8];
  406. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  407. "alarm set (old status)",
  408. ds1307->regs[0], ds1307->regs[1],
  409. ds1307->regs[2], ds1307->regs[3],
  410. ds1307->regs[4], ds1307->regs[5],
  411. ds1307->regs[6], control, status);
  412. /* set ALARM1, using 24 hour and day-of-month modes */
  413. buf[0] = bin2bcd(t->time.tm_sec);
  414. buf[1] = bin2bcd(t->time.tm_min);
  415. buf[2] = bin2bcd(t->time.tm_hour);
  416. buf[3] = bin2bcd(t->time.tm_mday);
  417. /* set ALARM2 to non-garbage */
  418. buf[4] = 0;
  419. buf[5] = 0;
  420. buf[6] = 0;
  421. /* optionally enable ALARM1 */
  422. buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
  423. if (t->enabled) {
  424. dev_dbg(dev, "alarm IRQ armed\n");
  425. buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
  426. }
  427. buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
  428. ret = ds1307->write_block_data(client,
  429. DS1339_REG_ALARM1_SECS, 9, buf);
  430. if (ret < 0) {
  431. dev_err(dev, "can't set alarm time\n");
  432. return ret;
  433. }
  434. return 0;
  435. }
  436. static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
  437. {
  438. struct i2c_client *client = to_i2c_client(dev);
  439. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  440. int ret;
  441. if (!test_bit(HAS_ALARM, &ds1307->flags))
  442. return -ENOTTY;
  443. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  444. if (ret < 0)
  445. return ret;
  446. if (enabled)
  447. ret |= DS1337_BIT_A1IE;
  448. else
  449. ret &= ~DS1337_BIT_A1IE;
  450. ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
  451. if (ret < 0)
  452. return ret;
  453. return 0;
  454. }
  455. static const struct rtc_class_ops ds13xx_rtc_ops = {
  456. .read_time = ds1307_get_time,
  457. .set_time = ds1307_set_time,
  458. .read_alarm = ds1337_read_alarm,
  459. .set_alarm = ds1337_set_alarm,
  460. .alarm_irq_enable = ds1307_alarm_irq_enable,
  461. };
  462. /*----------------------------------------------------------------------*/
  463. #define NVRAM_SIZE 56
  464. static ssize_t
  465. ds1307_nvram_read(struct file *filp, struct kobject *kobj,
  466. struct bin_attribute *attr,
  467. char *buf, loff_t off, size_t count)
  468. {
  469. struct i2c_client *client;
  470. struct ds1307 *ds1307;
  471. int result;
  472. client = kobj_to_i2c_client(kobj);
  473. ds1307 = i2c_get_clientdata(client);
  474. if (unlikely(off >= NVRAM_SIZE))
  475. return 0;
  476. if ((off + count) > NVRAM_SIZE)
  477. count = NVRAM_SIZE - off;
  478. if (unlikely(!count))
  479. return count;
  480. result = ds1307->read_block_data(client, 8 + off, count, buf);
  481. if (result < 0)
  482. dev_err(&client->dev, "%s error %d\n", "nvram read", result);
  483. return result;
  484. }
  485. static ssize_t
  486. ds1307_nvram_write(struct file *filp, struct kobject *kobj,
  487. struct bin_attribute *attr,
  488. char *buf, loff_t off, size_t count)
  489. {
  490. struct i2c_client *client;
  491. struct ds1307 *ds1307;
  492. int result;
  493. client = kobj_to_i2c_client(kobj);
  494. ds1307 = i2c_get_clientdata(client);
  495. if (unlikely(off >= NVRAM_SIZE))
  496. return -EFBIG;
  497. if ((off + count) > NVRAM_SIZE)
  498. count = NVRAM_SIZE - off;
  499. if (unlikely(!count))
  500. return count;
  501. result = ds1307->write_block_data(client, 8 + off, count, buf);
  502. if (result < 0) {
  503. dev_err(&client->dev, "%s error %d\n", "nvram write", result);
  504. return result;
  505. }
  506. return count;
  507. }
  508. static struct bin_attribute nvram = {
  509. .attr = {
  510. .name = "nvram",
  511. .mode = S_IRUGO | S_IWUSR,
  512. },
  513. .read = ds1307_nvram_read,
  514. .write = ds1307_nvram_write,
  515. .size = NVRAM_SIZE,
  516. };
  517. /*----------------------------------------------------------------------*/
  518. static struct i2c_driver ds1307_driver;
  519. static int __devinit ds1307_probe(struct i2c_client *client,
  520. const struct i2c_device_id *id)
  521. {
  522. struct ds1307 *ds1307;
  523. int err = -ENODEV;
  524. int tmp;
  525. const struct chip_desc *chip = &chips[id->driver_data];
  526. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  527. int want_irq = false;
  528. unsigned char *buf;
  529. static const int bbsqi_bitpos[] = {
  530. [ds_1337] = 0,
  531. [ds_1339] = DS1339_BIT_BBSQI,
  532. [ds_3231] = DS3231_BIT_BBSQW,
  533. };
  534. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
  535. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  536. return -EIO;
  537. if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
  538. return -ENOMEM;
  539. i2c_set_clientdata(client, ds1307);
  540. ds1307->client = client;
  541. ds1307->type = id->driver_data;
  542. ds1307->offset = 0;
  543. buf = ds1307->regs;
  544. if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
  545. ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
  546. ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
  547. } else {
  548. ds1307->read_block_data = ds1307_read_block_data;
  549. ds1307->write_block_data = ds1307_write_block_data;
  550. }
  551. switch (ds1307->type) {
  552. case ds_1337:
  553. case ds_1339:
  554. case ds_3231:
  555. /* get registers that the "rtc" read below won't read... */
  556. tmp = ds1307->read_block_data(ds1307->client,
  557. DS1337_REG_CONTROL, 2, buf);
  558. if (tmp != 2) {
  559. pr_debug("read error %d\n", tmp);
  560. err = -EIO;
  561. goto exit_free;
  562. }
  563. /* oscillator off? turn it on, so clock can tick. */
  564. if (ds1307->regs[0] & DS1337_BIT_nEOSC)
  565. ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
  566. /* Using IRQ? Disable the square wave and both alarms.
  567. * For some variants, be sure alarms can trigger when we're
  568. * running on Vbackup (BBSQI/BBSQW)
  569. */
  570. if (ds1307->client->irq > 0 && chip->alarm) {
  571. INIT_WORK(&ds1307->work, ds1307_work);
  572. ds1307->regs[0] |= DS1337_BIT_INTCN
  573. | bbsqi_bitpos[ds1307->type];
  574. ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
  575. want_irq = true;
  576. }
  577. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
  578. ds1307->regs[0]);
  579. /* oscillator fault? clear flag, and warn */
  580. if (ds1307->regs[1] & DS1337_BIT_OSF) {
  581. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
  582. ds1307->regs[1] & ~DS1337_BIT_OSF);
  583. dev_warn(&client->dev, "SET TIME!\n");
  584. }
  585. break;
  586. case rx_8025:
  587. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  588. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  589. if (tmp != 2) {
  590. pr_debug("read error %d\n", tmp);
  591. err = -EIO;
  592. goto exit_free;
  593. }
  594. /* oscillator off? turn it on, so clock can tick. */
  595. if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
  596. ds1307->regs[1] |= RX8025_BIT_XST;
  597. i2c_smbus_write_byte_data(client,
  598. RX8025_REG_CTRL2 << 4 | 0x08,
  599. ds1307->regs[1]);
  600. dev_warn(&client->dev,
  601. "oscillator stop detected - SET TIME!\n");
  602. }
  603. if (ds1307->regs[1] & RX8025_BIT_PON) {
  604. ds1307->regs[1] &= ~RX8025_BIT_PON;
  605. i2c_smbus_write_byte_data(client,
  606. RX8025_REG_CTRL2 << 4 | 0x08,
  607. ds1307->regs[1]);
  608. dev_warn(&client->dev, "power-on detected\n");
  609. }
  610. if (ds1307->regs[1] & RX8025_BIT_VDET) {
  611. ds1307->regs[1] &= ~RX8025_BIT_VDET;
  612. i2c_smbus_write_byte_data(client,
  613. RX8025_REG_CTRL2 << 4 | 0x08,
  614. ds1307->regs[1]);
  615. dev_warn(&client->dev, "voltage drop detected\n");
  616. }
  617. /* make sure we are running in 24hour mode */
  618. if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
  619. u8 hour;
  620. /* switch to 24 hour mode */
  621. i2c_smbus_write_byte_data(client,
  622. RX8025_REG_CTRL1 << 4 | 0x08,
  623. ds1307->regs[0] |
  624. RX8025_BIT_2412);
  625. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  626. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  627. if (tmp != 2) {
  628. pr_debug("read error %d\n", tmp);
  629. err = -EIO;
  630. goto exit_free;
  631. }
  632. /* correct hour */
  633. hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
  634. if (hour == 12)
  635. hour = 0;
  636. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  637. hour += 12;
  638. i2c_smbus_write_byte_data(client,
  639. DS1307_REG_HOUR << 4 | 0x08,
  640. hour);
  641. }
  642. break;
  643. case ds_1388:
  644. ds1307->offset = 1; /* Seconds starts at 1 */
  645. break;
  646. default:
  647. break;
  648. }
  649. read_rtc:
  650. /* read RTC registers */
  651. tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
  652. if (tmp != 8) {
  653. pr_debug("read error %d\n", tmp);
  654. err = -EIO;
  655. goto exit_free;
  656. }
  657. /* minimal sanity checking; some chips (like DS1340) don't
  658. * specify the extra bits as must-be-zero, but there are
  659. * still a few values that are clearly out-of-range.
  660. */
  661. tmp = ds1307->regs[DS1307_REG_SECS];
  662. switch (ds1307->type) {
  663. case ds_1307:
  664. case m41t00:
  665. /* clock halted? turn it on, so clock can tick. */
  666. if (tmp & DS1307_BIT_CH) {
  667. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  668. dev_warn(&client->dev, "SET TIME!\n");
  669. goto read_rtc;
  670. }
  671. break;
  672. case ds_1338:
  673. /* clock halted? turn it on, so clock can tick. */
  674. if (tmp & DS1307_BIT_CH)
  675. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  676. /* oscillator fault? clear flag, and warn */
  677. if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
  678. i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
  679. ds1307->regs[DS1307_REG_CONTROL]
  680. & ~DS1338_BIT_OSF);
  681. dev_warn(&client->dev, "SET TIME!\n");
  682. goto read_rtc;
  683. }
  684. break;
  685. case ds_1340:
  686. /* clock halted? turn it on, so clock can tick. */
  687. if (tmp & DS1340_BIT_nEOSC)
  688. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  689. tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
  690. if (tmp < 0) {
  691. pr_debug("read error %d\n", tmp);
  692. err = -EIO;
  693. goto exit_free;
  694. }
  695. /* oscillator fault? clear flag, and warn */
  696. if (tmp & DS1340_BIT_OSF) {
  697. i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
  698. dev_warn(&client->dev, "SET TIME!\n");
  699. }
  700. break;
  701. case mcp7941x:
  702. /* make sure that the backup battery is enabled */
  703. if (!(ds1307->regs[DS1307_REG_WDAY] & MCP7941X_BIT_VBATEN)) {
  704. i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
  705. ds1307->regs[DS1307_REG_WDAY]
  706. | MCP7941X_BIT_VBATEN);
  707. }
  708. /* clock halted? turn it on, so clock can tick. */
  709. if (!(tmp & MCP7941X_BIT_ST)) {
  710. i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
  711. MCP7941X_BIT_ST);
  712. dev_warn(&client->dev, "SET TIME!\n");
  713. goto read_rtc;
  714. }
  715. break;
  716. default:
  717. break;
  718. }
  719. tmp = ds1307->regs[DS1307_REG_HOUR];
  720. switch (ds1307->type) {
  721. case ds_1340:
  722. case m41t00:
  723. /* NOTE: ignores century bits; fix before deploying
  724. * systems that will run through year 2100.
  725. */
  726. break;
  727. case rx_8025:
  728. break;
  729. default:
  730. if (!(tmp & DS1307_BIT_12HR))
  731. break;
  732. /* Be sure we're in 24 hour mode. Multi-master systems
  733. * take note...
  734. */
  735. tmp = bcd2bin(tmp & 0x1f);
  736. if (tmp == 12)
  737. tmp = 0;
  738. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  739. tmp += 12;
  740. i2c_smbus_write_byte_data(client,
  741. ds1307->offset + DS1307_REG_HOUR,
  742. bin2bcd(tmp));
  743. }
  744. ds1307->rtc = rtc_device_register(client->name, &client->dev,
  745. &ds13xx_rtc_ops, THIS_MODULE);
  746. if (IS_ERR(ds1307->rtc)) {
  747. err = PTR_ERR(ds1307->rtc);
  748. dev_err(&client->dev,
  749. "unable to register the class device\n");
  750. goto exit_free;
  751. }
  752. if (want_irq) {
  753. err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,
  754. ds1307->rtc->name, client);
  755. if (err) {
  756. dev_err(&client->dev,
  757. "unable to request IRQ!\n");
  758. goto exit_irq;
  759. }
  760. device_set_wakeup_capable(&client->dev, 1);
  761. set_bit(HAS_ALARM, &ds1307->flags);
  762. dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
  763. }
  764. if (chip->nvram56) {
  765. err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
  766. if (err == 0) {
  767. set_bit(HAS_NVRAM, &ds1307->flags);
  768. dev_info(&client->dev, "56 bytes nvram\n");
  769. }
  770. }
  771. return 0;
  772. exit_irq:
  773. rtc_device_unregister(ds1307->rtc);
  774. exit_free:
  775. kfree(ds1307);
  776. return err;
  777. }
  778. static int __devexit ds1307_remove(struct i2c_client *client)
  779. {
  780. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  781. if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
  782. free_irq(client->irq, client);
  783. cancel_work_sync(&ds1307->work);
  784. }
  785. if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
  786. sysfs_remove_bin_file(&client->dev.kobj, &nvram);
  787. rtc_device_unregister(ds1307->rtc);
  788. kfree(ds1307);
  789. return 0;
  790. }
  791. static struct i2c_driver ds1307_driver = {
  792. .driver = {
  793. .name = "rtc-ds1307",
  794. .owner = THIS_MODULE,
  795. },
  796. .probe = ds1307_probe,
  797. .remove = __devexit_p(ds1307_remove),
  798. .id_table = ds1307_id,
  799. };
  800. module_i2c_driver(ds1307_driver);
  801. MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
  802. MODULE_LICENSE("GPL");