board-armadillo800eva.c 30 KB

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  1. /*
  2. * armadillo 800 eva board support
  3. *
  4. * Copyright (C) 2012 Renesas Solutions Corp.
  5. * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. *
  20. */
  21. #include <linux/clk.h>
  22. #include <linux/delay.h>
  23. #include <linux/err.h>
  24. #include <linux/kernel.h>
  25. #include <linux/input.h>
  26. #include <linux/irq.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/gpio.h>
  29. #include <linux/gpio_keys.h>
  30. #include <linux/regulator/fixed.h>
  31. #include <linux/regulator/machine.h>
  32. #include <linux/sh_eth.h>
  33. #include <linux/videodev2.h>
  34. #include <linux/usb/renesas_usbhs.h>
  35. #include <linux/mfd/tmio.h>
  36. #include <linux/mmc/host.h>
  37. #include <linux/mmc/sh_mmcif.h>
  38. #include <linux/mmc/sh_mobile_sdhi.h>
  39. #include <linux/i2c-gpio.h>
  40. #include <mach/common.h>
  41. #include <mach/irqs.h>
  42. #include <mach/r8a7740.h>
  43. #include <media/mt9t112.h>
  44. #include <media/sh_mobile_ceu.h>
  45. #include <media/soc_camera.h>
  46. #include <asm/page.h>
  47. #include <asm/mach-types.h>
  48. #include <asm/mach/arch.h>
  49. #include <asm/mach/map.h>
  50. #include <asm/mach/time.h>
  51. #include <asm/hardware/cache-l2x0.h>
  52. #include <video/sh_mobile_lcdc.h>
  53. #include <video/sh_mobile_hdmi.h>
  54. #include <sound/sh_fsi.h>
  55. #include <sound/simple_card.h>
  56. /*
  57. * CON1 Camera Module
  58. * CON2 Extension Bus
  59. * CON3 HDMI Output
  60. * CON4 Composite Video Output
  61. * CON5 H-UDI JTAG
  62. * CON6 ARM JTAG
  63. * CON7 SD1
  64. * CON8 SD2
  65. * CON9 RTC BackUp
  66. * CON10 Monaural Mic Input
  67. * CON11 Stereo Headphone Output
  68. * CON12 Audio Line Output(L)
  69. * CON13 Audio Line Output(R)
  70. * CON14 AWL13 Module
  71. * CON15 Extension
  72. * CON16 LCD1
  73. * CON17 LCD2
  74. * CON19 Power Input
  75. * CON20 USB1
  76. * CON21 USB2
  77. * CON22 Serial
  78. * CON23 LAN
  79. * CON24 USB3
  80. * LED1 Camera LED(Yellow)
  81. * LED2 Power LED (Green)
  82. * ED3-LED6 User LED(Yellow)
  83. * LED7 LAN link LED(Green)
  84. * LED8 LAN activity LED(Yellow)
  85. */
  86. /*
  87. * DipSwitch
  88. *
  89. * SW1
  90. *
  91. * -12345678-+---------------+----------------------------
  92. * 1 | boot | hermit
  93. * 0 | boot | OS auto boot
  94. * -12345678-+---------------+----------------------------
  95. * 00 | boot device | eMMC
  96. * 10 | boot device | SDHI0 (CON7)
  97. * 01 | boot device | -
  98. * 11 | boot device | Extension Buss (CS0)
  99. * -12345678-+---------------+----------------------------
  100. * 0 | Extension Bus | D8-D15 disable, eMMC enable
  101. * 1 | Extension Bus | D8-D15 enable, eMMC disable
  102. * -12345678-+---------------+----------------------------
  103. * 0 | SDHI1 | COM8 disable, COM14 enable
  104. * 1 | SDHI1 | COM8 enable, COM14 disable
  105. * -12345678-+---------------+----------------------------
  106. * 0 | USB0 | COM20 enable, COM24 disable
  107. * 1 | USB0 | COM20 disable, COM24 enable
  108. * -12345678-+---------------+----------------------------
  109. * 00 | JTAG | SH-X2
  110. * 10 | JTAG | ARM
  111. * 01 | JTAG | -
  112. * 11 | JTAG | Boundary Scan
  113. *-----------+---------------+----------------------------
  114. */
  115. /*
  116. * FSI-WM8978
  117. *
  118. * this command is required when playback.
  119. *
  120. * # amixer set "Headphone" 50
  121. */
  122. /*
  123. * USB function
  124. *
  125. * When you use USB Function,
  126. * set SW1.6 ON, and connect cable to CN24.
  127. *
  128. * USBF needs workaround on R8A7740 chip.
  129. * These are a little bit complex.
  130. * see
  131. * usbhsf_power_ctrl()
  132. */
  133. #define IRQ7 evt2irq(0x02e0)
  134. #define USBCR1 0xe605810a
  135. #define USBH 0xC6700000
  136. #define USBH_USBCTR 0x10834
  137. struct usbhsf_private {
  138. struct clk *phy;
  139. struct clk *usb24;
  140. struct clk *pci;
  141. struct clk *func;
  142. struct clk *host;
  143. void __iomem *usbh_base;
  144. struct renesas_usbhs_platform_info info;
  145. };
  146. #define usbhsf_get_priv(pdev) \
  147. container_of(renesas_usbhs_get_info(pdev), \
  148. struct usbhsf_private, info)
  149. static int usbhsf_get_id(struct platform_device *pdev)
  150. {
  151. return USBHS_GADGET;
  152. }
  153. static void usbhsf_power_ctrl(struct platform_device *pdev,
  154. void __iomem *base, int enable)
  155. {
  156. struct usbhsf_private *priv = usbhsf_get_priv(pdev);
  157. /*
  158. * Work around for USB Function.
  159. * It needs USB host clock, and settings
  160. */
  161. if (enable) {
  162. /*
  163. * enable all the related usb clocks
  164. * for usb workaround
  165. */
  166. clk_enable(priv->usb24);
  167. clk_enable(priv->pci);
  168. clk_enable(priv->host);
  169. clk_enable(priv->func);
  170. clk_enable(priv->phy);
  171. /*
  172. * set USBCR1
  173. *
  174. * Port1 is driven by USB function,
  175. * Port2 is driven by USB HOST
  176. * One HOST (Port1 or Port2 is HOST)
  177. * USB PLL input clock = 24MHz
  178. */
  179. __raw_writew(0xd750, USBCR1);
  180. mdelay(1);
  181. /*
  182. * start USB Host
  183. */
  184. __raw_writel(0x0000000c, priv->usbh_base + USBH_USBCTR);
  185. __raw_writel(0x00000008, priv->usbh_base + USBH_USBCTR);
  186. mdelay(10);
  187. /*
  188. * USB PHY Power ON
  189. */
  190. __raw_writew(0xd770, USBCR1);
  191. __raw_writew(0x4000, base + 0x102); /* USBF :: SUSPMODE */
  192. } else {
  193. __raw_writel(0x0000010f, priv->usbh_base + USBH_USBCTR);
  194. __raw_writew(0xd7c0, USBCR1); /* GPIO */
  195. clk_disable(priv->phy);
  196. clk_disable(priv->func); /* usb work around */
  197. clk_disable(priv->host); /* usb work around */
  198. clk_disable(priv->pci); /* usb work around */
  199. clk_disable(priv->usb24); /* usb work around */
  200. }
  201. }
  202. static int usbhsf_get_vbus(struct platform_device *pdev)
  203. {
  204. return gpio_get_value(GPIO_PORT209);
  205. }
  206. static irqreturn_t usbhsf_interrupt(int irq, void *data)
  207. {
  208. struct platform_device *pdev = data;
  209. renesas_usbhs_call_notify_hotplug(pdev);
  210. return IRQ_HANDLED;
  211. }
  212. static void usbhsf_hardware_exit(struct platform_device *pdev)
  213. {
  214. struct usbhsf_private *priv = usbhsf_get_priv(pdev);
  215. if (!IS_ERR(priv->phy))
  216. clk_put(priv->phy);
  217. if (!IS_ERR(priv->usb24))
  218. clk_put(priv->usb24);
  219. if (!IS_ERR(priv->pci))
  220. clk_put(priv->pci);
  221. if (!IS_ERR(priv->host))
  222. clk_put(priv->host);
  223. if (!IS_ERR(priv->func))
  224. clk_put(priv->func);
  225. if (priv->usbh_base)
  226. iounmap(priv->usbh_base);
  227. priv->phy = NULL;
  228. priv->usb24 = NULL;
  229. priv->pci = NULL;
  230. priv->host = NULL;
  231. priv->func = NULL;
  232. priv->usbh_base = NULL;
  233. free_irq(IRQ7, pdev);
  234. }
  235. static int usbhsf_hardware_init(struct platform_device *pdev)
  236. {
  237. struct usbhsf_private *priv = usbhsf_get_priv(pdev);
  238. int ret;
  239. priv->phy = clk_get(&pdev->dev, "phy");
  240. priv->usb24 = clk_get(&pdev->dev, "usb24");
  241. priv->pci = clk_get(&pdev->dev, "pci");
  242. priv->func = clk_get(&pdev->dev, "func");
  243. priv->host = clk_get(&pdev->dev, "host");
  244. priv->usbh_base = ioremap_nocache(USBH, 0x20000);
  245. if (IS_ERR(priv->phy) ||
  246. IS_ERR(priv->usb24) ||
  247. IS_ERR(priv->pci) ||
  248. IS_ERR(priv->host) ||
  249. IS_ERR(priv->func) ||
  250. !priv->usbh_base) {
  251. dev_err(&pdev->dev, "USB clock setting failed\n");
  252. usbhsf_hardware_exit(pdev);
  253. return -EIO;
  254. }
  255. ret = request_irq(IRQ7, usbhsf_interrupt, IRQF_TRIGGER_NONE,
  256. dev_name(&pdev->dev), pdev);
  257. if (ret) {
  258. dev_err(&pdev->dev, "request_irq err\n");
  259. return ret;
  260. }
  261. irq_set_irq_type(IRQ7, IRQ_TYPE_EDGE_BOTH);
  262. /* usb24 use 1/1 of parent clock (= usb24s = 24MHz) */
  263. clk_set_rate(priv->usb24,
  264. clk_get_rate(clk_get_parent(priv->usb24)));
  265. return 0;
  266. }
  267. static struct usbhsf_private usbhsf_private = {
  268. .info = {
  269. .platform_callback = {
  270. .get_id = usbhsf_get_id,
  271. .get_vbus = usbhsf_get_vbus,
  272. .hardware_init = usbhsf_hardware_init,
  273. .hardware_exit = usbhsf_hardware_exit,
  274. .power_ctrl = usbhsf_power_ctrl,
  275. },
  276. .driver_param = {
  277. .buswait_bwait = 5,
  278. .detection_delay = 5,
  279. .d0_rx_id = SHDMA_SLAVE_USBHS_RX,
  280. .d1_tx_id = SHDMA_SLAVE_USBHS_TX,
  281. },
  282. }
  283. };
  284. static struct resource usbhsf_resources[] = {
  285. {
  286. .name = "USBHS",
  287. .start = 0xe6890000,
  288. .end = 0xe6890104 - 1,
  289. .flags = IORESOURCE_MEM,
  290. },
  291. {
  292. .start = evt2irq(0x0A20),
  293. .flags = IORESOURCE_IRQ,
  294. },
  295. };
  296. static struct platform_device usbhsf_device = {
  297. .name = "renesas_usbhs",
  298. .dev = {
  299. .platform_data = &usbhsf_private.info,
  300. },
  301. .id = -1,
  302. .num_resources = ARRAY_SIZE(usbhsf_resources),
  303. .resource = usbhsf_resources,
  304. };
  305. /* Ether */
  306. static struct sh_eth_plat_data sh_eth_platdata = {
  307. .phy = 0x00, /* LAN8710A */
  308. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  309. .register_type = SH_ETH_REG_GIGABIT,
  310. .phy_interface = PHY_INTERFACE_MODE_MII,
  311. };
  312. static struct resource sh_eth_resources[] = {
  313. {
  314. .start = 0xe9a00000,
  315. .end = 0xe9a00800 - 1,
  316. .flags = IORESOURCE_MEM,
  317. }, {
  318. .start = 0xe9a01800,
  319. .end = 0xe9a02000 - 1,
  320. .flags = IORESOURCE_MEM,
  321. }, {
  322. .start = evt2irq(0x0500),
  323. .flags = IORESOURCE_IRQ,
  324. },
  325. };
  326. static struct platform_device sh_eth_device = {
  327. .name = "sh-eth",
  328. .id = -1,
  329. .dev = {
  330. .platform_data = &sh_eth_platdata,
  331. },
  332. .resource = sh_eth_resources,
  333. .num_resources = ARRAY_SIZE(sh_eth_resources),
  334. };
  335. /* LCDC */
  336. static struct fb_videomode lcdc0_mode = {
  337. .name = "AMPIER/AM-800480",
  338. .xres = 800,
  339. .yres = 480,
  340. .left_margin = 88,
  341. .right_margin = 40,
  342. .hsync_len = 128,
  343. .upper_margin = 20,
  344. .lower_margin = 5,
  345. .vsync_len = 5,
  346. .sync = 0,
  347. };
  348. static struct sh_mobile_lcdc_info lcdc0_info = {
  349. .clock_source = LCDC_CLK_BUS,
  350. .ch[0] = {
  351. .chan = LCDC_CHAN_MAINLCD,
  352. .fourcc = V4L2_PIX_FMT_RGB565,
  353. .interface_type = RGB24,
  354. .clock_divider = 5,
  355. .flags = 0,
  356. .lcd_modes = &lcdc0_mode,
  357. .num_modes = 1,
  358. .panel_cfg = {
  359. .width = 111,
  360. .height = 68,
  361. },
  362. },
  363. };
  364. static struct resource lcdc0_resources[] = {
  365. [0] = {
  366. .name = "LCD0",
  367. .start = 0xfe940000,
  368. .end = 0xfe943fff,
  369. .flags = IORESOURCE_MEM,
  370. },
  371. [1] = {
  372. .start = intcs_evt2irq(0x580),
  373. .flags = IORESOURCE_IRQ,
  374. },
  375. };
  376. static struct platform_device lcdc0_device = {
  377. .name = "sh_mobile_lcdc_fb",
  378. .num_resources = ARRAY_SIZE(lcdc0_resources),
  379. .resource = lcdc0_resources,
  380. .id = 0,
  381. .dev = {
  382. .platform_data = &lcdc0_info,
  383. .coherent_dma_mask = ~0,
  384. },
  385. };
  386. /*
  387. * LCDC1/HDMI
  388. */
  389. static struct sh_mobile_hdmi_info hdmi_info = {
  390. .flags = HDMI_OUTPUT_PUSH_PULL |
  391. HDMI_OUTPUT_POLARITY_HI |
  392. HDMI_32BIT_REG |
  393. HDMI_HAS_HTOP1 |
  394. HDMI_SND_SRC_SPDIF,
  395. };
  396. static struct resource hdmi_resources[] = {
  397. [0] = {
  398. .name = "HDMI",
  399. .start = 0xe6be0000,
  400. .end = 0xe6be03ff,
  401. .flags = IORESOURCE_MEM,
  402. },
  403. [1] = {
  404. .start = evt2irq(0x1700),
  405. .flags = IORESOURCE_IRQ,
  406. },
  407. [2] = {
  408. .name = "HDMI emma3pf",
  409. .start = 0xe6be4000,
  410. .end = 0xe6be43ff,
  411. .flags = IORESOURCE_MEM,
  412. },
  413. };
  414. static struct platform_device hdmi_device = {
  415. .name = "sh-mobile-hdmi",
  416. .num_resources = ARRAY_SIZE(hdmi_resources),
  417. .resource = hdmi_resources,
  418. .id = -1,
  419. .dev = {
  420. .platform_data = &hdmi_info,
  421. },
  422. };
  423. static const struct fb_videomode lcdc1_mode = {
  424. .name = "HDMI 720p",
  425. .xres = 1280,
  426. .yres = 720,
  427. .pixclock = 13468,
  428. .left_margin = 220,
  429. .right_margin = 110,
  430. .hsync_len = 40,
  431. .upper_margin = 20,
  432. .lower_margin = 5,
  433. .vsync_len = 5,
  434. .refresh = 60,
  435. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  436. };
  437. static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
  438. .clock_source = LCDC_CLK_PERIPHERAL, /* HDMI clock */
  439. .ch[0] = {
  440. .chan = LCDC_CHAN_MAINLCD,
  441. .fourcc = V4L2_PIX_FMT_RGB565,
  442. .interface_type = RGB24,
  443. .clock_divider = 1,
  444. .flags = LCDC_FLAGS_DWPOL,
  445. .lcd_modes = &lcdc1_mode,
  446. .num_modes = 1,
  447. .tx_dev = &hdmi_device,
  448. .panel_cfg = {
  449. .width = 1280,
  450. .height = 720,
  451. },
  452. },
  453. };
  454. static struct resource hdmi_lcdc_resources[] = {
  455. [0] = {
  456. .name = "LCDC1",
  457. .start = 0xfe944000,
  458. .end = 0xfe948000 - 1,
  459. .flags = IORESOURCE_MEM,
  460. },
  461. [1] = {
  462. .start = intcs_evt2irq(0x1780),
  463. .flags = IORESOURCE_IRQ,
  464. },
  465. };
  466. static struct platform_device hdmi_lcdc_device = {
  467. .name = "sh_mobile_lcdc_fb",
  468. .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
  469. .resource = hdmi_lcdc_resources,
  470. .id = 1,
  471. .dev = {
  472. .platform_data = &hdmi_lcdc_info,
  473. .coherent_dma_mask = ~0,
  474. },
  475. };
  476. /* GPIO KEY */
  477. #define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
  478. static struct gpio_keys_button gpio_buttons[] = {
  479. GPIO_KEY(KEY_POWER, GPIO_PORT99, "SW1"),
  480. GPIO_KEY(KEY_BACK, GPIO_PORT100, "SW2"),
  481. GPIO_KEY(KEY_MENU, GPIO_PORT97, "SW3"),
  482. GPIO_KEY(KEY_HOME, GPIO_PORT98, "SW4"),
  483. };
  484. static struct gpio_keys_platform_data gpio_key_info = {
  485. .buttons = gpio_buttons,
  486. .nbuttons = ARRAY_SIZE(gpio_buttons),
  487. };
  488. static struct platform_device gpio_keys_device = {
  489. .name = "gpio-keys",
  490. .id = -1,
  491. .dev = {
  492. .platform_data = &gpio_key_info,
  493. },
  494. };
  495. /* Fixed 3.3V regulator to be used by SDHI0, SDHI1, MMCIF */
  496. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  497. {
  498. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
  499. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
  500. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
  501. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
  502. REGULATOR_SUPPLY("vmmc", "sh_mmcif"),
  503. REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
  504. };
  505. /* SDHI0 */
  506. /*
  507. * FIXME
  508. *
  509. * It use polling mode here, since
  510. * CD (= Card Detect) pin is not connected to SDHI0_CD.
  511. * We can use IRQ31 as card detect irq,
  512. * but it needs chattering removal operation
  513. */
  514. #define IRQ31 evt2irq(0x33E0)
  515. static struct sh_mobile_sdhi_info sdhi0_info = {
  516. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  517. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  518. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |\
  519. MMC_CAP_NEEDS_POLL,
  520. .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  521. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  522. };
  523. static struct resource sdhi0_resources[] = {
  524. {
  525. .name = "SDHI0",
  526. .start = 0xe6850000,
  527. .end = 0xe6850100 - 1,
  528. .flags = IORESOURCE_MEM,
  529. },
  530. /*
  531. * no SH_MOBILE_SDHI_IRQ_CARD_DETECT here
  532. */
  533. {
  534. .name = SH_MOBILE_SDHI_IRQ_SDCARD,
  535. .start = evt2irq(0x0E20),
  536. .flags = IORESOURCE_IRQ,
  537. },
  538. {
  539. .name = SH_MOBILE_SDHI_IRQ_SDIO,
  540. .start = evt2irq(0x0E40),
  541. .flags = IORESOURCE_IRQ,
  542. },
  543. };
  544. static struct platform_device sdhi0_device = {
  545. .name = "sh_mobile_sdhi",
  546. .id = 0,
  547. .dev = {
  548. .platform_data = &sdhi0_info,
  549. },
  550. .num_resources = ARRAY_SIZE(sdhi0_resources),
  551. .resource = sdhi0_resources,
  552. };
  553. /* SDHI1 */
  554. static struct sh_mobile_sdhi_info sdhi1_info = {
  555. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  556. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  557. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  558. .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  559. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  560. };
  561. static struct resource sdhi1_resources[] = {
  562. [0] = {
  563. .name = "SDHI1",
  564. .start = 0xe6860000,
  565. .end = 0xe6860100 - 1,
  566. .flags = IORESOURCE_MEM,
  567. },
  568. [1] = {
  569. .start = evt2irq(0x0E80),
  570. .flags = IORESOURCE_IRQ,
  571. },
  572. [2] = {
  573. .start = evt2irq(0x0EA0),
  574. .flags = IORESOURCE_IRQ,
  575. },
  576. [3] = {
  577. .start = evt2irq(0x0EC0),
  578. .flags = IORESOURCE_IRQ,
  579. },
  580. };
  581. static struct platform_device sdhi1_device = {
  582. .name = "sh_mobile_sdhi",
  583. .id = 1,
  584. .dev = {
  585. .platform_data = &sdhi1_info,
  586. },
  587. .num_resources = ARRAY_SIZE(sdhi1_resources),
  588. .resource = sdhi1_resources,
  589. };
  590. /* MMCIF */
  591. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  592. .sup_pclk = 0,
  593. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  594. .caps = MMC_CAP_4_BIT_DATA |
  595. MMC_CAP_8_BIT_DATA |
  596. MMC_CAP_NONREMOVABLE,
  597. };
  598. static struct resource sh_mmcif_resources[] = {
  599. [0] = {
  600. .name = "MMCIF",
  601. .start = 0xe6bd0000,
  602. .end = 0xe6bd0100 - 1,
  603. .flags = IORESOURCE_MEM,
  604. },
  605. [1] = {
  606. /* MMC ERR */
  607. .start = evt2irq(0x1AC0),
  608. .flags = IORESOURCE_IRQ,
  609. },
  610. [2] = {
  611. /* MMC NOR */
  612. .start = evt2irq(0x1AE0),
  613. .flags = IORESOURCE_IRQ,
  614. },
  615. };
  616. static struct platform_device sh_mmcif_device = {
  617. .name = "sh_mmcif",
  618. .id = -1,
  619. .dev = {
  620. .platform_data = &sh_mmcif_plat,
  621. },
  622. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  623. .resource = sh_mmcif_resources,
  624. };
  625. /* Camera */
  626. static int mt9t111_power(struct device *dev, int mode)
  627. {
  628. struct clk *mclk = clk_get(NULL, "video1");
  629. if (IS_ERR(mclk)) {
  630. dev_err(dev, "can't get video1 clock\n");
  631. return -EINVAL;
  632. }
  633. if (mode) {
  634. /* video1 (= CON1 camera) expect 24MHz */
  635. clk_set_rate(mclk, clk_round_rate(mclk, 24000000));
  636. clk_enable(mclk);
  637. gpio_direction_output(GPIO_PORT158, 1);
  638. } else {
  639. gpio_direction_output(GPIO_PORT158, 0);
  640. clk_disable(mclk);
  641. }
  642. clk_put(mclk);
  643. return 0;
  644. }
  645. static struct i2c_board_info i2c_camera_mt9t111 = {
  646. I2C_BOARD_INFO("mt9t112", 0x3d),
  647. };
  648. static struct mt9t112_camera_info mt9t111_info = {
  649. .divider = { 16, 0, 0, 7, 0, 10, 14, 7, 7 },
  650. };
  651. static struct soc_camera_link mt9t111_link = {
  652. .i2c_adapter_id = 0,
  653. .bus_id = 0,
  654. .board_info = &i2c_camera_mt9t111,
  655. .power = mt9t111_power,
  656. .priv = &mt9t111_info,
  657. };
  658. static struct platform_device camera_device = {
  659. .name = "soc-camera-pdrv",
  660. .id = 0,
  661. .dev = {
  662. .platform_data = &mt9t111_link,
  663. },
  664. };
  665. /* CEU0 */
  666. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  667. .flags = SH_CEU_FLAG_LOWER_8BIT,
  668. };
  669. static struct resource ceu0_resources[] = {
  670. [0] = {
  671. .name = "CEU",
  672. .start = 0xfe910000,
  673. .end = 0xfe91009f,
  674. .flags = IORESOURCE_MEM,
  675. },
  676. [1] = {
  677. .start = intcs_evt2irq(0x0500),
  678. .flags = IORESOURCE_IRQ,
  679. },
  680. [2] = {
  681. /* place holder for contiguous memory */
  682. },
  683. };
  684. static struct platform_device ceu0_device = {
  685. .name = "sh_mobile_ceu",
  686. .id = 0,
  687. .num_resources = ARRAY_SIZE(ceu0_resources),
  688. .resource = ceu0_resources,
  689. .dev = {
  690. .platform_data = &sh_mobile_ceu0_info,
  691. .coherent_dma_mask = 0xffffffff,
  692. },
  693. };
  694. /* FSI */
  695. static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
  696. {
  697. struct clk *fsib;
  698. int ret;
  699. /* it support 48KHz only */
  700. if (48000 != rate)
  701. return -EINVAL;
  702. fsib = clk_get(dev, "ickb");
  703. if (IS_ERR(fsib))
  704. return -EINVAL;
  705. if (enable) {
  706. ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  707. clk_enable(fsib);
  708. } else {
  709. ret = 0;
  710. clk_disable(fsib);
  711. }
  712. clk_put(fsib);
  713. return ret;
  714. }
  715. static struct sh_fsi_platform_info fsi_info = {
  716. /* FSI-WM8978 */
  717. .port_a = {
  718. .tx_id = SHDMA_SLAVE_FSIA_TX,
  719. },
  720. /* FSI-HDMI */
  721. .port_b = {
  722. .flags = SH_FSI_FMT_SPDIF |
  723. SH_FSI_ENABLE_STREAM_MODE,
  724. .set_rate = fsi_hdmi_set_rate,
  725. .tx_id = SHDMA_SLAVE_FSIB_TX,
  726. }
  727. };
  728. static struct resource fsi_resources[] = {
  729. [0] = {
  730. .name = "FSI",
  731. .start = 0xfe1f0000,
  732. .end = 0xfe1f8400 - 1,
  733. .flags = IORESOURCE_MEM,
  734. },
  735. [1] = {
  736. .start = evt2irq(0x1840),
  737. .flags = IORESOURCE_IRQ,
  738. },
  739. };
  740. static struct platform_device fsi_device = {
  741. .name = "sh_fsi2",
  742. .id = -1,
  743. .num_resources = ARRAY_SIZE(fsi_resources),
  744. .resource = fsi_resources,
  745. .dev = {
  746. .platform_data = &fsi_info,
  747. },
  748. };
  749. /* FSI-WM8978 */
  750. static struct asoc_simple_dai_init_info fsi_wm8978_init_info = {
  751. .fmt = SND_SOC_DAIFMT_I2S,
  752. .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_NB_NF,
  753. .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
  754. .sysclk = 12288000,
  755. };
  756. static struct asoc_simple_card_info fsi_wm8978_info = {
  757. .name = "wm8978",
  758. .card = "FSI2A-WM8978",
  759. .cpu_dai = "fsia-dai",
  760. .codec = "wm8978.0-001a",
  761. .platform = "sh_fsi2",
  762. .codec_dai = "wm8978-hifi",
  763. .init = &fsi_wm8978_init_info,
  764. };
  765. static struct platform_device fsi_wm8978_device = {
  766. .name = "asoc-simple-card",
  767. .id = 0,
  768. .dev = {
  769. .platform_data = &fsi_wm8978_info,
  770. },
  771. };
  772. /* FSI-HDMI */
  773. static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
  774. .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  775. };
  776. static struct asoc_simple_card_info fsi2_hdmi_info = {
  777. .name = "HDMI",
  778. .card = "FSI2B-HDMI",
  779. .cpu_dai = "fsib-dai",
  780. .codec = "sh-mobile-hdmi",
  781. .platform = "sh_fsi2",
  782. .codec_dai = "sh_mobile_hdmi-hifi",
  783. .init = &fsi2_hdmi_init_info,
  784. };
  785. static struct platform_device fsi_hdmi_device = {
  786. .name = "asoc-simple-card",
  787. .id = 1,
  788. .dev = {
  789. .platform_data = &fsi2_hdmi_info,
  790. },
  791. };
  792. /* RTC: RTC connects i2c-gpio. */
  793. static struct i2c_gpio_platform_data i2c_gpio_data = {
  794. .sda_pin = GPIO_PORT208,
  795. .scl_pin = GPIO_PORT91,
  796. .udelay = 5, /* 100 kHz */
  797. };
  798. static struct platform_device i2c_gpio_device = {
  799. .name = "i2c-gpio",
  800. .id = 2,
  801. .dev = {
  802. .platform_data = &i2c_gpio_data,
  803. },
  804. };
  805. /* I2C */
  806. static struct i2c_board_info i2c0_devices[] = {
  807. {
  808. I2C_BOARD_INFO("st1232-ts", 0x55),
  809. .irq = evt2irq(0x0340),
  810. },
  811. {
  812. I2C_BOARD_INFO("wm8978", 0x1a),
  813. },
  814. };
  815. static struct i2c_board_info i2c2_devices[] = {
  816. {
  817. I2C_BOARD_INFO("s35390a", 0x30),
  818. .type = "s35390a",
  819. },
  820. };
  821. /*
  822. * board devices
  823. */
  824. static struct platform_device *eva_devices[] __initdata = {
  825. &lcdc0_device,
  826. &gpio_keys_device,
  827. &sh_eth_device,
  828. &sdhi0_device,
  829. &sh_mmcif_device,
  830. &hdmi_device,
  831. &hdmi_lcdc_device,
  832. &camera_device,
  833. &ceu0_device,
  834. &fsi_device,
  835. &fsi_hdmi_device,
  836. &fsi_wm8978_device,
  837. &i2c_gpio_device,
  838. };
  839. static void __init eva_clock_init(void)
  840. {
  841. struct clk *system = clk_get(NULL, "system_clk");
  842. struct clk *xtal1 = clk_get(NULL, "extal1");
  843. struct clk *usb24s = clk_get(NULL, "usb24s");
  844. struct clk *fsibck = clk_get(NULL, "fsibck");
  845. struct clk *fsib = clk_get(&fsi_device.dev, "ickb");
  846. if (IS_ERR(system) ||
  847. IS_ERR(xtal1) ||
  848. IS_ERR(usb24s) ||
  849. IS_ERR(fsibck) ||
  850. IS_ERR(fsib)) {
  851. pr_err("armadillo800eva board clock init failed\n");
  852. goto clock_error;
  853. }
  854. /* armadillo 800 eva extal1 is 24MHz */
  855. clk_set_rate(xtal1, 24000000);
  856. /* usb24s use extal1 (= system) clock (= 24MHz) */
  857. clk_set_parent(usb24s, system);
  858. /* FSIBCK is 12.288MHz, and it is parent of FSI-B */
  859. clk_set_parent(fsib, fsibck);
  860. clk_set_rate(fsibck, 12288000);
  861. clk_set_rate(fsib, 12288000);
  862. clock_error:
  863. if (!IS_ERR(system))
  864. clk_put(system);
  865. if (!IS_ERR(xtal1))
  866. clk_put(xtal1);
  867. if (!IS_ERR(usb24s))
  868. clk_put(usb24s);
  869. if (!IS_ERR(fsibck))
  870. clk_put(fsibck);
  871. if (!IS_ERR(fsib))
  872. clk_put(fsib);
  873. }
  874. /*
  875. * board init
  876. */
  877. #define GPIO_PORT7CR 0xe6050007
  878. #define GPIO_PORT8CR 0xe6050008
  879. static void __init eva_init(void)
  880. {
  881. struct platform_device *usb = NULL;
  882. regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
  883. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  884. r8a7740_pinmux_init();
  885. r8a7740_meram_workaround();
  886. /* SCIFA1 */
  887. gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
  888. gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
  889. /* LCDC0 */
  890. gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
  891. gpio_request(GPIO_FN_LCD0_D0, NULL);
  892. gpio_request(GPIO_FN_LCD0_D1, NULL);
  893. gpio_request(GPIO_FN_LCD0_D2, NULL);
  894. gpio_request(GPIO_FN_LCD0_D3, NULL);
  895. gpio_request(GPIO_FN_LCD0_D4, NULL);
  896. gpio_request(GPIO_FN_LCD0_D5, NULL);
  897. gpio_request(GPIO_FN_LCD0_D6, NULL);
  898. gpio_request(GPIO_FN_LCD0_D7, NULL);
  899. gpio_request(GPIO_FN_LCD0_D8, NULL);
  900. gpio_request(GPIO_FN_LCD0_D9, NULL);
  901. gpio_request(GPIO_FN_LCD0_D10, NULL);
  902. gpio_request(GPIO_FN_LCD0_D11, NULL);
  903. gpio_request(GPIO_FN_LCD0_D12, NULL);
  904. gpio_request(GPIO_FN_LCD0_D13, NULL);
  905. gpio_request(GPIO_FN_LCD0_D14, NULL);
  906. gpio_request(GPIO_FN_LCD0_D15, NULL);
  907. gpio_request(GPIO_FN_LCD0_D16, NULL);
  908. gpio_request(GPIO_FN_LCD0_D17, NULL);
  909. gpio_request(GPIO_FN_LCD0_D18_PORT40, NULL);
  910. gpio_request(GPIO_FN_LCD0_D19_PORT4, NULL);
  911. gpio_request(GPIO_FN_LCD0_D20_PORT3, NULL);
  912. gpio_request(GPIO_FN_LCD0_D21_PORT2, NULL);
  913. gpio_request(GPIO_FN_LCD0_D22_PORT0, NULL);
  914. gpio_request(GPIO_FN_LCD0_D23_PORT1, NULL);
  915. gpio_request(GPIO_FN_LCD0_DCK, NULL);
  916. gpio_request(GPIO_FN_LCD0_VSYN, NULL);
  917. gpio_request(GPIO_FN_LCD0_HSYN, NULL);
  918. gpio_request(GPIO_FN_LCD0_DISP, NULL);
  919. gpio_request(GPIO_FN_LCD0_LCLK_PORT165, NULL);
  920. gpio_request(GPIO_PORT61, NULL); /* LCDDON */
  921. gpio_direction_output(GPIO_PORT61, 1);
  922. gpio_request(GPIO_PORT202, NULL); /* LCD0_LED_CONT */
  923. gpio_direction_output(GPIO_PORT202, 0);
  924. /* Touchscreen */
  925. gpio_request(GPIO_FN_IRQ10, NULL); /* TP_INT */
  926. gpio_request(GPIO_PORT166, NULL); /* TP_RST_B */
  927. gpio_direction_output(GPIO_PORT166, 1);
  928. /* GETHER */
  929. gpio_request(GPIO_FN_ET_CRS, NULL);
  930. gpio_request(GPIO_FN_ET_MDC, NULL);
  931. gpio_request(GPIO_FN_ET_MDIO, NULL);
  932. gpio_request(GPIO_FN_ET_TX_ER, NULL);
  933. gpio_request(GPIO_FN_ET_RX_ER, NULL);
  934. gpio_request(GPIO_FN_ET_ERXD0, NULL);
  935. gpio_request(GPIO_FN_ET_ERXD1, NULL);
  936. gpio_request(GPIO_FN_ET_ERXD2, NULL);
  937. gpio_request(GPIO_FN_ET_ERXD3, NULL);
  938. gpio_request(GPIO_FN_ET_TX_CLK, NULL);
  939. gpio_request(GPIO_FN_ET_TX_EN, NULL);
  940. gpio_request(GPIO_FN_ET_ETXD0, NULL);
  941. gpio_request(GPIO_FN_ET_ETXD1, NULL);
  942. gpio_request(GPIO_FN_ET_ETXD2, NULL);
  943. gpio_request(GPIO_FN_ET_ETXD3, NULL);
  944. gpio_request(GPIO_FN_ET_PHY_INT, NULL);
  945. gpio_request(GPIO_FN_ET_COL, NULL);
  946. gpio_request(GPIO_FN_ET_RX_DV, NULL);
  947. gpio_request(GPIO_FN_ET_RX_CLK, NULL);
  948. gpio_request(GPIO_PORT18, NULL); /* PHY_RST */
  949. gpio_direction_output(GPIO_PORT18, 1);
  950. /* USB */
  951. gpio_request(GPIO_PORT159, NULL); /* USB_DEVICE_MODE */
  952. gpio_direction_input(GPIO_PORT159);
  953. if (gpio_get_value(GPIO_PORT159)) {
  954. /* USB Host */
  955. } else {
  956. /* USB Func */
  957. /*
  958. * A1 chip has 2 IRQ7 pin and it was controled by MSEL register.
  959. * OTOH, usbhs interrupt needs its value (HI/LOW) to decide
  960. * USB connection/disconnection (usbhsf_get_vbus()).
  961. * This means we needs to select GPIO_FN_IRQ7_PORT209 first,
  962. * and select GPIO_PORT209 here
  963. */
  964. gpio_request(GPIO_FN_IRQ7_PORT209, NULL);
  965. gpio_request(GPIO_PORT209, NULL);
  966. gpio_direction_input(GPIO_PORT209);
  967. platform_device_register(&usbhsf_device);
  968. usb = &usbhsf_device;
  969. }
  970. /* SDHI0 */
  971. gpio_request(GPIO_FN_SDHI0_CMD, NULL);
  972. gpio_request(GPIO_FN_SDHI0_CLK, NULL);
  973. gpio_request(GPIO_FN_SDHI0_D0, NULL);
  974. gpio_request(GPIO_FN_SDHI0_D1, NULL);
  975. gpio_request(GPIO_FN_SDHI0_D2, NULL);
  976. gpio_request(GPIO_FN_SDHI0_D3, NULL);
  977. gpio_request(GPIO_FN_SDHI0_WP, NULL);
  978. gpio_request(GPIO_PORT17, NULL); /* SDHI0_18/33_B */
  979. gpio_request(GPIO_PORT74, NULL); /* SDHI0_PON */
  980. gpio_request(GPIO_PORT75, NULL); /* SDSLOT1_PON */
  981. gpio_direction_output(GPIO_PORT17, 0);
  982. gpio_direction_output(GPIO_PORT74, 1);
  983. gpio_direction_output(GPIO_PORT75, 1);
  984. /* we can use GPIO_FN_IRQ31_PORT167 here for SDHI0 CD irq */
  985. /*
  986. * MMCIF
  987. *
  988. * Here doesn't care SW1.4 status,
  989. * since CON2 is not mounted.
  990. */
  991. gpio_request(GPIO_FN_MMC1_CLK_PORT103, NULL);
  992. gpio_request(GPIO_FN_MMC1_CMD_PORT104, NULL);
  993. gpio_request(GPIO_FN_MMC1_D0_PORT149, NULL);
  994. gpio_request(GPIO_FN_MMC1_D1_PORT148, NULL);
  995. gpio_request(GPIO_FN_MMC1_D2_PORT147, NULL);
  996. gpio_request(GPIO_FN_MMC1_D3_PORT146, NULL);
  997. gpio_request(GPIO_FN_MMC1_D4_PORT145, NULL);
  998. gpio_request(GPIO_FN_MMC1_D5_PORT144, NULL);
  999. gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL);
  1000. gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL);
  1001. /* CEU0 */
  1002. gpio_request(GPIO_FN_VIO0_D7, NULL);
  1003. gpio_request(GPIO_FN_VIO0_D6, NULL);
  1004. gpio_request(GPIO_FN_VIO0_D5, NULL);
  1005. gpio_request(GPIO_FN_VIO0_D4, NULL);
  1006. gpio_request(GPIO_FN_VIO0_D3, NULL);
  1007. gpio_request(GPIO_FN_VIO0_D2, NULL);
  1008. gpio_request(GPIO_FN_VIO0_D1, NULL);
  1009. gpio_request(GPIO_FN_VIO0_D0, NULL);
  1010. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  1011. gpio_request(GPIO_FN_VIO0_HD, NULL);
  1012. gpio_request(GPIO_FN_VIO0_VD, NULL);
  1013. gpio_request(GPIO_FN_VIO0_FIELD, NULL);
  1014. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1015. /* CON1/CON15 Camera */
  1016. gpio_request(GPIO_PORT173, NULL); /* STANDBY */
  1017. gpio_request(GPIO_PORT172, NULL); /* RST */
  1018. gpio_request(GPIO_PORT158, NULL); /* CAM_PON */
  1019. gpio_direction_output(GPIO_PORT173, 0);
  1020. gpio_direction_output(GPIO_PORT172, 1);
  1021. gpio_direction_output(GPIO_PORT158, 0); /* see mt9t111_power() */
  1022. /* FSI-WM8978 */
  1023. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1024. gpio_request(GPIO_FN_FSIAILR, NULL);
  1025. gpio_request(GPIO_FN_FSIAOMC, NULL);
  1026. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1027. gpio_request(GPIO_FN_FSIAISLD_PORT5, NULL);
  1028. gpio_request(GPIO_PORT7, NULL);
  1029. gpio_request(GPIO_PORT8, NULL);
  1030. gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */
  1031. gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */
  1032. /* FSI-HDMI */
  1033. gpio_request(GPIO_FN_FSIBCK, NULL);
  1034. /* HDMI */
  1035. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1036. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1037. /*
  1038. * CAUTION
  1039. *
  1040. * DBGMD/LCDC0/FSIA MUX
  1041. * DBGMD_SELECT_B should be set after setting PFC Function.
  1042. */
  1043. gpio_request(GPIO_PORT176, NULL);
  1044. gpio_direction_output(GPIO_PORT176, 1);
  1045. /*
  1046. * We can switch CON8/CON14 by SW1.5,
  1047. * but it needs after DBGMD_SELECT_B
  1048. */
  1049. gpio_request(GPIO_PORT6, NULL);
  1050. gpio_direction_input(GPIO_PORT6);
  1051. if (gpio_get_value(GPIO_PORT6)) {
  1052. /* CON14 enable */
  1053. } else {
  1054. /* CON8 (SDHI1) enable */
  1055. gpio_request(GPIO_FN_SDHI1_CLK, NULL);
  1056. gpio_request(GPIO_FN_SDHI1_CMD, NULL);
  1057. gpio_request(GPIO_FN_SDHI1_D0, NULL);
  1058. gpio_request(GPIO_FN_SDHI1_D1, NULL);
  1059. gpio_request(GPIO_FN_SDHI1_D2, NULL);
  1060. gpio_request(GPIO_FN_SDHI1_D3, NULL);
  1061. gpio_request(GPIO_FN_SDHI1_CD, NULL);
  1062. gpio_request(GPIO_FN_SDHI1_WP, NULL);
  1063. gpio_request(GPIO_PORT16, NULL); /* SDSLOT2_PON */
  1064. gpio_direction_output(GPIO_PORT16, 1);
  1065. platform_device_register(&sdhi1_device);
  1066. }
  1067. #ifdef CONFIG_CACHE_L2X0
  1068. /* Early BRESP enable, Shared attribute override enable, 32K*8way */
  1069. l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
  1070. #endif
  1071. i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
  1072. i2c_register_board_info(2, i2c2_devices, ARRAY_SIZE(i2c2_devices));
  1073. r8a7740_add_standard_devices();
  1074. platform_add_devices(eva_devices,
  1075. ARRAY_SIZE(eva_devices));
  1076. eva_clock_init();
  1077. rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &lcdc0_device);
  1078. rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &hdmi_lcdc_device);
  1079. if (usb)
  1080. rmobile_add_device_to_domain(&r8a7740_pd_a3sp, usb);
  1081. }
  1082. static void __init eva_earlytimer_init(void)
  1083. {
  1084. r8a7740_clock_init(MD_CK0 | MD_CK2);
  1085. shmobile_earlytimer_init();
  1086. }
  1087. static void __init eva_add_early_devices(void)
  1088. {
  1089. r8a7740_add_early_devices();
  1090. /* override timer setup with board-specific code */
  1091. shmobile_timer.init = eva_earlytimer_init;
  1092. }
  1093. static const char *eva_boards_compat_dt[] __initdata = {
  1094. "renesas,armadillo800eva",
  1095. NULL,
  1096. };
  1097. DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
  1098. .map_io = r8a7740_map_io,
  1099. .init_early = eva_add_early_devices,
  1100. .init_irq = r8a7740_init_irq,
  1101. .handle_irq = shmobile_handle_irq_intc,
  1102. .init_machine = eva_init,
  1103. .init_late = shmobile_init_late,
  1104. .timer = &shmobile_timer,
  1105. .dt_compat = eva_boards_compat_dt,
  1106. MACHINE_END