irq.h 1.7 KB

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  1. #ifndef __ASM_SH_CPU_SH2A_IRQ_H
  2. #define __ASM_SH_CPU_SH2A_IRQ_H
  3. #define INTC_IPR01 0xfffe0818UL
  4. #define INTC_IPR02 0xfffe081aUL
  5. #define INTC_IPR05 0xfffe0820UL
  6. #define INTC_IPR06 0xfffe0c00UL
  7. #define INTC_IPR07 0xfffe0c02UL
  8. #define INTC_IPR08 0xfffe0c04UL
  9. #define INTC_IPR09 0xfffe0c06UL
  10. #define INTC_IPR10 0xfffe0c08UL
  11. #define INTC_IPR11 0xfffe0c0aUL
  12. #define INTC_IPR12 0xfffe0c0cUL
  13. #define INTC_IPR13 0xfffe0c0eUL
  14. #define INTC_IPR14 0xfffe0c10UL
  15. #define INTC_ICR0 0xfffe0800UL
  16. #define INTC_ICR1 0xfffe0802UL
  17. #define INTC_ICR2 0xfffe0804UL
  18. #define INTC_ISR 0xfffe0806UL
  19. #define IRQ0_IRQ 64
  20. #define IRQ1_IRQ 65
  21. #define IRQ2_IRQ 66
  22. #define IRQ3_IRQ 67
  23. #define IRQ4_IRQ 68
  24. #define IRQ5_IRQ 69
  25. #define IRQ6_IRQ 70
  26. #define IRQ7_IRQ 71
  27. #define PINT0_IRQ 80
  28. #define PINT1_IRQ 81
  29. #define PINT2_IRQ 82
  30. #define PINT3_IRQ 83
  31. #define PINT4_IRQ 84
  32. #define PINT5_IRQ 85
  33. #define PINT6_IRQ 86
  34. #define PINT7_IRQ 87
  35. #define CMI0_IRQ 140
  36. #define CMI1_IRQ 141
  37. #define SCIF_BRI_IRQ 240
  38. #define SCIF_ERI_IRQ 241
  39. #define SCIF_RXI_IRQ 242
  40. #define SCIF_TXI_IRQ 243
  41. #define SCIF_IPR_ADDR INTC_IPR14
  42. #define SCIF_IPR_POS 3
  43. #define SCIF_PRIORITY 3
  44. #define SCIF1_BRI_IRQ 244
  45. #define SCIF1_ERI_IRQ 245
  46. #define SCIF1_RXI_IRQ 246
  47. #define SCIF1_TXI_IRQ 247
  48. #define SCIF1_IPR_ADDR INTC_IPR14
  49. #define SCIF1_IPR_POS 2
  50. #define SCIF1_PRIORITY 3
  51. #define SCIF2_BRI_IRQ 248
  52. #define SCIF2_ERI_IRQ 249
  53. #define SCIF2_RXI_IRQ 250
  54. #define SCIF2_TXI_IRQ 251
  55. #define SCIF2_IPR_ADDR INTC_IPR14
  56. #define SCIF2_IPR_POS 1
  57. #define SCIF2_PRIORITY 3
  58. #define SCIF3_BRI_IRQ 252
  59. #define SCIF3_ERI_IRQ 253
  60. #define SCIF3_RXI_IRQ 254
  61. #define SCIF3_TXI_IRQ 255
  62. #define SCIF3_IPR_ADDR INTC_IPR14
  63. #define SCIF3_IPR_POS 0
  64. #define SCIF3_PRIORITY 3
  65. #endif /* __ASM_SH_CPU_SH2A_IRQ_H */