main.c 54 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_update_txpow(struct ath_softc *sc)
  20. {
  21. struct ath_hw *ah = sc->sc_ah;
  22. if (sc->curtxpow != sc->config.txpowlimit) {
  23. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  24. /* read back in case value is clamped */
  25. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  26. }
  27. }
  28. static u8 parse_mpdudensity(u8 mpdudensity)
  29. {
  30. /*
  31. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  32. * 0 for no restriction
  33. * 1 for 1/4 us
  34. * 2 for 1/2 us
  35. * 3 for 1 us
  36. * 4 for 2 us
  37. * 5 for 4 us
  38. * 6 for 8 us
  39. * 7 for 16 us
  40. */
  41. switch (mpdudensity) {
  42. case 0:
  43. return 0;
  44. case 1:
  45. case 2:
  46. case 3:
  47. /* Our lower layer calculations limit our precision to
  48. 1 microsecond */
  49. return 1;
  50. case 4:
  51. return 2;
  52. case 5:
  53. return 4;
  54. case 6:
  55. return 8;
  56. case 7:
  57. return 16;
  58. default:
  59. return 0;
  60. }
  61. }
  62. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  63. struct ieee80211_hw *hw)
  64. {
  65. struct ieee80211_channel *curchan = hw->conf.channel;
  66. struct ath9k_channel *channel;
  67. u8 chan_idx;
  68. chan_idx = curchan->hw_value;
  69. channel = &sc->sc_ah->channels[chan_idx];
  70. ath9k_update_ichannel(sc, hw, channel);
  71. return channel;
  72. }
  73. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74. {
  75. unsigned long flags;
  76. bool ret;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80. return ret;
  81. }
  82. void ath9k_ps_wakeup(struct ath_softc *sc)
  83. {
  84. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85. unsigned long flags;
  86. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  87. if (++sc->ps_usecount != 1)
  88. goto unlock;
  89. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  90. /*
  91. * While the hardware is asleep, the cycle counters contain no
  92. * useful data. Better clear them now so that they don't mess up
  93. * survey data results.
  94. */
  95. spin_lock(&common->cc_lock);
  96. ath_hw_cycle_counters_update(common);
  97. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  98. spin_unlock(&common->cc_lock);
  99. unlock:
  100. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  101. }
  102. void ath9k_ps_restore(struct ath_softc *sc)
  103. {
  104. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  105. unsigned long flags;
  106. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  107. if (--sc->ps_usecount != 0)
  108. goto unlock;
  109. spin_lock(&common->cc_lock);
  110. ath_hw_cycle_counters_update(common);
  111. spin_unlock(&common->cc_lock);
  112. if (sc->ps_idle)
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  114. else if (sc->ps_enabled &&
  115. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  116. PS_WAIT_FOR_CAB |
  117. PS_WAIT_FOR_PSPOLL_DATA |
  118. PS_WAIT_FOR_TX_ACK)))
  119. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  120. unlock:
  121. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  122. }
  123. static void ath_start_ani(struct ath_common *common)
  124. {
  125. struct ath_hw *ah = common->ah;
  126. unsigned long timestamp = jiffies_to_msecs(jiffies);
  127. struct ath_softc *sc = (struct ath_softc *) common->priv;
  128. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  129. return;
  130. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  131. return;
  132. common->ani.longcal_timer = timestamp;
  133. common->ani.shortcal_timer = timestamp;
  134. common->ani.checkani_timer = timestamp;
  135. mod_timer(&common->ani.timer,
  136. jiffies +
  137. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  138. }
  139. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  140. {
  141. struct ath_hw *ah = sc->sc_ah;
  142. struct ath9k_channel *chan = &ah->channels[channel];
  143. struct survey_info *survey = &sc->survey[channel];
  144. if (chan->noisefloor) {
  145. survey->filled |= SURVEY_INFO_NOISE_DBM;
  146. survey->noise = chan->noisefloor;
  147. }
  148. }
  149. static void ath_update_survey_stats(struct ath_softc *sc)
  150. {
  151. struct ath_hw *ah = sc->sc_ah;
  152. struct ath_common *common = ath9k_hw_common(ah);
  153. int pos = ah->curchan - &ah->channels[0];
  154. struct survey_info *survey = &sc->survey[pos];
  155. struct ath_cycle_counters *cc = &common->cc_survey;
  156. unsigned int div = common->clockrate * 1000;
  157. if (ah->power_mode == ATH9K_PM_AWAKE)
  158. ath_hw_cycle_counters_update(common);
  159. if (cc->cycles > 0) {
  160. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  161. SURVEY_INFO_CHANNEL_TIME_BUSY |
  162. SURVEY_INFO_CHANNEL_TIME_RX |
  163. SURVEY_INFO_CHANNEL_TIME_TX;
  164. survey->channel_time += cc->cycles / div;
  165. survey->channel_time_busy += cc->rx_busy / div;
  166. survey->channel_time_rx += cc->rx_frame / div;
  167. survey->channel_time_tx += cc->tx_frame / div;
  168. }
  169. memset(cc, 0, sizeof(*cc));
  170. ath_update_survey_nf(sc, pos);
  171. }
  172. /*
  173. * Set/change channels. If the channel is really being changed, it's done
  174. * by reseting the chip. To accomplish this we must first cleanup any pending
  175. * DMA, then restart stuff.
  176. */
  177. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  178. struct ath9k_channel *hchan)
  179. {
  180. struct ath_wiphy *aphy = hw->priv;
  181. struct ath_hw *ah = sc->sc_ah;
  182. struct ath_common *common = ath9k_hw_common(ah);
  183. struct ieee80211_conf *conf = &common->hw->conf;
  184. bool fastcc = true, stopped;
  185. struct ieee80211_channel *channel = hw->conf.channel;
  186. struct ath9k_hw_cal_data *caldata = NULL;
  187. int r;
  188. if (sc->sc_flags & SC_OP_INVALID)
  189. return -EIO;
  190. del_timer_sync(&common->ani.timer);
  191. cancel_work_sync(&sc->paprd_work);
  192. cancel_work_sync(&sc->hw_check_work);
  193. cancel_delayed_work_sync(&sc->tx_complete_work);
  194. ath9k_ps_wakeup(sc);
  195. /*
  196. * This is only performed if the channel settings have
  197. * actually changed.
  198. *
  199. * To switch channels clear any pending DMA operations;
  200. * wait long enough for the RX fifo to drain, reset the
  201. * hardware at the new frequency, and then re-enable
  202. * the relevant bits of the h/w.
  203. */
  204. ath9k_hw_set_interrupts(ah, 0);
  205. ath_drain_all_txq(sc, false);
  206. stopped = ath_stoprecv(sc);
  207. /* XXX: do not flush receive queue here. We don't want
  208. * to flush data frames already in queue because of
  209. * changing channel. */
  210. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  211. fastcc = false;
  212. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  213. caldata = &aphy->caldata;
  214. ath_print(common, ATH_DBG_CONFIG,
  215. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  216. sc->sc_ah->curchan->channel,
  217. channel->center_freq, conf_is_ht40(conf),
  218. fastcc);
  219. spin_lock_bh(&sc->sc_resetlock);
  220. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  221. if (r) {
  222. ath_print(common, ATH_DBG_FATAL,
  223. "Unable to reset channel (%u MHz), "
  224. "reset status %d\n",
  225. channel->center_freq, r);
  226. spin_unlock_bh(&sc->sc_resetlock);
  227. goto ps_restore;
  228. }
  229. spin_unlock_bh(&sc->sc_resetlock);
  230. if (ath_startrecv(sc) != 0) {
  231. ath_print(common, ATH_DBG_FATAL,
  232. "Unable to restart recv logic\n");
  233. r = -EIO;
  234. goto ps_restore;
  235. }
  236. ath_update_txpow(sc);
  237. ath9k_hw_set_interrupts(ah, ah->imask);
  238. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  239. ath_beacon_config(sc, NULL);
  240. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  241. ath_start_ani(common);
  242. }
  243. ps_restore:
  244. ath9k_ps_restore(sc);
  245. return r;
  246. }
  247. static void ath_paprd_activate(struct ath_softc *sc)
  248. {
  249. struct ath_hw *ah = sc->sc_ah;
  250. struct ath9k_hw_cal_data *caldata = ah->caldata;
  251. struct ath_common *common = ath9k_hw_common(ah);
  252. int chain;
  253. if (!caldata || !caldata->paprd_done)
  254. return;
  255. ath9k_ps_wakeup(sc);
  256. ar9003_paprd_enable(ah, false);
  257. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  258. if (!(common->tx_chainmask & BIT(chain)))
  259. continue;
  260. ar9003_paprd_populate_single_table(ah, caldata, chain);
  261. }
  262. ar9003_paprd_enable(ah, true);
  263. ath9k_ps_restore(sc);
  264. }
  265. void ath_paprd_calibrate(struct work_struct *work)
  266. {
  267. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  268. struct ieee80211_hw *hw = sc->hw;
  269. struct ath_hw *ah = sc->sc_ah;
  270. struct ieee80211_hdr *hdr;
  271. struct sk_buff *skb = NULL;
  272. struct ieee80211_tx_info *tx_info;
  273. int band = hw->conf.channel->band;
  274. struct ieee80211_supported_band *sband = &sc->sbands[band];
  275. struct ath_tx_control txctl;
  276. struct ath9k_hw_cal_data *caldata = ah->caldata;
  277. struct ath_common *common = ath9k_hw_common(ah);
  278. int qnum, ftype;
  279. int chain_ok = 0;
  280. int chain;
  281. int len = 1800;
  282. int time_left;
  283. int i;
  284. if (!caldata)
  285. return;
  286. skb = alloc_skb(len, GFP_KERNEL);
  287. if (!skb)
  288. return;
  289. tx_info = IEEE80211_SKB_CB(skb);
  290. skb_put(skb, len);
  291. memset(skb->data, 0, len);
  292. hdr = (struct ieee80211_hdr *)skb->data;
  293. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  294. hdr->frame_control = cpu_to_le16(ftype);
  295. hdr->duration_id = cpu_to_le16(10);
  296. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  297. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  298. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  299. memset(&txctl, 0, sizeof(txctl));
  300. qnum = sc->tx.hwq_map[WME_AC_BE];
  301. txctl.txq = &sc->tx.txq[qnum];
  302. ath9k_ps_wakeup(sc);
  303. ar9003_paprd_init_table(ah);
  304. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  305. if (!(common->tx_chainmask & BIT(chain)))
  306. continue;
  307. chain_ok = 0;
  308. memset(tx_info, 0, sizeof(*tx_info));
  309. tx_info->band = band;
  310. for (i = 0; i < 4; i++) {
  311. tx_info->control.rates[i].idx = sband->n_bitrates - 1;
  312. tx_info->control.rates[i].count = 6;
  313. }
  314. init_completion(&sc->paprd_complete);
  315. ar9003_paprd_setup_gain_table(ah, chain);
  316. txctl.paprd = BIT(chain);
  317. if (ath_tx_start(hw, skb, &txctl) != 0)
  318. break;
  319. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  320. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  321. if (!time_left) {
  322. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  323. "Timeout waiting for paprd training on "
  324. "TX chain %d\n",
  325. chain);
  326. goto fail_paprd;
  327. }
  328. if (!ar9003_paprd_is_done(ah))
  329. break;
  330. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  331. break;
  332. chain_ok = 1;
  333. }
  334. kfree_skb(skb);
  335. if (chain_ok) {
  336. caldata->paprd_done = true;
  337. ath_paprd_activate(sc);
  338. }
  339. fail_paprd:
  340. ath9k_ps_restore(sc);
  341. }
  342. /*
  343. * This routine performs the periodic noise floor calibration function
  344. * that is used to adjust and optimize the chip performance. This
  345. * takes environmental changes (location, temperature) into account.
  346. * When the task is complete, it reschedules itself depending on the
  347. * appropriate interval that was calculated.
  348. */
  349. void ath_ani_calibrate(unsigned long data)
  350. {
  351. struct ath_softc *sc = (struct ath_softc *)data;
  352. struct ath_hw *ah = sc->sc_ah;
  353. struct ath_common *common = ath9k_hw_common(ah);
  354. bool longcal = false;
  355. bool shortcal = false;
  356. bool aniflag = false;
  357. unsigned int timestamp = jiffies_to_msecs(jiffies);
  358. u32 cal_interval, short_cal_interval, long_cal_interval;
  359. unsigned long flags;
  360. if (ah->caldata && ah->caldata->nfcal_interference)
  361. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  362. else
  363. long_cal_interval = ATH_LONG_CALINTERVAL;
  364. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  365. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  366. /* Only calibrate if awake */
  367. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  368. goto set_timer;
  369. ath9k_ps_wakeup(sc);
  370. /* Long calibration runs independently of short calibration. */
  371. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  372. longcal = true;
  373. ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  374. common->ani.longcal_timer = timestamp;
  375. }
  376. /* Short calibration applies only while caldone is false */
  377. if (!common->ani.caldone) {
  378. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  379. shortcal = true;
  380. ath_print(common, ATH_DBG_ANI,
  381. "shortcal @%lu\n", jiffies);
  382. common->ani.shortcal_timer = timestamp;
  383. common->ani.resetcal_timer = timestamp;
  384. }
  385. } else {
  386. if ((timestamp - common->ani.resetcal_timer) >=
  387. ATH_RESTART_CALINTERVAL) {
  388. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  389. if (common->ani.caldone)
  390. common->ani.resetcal_timer = timestamp;
  391. }
  392. }
  393. /* Verify whether we must check ANI */
  394. if ((timestamp - common->ani.checkani_timer) >=
  395. ah->config.ani_poll_interval) {
  396. aniflag = true;
  397. common->ani.checkani_timer = timestamp;
  398. }
  399. /* Skip all processing if there's nothing to do. */
  400. if (longcal || shortcal || aniflag) {
  401. /* Call ANI routine if necessary */
  402. if (aniflag) {
  403. spin_lock_irqsave(&common->cc_lock, flags);
  404. ath9k_hw_ani_monitor(ah, ah->curchan);
  405. ath_update_survey_stats(sc);
  406. spin_unlock_irqrestore(&common->cc_lock, flags);
  407. }
  408. /* Perform calibration if necessary */
  409. if (longcal || shortcal) {
  410. common->ani.caldone =
  411. ath9k_hw_calibrate(ah,
  412. ah->curchan,
  413. common->rx_chainmask,
  414. longcal);
  415. }
  416. }
  417. ath9k_ps_restore(sc);
  418. set_timer:
  419. /*
  420. * Set timer interval based on previous results.
  421. * The interval must be the shortest necessary to satisfy ANI,
  422. * short calibration and long calibration.
  423. */
  424. cal_interval = ATH_LONG_CALINTERVAL;
  425. if (sc->sc_ah->config.enable_ani)
  426. cal_interval = min(cal_interval,
  427. (u32)ah->config.ani_poll_interval);
  428. if (!common->ani.caldone)
  429. cal_interval = min(cal_interval, (u32)short_cal_interval);
  430. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  431. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  432. if (!ah->caldata->paprd_done)
  433. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  434. else
  435. ath_paprd_activate(sc);
  436. }
  437. }
  438. /*
  439. * Update tx/rx chainmask. For legacy association,
  440. * hard code chainmask to 1x1, for 11n association, use
  441. * the chainmask configuration, for bt coexistence, use
  442. * the chainmask configuration even in legacy mode.
  443. */
  444. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  445. {
  446. struct ath_hw *ah = sc->sc_ah;
  447. struct ath_common *common = ath9k_hw_common(ah);
  448. if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
  449. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  450. common->tx_chainmask = ah->caps.tx_chainmask;
  451. common->rx_chainmask = ah->caps.rx_chainmask;
  452. } else {
  453. common->tx_chainmask = 1;
  454. common->rx_chainmask = 1;
  455. }
  456. ath_print(common, ATH_DBG_CONFIG,
  457. "tx chmask: %d, rx chmask: %d\n",
  458. common->tx_chainmask,
  459. common->rx_chainmask);
  460. }
  461. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  462. {
  463. struct ath_node *an;
  464. an = (struct ath_node *)sta->drv_priv;
  465. if (sc->sc_flags & SC_OP_TXAGGR) {
  466. ath_tx_node_init(sc, an);
  467. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  468. sta->ht_cap.ampdu_factor);
  469. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  470. an->last_rssi = ATH_RSSI_DUMMY_MARKER;
  471. }
  472. }
  473. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  474. {
  475. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  476. if (sc->sc_flags & SC_OP_TXAGGR)
  477. ath_tx_node_cleanup(sc, an);
  478. }
  479. void ath_hw_check(struct work_struct *work)
  480. {
  481. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  482. int i;
  483. ath9k_ps_wakeup(sc);
  484. for (i = 0; i < 3; i++) {
  485. if (ath9k_hw_check_alive(sc->sc_ah))
  486. goto out;
  487. msleep(1);
  488. }
  489. ath_reset(sc, false);
  490. out:
  491. ath9k_ps_restore(sc);
  492. }
  493. void ath9k_tasklet(unsigned long data)
  494. {
  495. struct ath_softc *sc = (struct ath_softc *)data;
  496. struct ath_hw *ah = sc->sc_ah;
  497. struct ath_common *common = ath9k_hw_common(ah);
  498. u32 status = sc->intrstatus;
  499. u32 rxmask;
  500. ath9k_ps_wakeup(sc);
  501. if (status & ATH9K_INT_FATAL) {
  502. ath_reset(sc, false);
  503. ath9k_ps_restore(sc);
  504. return;
  505. }
  506. if (!ath9k_hw_check_alive(ah))
  507. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  508. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  509. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  510. ATH9K_INT_RXORN);
  511. else
  512. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  513. if (status & rxmask) {
  514. spin_lock_bh(&sc->rx.rxflushlock);
  515. /* Check for high priority Rx first */
  516. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  517. (status & ATH9K_INT_RXHP))
  518. ath_rx_tasklet(sc, 0, true);
  519. ath_rx_tasklet(sc, 0, false);
  520. spin_unlock_bh(&sc->rx.rxflushlock);
  521. }
  522. if (status & ATH9K_INT_TX) {
  523. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  524. ath_tx_edma_tasklet(sc);
  525. else
  526. ath_tx_tasklet(sc);
  527. }
  528. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  529. /*
  530. * TSF sync does not look correct; remain awake to sync with
  531. * the next Beacon.
  532. */
  533. ath_print(common, ATH_DBG_PS,
  534. "TSFOOR - Sync with next Beacon\n");
  535. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  536. }
  537. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  538. if (status & ATH9K_INT_GENTIMER)
  539. ath_gen_timer_isr(sc->sc_ah);
  540. /* re-enable hardware interrupt */
  541. ath9k_hw_set_interrupts(ah, ah->imask);
  542. ath9k_ps_restore(sc);
  543. }
  544. irqreturn_t ath_isr(int irq, void *dev)
  545. {
  546. #define SCHED_INTR ( \
  547. ATH9K_INT_FATAL | \
  548. ATH9K_INT_RXORN | \
  549. ATH9K_INT_RXEOL | \
  550. ATH9K_INT_RX | \
  551. ATH9K_INT_RXLP | \
  552. ATH9K_INT_RXHP | \
  553. ATH9K_INT_TX | \
  554. ATH9K_INT_BMISS | \
  555. ATH9K_INT_CST | \
  556. ATH9K_INT_TSFOOR | \
  557. ATH9K_INT_GENTIMER)
  558. struct ath_softc *sc = dev;
  559. struct ath_hw *ah = sc->sc_ah;
  560. struct ath_common *common = ath9k_hw_common(ah);
  561. enum ath9k_int status;
  562. bool sched = false;
  563. /*
  564. * The hardware is not ready/present, don't
  565. * touch anything. Note this can happen early
  566. * on if the IRQ is shared.
  567. */
  568. if (sc->sc_flags & SC_OP_INVALID)
  569. return IRQ_NONE;
  570. /* shared irq, not for us */
  571. if (!ath9k_hw_intrpend(ah))
  572. return IRQ_NONE;
  573. /*
  574. * Figure out the reason(s) for the interrupt. Note
  575. * that the hal returns a pseudo-ISR that may include
  576. * bits we haven't explicitly enabled so we mask the
  577. * value to insure we only process bits we requested.
  578. */
  579. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  580. status &= ah->imask; /* discard unasked-for bits */
  581. /*
  582. * If there are no status bits set, then this interrupt was not
  583. * for me (should have been caught above).
  584. */
  585. if (!status)
  586. return IRQ_NONE;
  587. /* Cache the status */
  588. sc->intrstatus = status;
  589. if (status & SCHED_INTR)
  590. sched = true;
  591. /*
  592. * If a FATAL or RXORN interrupt is received, we have to reset the
  593. * chip immediately.
  594. */
  595. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  596. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  597. goto chip_reset;
  598. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  599. (status & ATH9K_INT_BB_WATCHDOG)) {
  600. spin_lock(&common->cc_lock);
  601. ath_hw_cycle_counters_update(common);
  602. ar9003_hw_bb_watchdog_dbg_info(ah);
  603. spin_unlock(&common->cc_lock);
  604. goto chip_reset;
  605. }
  606. if (status & ATH9K_INT_SWBA)
  607. tasklet_schedule(&sc->bcon_tasklet);
  608. if (status & ATH9K_INT_TXURN)
  609. ath9k_hw_updatetxtriglevel(ah, true);
  610. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  611. if (status & ATH9K_INT_RXEOL) {
  612. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  613. ath9k_hw_set_interrupts(ah, ah->imask);
  614. }
  615. }
  616. if (status & ATH9K_INT_MIB) {
  617. /*
  618. * Disable interrupts until we service the MIB
  619. * interrupt; otherwise it will continue to
  620. * fire.
  621. */
  622. ath9k_hw_set_interrupts(ah, 0);
  623. /*
  624. * Let the hal handle the event. We assume
  625. * it will clear whatever condition caused
  626. * the interrupt.
  627. */
  628. spin_lock(&common->cc_lock);
  629. ath9k_hw_proc_mib_event(ah);
  630. spin_unlock(&common->cc_lock);
  631. ath9k_hw_set_interrupts(ah, ah->imask);
  632. }
  633. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  634. if (status & ATH9K_INT_TIM_TIMER) {
  635. /* Clear RxAbort bit so that we can
  636. * receive frames */
  637. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  638. ath9k_hw_setrxabort(sc->sc_ah, 0);
  639. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  640. }
  641. chip_reset:
  642. ath_debug_stat_interrupt(sc, status);
  643. if (sched) {
  644. /* turn off every interrupt except SWBA */
  645. ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
  646. tasklet_schedule(&sc->intr_tq);
  647. }
  648. return IRQ_HANDLED;
  649. #undef SCHED_INTR
  650. }
  651. static u32 ath_get_extchanmode(struct ath_softc *sc,
  652. struct ieee80211_channel *chan,
  653. enum nl80211_channel_type channel_type)
  654. {
  655. u32 chanmode = 0;
  656. switch (chan->band) {
  657. case IEEE80211_BAND_2GHZ:
  658. switch(channel_type) {
  659. case NL80211_CHAN_NO_HT:
  660. case NL80211_CHAN_HT20:
  661. chanmode = CHANNEL_G_HT20;
  662. break;
  663. case NL80211_CHAN_HT40PLUS:
  664. chanmode = CHANNEL_G_HT40PLUS;
  665. break;
  666. case NL80211_CHAN_HT40MINUS:
  667. chanmode = CHANNEL_G_HT40MINUS;
  668. break;
  669. }
  670. break;
  671. case IEEE80211_BAND_5GHZ:
  672. switch(channel_type) {
  673. case NL80211_CHAN_NO_HT:
  674. case NL80211_CHAN_HT20:
  675. chanmode = CHANNEL_A_HT20;
  676. break;
  677. case NL80211_CHAN_HT40PLUS:
  678. chanmode = CHANNEL_A_HT40PLUS;
  679. break;
  680. case NL80211_CHAN_HT40MINUS:
  681. chanmode = CHANNEL_A_HT40MINUS;
  682. break;
  683. }
  684. break;
  685. default:
  686. break;
  687. }
  688. return chanmode;
  689. }
  690. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  691. struct ieee80211_vif *vif,
  692. struct ieee80211_bss_conf *bss_conf)
  693. {
  694. struct ath_hw *ah = sc->sc_ah;
  695. struct ath_common *common = ath9k_hw_common(ah);
  696. if (bss_conf->assoc) {
  697. ath_print(common, ATH_DBG_CONFIG,
  698. "Bss Info ASSOC %d, bssid: %pM\n",
  699. bss_conf->aid, common->curbssid);
  700. /* New association, store aid */
  701. common->curaid = bss_conf->aid;
  702. ath9k_hw_write_associd(ah);
  703. /*
  704. * Request a re-configuration of Beacon related timers
  705. * on the receipt of the first Beacon frame (i.e.,
  706. * after time sync with the AP).
  707. */
  708. sc->ps_flags |= PS_BEACON_SYNC;
  709. /* Configure the beacon */
  710. ath_beacon_config(sc, vif);
  711. /* Reset rssi stats */
  712. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  713. sc->sc_flags |= SC_OP_ANI_RUN;
  714. ath_start_ani(common);
  715. } else {
  716. ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  717. common->curaid = 0;
  718. /* Stop ANI */
  719. sc->sc_flags &= ~SC_OP_ANI_RUN;
  720. del_timer_sync(&common->ani.timer);
  721. }
  722. }
  723. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  724. {
  725. struct ath_hw *ah = sc->sc_ah;
  726. struct ath_common *common = ath9k_hw_common(ah);
  727. struct ieee80211_channel *channel = hw->conf.channel;
  728. int r;
  729. ath9k_ps_wakeup(sc);
  730. ath9k_hw_configpcipowersave(ah, 0, 0);
  731. if (!ah->curchan)
  732. ah->curchan = ath_get_curchannel(sc, sc->hw);
  733. spin_lock_bh(&sc->sc_resetlock);
  734. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  735. if (r) {
  736. ath_print(common, ATH_DBG_FATAL,
  737. "Unable to reset channel (%u MHz), "
  738. "reset status %d\n",
  739. channel->center_freq, r);
  740. }
  741. spin_unlock_bh(&sc->sc_resetlock);
  742. ath_update_txpow(sc);
  743. if (ath_startrecv(sc) != 0) {
  744. ath_print(common, ATH_DBG_FATAL,
  745. "Unable to restart recv logic\n");
  746. return;
  747. }
  748. if (sc->sc_flags & SC_OP_BEACONS)
  749. ath_beacon_config(sc, NULL); /* restart beacons */
  750. /* Re-Enable interrupts */
  751. ath9k_hw_set_interrupts(ah, ah->imask);
  752. /* Enable LED */
  753. ath9k_hw_cfg_output(ah, ah->led_pin,
  754. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  755. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  756. ieee80211_wake_queues(hw);
  757. ath9k_ps_restore(sc);
  758. }
  759. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  760. {
  761. struct ath_hw *ah = sc->sc_ah;
  762. struct ieee80211_channel *channel = hw->conf.channel;
  763. int r;
  764. ath9k_ps_wakeup(sc);
  765. ieee80211_stop_queues(hw);
  766. /*
  767. * Keep the LED on when the radio is disabled
  768. * during idle unassociated state.
  769. */
  770. if (!sc->ps_idle) {
  771. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  772. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  773. }
  774. /* Disable interrupts */
  775. ath9k_hw_set_interrupts(ah, 0);
  776. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  777. ath_stoprecv(sc); /* turn off frame recv */
  778. ath_flushrecv(sc); /* flush recv queue */
  779. if (!ah->curchan)
  780. ah->curchan = ath_get_curchannel(sc, hw);
  781. spin_lock_bh(&sc->sc_resetlock);
  782. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  783. if (r) {
  784. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  785. "Unable to reset channel (%u MHz), "
  786. "reset status %d\n",
  787. channel->center_freq, r);
  788. }
  789. spin_unlock_bh(&sc->sc_resetlock);
  790. ath9k_hw_phy_disable(ah);
  791. ath9k_hw_configpcipowersave(ah, 1, 1);
  792. ath9k_ps_restore(sc);
  793. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  794. }
  795. int ath_reset(struct ath_softc *sc, bool retry_tx)
  796. {
  797. struct ath_hw *ah = sc->sc_ah;
  798. struct ath_common *common = ath9k_hw_common(ah);
  799. struct ieee80211_hw *hw = sc->hw;
  800. int r;
  801. /* Stop ANI */
  802. del_timer_sync(&common->ani.timer);
  803. ieee80211_stop_queues(hw);
  804. ath9k_hw_set_interrupts(ah, 0);
  805. ath_drain_all_txq(sc, retry_tx);
  806. ath_stoprecv(sc);
  807. ath_flushrecv(sc);
  808. spin_lock_bh(&sc->sc_resetlock);
  809. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  810. if (r)
  811. ath_print(common, ATH_DBG_FATAL,
  812. "Unable to reset hardware; reset status %d\n", r);
  813. spin_unlock_bh(&sc->sc_resetlock);
  814. if (ath_startrecv(sc) != 0)
  815. ath_print(common, ATH_DBG_FATAL,
  816. "Unable to start recv logic\n");
  817. /*
  818. * We may be doing a reset in response to a request
  819. * that changes the channel so update any state that
  820. * might change as a result.
  821. */
  822. ath_update_txpow(sc);
  823. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  824. ath_beacon_config(sc, NULL); /* restart beacons */
  825. ath9k_hw_set_interrupts(ah, ah->imask);
  826. if (retry_tx) {
  827. int i;
  828. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  829. if (ATH_TXQ_SETUP(sc, i)) {
  830. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  831. ath_txq_schedule(sc, &sc->tx.txq[i]);
  832. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  833. }
  834. }
  835. }
  836. ieee80211_wake_queues(hw);
  837. /* Start ANI */
  838. ath_start_ani(common);
  839. return r;
  840. }
  841. static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
  842. {
  843. int qnum;
  844. switch (queue) {
  845. case 0:
  846. qnum = sc->tx.hwq_map[WME_AC_VO];
  847. break;
  848. case 1:
  849. qnum = sc->tx.hwq_map[WME_AC_VI];
  850. break;
  851. case 2:
  852. qnum = sc->tx.hwq_map[WME_AC_BE];
  853. break;
  854. case 3:
  855. qnum = sc->tx.hwq_map[WME_AC_BK];
  856. break;
  857. default:
  858. qnum = sc->tx.hwq_map[WME_AC_BE];
  859. break;
  860. }
  861. return qnum;
  862. }
  863. int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
  864. {
  865. int qnum;
  866. switch (queue) {
  867. case WME_AC_VO:
  868. qnum = 0;
  869. break;
  870. case WME_AC_VI:
  871. qnum = 1;
  872. break;
  873. case WME_AC_BE:
  874. qnum = 2;
  875. break;
  876. case WME_AC_BK:
  877. qnum = 3;
  878. break;
  879. default:
  880. qnum = -1;
  881. break;
  882. }
  883. return qnum;
  884. }
  885. /* XXX: Remove me once we don't depend on ath9k_channel for all
  886. * this redundant data */
  887. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  888. struct ath9k_channel *ichan)
  889. {
  890. struct ieee80211_channel *chan = hw->conf.channel;
  891. struct ieee80211_conf *conf = &hw->conf;
  892. ichan->channel = chan->center_freq;
  893. ichan->chan = chan;
  894. if (chan->band == IEEE80211_BAND_2GHZ) {
  895. ichan->chanmode = CHANNEL_G;
  896. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  897. } else {
  898. ichan->chanmode = CHANNEL_A;
  899. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  900. }
  901. if (conf_is_ht(conf))
  902. ichan->chanmode = ath_get_extchanmode(sc, chan,
  903. conf->channel_type);
  904. }
  905. /**********************/
  906. /* mac80211 callbacks */
  907. /**********************/
  908. static int ath9k_start(struct ieee80211_hw *hw)
  909. {
  910. struct ath_wiphy *aphy = hw->priv;
  911. struct ath_softc *sc = aphy->sc;
  912. struct ath_hw *ah = sc->sc_ah;
  913. struct ath_common *common = ath9k_hw_common(ah);
  914. struct ieee80211_channel *curchan = hw->conf.channel;
  915. struct ath9k_channel *init_channel;
  916. int r;
  917. ath_print(common, ATH_DBG_CONFIG,
  918. "Starting driver with initial channel: %d MHz\n",
  919. curchan->center_freq);
  920. mutex_lock(&sc->mutex);
  921. if (ath9k_wiphy_started(sc)) {
  922. if (sc->chan_idx == curchan->hw_value) {
  923. /*
  924. * Already on the operational channel, the new wiphy
  925. * can be marked active.
  926. */
  927. aphy->state = ATH_WIPHY_ACTIVE;
  928. ieee80211_wake_queues(hw);
  929. } else {
  930. /*
  931. * Another wiphy is on another channel, start the new
  932. * wiphy in paused state.
  933. */
  934. aphy->state = ATH_WIPHY_PAUSED;
  935. ieee80211_stop_queues(hw);
  936. }
  937. mutex_unlock(&sc->mutex);
  938. return 0;
  939. }
  940. aphy->state = ATH_WIPHY_ACTIVE;
  941. /* setup initial channel */
  942. sc->chan_idx = curchan->hw_value;
  943. init_channel = ath_get_curchannel(sc, hw);
  944. /* Reset SERDES registers */
  945. ath9k_hw_configpcipowersave(ah, 0, 0);
  946. /*
  947. * The basic interface to setting the hardware in a good
  948. * state is ``reset''. On return the hardware is known to
  949. * be powered up and with interrupts disabled. This must
  950. * be followed by initialization of the appropriate bits
  951. * and then setup of the interrupt mask.
  952. */
  953. spin_lock_bh(&sc->sc_resetlock);
  954. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  955. if (r) {
  956. ath_print(common, ATH_DBG_FATAL,
  957. "Unable to reset hardware; reset status %d "
  958. "(freq %u MHz)\n", r,
  959. curchan->center_freq);
  960. spin_unlock_bh(&sc->sc_resetlock);
  961. goto mutex_unlock;
  962. }
  963. spin_unlock_bh(&sc->sc_resetlock);
  964. /*
  965. * This is needed only to setup initial state
  966. * but it's best done after a reset.
  967. */
  968. ath_update_txpow(sc);
  969. /*
  970. * Setup the hardware after reset:
  971. * The receive engine is set going.
  972. * Frame transmit is handled entirely
  973. * in the frame output path; there's nothing to do
  974. * here except setup the interrupt mask.
  975. */
  976. if (ath_startrecv(sc) != 0) {
  977. ath_print(common, ATH_DBG_FATAL,
  978. "Unable to start recv logic\n");
  979. r = -EIO;
  980. goto mutex_unlock;
  981. }
  982. /* Setup our intr mask. */
  983. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  984. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  985. ATH9K_INT_GLOBAL;
  986. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  987. ah->imask |= ATH9K_INT_RXHP |
  988. ATH9K_INT_RXLP |
  989. ATH9K_INT_BB_WATCHDOG;
  990. else
  991. ah->imask |= ATH9K_INT_RX;
  992. ah->imask |= ATH9K_INT_GTT;
  993. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  994. ah->imask |= ATH9K_INT_CST;
  995. sc->sc_flags &= ~SC_OP_INVALID;
  996. /* Disable BMISS interrupt when we're not associated */
  997. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  998. ath9k_hw_set_interrupts(ah, ah->imask);
  999. ieee80211_wake_queues(hw);
  1000. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  1001. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  1002. !ah->btcoex_hw.enabled) {
  1003. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  1004. AR_STOMP_LOW_WLAN_WGHT);
  1005. ath9k_hw_btcoex_enable(ah);
  1006. if (common->bus_ops->bt_coex_prep)
  1007. common->bus_ops->bt_coex_prep(common);
  1008. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1009. ath9k_btcoex_timer_resume(sc);
  1010. }
  1011. mutex_unlock:
  1012. mutex_unlock(&sc->mutex);
  1013. return r;
  1014. }
  1015. static int ath9k_tx(struct ieee80211_hw *hw,
  1016. struct sk_buff *skb)
  1017. {
  1018. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1019. struct ath_wiphy *aphy = hw->priv;
  1020. struct ath_softc *sc = aphy->sc;
  1021. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1022. struct ath_tx_control txctl;
  1023. int padpos, padsize;
  1024. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  1025. int qnum;
  1026. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  1027. ath_print(common, ATH_DBG_XMIT,
  1028. "ath9k: %s: TX in unexpected wiphy state "
  1029. "%d\n", wiphy_name(hw->wiphy), aphy->state);
  1030. goto exit;
  1031. }
  1032. if (sc->ps_enabled) {
  1033. /*
  1034. * mac80211 does not set PM field for normal data frames, so we
  1035. * need to update that based on the current PS mode.
  1036. */
  1037. if (ieee80211_is_data(hdr->frame_control) &&
  1038. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1039. !ieee80211_has_pm(hdr->frame_control)) {
  1040. ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
  1041. "while in PS mode\n");
  1042. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1043. }
  1044. }
  1045. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1046. /*
  1047. * We are using PS-Poll and mac80211 can request TX while in
  1048. * power save mode. Need to wake up hardware for the TX to be
  1049. * completed and if needed, also for RX of buffered frames.
  1050. */
  1051. ath9k_ps_wakeup(sc);
  1052. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1053. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1054. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1055. ath_print(common, ATH_DBG_PS,
  1056. "Sending PS-Poll to pick a buffered frame\n");
  1057. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1058. } else {
  1059. ath_print(common, ATH_DBG_PS,
  1060. "Wake up to complete TX\n");
  1061. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1062. }
  1063. /*
  1064. * The actual restore operation will happen only after
  1065. * the sc_flags bit is cleared. We are just dropping
  1066. * the ps_usecount here.
  1067. */
  1068. ath9k_ps_restore(sc);
  1069. }
  1070. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1071. /*
  1072. * As a temporary workaround, assign seq# here; this will likely need
  1073. * to be cleaned up to work better with Beacon transmission and virtual
  1074. * BSSes.
  1075. */
  1076. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1077. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  1078. sc->tx.seq_no += 0x10;
  1079. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1080. hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
  1081. }
  1082. /* Add the padding after the header if this is not already done */
  1083. padpos = ath9k_cmn_padpos(hdr->frame_control);
  1084. padsize = padpos & 3;
  1085. if (padsize && skb->len>padpos) {
  1086. if (skb_headroom(skb) < padsize)
  1087. return -1;
  1088. skb_push(skb, padsize);
  1089. memmove(skb->data, skb->data + padsize, padpos);
  1090. }
  1091. qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
  1092. txctl.txq = &sc->tx.txq[qnum];
  1093. ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1094. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1095. ath_print(common, ATH_DBG_XMIT, "TX failed\n");
  1096. goto exit;
  1097. }
  1098. return 0;
  1099. exit:
  1100. dev_kfree_skb_any(skb);
  1101. return 0;
  1102. }
  1103. static void ath9k_stop(struct ieee80211_hw *hw)
  1104. {
  1105. struct ath_wiphy *aphy = hw->priv;
  1106. struct ath_softc *sc = aphy->sc;
  1107. struct ath_hw *ah = sc->sc_ah;
  1108. struct ath_common *common = ath9k_hw_common(ah);
  1109. int i;
  1110. mutex_lock(&sc->mutex);
  1111. aphy->state = ATH_WIPHY_INACTIVE;
  1112. if (led_blink)
  1113. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1114. cancel_delayed_work_sync(&sc->tx_complete_work);
  1115. cancel_work_sync(&sc->paprd_work);
  1116. cancel_work_sync(&sc->hw_check_work);
  1117. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1118. if (sc->sec_wiphy[i])
  1119. break;
  1120. }
  1121. if (i == sc->num_sec_wiphy) {
  1122. cancel_delayed_work_sync(&sc->wiphy_work);
  1123. cancel_work_sync(&sc->chan_work);
  1124. }
  1125. if (sc->sc_flags & SC_OP_INVALID) {
  1126. ath_print(common, ATH_DBG_ANY, "Device not present\n");
  1127. mutex_unlock(&sc->mutex);
  1128. return;
  1129. }
  1130. if (ath9k_wiphy_started(sc)) {
  1131. mutex_unlock(&sc->mutex);
  1132. return; /* another wiphy still in use */
  1133. }
  1134. /* Ensure HW is awake when we try to shut it down. */
  1135. ath9k_ps_wakeup(sc);
  1136. if (ah->btcoex_hw.enabled) {
  1137. ath9k_hw_btcoex_disable(ah);
  1138. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1139. ath9k_btcoex_timer_pause(sc);
  1140. }
  1141. /* make sure h/w will not generate any interrupt
  1142. * before setting the invalid flag. */
  1143. ath9k_hw_set_interrupts(ah, 0);
  1144. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1145. ath_drain_all_txq(sc, false);
  1146. ath_stoprecv(sc);
  1147. ath9k_hw_phy_disable(ah);
  1148. } else
  1149. sc->rx.rxlink = NULL;
  1150. /* disable HAL and put h/w to sleep */
  1151. ath9k_hw_disable(ah);
  1152. ath9k_hw_configpcipowersave(ah, 1, 1);
  1153. ath9k_ps_restore(sc);
  1154. /* Finally, put the chip in FULL SLEEP mode */
  1155. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  1156. sc->sc_flags |= SC_OP_INVALID;
  1157. mutex_unlock(&sc->mutex);
  1158. ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
  1159. }
  1160. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1161. struct ieee80211_vif *vif)
  1162. {
  1163. struct ath_wiphy *aphy = hw->priv;
  1164. struct ath_softc *sc = aphy->sc;
  1165. struct ath_hw *ah = sc->sc_ah;
  1166. struct ath_common *common = ath9k_hw_common(ah);
  1167. struct ath_vif *avp = (void *)vif->drv_priv;
  1168. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1169. int ret = 0;
  1170. mutex_lock(&sc->mutex);
  1171. switch (vif->type) {
  1172. case NL80211_IFTYPE_STATION:
  1173. ic_opmode = NL80211_IFTYPE_STATION;
  1174. break;
  1175. case NL80211_IFTYPE_WDS:
  1176. ic_opmode = NL80211_IFTYPE_WDS;
  1177. break;
  1178. case NL80211_IFTYPE_ADHOC:
  1179. case NL80211_IFTYPE_AP:
  1180. case NL80211_IFTYPE_MESH_POINT:
  1181. if (sc->nbcnvifs >= ATH_BCBUF) {
  1182. ret = -ENOBUFS;
  1183. goto out;
  1184. }
  1185. ic_opmode = vif->type;
  1186. break;
  1187. default:
  1188. ath_print(common, ATH_DBG_FATAL,
  1189. "Interface type %d not yet supported\n", vif->type);
  1190. ret = -EOPNOTSUPP;
  1191. goto out;
  1192. }
  1193. ath_print(common, ATH_DBG_CONFIG,
  1194. "Attach a VIF of type: %d\n", ic_opmode);
  1195. /* Set the VIF opmode */
  1196. avp->av_opmode = ic_opmode;
  1197. avp->av_bslot = -1;
  1198. sc->nvifs++;
  1199. ath9k_set_bssid_mask(hw, vif);
  1200. if (sc->nvifs > 1)
  1201. goto out; /* skip global settings for secondary vif */
  1202. if (ic_opmode == NL80211_IFTYPE_AP) {
  1203. ath9k_hw_set_tsfadjust(ah, 1);
  1204. sc->sc_flags |= SC_OP_TSF_RESET;
  1205. }
  1206. /* Set the device opmode */
  1207. ah->opmode = ic_opmode;
  1208. /*
  1209. * Enable MIB interrupts when there are hardware phy counters.
  1210. * Note we only do this (at the moment) for station mode.
  1211. */
  1212. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1213. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1214. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1215. if (ah->config.enable_ani)
  1216. ah->imask |= ATH9K_INT_MIB;
  1217. ah->imask |= ATH9K_INT_TSFOOR;
  1218. }
  1219. ath9k_hw_set_interrupts(ah, ah->imask);
  1220. if (vif->type == NL80211_IFTYPE_AP ||
  1221. vif->type == NL80211_IFTYPE_ADHOC ||
  1222. vif->type == NL80211_IFTYPE_MONITOR) {
  1223. sc->sc_flags |= SC_OP_ANI_RUN;
  1224. ath_start_ani(common);
  1225. }
  1226. out:
  1227. mutex_unlock(&sc->mutex);
  1228. return ret;
  1229. }
  1230. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1231. struct ieee80211_vif *vif)
  1232. {
  1233. struct ath_wiphy *aphy = hw->priv;
  1234. struct ath_softc *sc = aphy->sc;
  1235. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1236. struct ath_vif *avp = (void *)vif->drv_priv;
  1237. int i;
  1238. ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1239. mutex_lock(&sc->mutex);
  1240. /* Stop ANI */
  1241. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1242. del_timer_sync(&common->ani.timer);
  1243. /* Reclaim beacon resources */
  1244. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1245. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1246. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
  1247. ath9k_ps_wakeup(sc);
  1248. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1249. ath9k_ps_restore(sc);
  1250. }
  1251. ath_beacon_return(sc, avp);
  1252. sc->sc_flags &= ~SC_OP_BEACONS;
  1253. for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
  1254. if (sc->beacon.bslot[i] == vif) {
  1255. printk(KERN_DEBUG "%s: vif had allocated beacon "
  1256. "slot\n", __func__);
  1257. sc->beacon.bslot[i] = NULL;
  1258. sc->beacon.bslot_aphy[i] = NULL;
  1259. }
  1260. }
  1261. sc->nvifs--;
  1262. mutex_unlock(&sc->mutex);
  1263. }
  1264. static void ath9k_enable_ps(struct ath_softc *sc)
  1265. {
  1266. struct ath_hw *ah = sc->sc_ah;
  1267. sc->ps_enabled = true;
  1268. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1269. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1270. ah->imask |= ATH9K_INT_TIM_TIMER;
  1271. ath9k_hw_set_interrupts(ah, ah->imask);
  1272. }
  1273. ath9k_hw_setrxabort(ah, 1);
  1274. }
  1275. }
  1276. static void ath9k_disable_ps(struct ath_softc *sc)
  1277. {
  1278. struct ath_hw *ah = sc->sc_ah;
  1279. sc->ps_enabled = false;
  1280. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1281. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1282. ath9k_hw_setrxabort(ah, 0);
  1283. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1284. PS_WAIT_FOR_CAB |
  1285. PS_WAIT_FOR_PSPOLL_DATA |
  1286. PS_WAIT_FOR_TX_ACK);
  1287. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1288. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1289. ath9k_hw_set_interrupts(ah, ah->imask);
  1290. }
  1291. }
  1292. }
  1293. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1294. {
  1295. struct ath_wiphy *aphy = hw->priv;
  1296. struct ath_softc *sc = aphy->sc;
  1297. struct ath_hw *ah = sc->sc_ah;
  1298. struct ath_common *common = ath9k_hw_common(ah);
  1299. struct ieee80211_conf *conf = &hw->conf;
  1300. bool disable_radio;
  1301. mutex_lock(&sc->mutex);
  1302. /*
  1303. * Leave this as the first check because we need to turn on the
  1304. * radio if it was disabled before prior to processing the rest
  1305. * of the changes. Likewise we must only disable the radio towards
  1306. * the end.
  1307. */
  1308. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1309. bool enable_radio;
  1310. bool all_wiphys_idle;
  1311. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1312. spin_lock_bh(&sc->wiphy_lock);
  1313. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1314. ath9k_set_wiphy_idle(aphy, idle);
  1315. enable_radio = (!idle && all_wiphys_idle);
  1316. /*
  1317. * After we unlock here its possible another wiphy
  1318. * can be re-renabled so to account for that we will
  1319. * only disable the radio toward the end of this routine
  1320. * if by then all wiphys are still idle.
  1321. */
  1322. spin_unlock_bh(&sc->wiphy_lock);
  1323. if (enable_radio) {
  1324. sc->ps_idle = false;
  1325. ath_radio_enable(sc, hw);
  1326. ath_print(common, ATH_DBG_CONFIG,
  1327. "not-idle: enabling radio\n");
  1328. }
  1329. }
  1330. /*
  1331. * We just prepare to enable PS. We have to wait until our AP has
  1332. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1333. * those ACKs and end up retransmitting the same null data frames.
  1334. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1335. */
  1336. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1337. unsigned long flags;
  1338. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1339. if (conf->flags & IEEE80211_CONF_PS)
  1340. ath9k_enable_ps(sc);
  1341. else
  1342. ath9k_disable_ps(sc);
  1343. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1344. }
  1345. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1346. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1347. ath_print(common, ATH_DBG_CONFIG,
  1348. "HW opmode set to Monitor mode\n");
  1349. sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
  1350. }
  1351. }
  1352. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1353. struct ieee80211_channel *curchan = hw->conf.channel;
  1354. int pos = curchan->hw_value;
  1355. int old_pos = -1;
  1356. unsigned long flags;
  1357. if (ah->curchan)
  1358. old_pos = ah->curchan - &ah->channels[0];
  1359. aphy->chan_idx = pos;
  1360. aphy->chan_is_ht = conf_is_ht(conf);
  1361. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1362. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1363. else
  1364. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1365. if (aphy->state == ATH_WIPHY_SCAN ||
  1366. aphy->state == ATH_WIPHY_ACTIVE)
  1367. ath9k_wiphy_pause_all_forced(sc, aphy);
  1368. else {
  1369. /*
  1370. * Do not change operational channel based on a paused
  1371. * wiphy changes.
  1372. */
  1373. goto skip_chan_change;
  1374. }
  1375. ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1376. curchan->center_freq);
  1377. /* XXX: remove me eventualy */
  1378. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1379. ath_update_chainmask(sc, conf_is_ht(conf));
  1380. /* update survey stats for the old channel before switching */
  1381. spin_lock_irqsave(&common->cc_lock, flags);
  1382. ath_update_survey_stats(sc);
  1383. spin_unlock_irqrestore(&common->cc_lock, flags);
  1384. /*
  1385. * If the operating channel changes, change the survey in-use flags
  1386. * along with it.
  1387. * Reset the survey data for the new channel, unless we're switching
  1388. * back to the operating channel from an off-channel operation.
  1389. */
  1390. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1391. sc->cur_survey != &sc->survey[pos]) {
  1392. if (sc->cur_survey)
  1393. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1394. sc->cur_survey = &sc->survey[pos];
  1395. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1396. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1397. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1398. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1399. }
  1400. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1401. ath_print(common, ATH_DBG_FATAL,
  1402. "Unable to set channel\n");
  1403. mutex_unlock(&sc->mutex);
  1404. return -EINVAL;
  1405. }
  1406. /*
  1407. * The most recent snapshot of channel->noisefloor for the old
  1408. * channel is only available after the hardware reset. Copy it to
  1409. * the survey stats now.
  1410. */
  1411. if (old_pos >= 0)
  1412. ath_update_survey_nf(sc, old_pos);
  1413. }
  1414. skip_chan_change:
  1415. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1416. sc->config.txpowlimit = 2 * conf->power_level;
  1417. ath_update_txpow(sc);
  1418. }
  1419. spin_lock_bh(&sc->wiphy_lock);
  1420. disable_radio = ath9k_all_wiphys_idle(sc);
  1421. spin_unlock_bh(&sc->wiphy_lock);
  1422. if (disable_radio) {
  1423. ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1424. sc->ps_idle = true;
  1425. ath_radio_disable(sc, hw);
  1426. }
  1427. mutex_unlock(&sc->mutex);
  1428. return 0;
  1429. }
  1430. #define SUPPORTED_FILTERS \
  1431. (FIF_PROMISC_IN_BSS | \
  1432. FIF_ALLMULTI | \
  1433. FIF_CONTROL | \
  1434. FIF_PSPOLL | \
  1435. FIF_OTHER_BSS | \
  1436. FIF_BCN_PRBRESP_PROMISC | \
  1437. FIF_PROBE_REQ | \
  1438. FIF_FCSFAIL)
  1439. /* FIXME: sc->sc_full_reset ? */
  1440. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1441. unsigned int changed_flags,
  1442. unsigned int *total_flags,
  1443. u64 multicast)
  1444. {
  1445. struct ath_wiphy *aphy = hw->priv;
  1446. struct ath_softc *sc = aphy->sc;
  1447. u32 rfilt;
  1448. changed_flags &= SUPPORTED_FILTERS;
  1449. *total_flags &= SUPPORTED_FILTERS;
  1450. sc->rx.rxfilter = *total_flags;
  1451. ath9k_ps_wakeup(sc);
  1452. rfilt = ath_calcrxfilter(sc);
  1453. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1454. ath9k_ps_restore(sc);
  1455. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1456. "Set HW RX filter: 0x%x\n", rfilt);
  1457. }
  1458. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1459. struct ieee80211_vif *vif,
  1460. struct ieee80211_sta *sta)
  1461. {
  1462. struct ath_wiphy *aphy = hw->priv;
  1463. struct ath_softc *sc = aphy->sc;
  1464. ath_node_attach(sc, sta);
  1465. return 0;
  1466. }
  1467. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1468. struct ieee80211_vif *vif,
  1469. struct ieee80211_sta *sta)
  1470. {
  1471. struct ath_wiphy *aphy = hw->priv;
  1472. struct ath_softc *sc = aphy->sc;
  1473. ath_node_detach(sc, sta);
  1474. return 0;
  1475. }
  1476. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1477. const struct ieee80211_tx_queue_params *params)
  1478. {
  1479. struct ath_wiphy *aphy = hw->priv;
  1480. struct ath_softc *sc = aphy->sc;
  1481. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1482. struct ath9k_tx_queue_info qi;
  1483. int ret = 0, qnum;
  1484. if (queue >= WME_NUM_AC)
  1485. return 0;
  1486. mutex_lock(&sc->mutex);
  1487. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1488. qi.tqi_aifs = params->aifs;
  1489. qi.tqi_cwmin = params->cw_min;
  1490. qi.tqi_cwmax = params->cw_max;
  1491. qi.tqi_burstTime = params->txop;
  1492. qnum = ath_get_hal_qnum(queue, sc);
  1493. ath_print(common, ATH_DBG_CONFIG,
  1494. "Configure tx [queue/halq] [%d/%d], "
  1495. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1496. queue, qnum, params->aifs, params->cw_min,
  1497. params->cw_max, params->txop);
  1498. ret = ath_txq_update(sc, qnum, &qi);
  1499. if (ret)
  1500. ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
  1501. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1502. if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
  1503. ath_beaconq_config(sc);
  1504. mutex_unlock(&sc->mutex);
  1505. return ret;
  1506. }
  1507. static int ath9k_set_key(struct ieee80211_hw *hw,
  1508. enum set_key_cmd cmd,
  1509. struct ieee80211_vif *vif,
  1510. struct ieee80211_sta *sta,
  1511. struct ieee80211_key_conf *key)
  1512. {
  1513. struct ath_wiphy *aphy = hw->priv;
  1514. struct ath_softc *sc = aphy->sc;
  1515. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1516. int ret = 0;
  1517. if (modparam_nohwcrypt)
  1518. return -ENOSPC;
  1519. mutex_lock(&sc->mutex);
  1520. ath9k_ps_wakeup(sc);
  1521. ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1522. switch (cmd) {
  1523. case SET_KEY:
  1524. ret = ath_key_config(common, vif, sta, key);
  1525. if (ret >= 0) {
  1526. key->hw_key_idx = ret;
  1527. /* push IV and Michael MIC generation to stack */
  1528. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1529. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1530. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1531. if (sc->sc_ah->sw_mgmt_crypto &&
  1532. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1533. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1534. ret = 0;
  1535. }
  1536. break;
  1537. case DISABLE_KEY:
  1538. ath_key_delete(common, key);
  1539. break;
  1540. default:
  1541. ret = -EINVAL;
  1542. }
  1543. ath9k_ps_restore(sc);
  1544. mutex_unlock(&sc->mutex);
  1545. return ret;
  1546. }
  1547. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1548. struct ieee80211_vif *vif,
  1549. struct ieee80211_bss_conf *bss_conf,
  1550. u32 changed)
  1551. {
  1552. struct ath_wiphy *aphy = hw->priv;
  1553. struct ath_softc *sc = aphy->sc;
  1554. struct ath_hw *ah = sc->sc_ah;
  1555. struct ath_common *common = ath9k_hw_common(ah);
  1556. struct ath_vif *avp = (void *)vif->drv_priv;
  1557. int slottime;
  1558. int error;
  1559. mutex_lock(&sc->mutex);
  1560. if (changed & BSS_CHANGED_BSSID) {
  1561. /* Set BSSID */
  1562. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1563. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1564. common->curaid = 0;
  1565. ath9k_hw_write_associd(ah);
  1566. /* Set aggregation protection mode parameters */
  1567. sc->config.ath_aggr_prot = 0;
  1568. /* Only legacy IBSS for now */
  1569. if (vif->type == NL80211_IFTYPE_ADHOC)
  1570. ath_update_chainmask(sc, 0);
  1571. ath_print(common, ATH_DBG_CONFIG,
  1572. "BSSID: %pM aid: 0x%x\n",
  1573. common->curbssid, common->curaid);
  1574. /* need to reconfigure the beacon */
  1575. sc->sc_flags &= ~SC_OP_BEACONS ;
  1576. }
  1577. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1578. if ((changed & BSS_CHANGED_BEACON) ||
  1579. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1580. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1581. error = ath_beacon_alloc(aphy, vif);
  1582. if (!error)
  1583. ath_beacon_config(sc, vif);
  1584. }
  1585. if (changed & BSS_CHANGED_ERP_SLOT) {
  1586. if (bss_conf->use_short_slot)
  1587. slottime = 9;
  1588. else
  1589. slottime = 20;
  1590. if (vif->type == NL80211_IFTYPE_AP) {
  1591. /*
  1592. * Defer update, so that connected stations can adjust
  1593. * their settings at the same time.
  1594. * See beacon.c for more details
  1595. */
  1596. sc->beacon.slottime = slottime;
  1597. sc->beacon.updateslot = UPDATE;
  1598. } else {
  1599. ah->slottime = slottime;
  1600. ath9k_hw_init_global_settings(ah);
  1601. }
  1602. }
  1603. /* Disable transmission of beacons */
  1604. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1605. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1606. if (changed & BSS_CHANGED_BEACON_INT) {
  1607. sc->beacon_interval = bss_conf->beacon_int;
  1608. /*
  1609. * In case of AP mode, the HW TSF has to be reset
  1610. * when the beacon interval changes.
  1611. */
  1612. if (vif->type == NL80211_IFTYPE_AP) {
  1613. sc->sc_flags |= SC_OP_TSF_RESET;
  1614. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1615. error = ath_beacon_alloc(aphy, vif);
  1616. if (!error)
  1617. ath_beacon_config(sc, vif);
  1618. } else {
  1619. ath_beacon_config(sc, vif);
  1620. }
  1621. }
  1622. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1623. ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1624. bss_conf->use_short_preamble);
  1625. if (bss_conf->use_short_preamble)
  1626. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1627. else
  1628. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1629. }
  1630. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1631. ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1632. bss_conf->use_cts_prot);
  1633. if (bss_conf->use_cts_prot &&
  1634. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1635. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1636. else
  1637. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1638. }
  1639. if (changed & BSS_CHANGED_ASSOC) {
  1640. ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1641. bss_conf->assoc);
  1642. ath9k_bss_assoc_info(sc, vif, bss_conf);
  1643. }
  1644. mutex_unlock(&sc->mutex);
  1645. }
  1646. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1647. {
  1648. u64 tsf;
  1649. struct ath_wiphy *aphy = hw->priv;
  1650. struct ath_softc *sc = aphy->sc;
  1651. mutex_lock(&sc->mutex);
  1652. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1653. mutex_unlock(&sc->mutex);
  1654. return tsf;
  1655. }
  1656. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1657. {
  1658. struct ath_wiphy *aphy = hw->priv;
  1659. struct ath_softc *sc = aphy->sc;
  1660. mutex_lock(&sc->mutex);
  1661. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1662. mutex_unlock(&sc->mutex);
  1663. }
  1664. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1665. {
  1666. struct ath_wiphy *aphy = hw->priv;
  1667. struct ath_softc *sc = aphy->sc;
  1668. mutex_lock(&sc->mutex);
  1669. ath9k_ps_wakeup(sc);
  1670. ath9k_hw_reset_tsf(sc->sc_ah);
  1671. ath9k_ps_restore(sc);
  1672. mutex_unlock(&sc->mutex);
  1673. }
  1674. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1675. struct ieee80211_vif *vif,
  1676. enum ieee80211_ampdu_mlme_action action,
  1677. struct ieee80211_sta *sta,
  1678. u16 tid, u16 *ssn)
  1679. {
  1680. struct ath_wiphy *aphy = hw->priv;
  1681. struct ath_softc *sc = aphy->sc;
  1682. int ret = 0;
  1683. local_bh_disable();
  1684. switch (action) {
  1685. case IEEE80211_AMPDU_RX_START:
  1686. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1687. ret = -ENOTSUPP;
  1688. break;
  1689. case IEEE80211_AMPDU_RX_STOP:
  1690. break;
  1691. case IEEE80211_AMPDU_TX_START:
  1692. ath9k_ps_wakeup(sc);
  1693. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1694. if (!ret)
  1695. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1696. ath9k_ps_restore(sc);
  1697. break;
  1698. case IEEE80211_AMPDU_TX_STOP:
  1699. ath9k_ps_wakeup(sc);
  1700. ath_tx_aggr_stop(sc, sta, tid);
  1701. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1702. ath9k_ps_restore(sc);
  1703. break;
  1704. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1705. ath9k_ps_wakeup(sc);
  1706. ath_tx_aggr_resume(sc, sta, tid);
  1707. ath9k_ps_restore(sc);
  1708. break;
  1709. default:
  1710. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  1711. "Unknown AMPDU action\n");
  1712. }
  1713. local_bh_enable();
  1714. return ret;
  1715. }
  1716. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1717. struct survey_info *survey)
  1718. {
  1719. struct ath_wiphy *aphy = hw->priv;
  1720. struct ath_softc *sc = aphy->sc;
  1721. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1722. struct ieee80211_supported_band *sband;
  1723. struct ieee80211_channel *chan;
  1724. unsigned long flags;
  1725. int pos;
  1726. spin_lock_irqsave(&common->cc_lock, flags);
  1727. if (idx == 0)
  1728. ath_update_survey_stats(sc);
  1729. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1730. if (sband && idx >= sband->n_channels) {
  1731. idx -= sband->n_channels;
  1732. sband = NULL;
  1733. }
  1734. if (!sband)
  1735. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1736. if (!sband || idx >= sband->n_channels) {
  1737. spin_unlock_irqrestore(&common->cc_lock, flags);
  1738. return -ENOENT;
  1739. }
  1740. chan = &sband->channels[idx];
  1741. pos = chan->hw_value;
  1742. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1743. survey->channel = chan;
  1744. spin_unlock_irqrestore(&common->cc_lock, flags);
  1745. return 0;
  1746. }
  1747. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1748. {
  1749. struct ath_wiphy *aphy = hw->priv;
  1750. struct ath_softc *sc = aphy->sc;
  1751. mutex_lock(&sc->mutex);
  1752. if (ath9k_wiphy_scanning(sc)) {
  1753. /*
  1754. * There is a race here in mac80211 but fixing it requires
  1755. * we revisit how we handle the scan complete callback.
  1756. * After mac80211 fixes we will not have configured hardware
  1757. * to the home channel nor would we have configured the RX
  1758. * filter yet.
  1759. */
  1760. mutex_unlock(&sc->mutex);
  1761. return;
  1762. }
  1763. aphy->state = ATH_WIPHY_SCAN;
  1764. ath9k_wiphy_pause_all_forced(sc, aphy);
  1765. mutex_unlock(&sc->mutex);
  1766. }
  1767. /*
  1768. * XXX: this requires a revisit after the driver
  1769. * scan_complete gets moved to another place/removed in mac80211.
  1770. */
  1771. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1772. {
  1773. struct ath_wiphy *aphy = hw->priv;
  1774. struct ath_softc *sc = aphy->sc;
  1775. mutex_lock(&sc->mutex);
  1776. aphy->state = ATH_WIPHY_ACTIVE;
  1777. mutex_unlock(&sc->mutex);
  1778. }
  1779. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1780. {
  1781. struct ath_wiphy *aphy = hw->priv;
  1782. struct ath_softc *sc = aphy->sc;
  1783. struct ath_hw *ah = sc->sc_ah;
  1784. mutex_lock(&sc->mutex);
  1785. ah->coverage_class = coverage_class;
  1786. ath9k_hw_init_global_settings(ah);
  1787. mutex_unlock(&sc->mutex);
  1788. }
  1789. struct ieee80211_ops ath9k_ops = {
  1790. .tx = ath9k_tx,
  1791. .start = ath9k_start,
  1792. .stop = ath9k_stop,
  1793. .add_interface = ath9k_add_interface,
  1794. .remove_interface = ath9k_remove_interface,
  1795. .config = ath9k_config,
  1796. .configure_filter = ath9k_configure_filter,
  1797. .sta_add = ath9k_sta_add,
  1798. .sta_remove = ath9k_sta_remove,
  1799. .conf_tx = ath9k_conf_tx,
  1800. .bss_info_changed = ath9k_bss_info_changed,
  1801. .set_key = ath9k_set_key,
  1802. .get_tsf = ath9k_get_tsf,
  1803. .set_tsf = ath9k_set_tsf,
  1804. .reset_tsf = ath9k_reset_tsf,
  1805. .ampdu_action = ath9k_ampdu_action,
  1806. .get_survey = ath9k_get_survey,
  1807. .sw_scan_start = ath9k_sw_scan_start,
  1808. .sw_scan_complete = ath9k_sw_scan_complete,
  1809. .rfkill_poll = ath9k_rfkill_poll_state,
  1810. .set_coverage_class = ath9k_set_coverage_class,
  1811. };