x86.c 74 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. *
  8. * Authors:
  9. * Avi Kivity <avi@qumranet.com>
  10. * Yaniv Kamay <yaniv@qumranet.com>
  11. *
  12. * This work is licensed under the terms of the GNU GPL, version 2. See
  13. * the COPYING file in the top-level directory.
  14. *
  15. */
  16. #include <linux/kvm_host.h>
  17. #include "segment_descriptor.h"
  18. #include "irq.h"
  19. #include "mmu.h"
  20. #include <linux/kvm.h>
  21. #include <linux/fs.h>
  22. #include <linux/vmalloc.h>
  23. #include <linux/module.h>
  24. #include <linux/mman.h>
  25. #include <linux/highmem.h>
  26. #include <asm/uaccess.h>
  27. #include <asm/msr.h>
  28. #define MAX_IO_MSRS 256
  29. #define CR0_RESERVED_BITS \
  30. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  31. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  32. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  33. #define CR4_RESERVED_BITS \
  34. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  35. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  36. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  37. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  38. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  39. #define EFER_RESERVED_BITS 0xfffffffffffff2fe
  40. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  41. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  42. struct kvm_x86_ops *kvm_x86_ops;
  43. struct kvm_stats_debugfs_item debugfs_entries[] = {
  44. { "pf_fixed", VCPU_STAT(pf_fixed) },
  45. { "pf_guest", VCPU_STAT(pf_guest) },
  46. { "tlb_flush", VCPU_STAT(tlb_flush) },
  47. { "invlpg", VCPU_STAT(invlpg) },
  48. { "exits", VCPU_STAT(exits) },
  49. { "io_exits", VCPU_STAT(io_exits) },
  50. { "mmio_exits", VCPU_STAT(mmio_exits) },
  51. { "signal_exits", VCPU_STAT(signal_exits) },
  52. { "irq_window", VCPU_STAT(irq_window_exits) },
  53. { "halt_exits", VCPU_STAT(halt_exits) },
  54. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  55. { "request_irq", VCPU_STAT(request_irq_exits) },
  56. { "irq_exits", VCPU_STAT(irq_exits) },
  57. { "host_state_reload", VCPU_STAT(host_state_reload) },
  58. { "efer_reload", VCPU_STAT(efer_reload) },
  59. { "fpu_reload", VCPU_STAT(fpu_reload) },
  60. { "insn_emulation", VCPU_STAT(insn_emulation) },
  61. { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
  62. { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
  63. { "mmu_pte_write", VM_STAT(mmu_pte_write) },
  64. { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
  65. { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
  66. { "mmu_flooded", VM_STAT(mmu_flooded) },
  67. { "mmu_recycled", VM_STAT(mmu_recycled) },
  68. { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
  69. { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  70. { NULL }
  71. };
  72. unsigned long segment_base(u16 selector)
  73. {
  74. struct descriptor_table gdt;
  75. struct segment_descriptor *d;
  76. unsigned long table_base;
  77. unsigned long v;
  78. if (selector == 0)
  79. return 0;
  80. asm("sgdt %0" : "=m"(gdt));
  81. table_base = gdt.base;
  82. if (selector & 4) { /* from ldt */
  83. u16 ldt_selector;
  84. asm("sldt %0" : "=g"(ldt_selector));
  85. table_base = segment_base(ldt_selector);
  86. }
  87. d = (struct segment_descriptor *)(table_base + (selector & ~7));
  88. v = d->base_low | ((unsigned long)d->base_mid << 16) |
  89. ((unsigned long)d->base_high << 24);
  90. #ifdef CONFIG_X86_64
  91. if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  92. v |= ((unsigned long) \
  93. ((struct segment_descriptor_64 *)d)->base_higher) << 32;
  94. #endif
  95. return v;
  96. }
  97. EXPORT_SYMBOL_GPL(segment_base);
  98. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  99. {
  100. if (irqchip_in_kernel(vcpu->kvm))
  101. return vcpu->arch.apic_base;
  102. else
  103. return vcpu->arch.apic_base;
  104. }
  105. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  106. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  107. {
  108. /* TODO: reserve bits check */
  109. if (irqchip_in_kernel(vcpu->kvm))
  110. kvm_lapic_set_base(vcpu, data);
  111. else
  112. vcpu->arch.apic_base = data;
  113. }
  114. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  115. void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
  116. {
  117. WARN_ON(vcpu->arch.exception.pending);
  118. vcpu->arch.exception.pending = true;
  119. vcpu->arch.exception.has_error_code = false;
  120. vcpu->arch.exception.nr = nr;
  121. }
  122. EXPORT_SYMBOL_GPL(kvm_queue_exception);
  123. void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
  124. u32 error_code)
  125. {
  126. ++vcpu->stat.pf_guest;
  127. if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
  128. printk(KERN_DEBUG "kvm: inject_page_fault:"
  129. " double fault 0x%lx\n", addr);
  130. vcpu->arch.exception.nr = DF_VECTOR;
  131. vcpu->arch.exception.error_code = 0;
  132. return;
  133. }
  134. vcpu->arch.cr2 = addr;
  135. kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
  136. }
  137. void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
  138. {
  139. WARN_ON(vcpu->arch.exception.pending);
  140. vcpu->arch.exception.pending = true;
  141. vcpu->arch.exception.has_error_code = true;
  142. vcpu->arch.exception.nr = nr;
  143. vcpu->arch.exception.error_code = error_code;
  144. }
  145. EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
  146. static void __queue_exception(struct kvm_vcpu *vcpu)
  147. {
  148. kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
  149. vcpu->arch.exception.has_error_code,
  150. vcpu->arch.exception.error_code);
  151. }
  152. /*
  153. * Load the pae pdptrs. Return true is they are all valid.
  154. */
  155. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  156. {
  157. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  158. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  159. int i;
  160. int ret;
  161. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  162. mutex_lock(&vcpu->kvm->lock);
  163. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  164. offset * sizeof(u64), sizeof(pdpte));
  165. if (ret < 0) {
  166. ret = 0;
  167. goto out;
  168. }
  169. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  170. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  171. ret = 0;
  172. goto out;
  173. }
  174. }
  175. ret = 1;
  176. memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
  177. out:
  178. mutex_unlock(&vcpu->kvm->lock);
  179. return ret;
  180. }
  181. static bool pdptrs_changed(struct kvm_vcpu *vcpu)
  182. {
  183. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  184. bool changed = true;
  185. int r;
  186. if (is_long_mode(vcpu) || !is_pae(vcpu))
  187. return false;
  188. mutex_lock(&vcpu->kvm->lock);
  189. r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
  190. if (r < 0)
  191. goto out;
  192. changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
  193. out:
  194. mutex_unlock(&vcpu->kvm->lock);
  195. return changed;
  196. }
  197. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  198. {
  199. if (cr0 & CR0_RESERVED_BITS) {
  200. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  201. cr0, vcpu->arch.cr0);
  202. kvm_inject_gp(vcpu, 0);
  203. return;
  204. }
  205. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  206. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  207. kvm_inject_gp(vcpu, 0);
  208. return;
  209. }
  210. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  211. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  212. "and a clear PE flag\n");
  213. kvm_inject_gp(vcpu, 0);
  214. return;
  215. }
  216. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  217. #ifdef CONFIG_X86_64
  218. if ((vcpu->arch.shadow_efer & EFER_LME)) {
  219. int cs_db, cs_l;
  220. if (!is_pae(vcpu)) {
  221. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  222. "in long mode while PAE is disabled\n");
  223. kvm_inject_gp(vcpu, 0);
  224. return;
  225. }
  226. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  227. if (cs_l) {
  228. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  229. "in long mode while CS.L == 1\n");
  230. kvm_inject_gp(vcpu, 0);
  231. return;
  232. }
  233. } else
  234. #endif
  235. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  236. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  237. "reserved bits\n");
  238. kvm_inject_gp(vcpu, 0);
  239. return;
  240. }
  241. }
  242. kvm_x86_ops->set_cr0(vcpu, cr0);
  243. vcpu->arch.cr0 = cr0;
  244. mutex_lock(&vcpu->kvm->lock);
  245. kvm_mmu_reset_context(vcpu);
  246. mutex_unlock(&vcpu->kvm->lock);
  247. return;
  248. }
  249. EXPORT_SYMBOL_GPL(set_cr0);
  250. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  251. {
  252. set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
  253. }
  254. EXPORT_SYMBOL_GPL(lmsw);
  255. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  256. {
  257. if (cr4 & CR4_RESERVED_BITS) {
  258. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  259. kvm_inject_gp(vcpu, 0);
  260. return;
  261. }
  262. if (is_long_mode(vcpu)) {
  263. if (!(cr4 & X86_CR4_PAE)) {
  264. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  265. "in long mode\n");
  266. kvm_inject_gp(vcpu, 0);
  267. return;
  268. }
  269. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  270. && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  271. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  272. kvm_inject_gp(vcpu, 0);
  273. return;
  274. }
  275. if (cr4 & X86_CR4_VMXE) {
  276. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  277. kvm_inject_gp(vcpu, 0);
  278. return;
  279. }
  280. kvm_x86_ops->set_cr4(vcpu, cr4);
  281. vcpu->arch.cr4 = cr4;
  282. mutex_lock(&vcpu->kvm->lock);
  283. kvm_mmu_reset_context(vcpu);
  284. mutex_unlock(&vcpu->kvm->lock);
  285. }
  286. EXPORT_SYMBOL_GPL(set_cr4);
  287. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  288. {
  289. if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
  290. kvm_mmu_flush_tlb(vcpu);
  291. return;
  292. }
  293. if (is_long_mode(vcpu)) {
  294. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  295. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  296. kvm_inject_gp(vcpu, 0);
  297. return;
  298. }
  299. } else {
  300. if (is_pae(vcpu)) {
  301. if (cr3 & CR3_PAE_RESERVED_BITS) {
  302. printk(KERN_DEBUG
  303. "set_cr3: #GP, reserved bits\n");
  304. kvm_inject_gp(vcpu, 0);
  305. return;
  306. }
  307. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  308. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  309. "reserved bits\n");
  310. kvm_inject_gp(vcpu, 0);
  311. return;
  312. }
  313. }
  314. /*
  315. * We don't check reserved bits in nonpae mode, because
  316. * this isn't enforced, and VMware depends on this.
  317. */
  318. }
  319. mutex_lock(&vcpu->kvm->lock);
  320. /*
  321. * Does the new cr3 value map to physical memory? (Note, we
  322. * catch an invalid cr3 even in real-mode, because it would
  323. * cause trouble later on when we turn on paging anyway.)
  324. *
  325. * A real CPU would silently accept an invalid cr3 and would
  326. * attempt to use it - with largely undefined (and often hard
  327. * to debug) behavior on the guest side.
  328. */
  329. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  330. kvm_inject_gp(vcpu, 0);
  331. else {
  332. vcpu->arch.cr3 = cr3;
  333. vcpu->arch.mmu.new_cr3(vcpu);
  334. }
  335. mutex_unlock(&vcpu->kvm->lock);
  336. }
  337. EXPORT_SYMBOL_GPL(set_cr3);
  338. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  339. {
  340. if (cr8 & CR8_RESERVED_BITS) {
  341. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  342. kvm_inject_gp(vcpu, 0);
  343. return;
  344. }
  345. if (irqchip_in_kernel(vcpu->kvm))
  346. kvm_lapic_set_tpr(vcpu, cr8);
  347. else
  348. vcpu->arch.cr8 = cr8;
  349. }
  350. EXPORT_SYMBOL_GPL(set_cr8);
  351. unsigned long get_cr8(struct kvm_vcpu *vcpu)
  352. {
  353. if (irqchip_in_kernel(vcpu->kvm))
  354. return kvm_lapic_get_cr8(vcpu);
  355. else
  356. return vcpu->arch.cr8;
  357. }
  358. EXPORT_SYMBOL_GPL(get_cr8);
  359. /*
  360. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  361. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  362. *
  363. * This list is modified at module load time to reflect the
  364. * capabilities of the host cpu.
  365. */
  366. static u32 msrs_to_save[] = {
  367. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  368. MSR_K6_STAR,
  369. #ifdef CONFIG_X86_64
  370. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  371. #endif
  372. MSR_IA32_TIME_STAMP_COUNTER,
  373. };
  374. static unsigned num_msrs_to_save;
  375. static u32 emulated_msrs[] = {
  376. MSR_IA32_MISC_ENABLE,
  377. };
  378. #ifdef CONFIG_X86_64
  379. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  380. {
  381. if (efer & EFER_RESERVED_BITS) {
  382. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  383. efer);
  384. kvm_inject_gp(vcpu, 0);
  385. return;
  386. }
  387. if (is_paging(vcpu)
  388. && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  389. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  390. kvm_inject_gp(vcpu, 0);
  391. return;
  392. }
  393. kvm_x86_ops->set_efer(vcpu, efer);
  394. efer &= ~EFER_LMA;
  395. efer |= vcpu->arch.shadow_efer & EFER_LMA;
  396. vcpu->arch.shadow_efer = efer;
  397. }
  398. #endif
  399. /*
  400. * Writes msr value into into the appropriate "register".
  401. * Returns 0 on success, non-0 otherwise.
  402. * Assumes vcpu_load() was already called.
  403. */
  404. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  405. {
  406. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  407. }
  408. /*
  409. * Adapt set_msr() to msr_io()'s calling convention
  410. */
  411. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  412. {
  413. return kvm_set_msr(vcpu, index, *data);
  414. }
  415. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  416. {
  417. switch (msr) {
  418. #ifdef CONFIG_X86_64
  419. case MSR_EFER:
  420. set_efer(vcpu, data);
  421. break;
  422. #endif
  423. case MSR_IA32_MC0_STATUS:
  424. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  425. __FUNCTION__, data);
  426. break;
  427. case MSR_IA32_MCG_STATUS:
  428. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  429. __FUNCTION__, data);
  430. break;
  431. case MSR_IA32_UCODE_REV:
  432. case MSR_IA32_UCODE_WRITE:
  433. case 0x200 ... 0x2ff: /* MTRRs */
  434. break;
  435. case MSR_IA32_APICBASE:
  436. kvm_set_apic_base(vcpu, data);
  437. break;
  438. case MSR_IA32_MISC_ENABLE:
  439. vcpu->arch.ia32_misc_enable_msr = data;
  440. break;
  441. default:
  442. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
  443. return 1;
  444. }
  445. return 0;
  446. }
  447. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  448. /*
  449. * Reads an msr value (of 'msr_index') into 'pdata'.
  450. * Returns 0 on success, non-0 otherwise.
  451. * Assumes vcpu_load() was already called.
  452. */
  453. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  454. {
  455. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  456. }
  457. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  458. {
  459. u64 data;
  460. switch (msr) {
  461. case 0xc0010010: /* SYSCFG */
  462. case 0xc0010015: /* HWCR */
  463. case MSR_IA32_PLATFORM_ID:
  464. case MSR_IA32_P5_MC_ADDR:
  465. case MSR_IA32_P5_MC_TYPE:
  466. case MSR_IA32_MC0_CTL:
  467. case MSR_IA32_MCG_STATUS:
  468. case MSR_IA32_MCG_CAP:
  469. case MSR_IA32_MC0_MISC:
  470. case MSR_IA32_MC0_MISC+4:
  471. case MSR_IA32_MC0_MISC+8:
  472. case MSR_IA32_MC0_MISC+12:
  473. case MSR_IA32_MC0_MISC+16:
  474. case MSR_IA32_UCODE_REV:
  475. case MSR_IA32_PERF_STATUS:
  476. case MSR_IA32_EBL_CR_POWERON:
  477. /* MTRR registers */
  478. case 0xfe:
  479. case 0x200 ... 0x2ff:
  480. data = 0;
  481. break;
  482. case 0xcd: /* fsb frequency */
  483. data = 3;
  484. break;
  485. case MSR_IA32_APICBASE:
  486. data = kvm_get_apic_base(vcpu);
  487. break;
  488. case MSR_IA32_MISC_ENABLE:
  489. data = vcpu->arch.ia32_misc_enable_msr;
  490. break;
  491. #ifdef CONFIG_X86_64
  492. case MSR_EFER:
  493. data = vcpu->arch.shadow_efer;
  494. break;
  495. #endif
  496. default:
  497. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  498. return 1;
  499. }
  500. *pdata = data;
  501. return 0;
  502. }
  503. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  504. /*
  505. * Read or write a bunch of msrs. All parameters are kernel addresses.
  506. *
  507. * @return number of msrs set successfully.
  508. */
  509. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  510. struct kvm_msr_entry *entries,
  511. int (*do_msr)(struct kvm_vcpu *vcpu,
  512. unsigned index, u64 *data))
  513. {
  514. int i;
  515. vcpu_load(vcpu);
  516. for (i = 0; i < msrs->nmsrs; ++i)
  517. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  518. break;
  519. vcpu_put(vcpu);
  520. return i;
  521. }
  522. /*
  523. * Read or write a bunch of msrs. Parameters are user addresses.
  524. *
  525. * @return number of msrs set successfully.
  526. */
  527. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  528. int (*do_msr)(struct kvm_vcpu *vcpu,
  529. unsigned index, u64 *data),
  530. int writeback)
  531. {
  532. struct kvm_msrs msrs;
  533. struct kvm_msr_entry *entries;
  534. int r, n;
  535. unsigned size;
  536. r = -EFAULT;
  537. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  538. goto out;
  539. r = -E2BIG;
  540. if (msrs.nmsrs >= MAX_IO_MSRS)
  541. goto out;
  542. r = -ENOMEM;
  543. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  544. entries = vmalloc(size);
  545. if (!entries)
  546. goto out;
  547. r = -EFAULT;
  548. if (copy_from_user(entries, user_msrs->entries, size))
  549. goto out_free;
  550. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  551. if (r < 0)
  552. goto out_free;
  553. r = -EFAULT;
  554. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  555. goto out_free;
  556. r = n;
  557. out_free:
  558. vfree(entries);
  559. out:
  560. return r;
  561. }
  562. /*
  563. * Make sure that a cpu that is being hot-unplugged does not have any vcpus
  564. * cached on it.
  565. */
  566. void decache_vcpus_on_cpu(int cpu)
  567. {
  568. struct kvm *vm;
  569. struct kvm_vcpu *vcpu;
  570. int i;
  571. spin_lock(&kvm_lock);
  572. list_for_each_entry(vm, &vm_list, vm_list)
  573. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  574. vcpu = vm->vcpus[i];
  575. if (!vcpu)
  576. continue;
  577. /*
  578. * If the vcpu is locked, then it is running on some
  579. * other cpu and therefore it is not cached on the
  580. * cpu in question.
  581. *
  582. * If it's not locked, check the last cpu it executed
  583. * on.
  584. */
  585. if (mutex_trylock(&vcpu->mutex)) {
  586. if (vcpu->cpu == cpu) {
  587. kvm_x86_ops->vcpu_decache(vcpu);
  588. vcpu->cpu = -1;
  589. }
  590. mutex_unlock(&vcpu->mutex);
  591. }
  592. }
  593. spin_unlock(&kvm_lock);
  594. }
  595. int kvm_dev_ioctl_check_extension(long ext)
  596. {
  597. int r;
  598. switch (ext) {
  599. case KVM_CAP_IRQCHIP:
  600. case KVM_CAP_HLT:
  601. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  602. case KVM_CAP_USER_MEMORY:
  603. case KVM_CAP_SET_TSS_ADDR:
  604. case KVM_CAP_EXT_CPUID:
  605. case KVM_CAP_VAPIC:
  606. r = 1;
  607. break;
  608. default:
  609. r = 0;
  610. break;
  611. }
  612. return r;
  613. }
  614. long kvm_arch_dev_ioctl(struct file *filp,
  615. unsigned int ioctl, unsigned long arg)
  616. {
  617. void __user *argp = (void __user *)arg;
  618. long r;
  619. switch (ioctl) {
  620. case KVM_GET_MSR_INDEX_LIST: {
  621. struct kvm_msr_list __user *user_msr_list = argp;
  622. struct kvm_msr_list msr_list;
  623. unsigned n;
  624. r = -EFAULT;
  625. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  626. goto out;
  627. n = msr_list.nmsrs;
  628. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  629. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  630. goto out;
  631. r = -E2BIG;
  632. if (n < num_msrs_to_save)
  633. goto out;
  634. r = -EFAULT;
  635. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  636. num_msrs_to_save * sizeof(u32)))
  637. goto out;
  638. if (copy_to_user(user_msr_list->indices
  639. + num_msrs_to_save * sizeof(u32),
  640. &emulated_msrs,
  641. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  642. goto out;
  643. r = 0;
  644. break;
  645. }
  646. default:
  647. r = -EINVAL;
  648. }
  649. out:
  650. return r;
  651. }
  652. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  653. {
  654. kvm_x86_ops->vcpu_load(vcpu, cpu);
  655. }
  656. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  657. {
  658. kvm_x86_ops->vcpu_put(vcpu);
  659. kvm_put_guest_fpu(vcpu);
  660. }
  661. static int is_efer_nx(void)
  662. {
  663. u64 efer;
  664. rdmsrl(MSR_EFER, efer);
  665. return efer & EFER_NX;
  666. }
  667. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  668. {
  669. int i;
  670. struct kvm_cpuid_entry2 *e, *entry;
  671. entry = NULL;
  672. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  673. e = &vcpu->arch.cpuid_entries[i];
  674. if (e->function == 0x80000001) {
  675. entry = e;
  676. break;
  677. }
  678. }
  679. if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
  680. entry->edx &= ~(1 << 20);
  681. printk(KERN_INFO "kvm: guest NX capability removed\n");
  682. }
  683. }
  684. /* when an old userspace process fills a new kernel module */
  685. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  686. struct kvm_cpuid *cpuid,
  687. struct kvm_cpuid_entry __user *entries)
  688. {
  689. int r, i;
  690. struct kvm_cpuid_entry *cpuid_entries;
  691. r = -E2BIG;
  692. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  693. goto out;
  694. r = -ENOMEM;
  695. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
  696. if (!cpuid_entries)
  697. goto out;
  698. r = -EFAULT;
  699. if (copy_from_user(cpuid_entries, entries,
  700. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  701. goto out_free;
  702. for (i = 0; i < cpuid->nent; i++) {
  703. vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
  704. vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
  705. vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
  706. vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
  707. vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
  708. vcpu->arch.cpuid_entries[i].index = 0;
  709. vcpu->arch.cpuid_entries[i].flags = 0;
  710. vcpu->arch.cpuid_entries[i].padding[0] = 0;
  711. vcpu->arch.cpuid_entries[i].padding[1] = 0;
  712. vcpu->arch.cpuid_entries[i].padding[2] = 0;
  713. }
  714. vcpu->arch.cpuid_nent = cpuid->nent;
  715. cpuid_fix_nx_cap(vcpu);
  716. r = 0;
  717. out_free:
  718. vfree(cpuid_entries);
  719. out:
  720. return r;
  721. }
  722. static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
  723. struct kvm_cpuid2 *cpuid,
  724. struct kvm_cpuid_entry2 __user *entries)
  725. {
  726. int r;
  727. r = -E2BIG;
  728. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  729. goto out;
  730. r = -EFAULT;
  731. if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
  732. cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
  733. goto out;
  734. vcpu->arch.cpuid_nent = cpuid->nent;
  735. return 0;
  736. out:
  737. return r;
  738. }
  739. static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
  740. struct kvm_cpuid2 *cpuid,
  741. struct kvm_cpuid_entry2 __user *entries)
  742. {
  743. int r;
  744. r = -E2BIG;
  745. if (cpuid->nent < vcpu->arch.cpuid_nent)
  746. goto out;
  747. r = -EFAULT;
  748. if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
  749. vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
  750. goto out;
  751. return 0;
  752. out:
  753. cpuid->nent = vcpu->arch.cpuid_nent;
  754. return r;
  755. }
  756. static inline u32 bit(int bitno)
  757. {
  758. return 1 << (bitno & 31);
  759. }
  760. static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  761. u32 index)
  762. {
  763. entry->function = function;
  764. entry->index = index;
  765. cpuid_count(entry->function, entry->index,
  766. &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
  767. entry->flags = 0;
  768. }
  769. static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  770. u32 index, int *nent, int maxnent)
  771. {
  772. const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
  773. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  774. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  775. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  776. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  777. bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
  778. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  779. bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
  780. bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
  781. bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
  782. const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
  783. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  784. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  785. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  786. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  787. bit(X86_FEATURE_PGE) |
  788. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  789. bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
  790. bit(X86_FEATURE_SYSCALL) |
  791. (bit(X86_FEATURE_NX) && is_efer_nx()) |
  792. #ifdef CONFIG_X86_64
  793. bit(X86_FEATURE_LM) |
  794. #endif
  795. bit(X86_FEATURE_MMXEXT) |
  796. bit(X86_FEATURE_3DNOWEXT) |
  797. bit(X86_FEATURE_3DNOW);
  798. const u32 kvm_supported_word3_x86_features =
  799. bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
  800. const u32 kvm_supported_word6_x86_features =
  801. bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
  802. /* all func 2 cpuid_count() should be called on the same cpu */
  803. get_cpu();
  804. do_cpuid_1_ent(entry, function, index);
  805. ++*nent;
  806. switch (function) {
  807. case 0:
  808. entry->eax = min(entry->eax, (u32)0xb);
  809. break;
  810. case 1:
  811. entry->edx &= kvm_supported_word0_x86_features;
  812. entry->ecx &= kvm_supported_word3_x86_features;
  813. break;
  814. /* function 2 entries are STATEFUL. That is, repeated cpuid commands
  815. * may return different values. This forces us to get_cpu() before
  816. * issuing the first command, and also to emulate this annoying behavior
  817. * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
  818. case 2: {
  819. int t, times = entry->eax & 0xff;
  820. entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  821. for (t = 1; t < times && *nent < maxnent; ++t) {
  822. do_cpuid_1_ent(&entry[t], function, 0);
  823. entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  824. ++*nent;
  825. }
  826. break;
  827. }
  828. /* function 4 and 0xb have additional index. */
  829. case 4: {
  830. int index, cache_type;
  831. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  832. /* read more entries until cache_type is zero */
  833. for (index = 1; *nent < maxnent; ++index) {
  834. cache_type = entry[index - 1].eax & 0x1f;
  835. if (!cache_type)
  836. break;
  837. do_cpuid_1_ent(&entry[index], function, index);
  838. entry[index].flags |=
  839. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  840. ++*nent;
  841. }
  842. break;
  843. }
  844. case 0xb: {
  845. int index, level_type;
  846. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  847. /* read more entries until level_type is zero */
  848. for (index = 1; *nent < maxnent; ++index) {
  849. level_type = entry[index - 1].ecx & 0xff;
  850. if (!level_type)
  851. break;
  852. do_cpuid_1_ent(&entry[index], function, index);
  853. entry[index].flags |=
  854. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  855. ++*nent;
  856. }
  857. break;
  858. }
  859. case 0x80000000:
  860. entry->eax = min(entry->eax, 0x8000001a);
  861. break;
  862. case 0x80000001:
  863. entry->edx &= kvm_supported_word1_x86_features;
  864. entry->ecx &= kvm_supported_word6_x86_features;
  865. break;
  866. }
  867. put_cpu();
  868. }
  869. static int kvm_vm_ioctl_get_supported_cpuid(struct kvm *kvm,
  870. struct kvm_cpuid2 *cpuid,
  871. struct kvm_cpuid_entry2 __user *entries)
  872. {
  873. struct kvm_cpuid_entry2 *cpuid_entries;
  874. int limit, nent = 0, r = -E2BIG;
  875. u32 func;
  876. if (cpuid->nent < 1)
  877. goto out;
  878. r = -ENOMEM;
  879. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
  880. if (!cpuid_entries)
  881. goto out;
  882. do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
  883. limit = cpuid_entries[0].eax;
  884. for (func = 1; func <= limit && nent < cpuid->nent; ++func)
  885. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  886. &nent, cpuid->nent);
  887. r = -E2BIG;
  888. if (nent >= cpuid->nent)
  889. goto out_free;
  890. do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
  891. limit = cpuid_entries[nent - 1].eax;
  892. for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
  893. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  894. &nent, cpuid->nent);
  895. r = -EFAULT;
  896. if (copy_to_user(entries, cpuid_entries,
  897. nent * sizeof(struct kvm_cpuid_entry2)))
  898. goto out_free;
  899. cpuid->nent = nent;
  900. r = 0;
  901. out_free:
  902. vfree(cpuid_entries);
  903. out:
  904. return r;
  905. }
  906. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  907. struct kvm_lapic_state *s)
  908. {
  909. vcpu_load(vcpu);
  910. memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
  911. vcpu_put(vcpu);
  912. return 0;
  913. }
  914. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  915. struct kvm_lapic_state *s)
  916. {
  917. vcpu_load(vcpu);
  918. memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
  919. kvm_apic_post_state_restore(vcpu);
  920. vcpu_put(vcpu);
  921. return 0;
  922. }
  923. static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
  924. struct kvm_interrupt *irq)
  925. {
  926. if (irq->irq < 0 || irq->irq >= 256)
  927. return -EINVAL;
  928. if (irqchip_in_kernel(vcpu->kvm))
  929. return -ENXIO;
  930. vcpu_load(vcpu);
  931. set_bit(irq->irq, vcpu->arch.irq_pending);
  932. set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
  933. vcpu_put(vcpu);
  934. return 0;
  935. }
  936. static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
  937. struct kvm_tpr_access_ctl *tac)
  938. {
  939. if (tac->flags)
  940. return -EINVAL;
  941. vcpu->arch.tpr_access_reporting = !!tac->enabled;
  942. return 0;
  943. }
  944. long kvm_arch_vcpu_ioctl(struct file *filp,
  945. unsigned int ioctl, unsigned long arg)
  946. {
  947. struct kvm_vcpu *vcpu = filp->private_data;
  948. void __user *argp = (void __user *)arg;
  949. int r;
  950. switch (ioctl) {
  951. case KVM_GET_LAPIC: {
  952. struct kvm_lapic_state lapic;
  953. memset(&lapic, 0, sizeof lapic);
  954. r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
  955. if (r)
  956. goto out;
  957. r = -EFAULT;
  958. if (copy_to_user(argp, &lapic, sizeof lapic))
  959. goto out;
  960. r = 0;
  961. break;
  962. }
  963. case KVM_SET_LAPIC: {
  964. struct kvm_lapic_state lapic;
  965. r = -EFAULT;
  966. if (copy_from_user(&lapic, argp, sizeof lapic))
  967. goto out;
  968. r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
  969. if (r)
  970. goto out;
  971. r = 0;
  972. break;
  973. }
  974. case KVM_INTERRUPT: {
  975. struct kvm_interrupt irq;
  976. r = -EFAULT;
  977. if (copy_from_user(&irq, argp, sizeof irq))
  978. goto out;
  979. r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
  980. if (r)
  981. goto out;
  982. r = 0;
  983. break;
  984. }
  985. case KVM_SET_CPUID: {
  986. struct kvm_cpuid __user *cpuid_arg = argp;
  987. struct kvm_cpuid cpuid;
  988. r = -EFAULT;
  989. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  990. goto out;
  991. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  992. if (r)
  993. goto out;
  994. break;
  995. }
  996. case KVM_SET_CPUID2: {
  997. struct kvm_cpuid2 __user *cpuid_arg = argp;
  998. struct kvm_cpuid2 cpuid;
  999. r = -EFAULT;
  1000. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1001. goto out;
  1002. r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
  1003. cpuid_arg->entries);
  1004. if (r)
  1005. goto out;
  1006. break;
  1007. }
  1008. case KVM_GET_CPUID2: {
  1009. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1010. struct kvm_cpuid2 cpuid;
  1011. r = -EFAULT;
  1012. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1013. goto out;
  1014. r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
  1015. cpuid_arg->entries);
  1016. if (r)
  1017. goto out;
  1018. r = -EFAULT;
  1019. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1020. goto out;
  1021. r = 0;
  1022. break;
  1023. }
  1024. case KVM_GET_MSRS:
  1025. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  1026. break;
  1027. case KVM_SET_MSRS:
  1028. r = msr_io(vcpu, argp, do_set_msr, 0);
  1029. break;
  1030. case KVM_TPR_ACCESS_REPORTING: {
  1031. struct kvm_tpr_access_ctl tac;
  1032. r = -EFAULT;
  1033. if (copy_from_user(&tac, argp, sizeof tac))
  1034. goto out;
  1035. r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
  1036. if (r)
  1037. goto out;
  1038. r = -EFAULT;
  1039. if (copy_to_user(argp, &tac, sizeof tac))
  1040. goto out;
  1041. r = 0;
  1042. break;
  1043. };
  1044. default:
  1045. r = -EINVAL;
  1046. }
  1047. out:
  1048. return r;
  1049. }
  1050. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  1051. {
  1052. int ret;
  1053. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  1054. return -1;
  1055. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  1056. return ret;
  1057. }
  1058. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  1059. u32 kvm_nr_mmu_pages)
  1060. {
  1061. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  1062. return -EINVAL;
  1063. mutex_lock(&kvm->lock);
  1064. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  1065. kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
  1066. mutex_unlock(&kvm->lock);
  1067. return 0;
  1068. }
  1069. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  1070. {
  1071. return kvm->arch.n_alloc_mmu_pages;
  1072. }
  1073. gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
  1074. {
  1075. int i;
  1076. struct kvm_mem_alias *alias;
  1077. for (i = 0; i < kvm->arch.naliases; ++i) {
  1078. alias = &kvm->arch.aliases[i];
  1079. if (gfn >= alias->base_gfn
  1080. && gfn < alias->base_gfn + alias->npages)
  1081. return alias->target_gfn + gfn - alias->base_gfn;
  1082. }
  1083. return gfn;
  1084. }
  1085. /*
  1086. * Set a new alias region. Aliases map a portion of physical memory into
  1087. * another portion. This is useful for memory windows, for example the PC
  1088. * VGA region.
  1089. */
  1090. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  1091. struct kvm_memory_alias *alias)
  1092. {
  1093. int r, n;
  1094. struct kvm_mem_alias *p;
  1095. r = -EINVAL;
  1096. /* General sanity checks */
  1097. if (alias->memory_size & (PAGE_SIZE - 1))
  1098. goto out;
  1099. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  1100. goto out;
  1101. if (alias->slot >= KVM_ALIAS_SLOTS)
  1102. goto out;
  1103. if (alias->guest_phys_addr + alias->memory_size
  1104. < alias->guest_phys_addr)
  1105. goto out;
  1106. if (alias->target_phys_addr + alias->memory_size
  1107. < alias->target_phys_addr)
  1108. goto out;
  1109. mutex_lock(&kvm->lock);
  1110. p = &kvm->arch.aliases[alias->slot];
  1111. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  1112. p->npages = alias->memory_size >> PAGE_SHIFT;
  1113. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  1114. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  1115. if (kvm->arch.aliases[n - 1].npages)
  1116. break;
  1117. kvm->arch.naliases = n;
  1118. kvm_mmu_zap_all(kvm);
  1119. mutex_unlock(&kvm->lock);
  1120. return 0;
  1121. out:
  1122. return r;
  1123. }
  1124. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1125. {
  1126. int r;
  1127. r = 0;
  1128. switch (chip->chip_id) {
  1129. case KVM_IRQCHIP_PIC_MASTER:
  1130. memcpy(&chip->chip.pic,
  1131. &pic_irqchip(kvm)->pics[0],
  1132. sizeof(struct kvm_pic_state));
  1133. break;
  1134. case KVM_IRQCHIP_PIC_SLAVE:
  1135. memcpy(&chip->chip.pic,
  1136. &pic_irqchip(kvm)->pics[1],
  1137. sizeof(struct kvm_pic_state));
  1138. break;
  1139. case KVM_IRQCHIP_IOAPIC:
  1140. memcpy(&chip->chip.ioapic,
  1141. ioapic_irqchip(kvm),
  1142. sizeof(struct kvm_ioapic_state));
  1143. break;
  1144. default:
  1145. r = -EINVAL;
  1146. break;
  1147. }
  1148. return r;
  1149. }
  1150. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1151. {
  1152. int r;
  1153. r = 0;
  1154. switch (chip->chip_id) {
  1155. case KVM_IRQCHIP_PIC_MASTER:
  1156. memcpy(&pic_irqchip(kvm)->pics[0],
  1157. &chip->chip.pic,
  1158. sizeof(struct kvm_pic_state));
  1159. break;
  1160. case KVM_IRQCHIP_PIC_SLAVE:
  1161. memcpy(&pic_irqchip(kvm)->pics[1],
  1162. &chip->chip.pic,
  1163. sizeof(struct kvm_pic_state));
  1164. break;
  1165. case KVM_IRQCHIP_IOAPIC:
  1166. memcpy(ioapic_irqchip(kvm),
  1167. &chip->chip.ioapic,
  1168. sizeof(struct kvm_ioapic_state));
  1169. break;
  1170. default:
  1171. r = -EINVAL;
  1172. break;
  1173. }
  1174. kvm_pic_update_irq(pic_irqchip(kvm));
  1175. return r;
  1176. }
  1177. /*
  1178. * Get (and clear) the dirty memory log for a memory slot.
  1179. */
  1180. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
  1181. struct kvm_dirty_log *log)
  1182. {
  1183. int r;
  1184. int n;
  1185. struct kvm_memory_slot *memslot;
  1186. int is_dirty = 0;
  1187. mutex_lock(&kvm->lock);
  1188. r = kvm_get_dirty_log(kvm, log, &is_dirty);
  1189. if (r)
  1190. goto out;
  1191. /* If nothing is dirty, don't bother messing with page tables. */
  1192. if (is_dirty) {
  1193. kvm_mmu_slot_remove_write_access(kvm, log->slot);
  1194. kvm_flush_remote_tlbs(kvm);
  1195. memslot = &kvm->memslots[log->slot];
  1196. n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
  1197. memset(memslot->dirty_bitmap, 0, n);
  1198. }
  1199. r = 0;
  1200. out:
  1201. mutex_unlock(&kvm->lock);
  1202. return r;
  1203. }
  1204. long kvm_arch_vm_ioctl(struct file *filp,
  1205. unsigned int ioctl, unsigned long arg)
  1206. {
  1207. struct kvm *kvm = filp->private_data;
  1208. void __user *argp = (void __user *)arg;
  1209. int r = -EINVAL;
  1210. switch (ioctl) {
  1211. case KVM_SET_TSS_ADDR:
  1212. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  1213. if (r < 0)
  1214. goto out;
  1215. break;
  1216. case KVM_SET_MEMORY_REGION: {
  1217. struct kvm_memory_region kvm_mem;
  1218. struct kvm_userspace_memory_region kvm_userspace_mem;
  1219. r = -EFAULT;
  1220. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  1221. goto out;
  1222. kvm_userspace_mem.slot = kvm_mem.slot;
  1223. kvm_userspace_mem.flags = kvm_mem.flags;
  1224. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  1225. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  1226. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  1227. if (r)
  1228. goto out;
  1229. break;
  1230. }
  1231. case KVM_SET_NR_MMU_PAGES:
  1232. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  1233. if (r)
  1234. goto out;
  1235. break;
  1236. case KVM_GET_NR_MMU_PAGES:
  1237. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  1238. break;
  1239. case KVM_SET_MEMORY_ALIAS: {
  1240. struct kvm_memory_alias alias;
  1241. r = -EFAULT;
  1242. if (copy_from_user(&alias, argp, sizeof alias))
  1243. goto out;
  1244. r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
  1245. if (r)
  1246. goto out;
  1247. break;
  1248. }
  1249. case KVM_CREATE_IRQCHIP:
  1250. r = -ENOMEM;
  1251. kvm->arch.vpic = kvm_create_pic(kvm);
  1252. if (kvm->arch.vpic) {
  1253. r = kvm_ioapic_init(kvm);
  1254. if (r) {
  1255. kfree(kvm->arch.vpic);
  1256. kvm->arch.vpic = NULL;
  1257. goto out;
  1258. }
  1259. } else
  1260. goto out;
  1261. break;
  1262. case KVM_IRQ_LINE: {
  1263. struct kvm_irq_level irq_event;
  1264. r = -EFAULT;
  1265. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  1266. goto out;
  1267. if (irqchip_in_kernel(kvm)) {
  1268. mutex_lock(&kvm->lock);
  1269. if (irq_event.irq < 16)
  1270. kvm_pic_set_irq(pic_irqchip(kvm),
  1271. irq_event.irq,
  1272. irq_event.level);
  1273. kvm_ioapic_set_irq(kvm->arch.vioapic,
  1274. irq_event.irq,
  1275. irq_event.level);
  1276. mutex_unlock(&kvm->lock);
  1277. r = 0;
  1278. }
  1279. break;
  1280. }
  1281. case KVM_GET_IRQCHIP: {
  1282. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1283. struct kvm_irqchip chip;
  1284. r = -EFAULT;
  1285. if (copy_from_user(&chip, argp, sizeof chip))
  1286. goto out;
  1287. r = -ENXIO;
  1288. if (!irqchip_in_kernel(kvm))
  1289. goto out;
  1290. r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
  1291. if (r)
  1292. goto out;
  1293. r = -EFAULT;
  1294. if (copy_to_user(argp, &chip, sizeof chip))
  1295. goto out;
  1296. r = 0;
  1297. break;
  1298. }
  1299. case KVM_SET_IRQCHIP: {
  1300. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1301. struct kvm_irqchip chip;
  1302. r = -EFAULT;
  1303. if (copy_from_user(&chip, argp, sizeof chip))
  1304. goto out;
  1305. r = -ENXIO;
  1306. if (!irqchip_in_kernel(kvm))
  1307. goto out;
  1308. r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
  1309. if (r)
  1310. goto out;
  1311. r = 0;
  1312. break;
  1313. }
  1314. case KVM_GET_SUPPORTED_CPUID: {
  1315. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1316. struct kvm_cpuid2 cpuid;
  1317. r = -EFAULT;
  1318. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1319. goto out;
  1320. r = kvm_vm_ioctl_get_supported_cpuid(kvm, &cpuid,
  1321. cpuid_arg->entries);
  1322. if (r)
  1323. goto out;
  1324. r = -EFAULT;
  1325. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1326. goto out;
  1327. r = 0;
  1328. break;
  1329. }
  1330. default:
  1331. ;
  1332. }
  1333. out:
  1334. return r;
  1335. }
  1336. static void kvm_init_msr_list(void)
  1337. {
  1338. u32 dummy[2];
  1339. unsigned i, j;
  1340. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  1341. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  1342. continue;
  1343. if (j < i)
  1344. msrs_to_save[j] = msrs_to_save[i];
  1345. j++;
  1346. }
  1347. num_msrs_to_save = j;
  1348. }
  1349. /*
  1350. * Only apic need an MMIO device hook, so shortcut now..
  1351. */
  1352. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  1353. gpa_t addr)
  1354. {
  1355. struct kvm_io_device *dev;
  1356. if (vcpu->arch.apic) {
  1357. dev = &vcpu->arch.apic->dev;
  1358. if (dev->in_range(dev, addr))
  1359. return dev;
  1360. }
  1361. return NULL;
  1362. }
  1363. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  1364. gpa_t addr)
  1365. {
  1366. struct kvm_io_device *dev;
  1367. dev = vcpu_find_pervcpu_dev(vcpu, addr);
  1368. if (dev == NULL)
  1369. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
  1370. return dev;
  1371. }
  1372. int emulator_read_std(unsigned long addr,
  1373. void *val,
  1374. unsigned int bytes,
  1375. struct kvm_vcpu *vcpu)
  1376. {
  1377. void *data = val;
  1378. while (bytes) {
  1379. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1380. unsigned offset = addr & (PAGE_SIZE-1);
  1381. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  1382. int ret;
  1383. if (gpa == UNMAPPED_GVA)
  1384. return X86EMUL_PROPAGATE_FAULT;
  1385. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  1386. if (ret < 0)
  1387. return X86EMUL_UNHANDLEABLE;
  1388. bytes -= tocopy;
  1389. data += tocopy;
  1390. addr += tocopy;
  1391. }
  1392. return X86EMUL_CONTINUE;
  1393. }
  1394. EXPORT_SYMBOL_GPL(emulator_read_std);
  1395. static int emulator_read_emulated(unsigned long addr,
  1396. void *val,
  1397. unsigned int bytes,
  1398. struct kvm_vcpu *vcpu)
  1399. {
  1400. struct kvm_io_device *mmio_dev;
  1401. gpa_t gpa;
  1402. if (vcpu->mmio_read_completed) {
  1403. memcpy(val, vcpu->mmio_data, bytes);
  1404. vcpu->mmio_read_completed = 0;
  1405. return X86EMUL_CONTINUE;
  1406. }
  1407. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1408. /* For APIC access vmexit */
  1409. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1410. goto mmio;
  1411. if (emulator_read_std(addr, val, bytes, vcpu)
  1412. == X86EMUL_CONTINUE)
  1413. return X86EMUL_CONTINUE;
  1414. if (gpa == UNMAPPED_GVA)
  1415. return X86EMUL_PROPAGATE_FAULT;
  1416. mmio:
  1417. /*
  1418. * Is this MMIO handled locally?
  1419. */
  1420. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1421. if (mmio_dev) {
  1422. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1423. return X86EMUL_CONTINUE;
  1424. }
  1425. vcpu->mmio_needed = 1;
  1426. vcpu->mmio_phys_addr = gpa;
  1427. vcpu->mmio_size = bytes;
  1428. vcpu->mmio_is_write = 0;
  1429. return X86EMUL_UNHANDLEABLE;
  1430. }
  1431. static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1432. const void *val, int bytes)
  1433. {
  1434. int ret;
  1435. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1436. if (ret < 0)
  1437. return 0;
  1438. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1439. return 1;
  1440. }
  1441. static int emulator_write_emulated_onepage(unsigned long addr,
  1442. const void *val,
  1443. unsigned int bytes,
  1444. struct kvm_vcpu *vcpu)
  1445. {
  1446. struct kvm_io_device *mmio_dev;
  1447. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1448. if (gpa == UNMAPPED_GVA) {
  1449. kvm_inject_page_fault(vcpu, addr, 2);
  1450. return X86EMUL_PROPAGATE_FAULT;
  1451. }
  1452. /* For APIC access vmexit */
  1453. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1454. goto mmio;
  1455. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1456. return X86EMUL_CONTINUE;
  1457. mmio:
  1458. /*
  1459. * Is this MMIO handled locally?
  1460. */
  1461. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1462. if (mmio_dev) {
  1463. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1464. return X86EMUL_CONTINUE;
  1465. }
  1466. vcpu->mmio_needed = 1;
  1467. vcpu->mmio_phys_addr = gpa;
  1468. vcpu->mmio_size = bytes;
  1469. vcpu->mmio_is_write = 1;
  1470. memcpy(vcpu->mmio_data, val, bytes);
  1471. return X86EMUL_CONTINUE;
  1472. }
  1473. int emulator_write_emulated(unsigned long addr,
  1474. const void *val,
  1475. unsigned int bytes,
  1476. struct kvm_vcpu *vcpu)
  1477. {
  1478. /* Crossing a page boundary? */
  1479. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1480. int rc, now;
  1481. now = -addr & ~PAGE_MASK;
  1482. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1483. if (rc != X86EMUL_CONTINUE)
  1484. return rc;
  1485. addr += now;
  1486. val += now;
  1487. bytes -= now;
  1488. }
  1489. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  1490. }
  1491. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  1492. static int emulator_cmpxchg_emulated(unsigned long addr,
  1493. const void *old,
  1494. const void *new,
  1495. unsigned int bytes,
  1496. struct kvm_vcpu *vcpu)
  1497. {
  1498. static int reported;
  1499. if (!reported) {
  1500. reported = 1;
  1501. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  1502. }
  1503. #ifndef CONFIG_X86_64
  1504. /* guests cmpxchg8b have to be emulated atomically */
  1505. if (bytes == 8) {
  1506. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1507. struct page *page;
  1508. char *addr;
  1509. u64 val;
  1510. if (gpa == UNMAPPED_GVA ||
  1511. (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1512. goto emul_write;
  1513. if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
  1514. goto emul_write;
  1515. val = *(u64 *)new;
  1516. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1517. addr = kmap_atomic(page, KM_USER0);
  1518. set_64bit((u64 *)(addr + offset_in_page(gpa)), val);
  1519. kunmap_atomic(addr, KM_USER0);
  1520. kvm_release_page_dirty(page);
  1521. }
  1522. emul_write:
  1523. #endif
  1524. return emulator_write_emulated(addr, new, bytes, vcpu);
  1525. }
  1526. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  1527. {
  1528. return kvm_x86_ops->get_segment_base(vcpu, seg);
  1529. }
  1530. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  1531. {
  1532. return X86EMUL_CONTINUE;
  1533. }
  1534. int emulate_clts(struct kvm_vcpu *vcpu)
  1535. {
  1536. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
  1537. return X86EMUL_CONTINUE;
  1538. }
  1539. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  1540. {
  1541. struct kvm_vcpu *vcpu = ctxt->vcpu;
  1542. switch (dr) {
  1543. case 0 ... 3:
  1544. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  1545. return X86EMUL_CONTINUE;
  1546. default:
  1547. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
  1548. return X86EMUL_UNHANDLEABLE;
  1549. }
  1550. }
  1551. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  1552. {
  1553. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  1554. int exception;
  1555. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  1556. if (exception) {
  1557. /* FIXME: better handling */
  1558. return X86EMUL_UNHANDLEABLE;
  1559. }
  1560. return X86EMUL_CONTINUE;
  1561. }
  1562. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  1563. {
  1564. static int reported;
  1565. u8 opcodes[4];
  1566. unsigned long rip = vcpu->arch.rip;
  1567. unsigned long rip_linear;
  1568. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  1569. if (reported)
  1570. return;
  1571. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  1572. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  1573. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  1574. reported = 1;
  1575. }
  1576. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  1577. struct x86_emulate_ops emulate_ops = {
  1578. .read_std = emulator_read_std,
  1579. .read_emulated = emulator_read_emulated,
  1580. .write_emulated = emulator_write_emulated,
  1581. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  1582. };
  1583. int emulate_instruction(struct kvm_vcpu *vcpu,
  1584. struct kvm_run *run,
  1585. unsigned long cr2,
  1586. u16 error_code,
  1587. int no_decode)
  1588. {
  1589. int r;
  1590. vcpu->arch.mmio_fault_cr2 = cr2;
  1591. kvm_x86_ops->cache_regs(vcpu);
  1592. vcpu->mmio_is_write = 0;
  1593. vcpu->arch.pio.string = 0;
  1594. if (!no_decode) {
  1595. int cs_db, cs_l;
  1596. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  1597. vcpu->arch.emulate_ctxt.vcpu = vcpu;
  1598. vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  1599. vcpu->arch.emulate_ctxt.mode =
  1600. (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
  1601. ? X86EMUL_MODE_REAL : cs_l
  1602. ? X86EMUL_MODE_PROT64 : cs_db
  1603. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  1604. if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
  1605. vcpu->arch.emulate_ctxt.cs_base = 0;
  1606. vcpu->arch.emulate_ctxt.ds_base = 0;
  1607. vcpu->arch.emulate_ctxt.es_base = 0;
  1608. vcpu->arch.emulate_ctxt.ss_base = 0;
  1609. } else {
  1610. vcpu->arch.emulate_ctxt.cs_base =
  1611. get_segment_base(vcpu, VCPU_SREG_CS);
  1612. vcpu->arch.emulate_ctxt.ds_base =
  1613. get_segment_base(vcpu, VCPU_SREG_DS);
  1614. vcpu->arch.emulate_ctxt.es_base =
  1615. get_segment_base(vcpu, VCPU_SREG_ES);
  1616. vcpu->arch.emulate_ctxt.ss_base =
  1617. get_segment_base(vcpu, VCPU_SREG_SS);
  1618. }
  1619. vcpu->arch.emulate_ctxt.gs_base =
  1620. get_segment_base(vcpu, VCPU_SREG_GS);
  1621. vcpu->arch.emulate_ctxt.fs_base =
  1622. get_segment_base(vcpu, VCPU_SREG_FS);
  1623. r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1624. ++vcpu->stat.insn_emulation;
  1625. if (r) {
  1626. ++vcpu->stat.insn_emulation_fail;
  1627. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1628. return EMULATE_DONE;
  1629. return EMULATE_FAIL;
  1630. }
  1631. }
  1632. r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1633. if (vcpu->arch.pio.string)
  1634. return EMULATE_DO_MMIO;
  1635. if ((r || vcpu->mmio_is_write) && run) {
  1636. run->exit_reason = KVM_EXIT_MMIO;
  1637. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  1638. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  1639. run->mmio.len = vcpu->mmio_size;
  1640. run->mmio.is_write = vcpu->mmio_is_write;
  1641. }
  1642. if (r) {
  1643. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1644. return EMULATE_DONE;
  1645. if (!vcpu->mmio_needed) {
  1646. kvm_report_emulation_failure(vcpu, "mmio");
  1647. return EMULATE_FAIL;
  1648. }
  1649. return EMULATE_DO_MMIO;
  1650. }
  1651. kvm_x86_ops->decache_regs(vcpu);
  1652. kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
  1653. if (vcpu->mmio_is_write) {
  1654. vcpu->mmio_needed = 0;
  1655. return EMULATE_DO_MMIO;
  1656. }
  1657. return EMULATE_DONE;
  1658. }
  1659. EXPORT_SYMBOL_GPL(emulate_instruction);
  1660. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  1661. {
  1662. int i;
  1663. for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
  1664. if (vcpu->arch.pio.guest_pages[i]) {
  1665. kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
  1666. vcpu->arch.pio.guest_pages[i] = NULL;
  1667. }
  1668. }
  1669. static int pio_copy_data(struct kvm_vcpu *vcpu)
  1670. {
  1671. void *p = vcpu->arch.pio_data;
  1672. void *q;
  1673. unsigned bytes;
  1674. int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
  1675. q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  1676. PAGE_KERNEL);
  1677. if (!q) {
  1678. free_pio_guest_pages(vcpu);
  1679. return -ENOMEM;
  1680. }
  1681. q += vcpu->arch.pio.guest_page_offset;
  1682. bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
  1683. if (vcpu->arch.pio.in)
  1684. memcpy(q, p, bytes);
  1685. else
  1686. memcpy(p, q, bytes);
  1687. q -= vcpu->arch.pio.guest_page_offset;
  1688. vunmap(q);
  1689. free_pio_guest_pages(vcpu);
  1690. return 0;
  1691. }
  1692. int complete_pio(struct kvm_vcpu *vcpu)
  1693. {
  1694. struct kvm_pio_request *io = &vcpu->arch.pio;
  1695. long delta;
  1696. int r;
  1697. kvm_x86_ops->cache_regs(vcpu);
  1698. if (!io->string) {
  1699. if (io->in)
  1700. memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
  1701. io->size);
  1702. } else {
  1703. if (io->in) {
  1704. r = pio_copy_data(vcpu);
  1705. if (r) {
  1706. kvm_x86_ops->cache_regs(vcpu);
  1707. return r;
  1708. }
  1709. }
  1710. delta = 1;
  1711. if (io->rep) {
  1712. delta *= io->cur_count;
  1713. /*
  1714. * The size of the register should really depend on
  1715. * current address size.
  1716. */
  1717. vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
  1718. }
  1719. if (io->down)
  1720. delta = -delta;
  1721. delta *= io->size;
  1722. if (io->in)
  1723. vcpu->arch.regs[VCPU_REGS_RDI] += delta;
  1724. else
  1725. vcpu->arch.regs[VCPU_REGS_RSI] += delta;
  1726. }
  1727. kvm_x86_ops->decache_regs(vcpu);
  1728. io->count -= io->cur_count;
  1729. io->cur_count = 0;
  1730. return 0;
  1731. }
  1732. static void kernel_pio(struct kvm_io_device *pio_dev,
  1733. struct kvm_vcpu *vcpu,
  1734. void *pd)
  1735. {
  1736. /* TODO: String I/O for in kernel device */
  1737. mutex_lock(&vcpu->kvm->lock);
  1738. if (vcpu->arch.pio.in)
  1739. kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
  1740. vcpu->arch.pio.size,
  1741. pd);
  1742. else
  1743. kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
  1744. vcpu->arch.pio.size,
  1745. pd);
  1746. mutex_unlock(&vcpu->kvm->lock);
  1747. }
  1748. static void pio_string_write(struct kvm_io_device *pio_dev,
  1749. struct kvm_vcpu *vcpu)
  1750. {
  1751. struct kvm_pio_request *io = &vcpu->arch.pio;
  1752. void *pd = vcpu->arch.pio_data;
  1753. int i;
  1754. mutex_lock(&vcpu->kvm->lock);
  1755. for (i = 0; i < io->cur_count; i++) {
  1756. kvm_iodevice_write(pio_dev, io->port,
  1757. io->size,
  1758. pd);
  1759. pd += io->size;
  1760. }
  1761. mutex_unlock(&vcpu->kvm->lock);
  1762. }
  1763. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  1764. gpa_t addr)
  1765. {
  1766. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
  1767. }
  1768. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1769. int size, unsigned port)
  1770. {
  1771. struct kvm_io_device *pio_dev;
  1772. vcpu->run->exit_reason = KVM_EXIT_IO;
  1773. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1774. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1775. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1776. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
  1777. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1778. vcpu->arch.pio.in = in;
  1779. vcpu->arch.pio.string = 0;
  1780. vcpu->arch.pio.down = 0;
  1781. vcpu->arch.pio.guest_page_offset = 0;
  1782. vcpu->arch.pio.rep = 0;
  1783. kvm_x86_ops->cache_regs(vcpu);
  1784. memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
  1785. kvm_x86_ops->decache_regs(vcpu);
  1786. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1787. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1788. if (pio_dev) {
  1789. kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
  1790. complete_pio(vcpu);
  1791. return 1;
  1792. }
  1793. return 0;
  1794. }
  1795. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  1796. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1797. int size, unsigned long count, int down,
  1798. gva_t address, int rep, unsigned port)
  1799. {
  1800. unsigned now, in_page;
  1801. int i, ret = 0;
  1802. int nr_pages = 1;
  1803. struct page *page;
  1804. struct kvm_io_device *pio_dev;
  1805. vcpu->run->exit_reason = KVM_EXIT_IO;
  1806. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1807. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1808. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1809. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
  1810. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1811. vcpu->arch.pio.in = in;
  1812. vcpu->arch.pio.string = 1;
  1813. vcpu->arch.pio.down = down;
  1814. vcpu->arch.pio.guest_page_offset = offset_in_page(address);
  1815. vcpu->arch.pio.rep = rep;
  1816. if (!count) {
  1817. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1818. return 1;
  1819. }
  1820. if (!down)
  1821. in_page = PAGE_SIZE - offset_in_page(address);
  1822. else
  1823. in_page = offset_in_page(address) + size;
  1824. now = min(count, (unsigned long)in_page / size);
  1825. if (!now) {
  1826. /*
  1827. * String I/O straddles page boundary. Pin two guest pages
  1828. * so that we satisfy atomicity constraints. Do just one
  1829. * transaction to avoid complexity.
  1830. */
  1831. nr_pages = 2;
  1832. now = 1;
  1833. }
  1834. if (down) {
  1835. /*
  1836. * String I/O in reverse. Yuck. Kill the guest, fix later.
  1837. */
  1838. pr_unimpl(vcpu, "guest string pio down\n");
  1839. kvm_inject_gp(vcpu, 0);
  1840. return 1;
  1841. }
  1842. vcpu->run->io.count = now;
  1843. vcpu->arch.pio.cur_count = now;
  1844. if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
  1845. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1846. for (i = 0; i < nr_pages; ++i) {
  1847. mutex_lock(&vcpu->kvm->lock);
  1848. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  1849. vcpu->arch.pio.guest_pages[i] = page;
  1850. mutex_unlock(&vcpu->kvm->lock);
  1851. if (!page) {
  1852. kvm_inject_gp(vcpu, 0);
  1853. free_pio_guest_pages(vcpu);
  1854. return 1;
  1855. }
  1856. }
  1857. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1858. if (!vcpu->arch.pio.in) {
  1859. /* string PIO write */
  1860. ret = pio_copy_data(vcpu);
  1861. if (ret >= 0 && pio_dev) {
  1862. pio_string_write(pio_dev, vcpu);
  1863. complete_pio(vcpu);
  1864. if (vcpu->arch.pio.count == 0)
  1865. ret = 1;
  1866. }
  1867. } else if (pio_dev)
  1868. pr_unimpl(vcpu, "no string pio read support yet, "
  1869. "port %x size %d count %ld\n",
  1870. port, size, count);
  1871. return ret;
  1872. }
  1873. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  1874. int kvm_arch_init(void *opaque)
  1875. {
  1876. int r;
  1877. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  1878. r = kvm_mmu_module_init();
  1879. if (r)
  1880. goto out_fail;
  1881. kvm_init_msr_list();
  1882. if (kvm_x86_ops) {
  1883. printk(KERN_ERR "kvm: already loaded the other module\n");
  1884. r = -EEXIST;
  1885. goto out;
  1886. }
  1887. if (!ops->cpu_has_kvm_support()) {
  1888. printk(KERN_ERR "kvm: no hardware support\n");
  1889. r = -EOPNOTSUPP;
  1890. goto out;
  1891. }
  1892. if (ops->disabled_by_bios()) {
  1893. printk(KERN_ERR "kvm: disabled by bios\n");
  1894. r = -EOPNOTSUPP;
  1895. goto out;
  1896. }
  1897. kvm_x86_ops = ops;
  1898. kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
  1899. return 0;
  1900. out:
  1901. kvm_mmu_module_exit();
  1902. out_fail:
  1903. return r;
  1904. }
  1905. void kvm_arch_exit(void)
  1906. {
  1907. kvm_x86_ops = NULL;
  1908. kvm_mmu_module_exit();
  1909. }
  1910. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  1911. {
  1912. ++vcpu->stat.halt_exits;
  1913. if (irqchip_in_kernel(vcpu->kvm)) {
  1914. vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
  1915. kvm_vcpu_block(vcpu);
  1916. if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
  1917. return -EINTR;
  1918. return 1;
  1919. } else {
  1920. vcpu->run->exit_reason = KVM_EXIT_HLT;
  1921. return 0;
  1922. }
  1923. }
  1924. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  1925. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  1926. {
  1927. unsigned long nr, a0, a1, a2, a3, ret;
  1928. kvm_x86_ops->cache_regs(vcpu);
  1929. nr = vcpu->arch.regs[VCPU_REGS_RAX];
  1930. a0 = vcpu->arch.regs[VCPU_REGS_RBX];
  1931. a1 = vcpu->arch.regs[VCPU_REGS_RCX];
  1932. a2 = vcpu->arch.regs[VCPU_REGS_RDX];
  1933. a3 = vcpu->arch.regs[VCPU_REGS_RSI];
  1934. if (!is_long_mode(vcpu)) {
  1935. nr &= 0xFFFFFFFF;
  1936. a0 &= 0xFFFFFFFF;
  1937. a1 &= 0xFFFFFFFF;
  1938. a2 &= 0xFFFFFFFF;
  1939. a3 &= 0xFFFFFFFF;
  1940. }
  1941. switch (nr) {
  1942. default:
  1943. ret = -KVM_ENOSYS;
  1944. break;
  1945. }
  1946. vcpu->arch.regs[VCPU_REGS_RAX] = ret;
  1947. kvm_x86_ops->decache_regs(vcpu);
  1948. return 0;
  1949. }
  1950. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  1951. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  1952. {
  1953. char instruction[3];
  1954. int ret = 0;
  1955. mutex_lock(&vcpu->kvm->lock);
  1956. /*
  1957. * Blow out the MMU to ensure that no other VCPU has an active mapping
  1958. * to ensure that the updated hypercall appears atomically across all
  1959. * VCPUs.
  1960. */
  1961. kvm_mmu_zap_all(vcpu->kvm);
  1962. kvm_x86_ops->cache_regs(vcpu);
  1963. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  1964. if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
  1965. != X86EMUL_CONTINUE)
  1966. ret = -EFAULT;
  1967. mutex_unlock(&vcpu->kvm->lock);
  1968. return ret;
  1969. }
  1970. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  1971. {
  1972. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  1973. }
  1974. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  1975. {
  1976. struct descriptor_table dt = { limit, base };
  1977. kvm_x86_ops->set_gdt(vcpu, &dt);
  1978. }
  1979. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  1980. {
  1981. struct descriptor_table dt = { limit, base };
  1982. kvm_x86_ops->set_idt(vcpu, &dt);
  1983. }
  1984. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  1985. unsigned long *rflags)
  1986. {
  1987. lmsw(vcpu, msw);
  1988. *rflags = kvm_x86_ops->get_rflags(vcpu);
  1989. }
  1990. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  1991. {
  1992. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1993. switch (cr) {
  1994. case 0:
  1995. return vcpu->arch.cr0;
  1996. case 2:
  1997. return vcpu->arch.cr2;
  1998. case 3:
  1999. return vcpu->arch.cr3;
  2000. case 4:
  2001. return vcpu->arch.cr4;
  2002. case 8:
  2003. return get_cr8(vcpu);
  2004. default:
  2005. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2006. return 0;
  2007. }
  2008. }
  2009. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  2010. unsigned long *rflags)
  2011. {
  2012. switch (cr) {
  2013. case 0:
  2014. set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
  2015. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2016. break;
  2017. case 2:
  2018. vcpu->arch.cr2 = val;
  2019. break;
  2020. case 3:
  2021. set_cr3(vcpu, val);
  2022. break;
  2023. case 4:
  2024. set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
  2025. break;
  2026. case 8:
  2027. set_cr8(vcpu, val & 0xfUL);
  2028. break;
  2029. default:
  2030. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2031. }
  2032. }
  2033. static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
  2034. {
  2035. struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
  2036. int j, nent = vcpu->arch.cpuid_nent;
  2037. e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
  2038. /* when no next entry is found, the current entry[i] is reselected */
  2039. for (j = i + 1; j == i; j = (j + 1) % nent) {
  2040. struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
  2041. if (ej->function == e->function) {
  2042. ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  2043. return j;
  2044. }
  2045. }
  2046. return 0; /* silence gcc, even though control never reaches here */
  2047. }
  2048. /* find an entry with matching function, matching index (if needed), and that
  2049. * should be read next (if it's stateful) */
  2050. static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
  2051. u32 function, u32 index)
  2052. {
  2053. if (e->function != function)
  2054. return 0;
  2055. if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
  2056. return 0;
  2057. if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
  2058. !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
  2059. return 0;
  2060. return 1;
  2061. }
  2062. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  2063. {
  2064. int i;
  2065. u32 function, index;
  2066. struct kvm_cpuid_entry2 *e, *best;
  2067. kvm_x86_ops->cache_regs(vcpu);
  2068. function = vcpu->arch.regs[VCPU_REGS_RAX];
  2069. index = vcpu->arch.regs[VCPU_REGS_RCX];
  2070. vcpu->arch.regs[VCPU_REGS_RAX] = 0;
  2071. vcpu->arch.regs[VCPU_REGS_RBX] = 0;
  2072. vcpu->arch.regs[VCPU_REGS_RCX] = 0;
  2073. vcpu->arch.regs[VCPU_REGS_RDX] = 0;
  2074. best = NULL;
  2075. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  2076. e = &vcpu->arch.cpuid_entries[i];
  2077. if (is_matching_cpuid_entry(e, function, index)) {
  2078. if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
  2079. move_to_next_stateful_cpuid_entry(vcpu, i);
  2080. best = e;
  2081. break;
  2082. }
  2083. /*
  2084. * Both basic or both extended?
  2085. */
  2086. if (((e->function ^ function) & 0x80000000) == 0)
  2087. if (!best || e->function > best->function)
  2088. best = e;
  2089. }
  2090. if (best) {
  2091. vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
  2092. vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
  2093. vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
  2094. vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
  2095. }
  2096. kvm_x86_ops->decache_regs(vcpu);
  2097. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2098. }
  2099. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  2100. /*
  2101. * Check if userspace requested an interrupt window, and that the
  2102. * interrupt window is open.
  2103. *
  2104. * No need to exit to userspace if we already have an interrupt queued.
  2105. */
  2106. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  2107. struct kvm_run *kvm_run)
  2108. {
  2109. return (!vcpu->arch.irq_summary &&
  2110. kvm_run->request_interrupt_window &&
  2111. vcpu->arch.interrupt_window_open &&
  2112. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  2113. }
  2114. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  2115. struct kvm_run *kvm_run)
  2116. {
  2117. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  2118. kvm_run->cr8 = get_cr8(vcpu);
  2119. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  2120. if (irqchip_in_kernel(vcpu->kvm))
  2121. kvm_run->ready_for_interrupt_injection = 1;
  2122. else
  2123. kvm_run->ready_for_interrupt_injection =
  2124. (vcpu->arch.interrupt_window_open &&
  2125. vcpu->arch.irq_summary == 0);
  2126. }
  2127. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2128. {
  2129. int r;
  2130. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
  2131. pr_debug("vcpu %d received sipi with vector # %x\n",
  2132. vcpu->vcpu_id, vcpu->arch.sipi_vector);
  2133. kvm_lapic_reset(vcpu);
  2134. r = kvm_x86_ops->vcpu_reset(vcpu);
  2135. if (r)
  2136. return r;
  2137. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2138. }
  2139. preempted:
  2140. if (vcpu->guest_debug.enabled)
  2141. kvm_x86_ops->guest_debug_pre(vcpu);
  2142. again:
  2143. r = kvm_mmu_reload(vcpu);
  2144. if (unlikely(r))
  2145. goto out;
  2146. kvm_inject_pending_timer_irqs(vcpu);
  2147. preempt_disable();
  2148. kvm_x86_ops->prepare_guest_switch(vcpu);
  2149. kvm_load_guest_fpu(vcpu);
  2150. local_irq_disable();
  2151. if (signal_pending(current)) {
  2152. local_irq_enable();
  2153. preempt_enable();
  2154. r = -EINTR;
  2155. kvm_run->exit_reason = KVM_EXIT_INTR;
  2156. ++vcpu->stat.signal_exits;
  2157. goto out;
  2158. }
  2159. if (vcpu->arch.exception.pending)
  2160. __queue_exception(vcpu);
  2161. else if (irqchip_in_kernel(vcpu->kvm))
  2162. kvm_x86_ops->inject_pending_irq(vcpu);
  2163. else
  2164. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  2165. vcpu->guest_mode = 1;
  2166. kvm_guest_enter();
  2167. if (vcpu->requests)
  2168. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  2169. kvm_x86_ops->tlb_flush(vcpu);
  2170. kvm_x86_ops->run(vcpu, kvm_run);
  2171. vcpu->guest_mode = 0;
  2172. local_irq_enable();
  2173. ++vcpu->stat.exits;
  2174. /*
  2175. * We must have an instruction between local_irq_enable() and
  2176. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  2177. * the interrupt shadow. The stat.exits increment will do nicely.
  2178. * But we need to prevent reordering, hence this barrier():
  2179. */
  2180. barrier();
  2181. kvm_guest_exit();
  2182. preempt_enable();
  2183. /*
  2184. * Profile KVM exit RIPs:
  2185. */
  2186. if (unlikely(prof_on == KVM_PROFILING)) {
  2187. kvm_x86_ops->cache_regs(vcpu);
  2188. profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
  2189. }
  2190. if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
  2191. vcpu->arch.exception.pending = false;
  2192. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  2193. if (r > 0) {
  2194. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  2195. r = -EINTR;
  2196. kvm_run->exit_reason = KVM_EXIT_INTR;
  2197. ++vcpu->stat.request_irq_exits;
  2198. goto out;
  2199. }
  2200. if (!need_resched())
  2201. goto again;
  2202. }
  2203. out:
  2204. if (r > 0) {
  2205. kvm_resched(vcpu);
  2206. goto preempted;
  2207. }
  2208. post_kvm_run_save(vcpu, kvm_run);
  2209. return r;
  2210. }
  2211. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2212. {
  2213. int r;
  2214. sigset_t sigsaved;
  2215. vcpu_load(vcpu);
  2216. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
  2217. kvm_vcpu_block(vcpu);
  2218. vcpu_put(vcpu);
  2219. return -EAGAIN;
  2220. }
  2221. if (vcpu->sigset_active)
  2222. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  2223. /* re-sync apic's tpr */
  2224. if (!irqchip_in_kernel(vcpu->kvm))
  2225. set_cr8(vcpu, kvm_run->cr8);
  2226. if (vcpu->arch.pio.cur_count) {
  2227. r = complete_pio(vcpu);
  2228. if (r)
  2229. goto out;
  2230. }
  2231. #if CONFIG_HAS_IOMEM
  2232. if (vcpu->mmio_needed) {
  2233. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  2234. vcpu->mmio_read_completed = 1;
  2235. vcpu->mmio_needed = 0;
  2236. r = emulate_instruction(vcpu, kvm_run,
  2237. vcpu->arch.mmio_fault_cr2, 0, 1);
  2238. if (r == EMULATE_DO_MMIO) {
  2239. /*
  2240. * Read-modify-write. Back to userspace.
  2241. */
  2242. r = 0;
  2243. goto out;
  2244. }
  2245. }
  2246. #endif
  2247. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
  2248. kvm_x86_ops->cache_regs(vcpu);
  2249. vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
  2250. kvm_x86_ops->decache_regs(vcpu);
  2251. }
  2252. r = __vcpu_run(vcpu, kvm_run);
  2253. out:
  2254. if (vcpu->sigset_active)
  2255. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  2256. vcpu_put(vcpu);
  2257. return r;
  2258. }
  2259. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2260. {
  2261. vcpu_load(vcpu);
  2262. kvm_x86_ops->cache_regs(vcpu);
  2263. regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
  2264. regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
  2265. regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
  2266. regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
  2267. regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
  2268. regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
  2269. regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
  2270. regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
  2271. #ifdef CONFIG_X86_64
  2272. regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
  2273. regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
  2274. regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
  2275. regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
  2276. regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
  2277. regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
  2278. regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
  2279. regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
  2280. #endif
  2281. regs->rip = vcpu->arch.rip;
  2282. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  2283. /*
  2284. * Don't leak debug flags in case they were set for guest debugging
  2285. */
  2286. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  2287. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  2288. vcpu_put(vcpu);
  2289. return 0;
  2290. }
  2291. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2292. {
  2293. vcpu_load(vcpu);
  2294. vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
  2295. vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
  2296. vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
  2297. vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
  2298. vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
  2299. vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
  2300. vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
  2301. vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
  2302. #ifdef CONFIG_X86_64
  2303. vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
  2304. vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
  2305. vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
  2306. vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
  2307. vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
  2308. vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
  2309. vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
  2310. vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
  2311. #endif
  2312. vcpu->arch.rip = regs->rip;
  2313. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  2314. kvm_x86_ops->decache_regs(vcpu);
  2315. vcpu_put(vcpu);
  2316. return 0;
  2317. }
  2318. static void get_segment(struct kvm_vcpu *vcpu,
  2319. struct kvm_segment *var, int seg)
  2320. {
  2321. return kvm_x86_ops->get_segment(vcpu, var, seg);
  2322. }
  2323. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  2324. {
  2325. struct kvm_segment cs;
  2326. get_segment(vcpu, &cs, VCPU_SREG_CS);
  2327. *db = cs.db;
  2328. *l = cs.l;
  2329. }
  2330. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  2331. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  2332. struct kvm_sregs *sregs)
  2333. {
  2334. struct descriptor_table dt;
  2335. int pending_vec;
  2336. vcpu_load(vcpu);
  2337. get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2338. get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2339. get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2340. get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2341. get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2342. get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2343. get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2344. get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2345. kvm_x86_ops->get_idt(vcpu, &dt);
  2346. sregs->idt.limit = dt.limit;
  2347. sregs->idt.base = dt.base;
  2348. kvm_x86_ops->get_gdt(vcpu, &dt);
  2349. sregs->gdt.limit = dt.limit;
  2350. sregs->gdt.base = dt.base;
  2351. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2352. sregs->cr0 = vcpu->arch.cr0;
  2353. sregs->cr2 = vcpu->arch.cr2;
  2354. sregs->cr3 = vcpu->arch.cr3;
  2355. sregs->cr4 = vcpu->arch.cr4;
  2356. sregs->cr8 = get_cr8(vcpu);
  2357. sregs->efer = vcpu->arch.shadow_efer;
  2358. sregs->apic_base = kvm_get_apic_base(vcpu);
  2359. if (irqchip_in_kernel(vcpu->kvm)) {
  2360. memset(sregs->interrupt_bitmap, 0,
  2361. sizeof sregs->interrupt_bitmap);
  2362. pending_vec = kvm_x86_ops->get_irq(vcpu);
  2363. if (pending_vec >= 0)
  2364. set_bit(pending_vec,
  2365. (unsigned long *)sregs->interrupt_bitmap);
  2366. } else
  2367. memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
  2368. sizeof sregs->interrupt_bitmap);
  2369. vcpu_put(vcpu);
  2370. return 0;
  2371. }
  2372. static void set_segment(struct kvm_vcpu *vcpu,
  2373. struct kvm_segment *var, int seg)
  2374. {
  2375. return kvm_x86_ops->set_segment(vcpu, var, seg);
  2376. }
  2377. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  2378. struct kvm_sregs *sregs)
  2379. {
  2380. int mmu_reset_needed = 0;
  2381. int i, pending_vec, max_bits;
  2382. struct descriptor_table dt;
  2383. vcpu_load(vcpu);
  2384. dt.limit = sregs->idt.limit;
  2385. dt.base = sregs->idt.base;
  2386. kvm_x86_ops->set_idt(vcpu, &dt);
  2387. dt.limit = sregs->gdt.limit;
  2388. dt.base = sregs->gdt.base;
  2389. kvm_x86_ops->set_gdt(vcpu, &dt);
  2390. vcpu->arch.cr2 = sregs->cr2;
  2391. mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
  2392. vcpu->arch.cr3 = sregs->cr3;
  2393. set_cr8(vcpu, sregs->cr8);
  2394. mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
  2395. #ifdef CONFIG_X86_64
  2396. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  2397. #endif
  2398. kvm_set_apic_base(vcpu, sregs->apic_base);
  2399. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2400. mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
  2401. vcpu->arch.cr0 = sregs->cr0;
  2402. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  2403. mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
  2404. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  2405. if (!is_long_mode(vcpu) && is_pae(vcpu))
  2406. load_pdptrs(vcpu, vcpu->arch.cr3);
  2407. if (mmu_reset_needed)
  2408. kvm_mmu_reset_context(vcpu);
  2409. if (!irqchip_in_kernel(vcpu->kvm)) {
  2410. memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
  2411. sizeof vcpu->arch.irq_pending);
  2412. vcpu->arch.irq_summary = 0;
  2413. for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
  2414. if (vcpu->arch.irq_pending[i])
  2415. __set_bit(i, &vcpu->arch.irq_summary);
  2416. } else {
  2417. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  2418. pending_vec = find_first_bit(
  2419. (const unsigned long *)sregs->interrupt_bitmap,
  2420. max_bits);
  2421. /* Only pending external irq is handled here */
  2422. if (pending_vec < max_bits) {
  2423. kvm_x86_ops->set_irq(vcpu, pending_vec);
  2424. pr_debug("Set back pending irq %d\n",
  2425. pending_vec);
  2426. }
  2427. }
  2428. set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2429. set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2430. set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2431. set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2432. set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2433. set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2434. set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2435. set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2436. vcpu_put(vcpu);
  2437. return 0;
  2438. }
  2439. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  2440. struct kvm_debug_guest *dbg)
  2441. {
  2442. int r;
  2443. vcpu_load(vcpu);
  2444. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  2445. vcpu_put(vcpu);
  2446. return r;
  2447. }
  2448. /*
  2449. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  2450. * we have asm/x86/processor.h
  2451. */
  2452. struct fxsave {
  2453. u16 cwd;
  2454. u16 swd;
  2455. u16 twd;
  2456. u16 fop;
  2457. u64 rip;
  2458. u64 rdp;
  2459. u32 mxcsr;
  2460. u32 mxcsr_mask;
  2461. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  2462. #ifdef CONFIG_X86_64
  2463. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  2464. #else
  2465. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  2466. #endif
  2467. };
  2468. /*
  2469. * Translate a guest virtual address to a guest physical address.
  2470. */
  2471. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  2472. struct kvm_translation *tr)
  2473. {
  2474. unsigned long vaddr = tr->linear_address;
  2475. gpa_t gpa;
  2476. vcpu_load(vcpu);
  2477. mutex_lock(&vcpu->kvm->lock);
  2478. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
  2479. tr->physical_address = gpa;
  2480. tr->valid = gpa != UNMAPPED_GVA;
  2481. tr->writeable = 1;
  2482. tr->usermode = 0;
  2483. mutex_unlock(&vcpu->kvm->lock);
  2484. vcpu_put(vcpu);
  2485. return 0;
  2486. }
  2487. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2488. {
  2489. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2490. vcpu_load(vcpu);
  2491. memcpy(fpu->fpr, fxsave->st_space, 128);
  2492. fpu->fcw = fxsave->cwd;
  2493. fpu->fsw = fxsave->swd;
  2494. fpu->ftwx = fxsave->twd;
  2495. fpu->last_opcode = fxsave->fop;
  2496. fpu->last_ip = fxsave->rip;
  2497. fpu->last_dp = fxsave->rdp;
  2498. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  2499. vcpu_put(vcpu);
  2500. return 0;
  2501. }
  2502. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2503. {
  2504. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2505. vcpu_load(vcpu);
  2506. memcpy(fxsave->st_space, fpu->fpr, 128);
  2507. fxsave->cwd = fpu->fcw;
  2508. fxsave->swd = fpu->fsw;
  2509. fxsave->twd = fpu->ftwx;
  2510. fxsave->fop = fpu->last_opcode;
  2511. fxsave->rip = fpu->last_ip;
  2512. fxsave->rdp = fpu->last_dp;
  2513. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  2514. vcpu_put(vcpu);
  2515. return 0;
  2516. }
  2517. void fx_init(struct kvm_vcpu *vcpu)
  2518. {
  2519. unsigned after_mxcsr_mask;
  2520. /* Initialize guest FPU by resetting ours and saving into guest's */
  2521. preempt_disable();
  2522. fx_save(&vcpu->arch.host_fx_image);
  2523. fpu_init();
  2524. fx_save(&vcpu->arch.guest_fx_image);
  2525. fx_restore(&vcpu->arch.host_fx_image);
  2526. preempt_enable();
  2527. vcpu->arch.cr0 |= X86_CR0_ET;
  2528. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  2529. vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
  2530. memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
  2531. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  2532. }
  2533. EXPORT_SYMBOL_GPL(fx_init);
  2534. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  2535. {
  2536. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  2537. return;
  2538. vcpu->guest_fpu_loaded = 1;
  2539. fx_save(&vcpu->arch.host_fx_image);
  2540. fx_restore(&vcpu->arch.guest_fx_image);
  2541. }
  2542. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  2543. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  2544. {
  2545. if (!vcpu->guest_fpu_loaded)
  2546. return;
  2547. vcpu->guest_fpu_loaded = 0;
  2548. fx_save(&vcpu->arch.guest_fx_image);
  2549. fx_restore(&vcpu->arch.host_fx_image);
  2550. ++vcpu->stat.fpu_reload;
  2551. }
  2552. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  2553. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  2554. {
  2555. kvm_x86_ops->vcpu_free(vcpu);
  2556. }
  2557. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  2558. unsigned int id)
  2559. {
  2560. return kvm_x86_ops->vcpu_create(kvm, id);
  2561. }
  2562. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  2563. {
  2564. int r;
  2565. /* We do fxsave: this must be aligned. */
  2566. BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
  2567. vcpu_load(vcpu);
  2568. r = kvm_arch_vcpu_reset(vcpu);
  2569. if (r == 0)
  2570. r = kvm_mmu_setup(vcpu);
  2571. vcpu_put(vcpu);
  2572. if (r < 0)
  2573. goto free_vcpu;
  2574. return 0;
  2575. free_vcpu:
  2576. kvm_x86_ops->vcpu_free(vcpu);
  2577. return r;
  2578. }
  2579. void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
  2580. {
  2581. vcpu_load(vcpu);
  2582. kvm_mmu_unload(vcpu);
  2583. vcpu_put(vcpu);
  2584. kvm_x86_ops->vcpu_free(vcpu);
  2585. }
  2586. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  2587. {
  2588. return kvm_x86_ops->vcpu_reset(vcpu);
  2589. }
  2590. void kvm_arch_hardware_enable(void *garbage)
  2591. {
  2592. kvm_x86_ops->hardware_enable(garbage);
  2593. }
  2594. void kvm_arch_hardware_disable(void *garbage)
  2595. {
  2596. kvm_x86_ops->hardware_disable(garbage);
  2597. }
  2598. int kvm_arch_hardware_setup(void)
  2599. {
  2600. return kvm_x86_ops->hardware_setup();
  2601. }
  2602. void kvm_arch_hardware_unsetup(void)
  2603. {
  2604. kvm_x86_ops->hardware_unsetup();
  2605. }
  2606. void kvm_arch_check_processor_compat(void *rtn)
  2607. {
  2608. kvm_x86_ops->check_processor_compatibility(rtn);
  2609. }
  2610. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  2611. {
  2612. struct page *page;
  2613. struct kvm *kvm;
  2614. int r;
  2615. BUG_ON(vcpu->kvm == NULL);
  2616. kvm = vcpu->kvm;
  2617. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  2618. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  2619. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2620. else
  2621. vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
  2622. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  2623. if (!page) {
  2624. r = -ENOMEM;
  2625. goto fail;
  2626. }
  2627. vcpu->arch.pio_data = page_address(page);
  2628. r = kvm_mmu_create(vcpu);
  2629. if (r < 0)
  2630. goto fail_free_pio_data;
  2631. if (irqchip_in_kernel(kvm)) {
  2632. r = kvm_create_lapic(vcpu);
  2633. if (r < 0)
  2634. goto fail_mmu_destroy;
  2635. }
  2636. return 0;
  2637. fail_mmu_destroy:
  2638. kvm_mmu_destroy(vcpu);
  2639. fail_free_pio_data:
  2640. free_page((unsigned long)vcpu->arch.pio_data);
  2641. fail:
  2642. return r;
  2643. }
  2644. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  2645. {
  2646. kvm_free_lapic(vcpu);
  2647. kvm_mmu_destroy(vcpu);
  2648. free_page((unsigned long)vcpu->arch.pio_data);
  2649. }
  2650. struct kvm *kvm_arch_create_vm(void)
  2651. {
  2652. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  2653. if (!kvm)
  2654. return ERR_PTR(-ENOMEM);
  2655. INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
  2656. return kvm;
  2657. }
  2658. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  2659. {
  2660. vcpu_load(vcpu);
  2661. kvm_mmu_unload(vcpu);
  2662. vcpu_put(vcpu);
  2663. }
  2664. static void kvm_free_vcpus(struct kvm *kvm)
  2665. {
  2666. unsigned int i;
  2667. /*
  2668. * Unpin any mmu pages first.
  2669. */
  2670. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  2671. if (kvm->vcpus[i])
  2672. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  2673. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  2674. if (kvm->vcpus[i]) {
  2675. kvm_arch_vcpu_free(kvm->vcpus[i]);
  2676. kvm->vcpus[i] = NULL;
  2677. }
  2678. }
  2679. }
  2680. void kvm_arch_destroy_vm(struct kvm *kvm)
  2681. {
  2682. kfree(kvm->arch.vpic);
  2683. kfree(kvm->arch.vioapic);
  2684. kvm_free_vcpus(kvm);
  2685. kvm_free_physmem(kvm);
  2686. kfree(kvm);
  2687. }
  2688. int kvm_arch_set_memory_region(struct kvm *kvm,
  2689. struct kvm_userspace_memory_region *mem,
  2690. struct kvm_memory_slot old,
  2691. int user_alloc)
  2692. {
  2693. int npages = mem->memory_size >> PAGE_SHIFT;
  2694. struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
  2695. /*To keep backward compatibility with older userspace,
  2696. *x86 needs to hanlde !user_alloc case.
  2697. */
  2698. if (!user_alloc) {
  2699. if (npages && !old.rmap) {
  2700. down_write(&current->mm->mmap_sem);
  2701. memslot->userspace_addr = do_mmap(NULL, 0,
  2702. npages * PAGE_SIZE,
  2703. PROT_READ | PROT_WRITE,
  2704. MAP_SHARED | MAP_ANONYMOUS,
  2705. 0);
  2706. up_write(&current->mm->mmap_sem);
  2707. if (IS_ERR((void *)memslot->userspace_addr))
  2708. return PTR_ERR((void *)memslot->userspace_addr);
  2709. } else {
  2710. if (!old.user_alloc && old.rmap) {
  2711. int ret;
  2712. down_write(&current->mm->mmap_sem);
  2713. ret = do_munmap(current->mm, old.userspace_addr,
  2714. old.npages * PAGE_SIZE);
  2715. up_write(&current->mm->mmap_sem);
  2716. if (ret < 0)
  2717. printk(KERN_WARNING
  2718. "kvm_vm_ioctl_set_memory_region: "
  2719. "failed to munmap memory\n");
  2720. }
  2721. }
  2722. }
  2723. if (!kvm->arch.n_requested_mmu_pages) {
  2724. unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
  2725. kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
  2726. }
  2727. kvm_mmu_slot_remove_write_access(kvm, mem->slot);
  2728. kvm_flush_remote_tlbs(kvm);
  2729. return 0;
  2730. }
  2731. int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  2732. {
  2733. return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
  2734. || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
  2735. }
  2736. static void vcpu_kick_intr(void *info)
  2737. {
  2738. #ifdef DEBUG
  2739. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
  2740. printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
  2741. #endif
  2742. }
  2743. void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
  2744. {
  2745. int ipi_pcpu = vcpu->cpu;
  2746. if (waitqueue_active(&vcpu->wq)) {
  2747. wake_up_interruptible(&vcpu->wq);
  2748. ++vcpu->stat.halt_wakeup;
  2749. }
  2750. if (vcpu->guest_mode)
  2751. smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
  2752. }