regcache.c 9.9 KB

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  1. /*
  2. * Register cache access API
  3. *
  4. * Copyright 2011 Wolfson Microelectronics plc
  5. *
  6. * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/export.h>
  14. #include <trace/events/regmap.h>
  15. #include <linux/bsearch.h>
  16. #include <linux/sort.h>
  17. #include "internal.h"
  18. static const struct regcache_ops *cache_types[] = {
  19. &regcache_rbtree_ops,
  20. &regcache_lzo_ops,
  21. };
  22. static int regcache_hw_init(struct regmap *map)
  23. {
  24. int i, j;
  25. int ret;
  26. int count;
  27. unsigned int val;
  28. void *tmp_buf;
  29. if (!map->num_reg_defaults_raw)
  30. return -EINVAL;
  31. if (!map->reg_defaults_raw) {
  32. dev_warn(map->dev, "No cache defaults, reading back from HW\n");
  33. tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
  34. if (!tmp_buf)
  35. return -EINVAL;
  36. ret = regmap_bulk_read(map, 0, tmp_buf,
  37. map->num_reg_defaults_raw);
  38. if (ret < 0) {
  39. kfree(tmp_buf);
  40. return ret;
  41. }
  42. map->reg_defaults_raw = tmp_buf;
  43. map->cache_free = 1;
  44. }
  45. /* calculate the size of reg_defaults */
  46. for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
  47. val = regcache_get_val(map->reg_defaults_raw,
  48. i, map->cache_word_size);
  49. if (regmap_volatile(map, i))
  50. continue;
  51. count++;
  52. }
  53. map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
  54. GFP_KERNEL);
  55. if (!map->reg_defaults) {
  56. ret = -ENOMEM;
  57. goto err_free;
  58. }
  59. /* fill the reg_defaults */
  60. map->num_reg_defaults = count;
  61. for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
  62. val = regcache_get_val(map->reg_defaults_raw,
  63. i, map->cache_word_size);
  64. if (regmap_volatile(map, i))
  65. continue;
  66. map->reg_defaults[j].reg = i;
  67. map->reg_defaults[j].def = val;
  68. j++;
  69. }
  70. return 0;
  71. err_free:
  72. if (map->cache_free)
  73. kfree(map->reg_defaults_raw);
  74. return ret;
  75. }
  76. int regcache_init(struct regmap *map, const struct regmap_config *config)
  77. {
  78. int ret;
  79. int i;
  80. void *tmp_buf;
  81. if (map->cache_type == REGCACHE_NONE) {
  82. map->cache_bypass = true;
  83. return 0;
  84. }
  85. for (i = 0; i < ARRAY_SIZE(cache_types); i++)
  86. if (cache_types[i]->type == map->cache_type)
  87. break;
  88. if (i == ARRAY_SIZE(cache_types)) {
  89. dev_err(map->dev, "Could not match compress type: %d\n",
  90. map->cache_type);
  91. return -EINVAL;
  92. }
  93. map->num_reg_defaults = config->num_reg_defaults;
  94. map->num_reg_defaults_raw = config->num_reg_defaults_raw;
  95. map->reg_defaults_raw = config->reg_defaults_raw;
  96. map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
  97. map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
  98. map->cache = NULL;
  99. map->cache_ops = cache_types[i];
  100. if (!map->cache_ops->read ||
  101. !map->cache_ops->write ||
  102. !map->cache_ops->name)
  103. return -EINVAL;
  104. /* We still need to ensure that the reg_defaults
  105. * won't vanish from under us. We'll need to make
  106. * a copy of it.
  107. */
  108. if (config->reg_defaults) {
  109. if (!map->num_reg_defaults)
  110. return -EINVAL;
  111. tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
  112. sizeof(struct reg_default), GFP_KERNEL);
  113. if (!tmp_buf)
  114. return -ENOMEM;
  115. map->reg_defaults = tmp_buf;
  116. } else if (map->num_reg_defaults_raw) {
  117. /* Some devices such as PMICs don't have cache defaults,
  118. * we cope with this by reading back the HW registers and
  119. * crafting the cache defaults by hand.
  120. */
  121. ret = regcache_hw_init(map);
  122. if (ret < 0)
  123. return ret;
  124. }
  125. if (!map->max_register)
  126. map->max_register = map->num_reg_defaults_raw;
  127. if (map->cache_ops->init) {
  128. dev_dbg(map->dev, "Initializing %s cache\n",
  129. map->cache_ops->name);
  130. ret = map->cache_ops->init(map);
  131. if (ret)
  132. goto err_free;
  133. }
  134. return 0;
  135. err_free:
  136. kfree(map->reg_defaults);
  137. if (map->cache_free)
  138. kfree(map->reg_defaults_raw);
  139. return ret;
  140. }
  141. void regcache_exit(struct regmap *map)
  142. {
  143. if (map->cache_type == REGCACHE_NONE)
  144. return;
  145. BUG_ON(!map->cache_ops);
  146. kfree(map->reg_defaults);
  147. if (map->cache_free)
  148. kfree(map->reg_defaults_raw);
  149. if (map->cache_ops->exit) {
  150. dev_dbg(map->dev, "Destroying %s cache\n",
  151. map->cache_ops->name);
  152. map->cache_ops->exit(map);
  153. }
  154. }
  155. /**
  156. * regcache_read: Fetch the value of a given register from the cache.
  157. *
  158. * @map: map to configure.
  159. * @reg: The register index.
  160. * @value: The value to be returned.
  161. *
  162. * Return a negative value on failure, 0 on success.
  163. */
  164. int regcache_read(struct regmap *map,
  165. unsigned int reg, unsigned int *value)
  166. {
  167. int ret;
  168. if (map->cache_type == REGCACHE_NONE)
  169. return -ENOSYS;
  170. BUG_ON(!map->cache_ops);
  171. if (!regmap_volatile(map, reg)) {
  172. ret = map->cache_ops->read(map, reg, value);
  173. if (ret == 0)
  174. trace_regmap_reg_read_cache(map->dev, reg, *value);
  175. return ret;
  176. }
  177. return -EINVAL;
  178. }
  179. EXPORT_SYMBOL_GPL(regcache_read);
  180. /**
  181. * regcache_write: Set the value of a given register in the cache.
  182. *
  183. * @map: map to configure.
  184. * @reg: The register index.
  185. * @value: The new register value.
  186. *
  187. * Return a negative value on failure, 0 on success.
  188. */
  189. int regcache_write(struct regmap *map,
  190. unsigned int reg, unsigned int value)
  191. {
  192. if (map->cache_type == REGCACHE_NONE)
  193. return 0;
  194. BUG_ON(!map->cache_ops);
  195. if (!regmap_writeable(map, reg))
  196. return -EIO;
  197. if (!regmap_volatile(map, reg))
  198. return map->cache_ops->write(map, reg, value);
  199. return 0;
  200. }
  201. EXPORT_SYMBOL_GPL(regcache_write);
  202. /**
  203. * regcache_sync: Sync the register cache with the hardware.
  204. *
  205. * @map: map to configure.
  206. *
  207. * Any registers that should not be synced should be marked as
  208. * volatile. In general drivers can choose not to use the provided
  209. * syncing functionality if they so require.
  210. *
  211. * Return a negative value on failure, 0 on success.
  212. */
  213. int regcache_sync(struct regmap *map)
  214. {
  215. int ret = 0;
  216. unsigned int val;
  217. unsigned int i;
  218. const char *name;
  219. unsigned int bypass;
  220. BUG_ON(!map->cache_ops);
  221. mutex_lock(&map->lock);
  222. /* Remember the initial bypass state */
  223. bypass = map->cache_bypass;
  224. dev_dbg(map->dev, "Syncing %s cache\n",
  225. map->cache_ops->name);
  226. name = map->cache_ops->name;
  227. trace_regcache_sync(map->dev, name, "start");
  228. /* Apply any patch first */
  229. for (i = 0; i < map->patch_regs; i++) {
  230. ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
  231. if (ret != 0) {
  232. dev_err(map->dev, "Failed to write %x = %x: %d\n",
  233. map->patch[i].reg, map->patch[i].def, ret);
  234. goto out;
  235. }
  236. }
  237. if (!map->cache_dirty)
  238. goto out;
  239. if (map->cache_ops->sync) {
  240. ret = map->cache_ops->sync(map);
  241. } else {
  242. for (i = 0; i < map->num_reg_defaults; i++) {
  243. ret = regcache_read(map, i, &val);
  244. if (ret < 0)
  245. goto out;
  246. map->cache_bypass = 1;
  247. ret = _regmap_write(map, i, val);
  248. map->cache_bypass = 0;
  249. if (ret < 0)
  250. goto out;
  251. dev_dbg(map->dev, "Synced register %#x, value %#x\n",
  252. map->reg_defaults[i].reg,
  253. map->reg_defaults[i].def);
  254. }
  255. }
  256. out:
  257. trace_regcache_sync(map->dev, name, "stop");
  258. /* Restore the bypass state */
  259. map->cache_bypass = bypass;
  260. mutex_unlock(&map->lock);
  261. return ret;
  262. }
  263. EXPORT_SYMBOL_GPL(regcache_sync);
  264. /**
  265. * regcache_cache_only: Put a register map into cache only mode
  266. *
  267. * @map: map to configure
  268. * @cache_only: flag if changes should be written to the hardware
  269. *
  270. * When a register map is marked as cache only writes to the register
  271. * map API will only update the register cache, they will not cause
  272. * any hardware changes. This is useful for allowing portions of
  273. * drivers to act as though the device were functioning as normal when
  274. * it is disabled for power saving reasons.
  275. */
  276. void regcache_cache_only(struct regmap *map, bool enable)
  277. {
  278. mutex_lock(&map->lock);
  279. WARN_ON(map->cache_bypass && enable);
  280. map->cache_only = enable;
  281. mutex_unlock(&map->lock);
  282. }
  283. EXPORT_SYMBOL_GPL(regcache_cache_only);
  284. /**
  285. * regcache_mark_dirty: Mark the register cache as dirty
  286. *
  287. * @map: map to mark
  288. *
  289. * Mark the register cache as dirty, for example due to the device
  290. * having been powered down for suspend. If the cache is not marked
  291. * as dirty then the cache sync will be suppressed.
  292. */
  293. void regcache_mark_dirty(struct regmap *map)
  294. {
  295. mutex_lock(&map->lock);
  296. map->cache_dirty = true;
  297. mutex_unlock(&map->lock);
  298. }
  299. EXPORT_SYMBOL_GPL(regcache_mark_dirty);
  300. /**
  301. * regcache_cache_bypass: Put a register map into cache bypass mode
  302. *
  303. * @map: map to configure
  304. * @cache_bypass: flag if changes should not be written to the hardware
  305. *
  306. * When a register map is marked with the cache bypass option, writes
  307. * to the register map API will only update the hardware and not the
  308. * the cache directly. This is useful when syncing the cache back to
  309. * the hardware.
  310. */
  311. void regcache_cache_bypass(struct regmap *map, bool enable)
  312. {
  313. mutex_lock(&map->lock);
  314. WARN_ON(map->cache_only && enable);
  315. map->cache_bypass = enable;
  316. mutex_unlock(&map->lock);
  317. }
  318. EXPORT_SYMBOL_GPL(regcache_cache_bypass);
  319. bool regcache_set_val(void *base, unsigned int idx,
  320. unsigned int val, unsigned int word_size)
  321. {
  322. switch (word_size) {
  323. case 1: {
  324. u8 *cache = base;
  325. if (cache[idx] == val)
  326. return true;
  327. cache[idx] = val;
  328. break;
  329. }
  330. case 2: {
  331. u16 *cache = base;
  332. if (cache[idx] == val)
  333. return true;
  334. cache[idx] = val;
  335. break;
  336. }
  337. default:
  338. BUG();
  339. }
  340. /* unreachable */
  341. return false;
  342. }
  343. unsigned int regcache_get_val(const void *base, unsigned int idx,
  344. unsigned int word_size)
  345. {
  346. if (!base)
  347. return -EINVAL;
  348. switch (word_size) {
  349. case 1: {
  350. const u8 *cache = base;
  351. return cache[idx];
  352. }
  353. case 2: {
  354. const u16 *cache = base;
  355. return cache[idx];
  356. }
  357. default:
  358. BUG();
  359. }
  360. /* unreachable */
  361. return -1;
  362. }
  363. static int regcache_default_cmp(const void *a, const void *b)
  364. {
  365. const struct reg_default *_a = a;
  366. const struct reg_default *_b = b;
  367. return _a->reg - _b->reg;
  368. }
  369. int regcache_lookup_reg(struct regmap *map, unsigned int reg)
  370. {
  371. struct reg_default key;
  372. struct reg_default *r;
  373. key.reg = reg;
  374. key.def = 0;
  375. r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
  376. sizeof(struct reg_default), regcache_default_cmp);
  377. if (r)
  378. return r - map->reg_defaults;
  379. else
  380. return -ENOENT;
  381. }