realview_eb.c 13 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/realview_eb.c
  3. *
  4. * Copyright (C) 2004 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/device.h>
  24. #include <linux/amba/bus.h>
  25. #include <linux/amba/pl061.h>
  26. #include <linux/amba/mmci.h>
  27. #include <linux/amba/pl022.h>
  28. #include <linux/io.h>
  29. #include <linux/platform_data/clk-realview.h>
  30. #include <mach/hardware.h>
  31. #include <asm/irq.h>
  32. #include <asm/leds.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/pmu.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/hardware/gic.h>
  37. #include <asm/hardware/cache-l2x0.h>
  38. #include <asm/smp_twd.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/map.h>
  41. #include <asm/mach/time.h>
  42. #include <mach/board-eb.h>
  43. #include <mach/irqs.h>
  44. #include "core.h"
  45. static struct map_desc realview_eb_io_desc[] __initdata = {
  46. {
  47. .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
  48. .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
  49. .length = SZ_4K,
  50. .type = MT_DEVICE,
  51. }, {
  52. .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
  53. .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
  54. .length = SZ_4K,
  55. .type = MT_DEVICE,
  56. }, {
  57. .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
  58. .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
  59. .length = SZ_4K,
  60. .type = MT_DEVICE,
  61. }, {
  62. .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
  63. .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
  64. .length = SZ_4K,
  65. .type = MT_DEVICE,
  66. }, {
  67. .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
  68. .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
  69. .length = SZ_4K,
  70. .type = MT_DEVICE,
  71. }, {
  72. .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
  73. .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
  74. .length = SZ_4K,
  75. .type = MT_DEVICE,
  76. },
  77. #ifdef CONFIG_DEBUG_LL
  78. {
  79. .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
  80. .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
  81. .length = SZ_4K,
  82. .type = MT_DEVICE,
  83. }
  84. #endif
  85. };
  86. static struct map_desc realview_eb11mp_io_desc[] __initdata = {
  87. {
  88. .virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
  89. .pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
  90. .length = REALVIEW_EB11MP_PRIV_MEM_SIZE,
  91. .type = MT_DEVICE,
  92. }, {
  93. .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
  94. .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
  95. .length = SZ_8K,
  96. .type = MT_DEVICE,
  97. }
  98. };
  99. static void __init realview_eb_map_io(void)
  100. {
  101. iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
  102. if (core_tile_eb11mp() || core_tile_a9mp())
  103. iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
  104. }
  105. static struct pl061_platform_data gpio0_plat_data = {
  106. .gpio_base = 0,
  107. };
  108. static struct pl061_platform_data gpio1_plat_data = {
  109. .gpio_base = 8,
  110. };
  111. static struct pl061_platform_data gpio2_plat_data = {
  112. .gpio_base = 16,
  113. };
  114. static struct pl022_ssp_controller ssp0_plat_data = {
  115. .bus_id = 0,
  116. .enable_dma = 0,
  117. .num_chipselect = 1,
  118. };
  119. /*
  120. * RealView EB AMBA devices
  121. */
  122. /*
  123. * These devices are connected via the core APB bridge
  124. */
  125. #define GPIO2_IRQ { IRQ_EB_GPIO2 }
  126. #define GPIO3_IRQ { IRQ_EB_GPIO3 }
  127. #define AACI_IRQ { IRQ_EB_AACI }
  128. #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
  129. #define KMI0_IRQ { IRQ_EB_KMI0 }
  130. #define KMI1_IRQ { IRQ_EB_KMI1 }
  131. /*
  132. * These devices are connected directly to the multi-layer AHB switch
  133. */
  134. #define EB_SMC_IRQ { }
  135. #define MPMC_IRQ { }
  136. #define EB_CLCD_IRQ { IRQ_EB_CLCD }
  137. #define DMAC_IRQ { IRQ_EB_DMA }
  138. /*
  139. * These devices are connected via the core APB bridge
  140. */
  141. #define SCTL_IRQ { }
  142. #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
  143. #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 }
  144. #define GPIO1_IRQ { IRQ_EB_GPIO1 }
  145. #define EB_RTC_IRQ { IRQ_EB_RTC }
  146. /*
  147. * These devices are connected via the DMA APB bridge
  148. */
  149. #define SCI_IRQ { IRQ_EB_SCI }
  150. #define EB_UART0_IRQ { IRQ_EB_UART0 }
  151. #define EB_UART1_IRQ { IRQ_EB_UART1 }
  152. #define EB_UART2_IRQ { IRQ_EB_UART2 }
  153. #define EB_UART3_IRQ { IRQ_EB_UART3 }
  154. #define EB_SSP_IRQ { IRQ_EB_SSP }
  155. /* FPGA Primecells */
  156. APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
  157. APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
  158. APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
  159. APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
  160. APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
  161. /* DevChip Primecells */
  162. AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL);
  163. AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
  164. AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL);
  165. AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
  166. APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
  167. APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
  168. APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
  169. APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
  170. APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
  171. APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
  172. APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
  173. APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
  174. APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
  175. APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
  176. static struct amba_device *amba_devs[] __initdata = {
  177. &dmac_device,
  178. &uart0_device,
  179. &uart1_device,
  180. &uart2_device,
  181. &uart3_device,
  182. &smc_device,
  183. &clcd_device,
  184. &sctl_device,
  185. &wdog_device,
  186. &gpio0_device,
  187. &gpio1_device,
  188. &gpio2_device,
  189. &rtc_device,
  190. &sci0_device,
  191. &ssp0_device,
  192. &aaci_device,
  193. &mmc0_device,
  194. &kmi0_device,
  195. &kmi1_device,
  196. };
  197. /*
  198. * RealView EB platform devices
  199. */
  200. static struct resource realview_eb_flash_resource = {
  201. .start = REALVIEW_EB_FLASH_BASE,
  202. .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
  203. .flags = IORESOURCE_MEM,
  204. };
  205. static struct resource realview_eb_eth_resources[] = {
  206. [0] = {
  207. .start = REALVIEW_EB_ETH_BASE,
  208. .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
  209. .flags = IORESOURCE_MEM,
  210. },
  211. [1] = {
  212. .start = IRQ_EB_ETH,
  213. .end = IRQ_EB_ETH,
  214. .flags = IORESOURCE_IRQ,
  215. },
  216. };
  217. /*
  218. * Detect and register the correct Ethernet device. RealView/EB rev D
  219. * platforms use the newer SMSC LAN9118 Ethernet chip
  220. */
  221. static int eth_device_register(void)
  222. {
  223. void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
  224. const char *name = NULL;
  225. u32 idrev;
  226. if (!eth_addr)
  227. return -ENOMEM;
  228. idrev = readl(eth_addr + 0x50);
  229. if ((idrev & 0xFFFF0000) != 0x01180000)
  230. /* SMSC LAN9118 not present, use LAN91C111 instead */
  231. name = "smc91x";
  232. iounmap(eth_addr);
  233. return realview_eth_register(name, realview_eb_eth_resources);
  234. }
  235. static struct resource realview_eb_isp1761_resources[] = {
  236. [0] = {
  237. .start = REALVIEW_EB_USB_BASE,
  238. .end = REALVIEW_EB_USB_BASE + SZ_128K - 1,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. [1] = {
  242. .start = IRQ_EB_USB,
  243. .end = IRQ_EB_USB,
  244. .flags = IORESOURCE_IRQ,
  245. },
  246. };
  247. static struct resource pmu_resources[] = {
  248. [0] = {
  249. .start = IRQ_EB11MP_PMU_CPU0,
  250. .end = IRQ_EB11MP_PMU_CPU0,
  251. .flags = IORESOURCE_IRQ,
  252. },
  253. [1] = {
  254. .start = IRQ_EB11MP_PMU_CPU1,
  255. .end = IRQ_EB11MP_PMU_CPU1,
  256. .flags = IORESOURCE_IRQ,
  257. },
  258. [2] = {
  259. .start = IRQ_EB11MP_PMU_CPU2,
  260. .end = IRQ_EB11MP_PMU_CPU2,
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. [3] = {
  264. .start = IRQ_EB11MP_PMU_CPU3,
  265. .end = IRQ_EB11MP_PMU_CPU3,
  266. .flags = IORESOURCE_IRQ,
  267. },
  268. };
  269. static struct platform_device pmu_device = {
  270. .name = "arm-pmu",
  271. .id = ARM_PMU_DEVICE_CPU,
  272. .num_resources = ARRAY_SIZE(pmu_resources),
  273. .resource = pmu_resources,
  274. };
  275. static struct resource char_lcd_resources[] = {
  276. {
  277. .start = REALVIEW_CHAR_LCD_BASE,
  278. .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
  279. .flags = IORESOURCE_MEM,
  280. },
  281. {
  282. .start = IRQ_EB_CHARLCD,
  283. .end = IRQ_EB_CHARLCD,
  284. .flags = IORESOURCE_IRQ,
  285. },
  286. };
  287. static struct platform_device char_lcd_device = {
  288. .name = "arm-charlcd",
  289. .id = -1,
  290. .num_resources = ARRAY_SIZE(char_lcd_resources),
  291. .resource = char_lcd_resources,
  292. };
  293. static void __init gic_init_irq(void)
  294. {
  295. if (core_tile_eb11mp() || core_tile_a9mp()) {
  296. unsigned int pldctrl;
  297. /* new irq mode */
  298. writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
  299. pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  300. pldctrl |= 0x00800000;
  301. writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  302. writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
  303. /* core tile GIC, primary */
  304. gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
  305. __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
  306. #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
  307. /* board GIC, secondary */
  308. gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
  309. __io_address(REALVIEW_EB_GIC_CPU_BASE));
  310. gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
  311. #endif
  312. } else {
  313. /* board GIC, primary */
  314. gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
  315. __io_address(REALVIEW_EB_GIC_CPU_BASE));
  316. }
  317. }
  318. /*
  319. * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
  320. */
  321. static void realview_eb11mp_fixup(void)
  322. {
  323. /* AMBA devices */
  324. dmac_device.irq[0] = IRQ_EB11MP_DMA;
  325. uart0_device.irq[0] = IRQ_EB11MP_UART0;
  326. uart1_device.irq[0] = IRQ_EB11MP_UART1;
  327. uart2_device.irq[0] = IRQ_EB11MP_UART2;
  328. uart3_device.irq[0] = IRQ_EB11MP_UART3;
  329. clcd_device.irq[0] = IRQ_EB11MP_CLCD;
  330. wdog_device.irq[0] = IRQ_EB11MP_WDOG;
  331. gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
  332. gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
  333. gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
  334. rtc_device.irq[0] = IRQ_EB11MP_RTC;
  335. sci0_device.irq[0] = IRQ_EB11MP_SCI;
  336. ssp0_device.irq[0] = IRQ_EB11MP_SSP;
  337. aaci_device.irq[0] = IRQ_EB11MP_AACI;
  338. mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
  339. mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
  340. kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
  341. kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
  342. /* platform devices */
  343. realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
  344. realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
  345. realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB;
  346. realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
  347. }
  348. #ifdef CONFIG_HAVE_ARM_TWD
  349. static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
  350. REALVIEW_EB11MP_TWD_BASE,
  351. IRQ_LOCALTIMER);
  352. static void __init realview_eb_twd_init(void)
  353. {
  354. if (core_tile_eb11mp() || core_tile_a9mp()) {
  355. int err = twd_local_timer_register(&twd_local_timer);
  356. if (err)
  357. pr_err("twd_local_timer_register failed %d\n", err);
  358. }
  359. }
  360. #else
  361. #define realview_eb_twd_init() do { } while(0)
  362. #endif
  363. static void __init realview_eb_timer_init(void)
  364. {
  365. unsigned int timer_irq;
  366. timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
  367. timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
  368. timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
  369. timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
  370. if (core_tile_eb11mp() || core_tile_a9mp())
  371. timer_irq = IRQ_EB11MP_TIMER0_1;
  372. else
  373. timer_irq = IRQ_EB_TIMER0_1;
  374. realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
  375. realview_timer_init(timer_irq);
  376. realview_eb_twd_init();
  377. }
  378. static struct sys_timer realview_eb_timer = {
  379. .init = realview_eb_timer_init,
  380. };
  381. static void realview_eb_restart(char mode, const char *cmd)
  382. {
  383. void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
  384. void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
  385. /*
  386. * To reset, we hit the on-board reset register
  387. * in the system FPGA
  388. */
  389. __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
  390. if (core_tile_eb11mp())
  391. __raw_writel(0x0008, reset_ctrl);
  392. dsb();
  393. }
  394. static void __init realview_eb_init(void)
  395. {
  396. int i;
  397. if (core_tile_eb11mp() || core_tile_a9mp()) {
  398. realview_eb11mp_fixup();
  399. #ifdef CONFIG_CACHE_L2X0
  400. /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
  401. * Bits: .... ...0 0111 1001 0000 .... .... .... */
  402. l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
  403. #endif
  404. platform_device_register(&pmu_device);
  405. }
  406. realview_flash_register(&realview_eb_flash_resource, 1);
  407. platform_device_register(&realview_i2c_device);
  408. platform_device_register(&char_lcd_device);
  409. eth_device_register();
  410. realview_usb_register(realview_eb_isp1761_resources);
  411. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  412. struct amba_device *d = amba_devs[i];
  413. amba_device_register(d, &iomem_resource);
  414. }
  415. #ifdef CONFIG_LEDS
  416. leds_event = realview_leds_event;
  417. #endif
  418. }
  419. MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
  420. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  421. .atag_offset = 0x100,
  422. .fixup = realview_fixup,
  423. .map_io = realview_eb_map_io,
  424. .init_early = realview_init_early,
  425. .init_irq = gic_init_irq,
  426. .timer = &realview_eb_timer,
  427. .handle_irq = gic_handle_irq,
  428. .init_machine = realview_eb_init,
  429. #ifdef CONFIG_ZONE_DMA
  430. .dma_zone_size = SZ_256M,
  431. #endif
  432. .restart = realview_eb_restart,
  433. MACHINE_END