time.c 45 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/delay.h>
  39. #include <asm/s390_ext.h>
  40. #include <asm/div64.h>
  41. #include <asm/vdso.h>
  42. #include <asm/irq.h>
  43. #include <asm/irq_regs.h>
  44. #include <asm/timer.h>
  45. #include <asm/etr.h>
  46. #include <asm/cio.h>
  47. /* change this if you have some constant time drift */
  48. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  49. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  50. u64 sched_clock_base_cc = -1; /* Force to data section. */
  51. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  52. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  53. /*
  54. * Scheduler clock - returns current time in nanosec units.
  55. */
  56. unsigned long long notrace sched_clock(void)
  57. {
  58. return (get_clock_monotonic() * 125) >> 9;
  59. }
  60. /*
  61. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  62. */
  63. unsigned long long monotonic_clock(void)
  64. {
  65. return sched_clock();
  66. }
  67. EXPORT_SYMBOL(monotonic_clock);
  68. void tod_to_timeval(__u64 todval, struct timespec *xt)
  69. {
  70. unsigned long long sec;
  71. sec = todval >> 12;
  72. do_div(sec, 1000000);
  73. xt->tv_sec = sec;
  74. todval -= (sec * 1000000) << 12;
  75. xt->tv_nsec = ((todval * 1000) >> 12);
  76. }
  77. EXPORT_SYMBOL(tod_to_timeval);
  78. void clock_comparator_work(void)
  79. {
  80. struct clock_event_device *cd;
  81. S390_lowcore.clock_comparator = -1ULL;
  82. set_clock_comparator(S390_lowcore.clock_comparator);
  83. cd = &__get_cpu_var(comparators);
  84. cd->event_handler(cd);
  85. }
  86. /*
  87. * Fixup the clock comparator.
  88. */
  89. static void fixup_clock_comparator(unsigned long long delta)
  90. {
  91. /* If nobody is waiting there's nothing to fix. */
  92. if (S390_lowcore.clock_comparator == -1ULL)
  93. return;
  94. S390_lowcore.clock_comparator += delta;
  95. set_clock_comparator(S390_lowcore.clock_comparator);
  96. }
  97. static int s390_next_event(unsigned long delta,
  98. struct clock_event_device *evt)
  99. {
  100. S390_lowcore.clock_comparator = get_clock() + delta;
  101. set_clock_comparator(S390_lowcore.clock_comparator);
  102. return 0;
  103. }
  104. static void s390_set_mode(enum clock_event_mode mode,
  105. struct clock_event_device *evt)
  106. {
  107. }
  108. /*
  109. * Set up lowcore and control register of the current cpu to
  110. * enable TOD clock and clock comparator interrupts.
  111. */
  112. void init_cpu_timer(void)
  113. {
  114. struct clock_event_device *cd;
  115. int cpu;
  116. S390_lowcore.clock_comparator = -1ULL;
  117. set_clock_comparator(S390_lowcore.clock_comparator);
  118. cpu = smp_processor_id();
  119. cd = &per_cpu(comparators, cpu);
  120. cd->name = "comparator";
  121. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  122. cd->mult = 16777;
  123. cd->shift = 12;
  124. cd->min_delta_ns = 1;
  125. cd->max_delta_ns = LONG_MAX;
  126. cd->rating = 400;
  127. cd->cpumask = cpumask_of(cpu);
  128. cd->set_next_event = s390_next_event;
  129. cd->set_mode = s390_set_mode;
  130. clockevents_register_device(cd);
  131. /* Enable clock comparator timer interrupt. */
  132. __ctl_set_bit(0,11);
  133. /* Always allow the timing alert external interrupt. */
  134. __ctl_set_bit(0, 4);
  135. }
  136. static void clock_comparator_interrupt(__u16 code)
  137. {
  138. if (S390_lowcore.clock_comparator == -1ULL)
  139. set_clock_comparator(S390_lowcore.clock_comparator);
  140. }
  141. static void etr_timing_alert(struct etr_irq_parm *);
  142. static void stp_timing_alert(struct stp_irq_parm *);
  143. static void timing_alert_interrupt(__u16 code)
  144. {
  145. if (S390_lowcore.ext_params & 0x00c40000)
  146. etr_timing_alert((struct etr_irq_parm *)
  147. &S390_lowcore.ext_params);
  148. if (S390_lowcore.ext_params & 0x00038000)
  149. stp_timing_alert((struct stp_irq_parm *)
  150. &S390_lowcore.ext_params);
  151. }
  152. static void etr_reset(void);
  153. static void stp_reset(void);
  154. void read_persistent_clock(struct timespec *ts)
  155. {
  156. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  157. }
  158. void read_boot_clock(struct timespec *ts)
  159. {
  160. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  161. }
  162. static cycle_t read_tod_clock(struct clocksource *cs)
  163. {
  164. return get_clock();
  165. }
  166. static struct clocksource clocksource_tod = {
  167. .name = "tod",
  168. .rating = 400,
  169. .read = read_tod_clock,
  170. .mask = -1ULL,
  171. .mult = 1000,
  172. .shift = 12,
  173. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  174. };
  175. struct clocksource * __init clocksource_default_clock(void)
  176. {
  177. return &clocksource_tod;
  178. }
  179. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
  180. u32 mult)
  181. {
  182. if (clock != &clocksource_tod)
  183. return;
  184. /* Make userspace gettimeofday spin until we're done. */
  185. ++vdso_data->tb_update_count;
  186. smp_wmb();
  187. vdso_data->xtime_tod_stamp = clock->cycle_last;
  188. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  189. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  190. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  191. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  192. smp_wmb();
  193. ++vdso_data->tb_update_count;
  194. }
  195. extern struct timezone sys_tz;
  196. void update_vsyscall_tz(void)
  197. {
  198. /* Make userspace gettimeofday spin until we're done. */
  199. ++vdso_data->tb_update_count;
  200. smp_wmb();
  201. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  202. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  203. smp_wmb();
  204. ++vdso_data->tb_update_count;
  205. }
  206. /*
  207. * Initialize the TOD clock and the CPU timer of
  208. * the boot cpu.
  209. */
  210. void __init time_init(void)
  211. {
  212. /* Reset time synchronization interfaces. */
  213. etr_reset();
  214. stp_reset();
  215. /* request the clock comparator external interrupt */
  216. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  217. panic("Couldn't request external interrupt 0x1004");
  218. /* request the timing alert external interrupt */
  219. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  220. panic("Couldn't request external interrupt 0x1406");
  221. if (clocksource_register(&clocksource_tod) != 0)
  222. panic("Could not register TOD clock source");
  223. /* Enable TOD clock interrupts on the boot cpu. */
  224. init_cpu_timer();
  225. /* Enable cpu timer interrupts on the boot cpu. */
  226. vtime_init();
  227. }
  228. /*
  229. * The time is "clock". old is what we think the time is.
  230. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  231. * "delay" is an approximation how long the synchronization took. If
  232. * the time correction is positive, then "delay" is subtracted from
  233. * the time difference and only the remaining part is passed to ntp.
  234. */
  235. static unsigned long long adjust_time(unsigned long long old,
  236. unsigned long long clock,
  237. unsigned long long delay)
  238. {
  239. unsigned long long delta, ticks;
  240. struct timex adjust;
  241. if (clock > old) {
  242. /* It is later than we thought. */
  243. delta = ticks = clock - old;
  244. delta = ticks = (delta < delay) ? 0 : delta - delay;
  245. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  246. adjust.offset = ticks * (1000000 / HZ);
  247. } else {
  248. /* It is earlier than we thought. */
  249. delta = ticks = old - clock;
  250. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  251. delta = -delta;
  252. adjust.offset = -ticks * (1000000 / HZ);
  253. }
  254. sched_clock_base_cc += delta;
  255. if (adjust.offset != 0) {
  256. pr_notice("The ETR interface has adjusted the clock "
  257. "by %li microseconds\n", adjust.offset);
  258. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  259. do_adjtimex(&adjust);
  260. }
  261. return delta;
  262. }
  263. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  264. static DEFINE_MUTEX(clock_sync_mutex);
  265. static unsigned long clock_sync_flags;
  266. #define CLOCK_SYNC_HAS_ETR 0
  267. #define CLOCK_SYNC_HAS_STP 1
  268. #define CLOCK_SYNC_ETR 2
  269. #define CLOCK_SYNC_STP 3
  270. /*
  271. * The synchronous get_clock function. It will write the current clock
  272. * value to the clock pointer and return 0 if the clock is in sync with
  273. * the external time source. If the clock mode is local it will return
  274. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  275. * reference.
  276. */
  277. int get_sync_clock(unsigned long long *clock)
  278. {
  279. atomic_t *sw_ptr;
  280. unsigned int sw0, sw1;
  281. sw_ptr = &get_cpu_var(clock_sync_word);
  282. sw0 = atomic_read(sw_ptr);
  283. *clock = get_clock();
  284. sw1 = atomic_read(sw_ptr);
  285. put_cpu_var(clock_sync_word);
  286. if (sw0 == sw1 && (sw0 & 0x80000000U))
  287. /* Success: time is in sync. */
  288. return 0;
  289. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  290. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  291. return -ENOSYS;
  292. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  293. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  294. return -EACCES;
  295. return -EAGAIN;
  296. }
  297. EXPORT_SYMBOL(get_sync_clock);
  298. /*
  299. * Make get_sync_clock return -EAGAIN.
  300. */
  301. static void disable_sync_clock(void *dummy)
  302. {
  303. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  304. /*
  305. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  306. * fail until the sync bit is turned back on. In addition
  307. * increase the "sequence" counter to avoid the race of an
  308. * etr event and the complete recovery against get_sync_clock.
  309. */
  310. atomic_clear_mask(0x80000000, sw_ptr);
  311. atomic_inc(sw_ptr);
  312. }
  313. /*
  314. * Make get_sync_clock return 0 again.
  315. * Needs to be called from a context disabled for preemption.
  316. */
  317. static void enable_sync_clock(void)
  318. {
  319. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  320. atomic_set_mask(0x80000000, sw_ptr);
  321. }
  322. /*
  323. * Function to check if the clock is in sync.
  324. */
  325. static inline int check_sync_clock(void)
  326. {
  327. atomic_t *sw_ptr;
  328. int rc;
  329. sw_ptr = &get_cpu_var(clock_sync_word);
  330. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  331. put_cpu_var(clock_sync_word);
  332. return rc;
  333. }
  334. /* Single threaded workqueue used for etr and stp sync events */
  335. static struct workqueue_struct *time_sync_wq;
  336. static void __init time_init_wq(void)
  337. {
  338. if (time_sync_wq)
  339. return;
  340. time_sync_wq = create_singlethread_workqueue("timesync");
  341. stop_machine_create();
  342. }
  343. /*
  344. * External Time Reference (ETR) code.
  345. */
  346. static int etr_port0_online;
  347. static int etr_port1_online;
  348. static int etr_steai_available;
  349. static int __init early_parse_etr(char *p)
  350. {
  351. if (strncmp(p, "off", 3) == 0)
  352. etr_port0_online = etr_port1_online = 0;
  353. else if (strncmp(p, "port0", 5) == 0)
  354. etr_port0_online = 1;
  355. else if (strncmp(p, "port1", 5) == 0)
  356. etr_port1_online = 1;
  357. else if (strncmp(p, "on", 2) == 0)
  358. etr_port0_online = etr_port1_online = 1;
  359. return 0;
  360. }
  361. early_param("etr", early_parse_etr);
  362. enum etr_event {
  363. ETR_EVENT_PORT0_CHANGE,
  364. ETR_EVENT_PORT1_CHANGE,
  365. ETR_EVENT_PORT_ALERT,
  366. ETR_EVENT_SYNC_CHECK,
  367. ETR_EVENT_SWITCH_LOCAL,
  368. ETR_EVENT_UPDATE,
  369. };
  370. /*
  371. * Valid bit combinations of the eacr register are (x = don't care):
  372. * e0 e1 dp p0 p1 ea es sl
  373. * 0 0 x 0 0 0 0 0 initial, disabled state
  374. * 0 0 x 0 1 1 0 0 port 1 online
  375. * 0 0 x 1 0 1 0 0 port 0 online
  376. * 0 0 x 1 1 1 0 0 both ports online
  377. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  378. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  379. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  380. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  381. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  382. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  383. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  384. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  385. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  386. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  387. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  388. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  389. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  390. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  391. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  392. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  393. */
  394. static struct etr_eacr etr_eacr;
  395. static u64 etr_tolec; /* time of last eacr update */
  396. static struct etr_aib etr_port0;
  397. static int etr_port0_uptodate;
  398. static struct etr_aib etr_port1;
  399. static int etr_port1_uptodate;
  400. static unsigned long etr_events;
  401. static struct timer_list etr_timer;
  402. static void etr_timeout(unsigned long dummy);
  403. static void etr_work_fn(struct work_struct *work);
  404. static DEFINE_MUTEX(etr_work_mutex);
  405. static DECLARE_WORK(etr_work, etr_work_fn);
  406. /*
  407. * Reset ETR attachment.
  408. */
  409. static void etr_reset(void)
  410. {
  411. etr_eacr = (struct etr_eacr) {
  412. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  413. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  414. .es = 0, .sl = 0 };
  415. if (etr_setr(&etr_eacr) == 0) {
  416. etr_tolec = get_clock();
  417. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  418. if (etr_port0_online && etr_port1_online)
  419. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  420. } else if (etr_port0_online || etr_port1_online) {
  421. pr_warning("The real or virtual hardware system does "
  422. "not provide an ETR interface\n");
  423. etr_port0_online = etr_port1_online = 0;
  424. }
  425. }
  426. static int __init etr_init(void)
  427. {
  428. struct etr_aib aib;
  429. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  430. return 0;
  431. time_init_wq();
  432. /* Check if this machine has the steai instruction. */
  433. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  434. etr_steai_available = 1;
  435. setup_timer(&etr_timer, etr_timeout, 0UL);
  436. if (etr_port0_online) {
  437. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  438. queue_work(time_sync_wq, &etr_work);
  439. }
  440. if (etr_port1_online) {
  441. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  442. queue_work(time_sync_wq, &etr_work);
  443. }
  444. return 0;
  445. }
  446. arch_initcall(etr_init);
  447. /*
  448. * Two sorts of ETR machine checks. The architecture reads:
  449. * "When a machine-check niterruption occurs and if a switch-to-local or
  450. * ETR-sync-check interrupt request is pending but disabled, this pending
  451. * disabled interruption request is indicated and is cleared".
  452. * Which means that we can get etr_switch_to_local events from the machine
  453. * check handler although the interruption condition is disabled. Lovely..
  454. */
  455. /*
  456. * Switch to local machine check. This is called when the last usable
  457. * ETR port goes inactive. After switch to local the clock is not in sync.
  458. */
  459. void etr_switch_to_local(void)
  460. {
  461. if (!etr_eacr.sl)
  462. return;
  463. disable_sync_clock(NULL);
  464. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  465. queue_work(time_sync_wq, &etr_work);
  466. }
  467. /*
  468. * ETR sync check machine check. This is called when the ETR OTE and the
  469. * local clock OTE are farther apart than the ETR sync check tolerance.
  470. * After a ETR sync check the clock is not in sync. The machine check
  471. * is broadcasted to all cpus at the same time.
  472. */
  473. void etr_sync_check(void)
  474. {
  475. if (!etr_eacr.es)
  476. return;
  477. disable_sync_clock(NULL);
  478. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  479. queue_work(time_sync_wq, &etr_work);
  480. }
  481. /*
  482. * ETR timing alert. There are two causes:
  483. * 1) port state change, check the usability of the port
  484. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  485. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  486. * or ETR-data word 4 (edf4) has changed.
  487. */
  488. static void etr_timing_alert(struct etr_irq_parm *intparm)
  489. {
  490. if (intparm->pc0)
  491. /* ETR port 0 state change. */
  492. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  493. if (intparm->pc1)
  494. /* ETR port 1 state change. */
  495. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  496. if (intparm->eai)
  497. /*
  498. * ETR port alert on either port 0, 1 or both.
  499. * Both ports are not up-to-date now.
  500. */
  501. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  502. queue_work(time_sync_wq, &etr_work);
  503. }
  504. static void etr_timeout(unsigned long dummy)
  505. {
  506. set_bit(ETR_EVENT_UPDATE, &etr_events);
  507. queue_work(time_sync_wq, &etr_work);
  508. }
  509. /*
  510. * Check if the etr mode is pss.
  511. */
  512. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  513. {
  514. return eacr.es && !eacr.sl;
  515. }
  516. /*
  517. * Check if the etr mode is etr.
  518. */
  519. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  520. {
  521. return eacr.es && eacr.sl;
  522. }
  523. /*
  524. * Check if the port can be used for TOD synchronization.
  525. * For PPS mode the port has to receive OTEs. For ETR mode
  526. * the port has to receive OTEs, the ETR stepping bit has to
  527. * be zero and the validity bits for data frame 1, 2, and 3
  528. * have to be 1.
  529. */
  530. static int etr_port_valid(struct etr_aib *aib, int port)
  531. {
  532. unsigned int psc;
  533. /* Check that this port is receiving OTEs. */
  534. if (aib->tsp == 0)
  535. return 0;
  536. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  537. if (psc == etr_lpsc_pps_mode)
  538. return 1;
  539. if (psc == etr_lpsc_operational_step)
  540. return !aib->esw.y && aib->slsw.v1 &&
  541. aib->slsw.v2 && aib->slsw.v3;
  542. return 0;
  543. }
  544. /*
  545. * Check if two ports are on the same network.
  546. */
  547. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  548. {
  549. // FIXME: any other fields we have to compare?
  550. return aib1->edf1.net_id == aib2->edf1.net_id;
  551. }
  552. /*
  553. * Wrapper for etr_stei that converts physical port states
  554. * to logical port states to be consistent with the output
  555. * of stetr (see etr_psc vs. etr_lpsc).
  556. */
  557. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  558. {
  559. BUG_ON(etr_steai(aib, func) != 0);
  560. /* Convert port state to logical port state. */
  561. if (aib->esw.psc0 == 1)
  562. aib->esw.psc0 = 2;
  563. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  564. aib->esw.psc0 = 1;
  565. if (aib->esw.psc1 == 1)
  566. aib->esw.psc1 = 2;
  567. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  568. aib->esw.psc1 = 1;
  569. }
  570. /*
  571. * Check if the aib a2 is still connected to the same attachment as
  572. * aib a1, the etv values differ by one and a2 is valid.
  573. */
  574. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  575. {
  576. int state_a1, state_a2;
  577. /* Paranoia check: e0/e1 should better be the same. */
  578. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  579. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  580. return 0;
  581. /* Still connected to the same etr ? */
  582. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  583. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  584. if (state_a1 == etr_lpsc_operational_step) {
  585. if (state_a2 != etr_lpsc_operational_step ||
  586. a1->edf1.net_id != a2->edf1.net_id ||
  587. a1->edf1.etr_id != a2->edf1.etr_id ||
  588. a1->edf1.etr_pn != a2->edf1.etr_pn)
  589. return 0;
  590. } else if (state_a2 != etr_lpsc_pps_mode)
  591. return 0;
  592. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  593. if (a1->edf2.etv + 1 != a2->edf2.etv)
  594. return 0;
  595. if (!etr_port_valid(a2, p))
  596. return 0;
  597. return 1;
  598. }
  599. struct clock_sync_data {
  600. atomic_t cpus;
  601. int in_sync;
  602. unsigned long long fixup_cc;
  603. int etr_port;
  604. struct etr_aib *etr_aib;
  605. };
  606. static void clock_sync_cpu(struct clock_sync_data *sync)
  607. {
  608. atomic_dec(&sync->cpus);
  609. enable_sync_clock();
  610. /*
  611. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  612. * is called on all other cpus while the TOD clocks is stopped.
  613. * __udelay will stop the cpu on an enabled wait psw until the
  614. * TOD is running again.
  615. */
  616. while (sync->in_sync == 0) {
  617. __udelay(1);
  618. /*
  619. * A different cpu changes *in_sync. Therefore use
  620. * barrier() to force memory access.
  621. */
  622. barrier();
  623. }
  624. if (sync->in_sync != 1)
  625. /* Didn't work. Clear per-cpu in sync bit again. */
  626. disable_sync_clock(NULL);
  627. /*
  628. * This round of TOD syncing is done. Set the clock comparator
  629. * to the next tick and let the processor continue.
  630. */
  631. fixup_clock_comparator(sync->fixup_cc);
  632. }
  633. /*
  634. * Sync the TOD clock using the port refered to by aibp. This port
  635. * has to be enabled and the other port has to be disabled. The
  636. * last eacr update has to be more than 1.6 seconds in the past.
  637. */
  638. static int etr_sync_clock(void *data)
  639. {
  640. static int first;
  641. unsigned long long clock, old_clock, delay, delta;
  642. struct clock_sync_data *etr_sync;
  643. struct etr_aib *sync_port, *aib;
  644. int port;
  645. int rc;
  646. etr_sync = data;
  647. if (xchg(&first, 1) == 1) {
  648. /* Slave */
  649. clock_sync_cpu(etr_sync);
  650. return 0;
  651. }
  652. /* Wait until all other cpus entered the sync function. */
  653. while (atomic_read(&etr_sync->cpus) != 0)
  654. cpu_relax();
  655. port = etr_sync->etr_port;
  656. aib = etr_sync->etr_aib;
  657. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  658. enable_sync_clock();
  659. /* Set clock to next OTE. */
  660. __ctl_set_bit(14, 21);
  661. __ctl_set_bit(0, 29);
  662. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  663. old_clock = get_clock();
  664. if (set_clock(clock) == 0) {
  665. __udelay(1); /* Wait for the clock to start. */
  666. __ctl_clear_bit(0, 29);
  667. __ctl_clear_bit(14, 21);
  668. etr_stetr(aib);
  669. /* Adjust Linux timing variables. */
  670. delay = (unsigned long long)
  671. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  672. delta = adjust_time(old_clock, clock, delay);
  673. etr_sync->fixup_cc = delta;
  674. fixup_clock_comparator(delta);
  675. /* Verify that the clock is properly set. */
  676. if (!etr_aib_follows(sync_port, aib, port)) {
  677. /* Didn't work. */
  678. disable_sync_clock(NULL);
  679. etr_sync->in_sync = -EAGAIN;
  680. rc = -EAGAIN;
  681. } else {
  682. etr_sync->in_sync = 1;
  683. rc = 0;
  684. }
  685. } else {
  686. /* Could not set the clock ?!? */
  687. __ctl_clear_bit(0, 29);
  688. __ctl_clear_bit(14, 21);
  689. disable_sync_clock(NULL);
  690. etr_sync->in_sync = -EAGAIN;
  691. rc = -EAGAIN;
  692. }
  693. xchg(&first, 0);
  694. return rc;
  695. }
  696. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  697. {
  698. struct clock_sync_data etr_sync;
  699. struct etr_aib *sync_port;
  700. int follows;
  701. int rc;
  702. /* Check if the current aib is adjacent to the sync port aib. */
  703. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  704. follows = etr_aib_follows(sync_port, aib, port);
  705. memcpy(sync_port, aib, sizeof(*aib));
  706. if (!follows)
  707. return -EAGAIN;
  708. memset(&etr_sync, 0, sizeof(etr_sync));
  709. etr_sync.etr_aib = aib;
  710. etr_sync.etr_port = port;
  711. get_online_cpus();
  712. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  713. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  714. put_online_cpus();
  715. return rc;
  716. }
  717. /*
  718. * Handle the immediate effects of the different events.
  719. * The port change event is used for online/offline changes.
  720. */
  721. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  722. {
  723. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  724. eacr.es = 0;
  725. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  726. eacr.es = eacr.sl = 0;
  727. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  728. etr_port0_uptodate = etr_port1_uptodate = 0;
  729. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  730. if (eacr.e0)
  731. /*
  732. * Port change of an enabled port. We have to
  733. * assume that this can have caused an stepping
  734. * port switch.
  735. */
  736. etr_tolec = get_clock();
  737. eacr.p0 = etr_port0_online;
  738. if (!eacr.p0)
  739. eacr.e0 = 0;
  740. etr_port0_uptodate = 0;
  741. }
  742. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  743. if (eacr.e1)
  744. /*
  745. * Port change of an enabled port. We have to
  746. * assume that this can have caused an stepping
  747. * port switch.
  748. */
  749. etr_tolec = get_clock();
  750. eacr.p1 = etr_port1_online;
  751. if (!eacr.p1)
  752. eacr.e1 = 0;
  753. etr_port1_uptodate = 0;
  754. }
  755. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  756. return eacr;
  757. }
  758. /*
  759. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  760. * one of the ports needs an update.
  761. */
  762. static void etr_set_tolec_timeout(unsigned long long now)
  763. {
  764. unsigned long micros;
  765. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  766. (!etr_eacr.p1 || etr_port1_uptodate))
  767. return;
  768. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  769. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  770. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  771. }
  772. /*
  773. * Set up a time that expires after 1/2 second.
  774. */
  775. static void etr_set_sync_timeout(void)
  776. {
  777. mod_timer(&etr_timer, jiffies + HZ/2);
  778. }
  779. /*
  780. * Update the aib information for one or both ports.
  781. */
  782. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  783. struct etr_eacr eacr)
  784. {
  785. /* With both ports disabled the aib information is useless. */
  786. if (!eacr.e0 && !eacr.e1)
  787. return eacr;
  788. /* Update port0 or port1 with aib stored in etr_work_fn. */
  789. if (aib->esw.q == 0) {
  790. /* Information for port 0 stored. */
  791. if (eacr.p0 && !etr_port0_uptodate) {
  792. etr_port0 = *aib;
  793. if (etr_port0_online)
  794. etr_port0_uptodate = 1;
  795. }
  796. } else {
  797. /* Information for port 1 stored. */
  798. if (eacr.p1 && !etr_port1_uptodate) {
  799. etr_port1 = *aib;
  800. if (etr_port0_online)
  801. etr_port1_uptodate = 1;
  802. }
  803. }
  804. /*
  805. * Do not try to get the alternate port aib if the clock
  806. * is not in sync yet.
  807. */
  808. if (!check_sync_clock())
  809. return eacr;
  810. /*
  811. * If steai is available we can get the information about
  812. * the other port immediately. If only stetr is available the
  813. * data-port bit toggle has to be used.
  814. */
  815. if (etr_steai_available) {
  816. if (eacr.p0 && !etr_port0_uptodate) {
  817. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  818. etr_port0_uptodate = 1;
  819. }
  820. if (eacr.p1 && !etr_port1_uptodate) {
  821. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  822. etr_port1_uptodate = 1;
  823. }
  824. } else {
  825. /*
  826. * One port was updated above, if the other
  827. * port is not uptodate toggle dp bit.
  828. */
  829. if ((eacr.p0 && !etr_port0_uptodate) ||
  830. (eacr.p1 && !etr_port1_uptodate))
  831. eacr.dp ^= 1;
  832. else
  833. eacr.dp = 0;
  834. }
  835. return eacr;
  836. }
  837. /*
  838. * Write new etr control register if it differs from the current one.
  839. * Return 1 if etr_tolec has been updated as well.
  840. */
  841. static void etr_update_eacr(struct etr_eacr eacr)
  842. {
  843. int dp_changed;
  844. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  845. /* No change, return. */
  846. return;
  847. /*
  848. * The disable of an active port of the change of the data port
  849. * bit can/will cause a change in the data port.
  850. */
  851. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  852. (etr_eacr.dp ^ eacr.dp) != 0;
  853. etr_eacr = eacr;
  854. etr_setr(&etr_eacr);
  855. if (dp_changed)
  856. etr_tolec = get_clock();
  857. }
  858. /*
  859. * ETR work. In this function you'll find the main logic. In
  860. * particular this is the only function that calls etr_update_eacr(),
  861. * it "controls" the etr control register.
  862. */
  863. static void etr_work_fn(struct work_struct *work)
  864. {
  865. unsigned long long now;
  866. struct etr_eacr eacr;
  867. struct etr_aib aib;
  868. int sync_port;
  869. /* prevent multiple execution. */
  870. mutex_lock(&etr_work_mutex);
  871. /* Create working copy of etr_eacr. */
  872. eacr = etr_eacr;
  873. /* Check for the different events and their immediate effects. */
  874. eacr = etr_handle_events(eacr);
  875. /* Check if ETR is supposed to be active. */
  876. eacr.ea = eacr.p0 || eacr.p1;
  877. if (!eacr.ea) {
  878. /* Both ports offline. Reset everything. */
  879. eacr.dp = eacr.es = eacr.sl = 0;
  880. on_each_cpu(disable_sync_clock, NULL, 1);
  881. del_timer_sync(&etr_timer);
  882. etr_update_eacr(eacr);
  883. goto out_unlock;
  884. }
  885. /* Store aib to get the current ETR status word. */
  886. BUG_ON(etr_stetr(&aib) != 0);
  887. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  888. now = get_clock();
  889. /*
  890. * Update the port information if the last stepping port change
  891. * or data port change is older than 1.6 seconds.
  892. */
  893. if (now >= etr_tolec + (1600000 << 12))
  894. eacr = etr_handle_update(&aib, eacr);
  895. /*
  896. * Select ports to enable. The prefered synchronization mode is PPS.
  897. * If a port can be enabled depends on a number of things:
  898. * 1) The port needs to be online and uptodate. A port is not
  899. * disabled just because it is not uptodate, but it is only
  900. * enabled if it is uptodate.
  901. * 2) The port needs to have the same mode (pps / etr).
  902. * 3) The port needs to be usable -> etr_port_valid() == 1
  903. * 4) To enable the second port the clock needs to be in sync.
  904. * 5) If both ports are useable and are ETR ports, the network id
  905. * has to be the same.
  906. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  907. */
  908. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  909. eacr.sl = 0;
  910. eacr.e0 = 1;
  911. if (!etr_mode_is_pps(etr_eacr))
  912. eacr.es = 0;
  913. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  914. eacr.e1 = 0;
  915. // FIXME: uptodate checks ?
  916. else if (etr_port0_uptodate && etr_port1_uptodate)
  917. eacr.e1 = 1;
  918. sync_port = (etr_port0_uptodate &&
  919. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  920. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  921. eacr.sl = 0;
  922. eacr.e0 = 0;
  923. eacr.e1 = 1;
  924. if (!etr_mode_is_pps(etr_eacr))
  925. eacr.es = 0;
  926. sync_port = (etr_port1_uptodate &&
  927. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  928. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  929. eacr.sl = 1;
  930. eacr.e0 = 1;
  931. if (!etr_mode_is_etr(etr_eacr))
  932. eacr.es = 0;
  933. if (!eacr.es || !eacr.p1 ||
  934. aib.esw.psc1 != etr_lpsc_operational_alt)
  935. eacr.e1 = 0;
  936. else if (etr_port0_uptodate && etr_port1_uptodate &&
  937. etr_compare_network(&etr_port0, &etr_port1))
  938. eacr.e1 = 1;
  939. sync_port = (etr_port0_uptodate &&
  940. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  941. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  942. eacr.sl = 1;
  943. eacr.e0 = 0;
  944. eacr.e1 = 1;
  945. if (!etr_mode_is_etr(etr_eacr))
  946. eacr.es = 0;
  947. sync_port = (etr_port1_uptodate &&
  948. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  949. } else {
  950. /* Both ports not usable. */
  951. eacr.es = eacr.sl = 0;
  952. sync_port = -1;
  953. }
  954. /*
  955. * If the clock is in sync just update the eacr and return.
  956. * If there is no valid sync port wait for a port update.
  957. */
  958. if (check_sync_clock() || sync_port < 0) {
  959. etr_update_eacr(eacr);
  960. etr_set_tolec_timeout(now);
  961. goto out_unlock;
  962. }
  963. /*
  964. * Prepare control register for clock syncing
  965. * (reset data port bit, set sync check control.
  966. */
  967. eacr.dp = 0;
  968. eacr.es = 1;
  969. /*
  970. * Update eacr and try to synchronize the clock. If the update
  971. * of eacr caused a stepping port switch (or if we have to
  972. * assume that a stepping port switch has occured) or the
  973. * clock syncing failed, reset the sync check control bit
  974. * and set up a timer to try again after 0.5 seconds
  975. */
  976. etr_update_eacr(eacr);
  977. if (now < etr_tolec + (1600000 << 12) ||
  978. etr_sync_clock_stop(&aib, sync_port) != 0) {
  979. /* Sync failed. Try again in 1/2 second. */
  980. eacr.es = 0;
  981. etr_update_eacr(eacr);
  982. etr_set_sync_timeout();
  983. } else
  984. etr_set_tolec_timeout(now);
  985. out_unlock:
  986. mutex_unlock(&etr_work_mutex);
  987. }
  988. /*
  989. * Sysfs interface functions
  990. */
  991. static struct sysdev_class etr_sysclass = {
  992. .name = "etr",
  993. };
  994. static struct sys_device etr_port0_dev = {
  995. .id = 0,
  996. .cls = &etr_sysclass,
  997. };
  998. static struct sys_device etr_port1_dev = {
  999. .id = 1,
  1000. .cls = &etr_sysclass,
  1001. };
  1002. /*
  1003. * ETR class attributes
  1004. */
  1005. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1006. {
  1007. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1008. }
  1009. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1010. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1011. {
  1012. char *mode_str;
  1013. if (etr_mode_is_pps(etr_eacr))
  1014. mode_str = "pps";
  1015. else if (etr_mode_is_etr(etr_eacr))
  1016. mode_str = "etr";
  1017. else
  1018. mode_str = "local";
  1019. return sprintf(buf, "%s\n", mode_str);
  1020. }
  1021. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1022. /*
  1023. * ETR port attributes
  1024. */
  1025. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1026. {
  1027. if (dev == &etr_port0_dev)
  1028. return etr_port0_online ? &etr_port0 : NULL;
  1029. else
  1030. return etr_port1_online ? &etr_port1 : NULL;
  1031. }
  1032. static ssize_t etr_online_show(struct sys_device *dev,
  1033. struct sysdev_attribute *attr,
  1034. char *buf)
  1035. {
  1036. unsigned int online;
  1037. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1038. return sprintf(buf, "%i\n", online);
  1039. }
  1040. static ssize_t etr_online_store(struct sys_device *dev,
  1041. struct sysdev_attribute *attr,
  1042. const char *buf, size_t count)
  1043. {
  1044. unsigned int value;
  1045. value = simple_strtoul(buf, NULL, 0);
  1046. if (value != 0 && value != 1)
  1047. return -EINVAL;
  1048. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1049. return -EOPNOTSUPP;
  1050. mutex_lock(&clock_sync_mutex);
  1051. if (dev == &etr_port0_dev) {
  1052. if (etr_port0_online == value)
  1053. goto out; /* Nothing to do. */
  1054. etr_port0_online = value;
  1055. if (etr_port0_online && etr_port1_online)
  1056. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1057. else
  1058. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1059. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1060. queue_work(time_sync_wq, &etr_work);
  1061. } else {
  1062. if (etr_port1_online == value)
  1063. goto out; /* Nothing to do. */
  1064. etr_port1_online = value;
  1065. if (etr_port0_online && etr_port1_online)
  1066. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1067. else
  1068. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1069. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1070. queue_work(time_sync_wq, &etr_work);
  1071. }
  1072. out:
  1073. mutex_unlock(&clock_sync_mutex);
  1074. return count;
  1075. }
  1076. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1077. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1078. struct sysdev_attribute *attr,
  1079. char *buf)
  1080. {
  1081. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1082. etr_eacr.e0 : etr_eacr.e1);
  1083. }
  1084. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1085. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1086. struct sysdev_attribute *attr, char *buf)
  1087. {
  1088. if (!etr_port0_online && !etr_port1_online)
  1089. /* Status word is not uptodate if both ports are offline. */
  1090. return -ENODATA;
  1091. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1092. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1093. }
  1094. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1095. static ssize_t etr_untuned_show(struct sys_device *dev,
  1096. struct sysdev_attribute *attr, char *buf)
  1097. {
  1098. struct etr_aib *aib = etr_aib_from_dev(dev);
  1099. if (!aib || !aib->slsw.v1)
  1100. return -ENODATA;
  1101. return sprintf(buf, "%i\n", aib->edf1.u);
  1102. }
  1103. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1104. static ssize_t etr_network_id_show(struct sys_device *dev,
  1105. struct sysdev_attribute *attr, char *buf)
  1106. {
  1107. struct etr_aib *aib = etr_aib_from_dev(dev);
  1108. if (!aib || !aib->slsw.v1)
  1109. return -ENODATA;
  1110. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1111. }
  1112. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1113. static ssize_t etr_id_show(struct sys_device *dev,
  1114. struct sysdev_attribute *attr, char *buf)
  1115. {
  1116. struct etr_aib *aib = etr_aib_from_dev(dev);
  1117. if (!aib || !aib->slsw.v1)
  1118. return -ENODATA;
  1119. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1120. }
  1121. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1122. static ssize_t etr_port_number_show(struct sys_device *dev,
  1123. struct sysdev_attribute *attr, char *buf)
  1124. {
  1125. struct etr_aib *aib = etr_aib_from_dev(dev);
  1126. if (!aib || !aib->slsw.v1)
  1127. return -ENODATA;
  1128. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1129. }
  1130. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1131. static ssize_t etr_coupled_show(struct sys_device *dev,
  1132. struct sysdev_attribute *attr, char *buf)
  1133. {
  1134. struct etr_aib *aib = etr_aib_from_dev(dev);
  1135. if (!aib || !aib->slsw.v3)
  1136. return -ENODATA;
  1137. return sprintf(buf, "%i\n", aib->edf3.c);
  1138. }
  1139. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1140. static ssize_t etr_local_time_show(struct sys_device *dev,
  1141. struct sysdev_attribute *attr, char *buf)
  1142. {
  1143. struct etr_aib *aib = etr_aib_from_dev(dev);
  1144. if (!aib || !aib->slsw.v3)
  1145. return -ENODATA;
  1146. return sprintf(buf, "%i\n", aib->edf3.blto);
  1147. }
  1148. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1149. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1150. struct sysdev_attribute *attr, char *buf)
  1151. {
  1152. struct etr_aib *aib = etr_aib_from_dev(dev);
  1153. if (!aib || !aib->slsw.v3)
  1154. return -ENODATA;
  1155. return sprintf(buf, "%i\n", aib->edf3.buo);
  1156. }
  1157. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1158. static struct sysdev_attribute *etr_port_attributes[] = {
  1159. &attr_online,
  1160. &attr_stepping_control,
  1161. &attr_state_code,
  1162. &attr_untuned,
  1163. &attr_network,
  1164. &attr_id,
  1165. &attr_port,
  1166. &attr_coupled,
  1167. &attr_local_time,
  1168. &attr_utc_offset,
  1169. NULL
  1170. };
  1171. static int __init etr_register_port(struct sys_device *dev)
  1172. {
  1173. struct sysdev_attribute **attr;
  1174. int rc;
  1175. rc = sysdev_register(dev);
  1176. if (rc)
  1177. goto out;
  1178. for (attr = etr_port_attributes; *attr; attr++) {
  1179. rc = sysdev_create_file(dev, *attr);
  1180. if (rc)
  1181. goto out_unreg;
  1182. }
  1183. return 0;
  1184. out_unreg:
  1185. for (; attr >= etr_port_attributes; attr--)
  1186. sysdev_remove_file(dev, *attr);
  1187. sysdev_unregister(dev);
  1188. out:
  1189. return rc;
  1190. }
  1191. static void __init etr_unregister_port(struct sys_device *dev)
  1192. {
  1193. struct sysdev_attribute **attr;
  1194. for (attr = etr_port_attributes; *attr; attr++)
  1195. sysdev_remove_file(dev, *attr);
  1196. sysdev_unregister(dev);
  1197. }
  1198. static int __init etr_init_sysfs(void)
  1199. {
  1200. int rc;
  1201. rc = sysdev_class_register(&etr_sysclass);
  1202. if (rc)
  1203. goto out;
  1204. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1205. if (rc)
  1206. goto out_unreg_class;
  1207. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1208. if (rc)
  1209. goto out_remove_stepping_port;
  1210. rc = etr_register_port(&etr_port0_dev);
  1211. if (rc)
  1212. goto out_remove_stepping_mode;
  1213. rc = etr_register_port(&etr_port1_dev);
  1214. if (rc)
  1215. goto out_remove_port0;
  1216. return 0;
  1217. out_remove_port0:
  1218. etr_unregister_port(&etr_port0_dev);
  1219. out_remove_stepping_mode:
  1220. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1221. out_remove_stepping_port:
  1222. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1223. out_unreg_class:
  1224. sysdev_class_unregister(&etr_sysclass);
  1225. out:
  1226. return rc;
  1227. }
  1228. device_initcall(etr_init_sysfs);
  1229. /*
  1230. * Server Time Protocol (STP) code.
  1231. */
  1232. static int stp_online;
  1233. static struct stp_sstpi stp_info;
  1234. static void *stp_page;
  1235. static void stp_work_fn(struct work_struct *work);
  1236. static DEFINE_MUTEX(stp_work_mutex);
  1237. static DECLARE_WORK(stp_work, stp_work_fn);
  1238. static struct timer_list stp_timer;
  1239. static int __init early_parse_stp(char *p)
  1240. {
  1241. if (strncmp(p, "off", 3) == 0)
  1242. stp_online = 0;
  1243. else if (strncmp(p, "on", 2) == 0)
  1244. stp_online = 1;
  1245. return 0;
  1246. }
  1247. early_param("stp", early_parse_stp);
  1248. /*
  1249. * Reset STP attachment.
  1250. */
  1251. static void __init stp_reset(void)
  1252. {
  1253. int rc;
  1254. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1255. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1256. if (rc == 0)
  1257. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1258. else if (stp_online) {
  1259. pr_warning("The real or virtual hardware system does "
  1260. "not provide an STP interface\n");
  1261. free_page((unsigned long) stp_page);
  1262. stp_page = NULL;
  1263. stp_online = 0;
  1264. }
  1265. }
  1266. static void stp_timeout(unsigned long dummy)
  1267. {
  1268. queue_work(time_sync_wq, &stp_work);
  1269. }
  1270. static int __init stp_init(void)
  1271. {
  1272. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1273. return 0;
  1274. setup_timer(&stp_timer, stp_timeout, 0UL);
  1275. time_init_wq();
  1276. if (!stp_online)
  1277. return 0;
  1278. queue_work(time_sync_wq, &stp_work);
  1279. return 0;
  1280. }
  1281. arch_initcall(stp_init);
  1282. /*
  1283. * STP timing alert. There are three causes:
  1284. * 1) timing status change
  1285. * 2) link availability change
  1286. * 3) time control parameter change
  1287. * In all three cases we are only interested in the clock source state.
  1288. * If a STP clock source is now available use it.
  1289. */
  1290. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1291. {
  1292. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1293. queue_work(time_sync_wq, &stp_work);
  1294. }
  1295. /*
  1296. * STP sync check machine check. This is called when the timing state
  1297. * changes from the synchronized state to the unsynchronized state.
  1298. * After a STP sync check the clock is not in sync. The machine check
  1299. * is broadcasted to all cpus at the same time.
  1300. */
  1301. void stp_sync_check(void)
  1302. {
  1303. disable_sync_clock(NULL);
  1304. queue_work(time_sync_wq, &stp_work);
  1305. }
  1306. /*
  1307. * STP island condition machine check. This is called when an attached
  1308. * server attempts to communicate over an STP link and the servers
  1309. * have matching CTN ids and have a valid stratum-1 configuration
  1310. * but the configurations do not match.
  1311. */
  1312. void stp_island_check(void)
  1313. {
  1314. disable_sync_clock(NULL);
  1315. queue_work(time_sync_wq, &stp_work);
  1316. }
  1317. static int stp_sync_clock(void *data)
  1318. {
  1319. static int first;
  1320. unsigned long long old_clock, delta;
  1321. struct clock_sync_data *stp_sync;
  1322. int rc;
  1323. stp_sync = data;
  1324. if (xchg(&first, 1) == 1) {
  1325. /* Slave */
  1326. clock_sync_cpu(stp_sync);
  1327. return 0;
  1328. }
  1329. /* Wait until all other cpus entered the sync function. */
  1330. while (atomic_read(&stp_sync->cpus) != 0)
  1331. cpu_relax();
  1332. enable_sync_clock();
  1333. rc = 0;
  1334. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1335. stp_info.todoff[2] || stp_info.todoff[3] ||
  1336. stp_info.tmd != 2) {
  1337. old_clock = get_clock();
  1338. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1339. if (rc == 0) {
  1340. delta = adjust_time(old_clock, get_clock(), 0);
  1341. fixup_clock_comparator(delta);
  1342. rc = chsc_sstpi(stp_page, &stp_info,
  1343. sizeof(struct stp_sstpi));
  1344. if (rc == 0 && stp_info.tmd != 2)
  1345. rc = -EAGAIN;
  1346. }
  1347. }
  1348. if (rc) {
  1349. disable_sync_clock(NULL);
  1350. stp_sync->in_sync = -EAGAIN;
  1351. } else
  1352. stp_sync->in_sync = 1;
  1353. xchg(&first, 0);
  1354. return 0;
  1355. }
  1356. /*
  1357. * STP work. Check for the STP state and take over the clock
  1358. * synchronization if the STP clock source is usable.
  1359. */
  1360. static void stp_work_fn(struct work_struct *work)
  1361. {
  1362. struct clock_sync_data stp_sync;
  1363. int rc;
  1364. /* prevent multiple execution. */
  1365. mutex_lock(&stp_work_mutex);
  1366. if (!stp_online) {
  1367. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1368. del_timer_sync(&stp_timer);
  1369. goto out_unlock;
  1370. }
  1371. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1372. if (rc)
  1373. goto out_unlock;
  1374. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1375. if (rc || stp_info.c == 0)
  1376. goto out_unlock;
  1377. /* Skip synchronization if the clock is already in sync. */
  1378. if (check_sync_clock())
  1379. goto out_unlock;
  1380. memset(&stp_sync, 0, sizeof(stp_sync));
  1381. get_online_cpus();
  1382. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1383. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1384. put_online_cpus();
  1385. if (!check_sync_clock())
  1386. /*
  1387. * There is a usable clock but the synchonization failed.
  1388. * Retry after a second.
  1389. */
  1390. mod_timer(&stp_timer, jiffies + HZ);
  1391. out_unlock:
  1392. mutex_unlock(&stp_work_mutex);
  1393. }
  1394. /*
  1395. * STP class sysfs interface functions
  1396. */
  1397. static struct sysdev_class stp_sysclass = {
  1398. .name = "stp",
  1399. };
  1400. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1401. {
  1402. if (!stp_online)
  1403. return -ENODATA;
  1404. return sprintf(buf, "%016llx\n",
  1405. *(unsigned long long *) stp_info.ctnid);
  1406. }
  1407. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1408. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1409. {
  1410. if (!stp_online)
  1411. return -ENODATA;
  1412. return sprintf(buf, "%i\n", stp_info.ctn);
  1413. }
  1414. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1415. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1416. {
  1417. if (!stp_online || !(stp_info.vbits & 0x2000))
  1418. return -ENODATA;
  1419. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1420. }
  1421. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1422. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1423. {
  1424. if (!stp_online || !(stp_info.vbits & 0x8000))
  1425. return -ENODATA;
  1426. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1427. }
  1428. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1429. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1430. {
  1431. if (!stp_online)
  1432. return -ENODATA;
  1433. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1434. }
  1435. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1436. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1437. {
  1438. if (!stp_online || !(stp_info.vbits & 0x0800))
  1439. return -ENODATA;
  1440. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1441. }
  1442. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1443. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1444. {
  1445. if (!stp_online || !(stp_info.vbits & 0x4000))
  1446. return -ENODATA;
  1447. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1448. }
  1449. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1450. stp_time_zone_offset_show, NULL);
  1451. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1452. {
  1453. if (!stp_online)
  1454. return -ENODATA;
  1455. return sprintf(buf, "%i\n", stp_info.tmd);
  1456. }
  1457. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1458. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1459. {
  1460. if (!stp_online)
  1461. return -ENODATA;
  1462. return sprintf(buf, "%i\n", stp_info.tst);
  1463. }
  1464. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1465. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1466. {
  1467. return sprintf(buf, "%i\n", stp_online);
  1468. }
  1469. static ssize_t stp_online_store(struct sysdev_class *class,
  1470. const char *buf, size_t count)
  1471. {
  1472. unsigned int value;
  1473. value = simple_strtoul(buf, NULL, 0);
  1474. if (value != 0 && value != 1)
  1475. return -EINVAL;
  1476. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1477. return -EOPNOTSUPP;
  1478. mutex_lock(&clock_sync_mutex);
  1479. stp_online = value;
  1480. if (stp_online)
  1481. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1482. else
  1483. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1484. queue_work(time_sync_wq, &stp_work);
  1485. mutex_unlock(&clock_sync_mutex);
  1486. return count;
  1487. }
  1488. /*
  1489. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1490. * stp/online but attr_online already exists in this file ..
  1491. */
  1492. static struct sysdev_class_attribute attr_stp_online = {
  1493. .attr = { .name = "online", .mode = 0600 },
  1494. .show = stp_online_show,
  1495. .store = stp_online_store,
  1496. };
  1497. static struct sysdev_class_attribute *stp_attributes[] = {
  1498. &attr_ctn_id,
  1499. &attr_ctn_type,
  1500. &attr_dst_offset,
  1501. &attr_leap_seconds,
  1502. &attr_stp_online,
  1503. &attr_stratum,
  1504. &attr_time_offset,
  1505. &attr_time_zone_offset,
  1506. &attr_timing_mode,
  1507. &attr_timing_state,
  1508. NULL
  1509. };
  1510. static int __init stp_init_sysfs(void)
  1511. {
  1512. struct sysdev_class_attribute **attr;
  1513. int rc;
  1514. rc = sysdev_class_register(&stp_sysclass);
  1515. if (rc)
  1516. goto out;
  1517. for (attr = stp_attributes; *attr; attr++) {
  1518. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1519. if (rc)
  1520. goto out_unreg;
  1521. }
  1522. return 0;
  1523. out_unreg:
  1524. for (; attr >= stp_attributes; attr--)
  1525. sysdev_class_remove_file(&stp_sysclass, *attr);
  1526. sysdev_class_unregister(&stp_sysclass);
  1527. out:
  1528. return rc;
  1529. }
  1530. device_initcall(stp_init_sysfs);