nm256.c 43 KB

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  1. /*
  2. * Driver for NeoMagic 256AV and 256ZX chipsets.
  3. * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
  4. *
  5. * Based on nm256_audio.c OSS driver in linux kernel.
  6. * The original author of OSS nm256 driver wishes to remain anonymous,
  7. * so I just put my acknoledgment to him/her here.
  8. * The original author's web page is found at
  9. * http://www.uglx.org/sony.html
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <asm/io.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/init.h>
  31. #include <linux/pci.h>
  32. #include <linux/slab.h>
  33. #include <linux/moduleparam.h>
  34. #include <sound/core.h>
  35. #include <sound/info.h>
  36. #include <sound/control.h>
  37. #include <sound/pcm.h>
  38. #include <sound/ac97_codec.h>
  39. #include <sound/initval.h>
  40. #define CARD_NAME "NeoMagic 256AV/ZX"
  41. #define DRIVER_NAME "NM256"
  42. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  43. MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
  44. MODULE_LICENSE("GPL");
  45. MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
  46. "{NeoMagic,NM256ZX}}");
  47. /*
  48. * some compile conditions.
  49. */
  50. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  51. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  52. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  53. static int playback_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 16};
  54. static int capture_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 16};
  55. static int force_ac97[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* disabled as default */
  56. static int buffer_top[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* not specified */
  57. static int use_cache[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* disabled */
  58. static int vaio_hack[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* disabled */
  59. static int reset_workaround[SNDRV_CARDS];
  60. module_param_array(index, int, NULL, 0444);
  61. MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
  62. module_param_array(id, charp, NULL, 0444);
  63. MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
  64. module_param_array(enable, bool, NULL, 0444);
  65. MODULE_PARM_DESC(enable, "Enable this soundcard.");
  66. module_param_array(playback_bufsize, int, NULL, 0444);
  67. MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
  68. module_param_array(capture_bufsize, int, NULL, 0444);
  69. MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
  70. module_param_array(force_ac97, bool, NULL, 0444);
  71. MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
  72. module_param_array(buffer_top, int, NULL, 0444);
  73. MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
  74. module_param_array(use_cache, bool, NULL, 0444);
  75. MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
  76. module_param_array(vaio_hack, bool, NULL, 0444);
  77. MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
  78. module_param_array(reset_workaround, bool, NULL, 0444);
  79. MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
  80. /*
  81. * hw definitions
  82. */
  83. /* The BIOS signature. */
  84. #define NM_SIGNATURE 0x4e4d0000
  85. /* Signature mask. */
  86. #define NM_SIG_MASK 0xffff0000
  87. /* Size of the second memory area. */
  88. #define NM_PORT2_SIZE 4096
  89. /* The base offset of the mixer in the second memory area. */
  90. #define NM_MIXER_OFFSET 0x600
  91. /* The maximum size of a coefficient entry. */
  92. #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
  93. #define NM_MAX_RECORD_COEF_SIZE 0x1260
  94. /* The interrupt register. */
  95. #define NM_INT_REG 0xa04
  96. /* And its bits. */
  97. #define NM_PLAYBACK_INT 0x40
  98. #define NM_RECORD_INT 0x100
  99. #define NM_MISC_INT_1 0x4000
  100. #define NM_MISC_INT_2 0x1
  101. #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
  102. /* The AV's "mixer ready" status bit and location. */
  103. #define NM_MIXER_STATUS_OFFSET 0xa04
  104. #define NM_MIXER_READY_MASK 0x0800
  105. #define NM_MIXER_PRESENCE 0xa06
  106. #define NM_PRESENCE_MASK 0x0050
  107. #define NM_PRESENCE_VALUE 0x0040
  108. /*
  109. * For the ZX. It uses the same interrupt register, but it holds 32
  110. * bits instead of 16.
  111. */
  112. #define NM2_PLAYBACK_INT 0x10000
  113. #define NM2_RECORD_INT 0x80000
  114. #define NM2_MISC_INT_1 0x8
  115. #define NM2_MISC_INT_2 0x2
  116. #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
  117. /* The ZX's "mixer ready" status bit and location. */
  118. #define NM2_MIXER_STATUS_OFFSET 0xa06
  119. #define NM2_MIXER_READY_MASK 0x0800
  120. /* The playback registers start from here. */
  121. #define NM_PLAYBACK_REG_OFFSET 0x0
  122. /* The record registers start from here. */
  123. #define NM_RECORD_REG_OFFSET 0x200
  124. /* The rate register is located 2 bytes from the start of the register area. */
  125. #define NM_RATE_REG_OFFSET 2
  126. /* Mono/stereo flag, number of bits on playback, and rate mask. */
  127. #define NM_RATE_STEREO 1
  128. #define NM_RATE_BITS_16 2
  129. #define NM_RATE_MASK 0xf0
  130. /* Playback enable register. */
  131. #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
  132. #define NM_PLAYBACK_ENABLE_FLAG 1
  133. #define NM_PLAYBACK_ONESHOT 2
  134. #define NM_PLAYBACK_FREERUN 4
  135. /* Mutes the audio output. */
  136. #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
  137. #define NM_AUDIO_MUTE_LEFT 0x8000
  138. #define NM_AUDIO_MUTE_RIGHT 0x0080
  139. /* Recording enable register. */
  140. #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
  141. #define NM_RECORD_ENABLE_FLAG 1
  142. #define NM_RECORD_FREERUN 2
  143. /* coefficient buffer pointer */
  144. #define NM_COEFF_START_OFFSET 0x1c
  145. #define NM_COEFF_END_OFFSET 0x20
  146. /* DMA buffer offsets */
  147. #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
  148. #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
  149. #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
  150. #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
  151. #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
  152. #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
  153. #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
  154. #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
  155. /*
  156. * type definitions
  157. */
  158. typedef struct snd_nm256 nm256_t;
  159. typedef struct snd_nm256_stream nm256_stream_t;
  160. struct snd_nm256_stream {
  161. nm256_t *chip;
  162. snd_pcm_substream_t *substream;
  163. int running;
  164. int suspended;
  165. u32 buf; /* offset from chip->buffer */
  166. int bufsize; /* buffer size in bytes */
  167. void __iomem *bufptr; /* mapped pointer */
  168. unsigned long bufptr_addr; /* physical address of the mapped pointer */
  169. int dma_size; /* buffer size of the substream in bytes */
  170. int period_size; /* period size in bytes */
  171. int periods; /* # of periods */
  172. int shift; /* bit shifts */
  173. int cur_period; /* current period # */
  174. };
  175. struct snd_nm256 {
  176. snd_card_t *card;
  177. void __iomem *cport; /* control port */
  178. struct resource *res_cport; /* its resource */
  179. unsigned long cport_addr; /* physical address */
  180. void __iomem *buffer; /* buffer */
  181. struct resource *res_buffer; /* its resource */
  182. unsigned long buffer_addr; /* buffer phyiscal address */
  183. u32 buffer_start; /* start offset from pci resource 0 */
  184. u32 buffer_end; /* end offset */
  185. u32 buffer_size; /* total buffer size */
  186. u32 all_coeff_buf; /* coefficient buffer */
  187. u32 coeff_buf[2]; /* coefficient buffer for each stream */
  188. unsigned int coeffs_current: 1; /* coeff. table is loaded? */
  189. unsigned int use_cache: 1; /* use one big coef. table */
  190. unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
  191. int mixer_base; /* register offset of ac97 mixer */
  192. int mixer_status_offset; /* offset of mixer status reg. */
  193. int mixer_status_mask; /* bit mask to test the mixer status */
  194. int irq;
  195. int irq_acks;
  196. irqreturn_t (*interrupt)(int, void *, struct pt_regs *);
  197. int badintrcount; /* counter to check bogus interrupts */
  198. struct semaphore irq_mutex;
  199. nm256_stream_t streams[2];
  200. ac97_t *ac97;
  201. snd_pcm_t *pcm;
  202. struct pci_dev *pci;
  203. spinlock_t reg_lock;
  204. };
  205. /*
  206. * include coefficient table
  207. */
  208. #include "nm256_coef.c"
  209. /*
  210. * PCI ids
  211. */
  212. static struct pci_device_id snd_nm256_ids[] = {
  213. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  214. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  215. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  216. {0,},
  217. };
  218. MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
  219. /*
  220. * lowlvel stuffs
  221. */
  222. static inline u8
  223. snd_nm256_readb(nm256_t *chip, int offset)
  224. {
  225. return readb(chip->cport + offset);
  226. }
  227. static inline u16
  228. snd_nm256_readw(nm256_t *chip, int offset)
  229. {
  230. return readw(chip->cport + offset);
  231. }
  232. static inline u32
  233. snd_nm256_readl(nm256_t *chip, int offset)
  234. {
  235. return readl(chip->cport + offset);
  236. }
  237. static inline void
  238. snd_nm256_writeb(nm256_t *chip, int offset, u8 val)
  239. {
  240. writeb(val, chip->cport + offset);
  241. }
  242. static inline void
  243. snd_nm256_writew(nm256_t *chip, int offset, u16 val)
  244. {
  245. writew(val, chip->cport + offset);
  246. }
  247. static inline void
  248. snd_nm256_writel(nm256_t *chip, int offset, u32 val)
  249. {
  250. writel(val, chip->cport + offset);
  251. }
  252. static inline void
  253. snd_nm256_write_buffer(nm256_t *chip, void *src, int offset, int size)
  254. {
  255. offset -= chip->buffer_start;
  256. #ifdef SNDRV_CONFIG_DEBUG
  257. if (offset < 0 || offset >= chip->buffer_size) {
  258. snd_printk("write_buffer invalid offset = %d size = %d\n", offset, size);
  259. return;
  260. }
  261. #endif
  262. memcpy_toio(chip->buffer + offset, src, size);
  263. }
  264. /*
  265. * coefficient handlers -- what a magic!
  266. */
  267. static u16
  268. snd_nm256_get_start_offset(int which)
  269. {
  270. u16 offset = 0;
  271. while (which-- > 0)
  272. offset += coefficient_sizes[which];
  273. return offset;
  274. }
  275. static void
  276. snd_nm256_load_one_coefficient(nm256_t *chip, int stream, u32 port, int which)
  277. {
  278. u32 coeff_buf = chip->coeff_buf[stream];
  279. u16 offset = snd_nm256_get_start_offset(which);
  280. u16 size = coefficient_sizes[which];
  281. snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
  282. snd_nm256_writel(chip, port, coeff_buf);
  283. /* ??? Record seems to behave differently than playback. */
  284. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  285. size--;
  286. snd_nm256_writel(chip, port + 4, coeff_buf + size);
  287. }
  288. static void
  289. snd_nm256_load_coefficient(nm256_t *chip, int stream, int number)
  290. {
  291. /* The enable register for the specified engine. */
  292. u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
  293. u32 addr = NM_COEFF_START_OFFSET;
  294. addr += (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
  295. if (snd_nm256_readb(chip, poffset) & 1) {
  296. snd_printd("NM256: Engine was enabled while loading coefficients!\n");
  297. return;
  298. }
  299. /* The recording engine uses coefficient values 8-15. */
  300. number &= 7;
  301. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  302. number += 8;
  303. if (! chip->use_cache) {
  304. snd_nm256_load_one_coefficient(chip, stream, addr, number);
  305. return;
  306. }
  307. if (! chip->coeffs_current) {
  308. snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
  309. NM_TOTAL_COEFF_COUNT * 4);
  310. chip->coeffs_current = 1;
  311. } else {
  312. u32 base = chip->all_coeff_buf;
  313. u32 offset = snd_nm256_get_start_offset(number);
  314. u32 end_offset = offset + coefficient_sizes[number];
  315. snd_nm256_writel(chip, addr, base + offset);
  316. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  317. end_offset--;
  318. snd_nm256_writel(chip, addr + 4, base + end_offset);
  319. }
  320. }
  321. /* The actual rates supported by the card. */
  322. static unsigned int samplerates[8] = {
  323. 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
  324. };
  325. static snd_pcm_hw_constraint_list_t constraints_rates = {
  326. .count = ARRAY_SIZE(samplerates),
  327. .list = samplerates,
  328. .mask = 0,
  329. };
  330. /*
  331. * return the index of the target rate
  332. */
  333. static int
  334. snd_nm256_fixed_rate(unsigned int rate)
  335. {
  336. unsigned int i;
  337. for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
  338. if (rate == samplerates[i])
  339. return i;
  340. }
  341. snd_BUG();
  342. return 0;
  343. }
  344. /*
  345. * set sample rate and format
  346. */
  347. static void
  348. snd_nm256_set_format(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  349. {
  350. snd_pcm_runtime_t *runtime = substream->runtime;
  351. int rate_index = snd_nm256_fixed_rate(runtime->rate);
  352. unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
  353. s->shift = 0;
  354. if (snd_pcm_format_width(runtime->format) == 16) {
  355. ratebits |= NM_RATE_BITS_16;
  356. s->shift++;
  357. }
  358. if (runtime->channels > 1) {
  359. ratebits |= NM_RATE_STEREO;
  360. s->shift++;
  361. }
  362. runtime->rate = samplerates[rate_index];
  363. switch (substream->stream) {
  364. case SNDRV_PCM_STREAM_PLAYBACK:
  365. snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
  366. snd_nm256_writeb(chip,
  367. NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
  368. ratebits);
  369. break;
  370. case SNDRV_PCM_STREAM_CAPTURE:
  371. snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
  372. snd_nm256_writeb(chip,
  373. NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
  374. ratebits);
  375. break;
  376. }
  377. }
  378. /* acquire interrupt */
  379. static int snd_nm256_acquire_irq(nm256_t *chip)
  380. {
  381. down(&chip->irq_mutex);
  382. if (chip->irq < 0) {
  383. if (request_irq(chip->pci->irq, chip->interrupt, SA_INTERRUPT|SA_SHIRQ,
  384. chip->card->driver, (void*)chip)) {
  385. snd_printk("unable to grab IRQ %d\n", chip->pci->irq);
  386. up(&chip->irq_mutex);
  387. return -EBUSY;
  388. }
  389. chip->irq = chip->pci->irq;
  390. }
  391. chip->irq_acks++;
  392. up(&chip->irq_mutex);
  393. return 0;
  394. }
  395. /* release interrupt */
  396. static void snd_nm256_release_irq(nm256_t *chip)
  397. {
  398. down(&chip->irq_mutex);
  399. if (chip->irq_acks > 0)
  400. chip->irq_acks--;
  401. if (chip->irq_acks == 0 && chip->irq >= 0) {
  402. free_irq(chip->irq, (void*)chip);
  403. chip->irq = -1;
  404. }
  405. up(&chip->irq_mutex);
  406. }
  407. /*
  408. * start / stop
  409. */
  410. /* update the watermark (current period) */
  411. static void snd_nm256_pcm_mark(nm256_t *chip, nm256_stream_t *s, int reg)
  412. {
  413. s->cur_period++;
  414. s->cur_period %= s->periods;
  415. snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
  416. }
  417. #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
  418. #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
  419. static void
  420. snd_nm256_playback_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  421. {
  422. /* program buffer pointers */
  423. snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
  424. snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
  425. snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
  426. snd_nm256_playback_mark(chip, s);
  427. /* Enable playback engine and interrupts. */
  428. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
  429. NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
  430. /* Enable both channels. */
  431. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
  432. }
  433. static void
  434. snd_nm256_capture_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  435. {
  436. /* program buffer pointers */
  437. snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
  438. snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
  439. snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
  440. snd_nm256_capture_mark(chip, s);
  441. /* Enable playback engine and interrupts. */
  442. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
  443. NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
  444. }
  445. /* Stop the play engine. */
  446. static void
  447. snd_nm256_playback_stop(nm256_t *chip)
  448. {
  449. /* Shut off sound from both channels. */
  450. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
  451. NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
  452. /* Disable play engine. */
  453. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
  454. }
  455. static void
  456. snd_nm256_capture_stop(nm256_t *chip)
  457. {
  458. /* Disable recording engine. */
  459. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
  460. }
  461. static int
  462. snd_nm256_playback_trigger(snd_pcm_substream_t *substream, int cmd)
  463. {
  464. nm256_t *chip = snd_pcm_substream_chip(substream);
  465. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  466. int err = 0;
  467. snd_assert(s != NULL, return -ENXIO);
  468. spin_lock(&chip->reg_lock);
  469. switch (cmd) {
  470. case SNDRV_PCM_TRIGGER_RESUME:
  471. s->suspended = 0;
  472. /* fallthru */
  473. case SNDRV_PCM_TRIGGER_START:
  474. if (! s->running) {
  475. snd_nm256_playback_start(chip, s, substream);
  476. s->running = 1;
  477. }
  478. break;
  479. case SNDRV_PCM_TRIGGER_SUSPEND:
  480. s->suspended = 1;
  481. /* fallthru */
  482. case SNDRV_PCM_TRIGGER_STOP:
  483. if (s->running) {
  484. snd_nm256_playback_stop(chip);
  485. s->running = 0;
  486. }
  487. break;
  488. default:
  489. err = -EINVAL;
  490. break;
  491. }
  492. spin_unlock(&chip->reg_lock);
  493. return err;
  494. }
  495. static int
  496. snd_nm256_capture_trigger(snd_pcm_substream_t *substream, int cmd)
  497. {
  498. nm256_t *chip = snd_pcm_substream_chip(substream);
  499. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  500. int err = 0;
  501. snd_assert(s != NULL, return -ENXIO);
  502. spin_lock(&chip->reg_lock);
  503. switch (cmd) {
  504. case SNDRV_PCM_TRIGGER_START:
  505. case SNDRV_PCM_TRIGGER_RESUME:
  506. if (! s->running) {
  507. snd_nm256_capture_start(chip, s, substream);
  508. s->running = 1;
  509. }
  510. break;
  511. case SNDRV_PCM_TRIGGER_STOP:
  512. case SNDRV_PCM_TRIGGER_SUSPEND:
  513. if (s->running) {
  514. snd_nm256_capture_stop(chip);
  515. s->running = 0;
  516. }
  517. break;
  518. default:
  519. err = -EINVAL;
  520. break;
  521. }
  522. spin_unlock(&chip->reg_lock);
  523. return err;
  524. }
  525. /*
  526. * prepare playback/capture channel
  527. */
  528. static int snd_nm256_pcm_prepare(snd_pcm_substream_t *substream)
  529. {
  530. nm256_t *chip = snd_pcm_substream_chip(substream);
  531. snd_pcm_runtime_t *runtime = substream->runtime;
  532. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  533. snd_assert(s, return -ENXIO);
  534. s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
  535. s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
  536. s->periods = substream->runtime->periods;
  537. s->cur_period = 0;
  538. spin_lock_irq(&chip->reg_lock);
  539. s->running = 0;
  540. snd_nm256_set_format(chip, s, substream);
  541. spin_unlock_irq(&chip->reg_lock);
  542. return 0;
  543. }
  544. /*
  545. * get the current pointer
  546. */
  547. static snd_pcm_uframes_t
  548. snd_nm256_playback_pointer(snd_pcm_substream_t * substream)
  549. {
  550. nm256_t *chip = snd_pcm_substream_chip(substream);
  551. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  552. unsigned long curp;
  553. snd_assert(s, return 0);
  554. curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
  555. curp %= s->dma_size;
  556. return bytes_to_frames(substream->runtime, curp);
  557. }
  558. static snd_pcm_uframes_t
  559. snd_nm256_capture_pointer(snd_pcm_substream_t * substream)
  560. {
  561. nm256_t *chip = snd_pcm_substream_chip(substream);
  562. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  563. unsigned long curp;
  564. snd_assert(s != NULL, return 0);
  565. curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
  566. curp %= s->dma_size;
  567. return bytes_to_frames(substream->runtime, curp);
  568. }
  569. /* Remapped I/O space can be accessible as pointer on i386 */
  570. /* This might be changed in the future */
  571. #ifndef __i386__
  572. /*
  573. * silence / copy for playback
  574. */
  575. static int
  576. snd_nm256_playback_silence(snd_pcm_substream_t *substream,
  577. int channel, /* not used (interleaved data) */
  578. snd_pcm_uframes_t pos,
  579. snd_pcm_uframes_t count)
  580. {
  581. snd_pcm_runtime_t *runtime = substream->runtime;
  582. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  583. count = frames_to_bytes(runtime, count);
  584. pos = frames_to_bytes(runtime, pos);
  585. memset_io(s->bufptr + pos, 0, count);
  586. return 0;
  587. }
  588. static int
  589. snd_nm256_playback_copy(snd_pcm_substream_t *substream,
  590. int channel, /* not used (interleaved data) */
  591. snd_pcm_uframes_t pos,
  592. void __user *src,
  593. snd_pcm_uframes_t count)
  594. {
  595. snd_pcm_runtime_t *runtime = substream->runtime;
  596. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  597. count = frames_to_bytes(runtime, count);
  598. pos = frames_to_bytes(runtime, pos);
  599. if (copy_from_user_toio(s->bufptr + pos, src, count))
  600. return -EFAULT;
  601. return 0;
  602. }
  603. /*
  604. * copy to user
  605. */
  606. static int
  607. snd_nm256_capture_copy(snd_pcm_substream_t *substream,
  608. int channel, /* not used (interleaved data) */
  609. snd_pcm_uframes_t pos,
  610. void __user *dst,
  611. snd_pcm_uframes_t count)
  612. {
  613. snd_pcm_runtime_t *runtime = substream->runtime;
  614. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  615. count = frames_to_bytes(runtime, count);
  616. pos = frames_to_bytes(runtime, pos);
  617. if (copy_to_user_fromio(dst, s->bufptr + pos, count))
  618. return -EFAULT;
  619. return 0;
  620. }
  621. #endif /* !__i386__ */
  622. /*
  623. * update playback/capture watermarks
  624. */
  625. /* spinlock held! */
  626. static void
  627. snd_nm256_playback_update(nm256_t *chip)
  628. {
  629. nm256_stream_t *s;
  630. s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
  631. if (s->running && s->substream) {
  632. spin_unlock(&chip->reg_lock);
  633. snd_pcm_period_elapsed(s->substream);
  634. spin_lock(&chip->reg_lock);
  635. snd_nm256_playback_mark(chip, s);
  636. }
  637. }
  638. /* spinlock held! */
  639. static void
  640. snd_nm256_capture_update(nm256_t *chip)
  641. {
  642. nm256_stream_t *s;
  643. s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
  644. if (s->running && s->substream) {
  645. spin_unlock(&chip->reg_lock);
  646. snd_pcm_period_elapsed(s->substream);
  647. spin_lock(&chip->reg_lock);
  648. snd_nm256_capture_mark(chip, s);
  649. }
  650. }
  651. /*
  652. * hardware info
  653. */
  654. static snd_pcm_hardware_t snd_nm256_playback =
  655. {
  656. .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
  657. SNDRV_PCM_INFO_INTERLEAVED |
  658. /*SNDRV_PCM_INFO_PAUSE |*/
  659. SNDRV_PCM_INFO_RESUME,
  660. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  661. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  662. .rate_min = 8000,
  663. .rate_max = 48000,
  664. .channels_min = 1,
  665. .channels_max = 2,
  666. .periods_min = 2,
  667. .periods_max = 1024,
  668. .buffer_bytes_max = 128 * 1024,
  669. .period_bytes_min = 256,
  670. .period_bytes_max = 128 * 1024,
  671. };
  672. static snd_pcm_hardware_t snd_nm256_capture =
  673. {
  674. .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
  675. SNDRV_PCM_INFO_INTERLEAVED |
  676. /*SNDRV_PCM_INFO_PAUSE |*/
  677. SNDRV_PCM_INFO_RESUME,
  678. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  679. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  680. .rate_min = 8000,
  681. .rate_max = 48000,
  682. .channels_min = 1,
  683. .channels_max = 2,
  684. .periods_min = 2,
  685. .periods_max = 1024,
  686. .buffer_bytes_max = 128 * 1024,
  687. .period_bytes_min = 256,
  688. .period_bytes_max = 128 * 1024,
  689. };
  690. /* set dma transfer size */
  691. static int snd_nm256_pcm_hw_params(snd_pcm_substream_t *substream, snd_pcm_hw_params_t *hw_params)
  692. {
  693. /* area and addr are already set and unchanged */
  694. substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
  695. return 0;
  696. }
  697. /*
  698. * open
  699. */
  700. static void snd_nm256_setup_stream(nm256_t *chip, nm256_stream_t *s,
  701. snd_pcm_substream_t *substream,
  702. snd_pcm_hardware_t *hw_ptr)
  703. {
  704. snd_pcm_runtime_t *runtime = substream->runtime;
  705. s->running = 0;
  706. runtime->hw = *hw_ptr;
  707. runtime->hw.buffer_bytes_max = s->bufsize;
  708. runtime->hw.period_bytes_max = s->bufsize / 2;
  709. runtime->dma_area = (void __force *) s->bufptr;
  710. runtime->dma_addr = s->bufptr_addr;
  711. runtime->dma_bytes = s->bufsize;
  712. runtime->private_data = s;
  713. s->substream = substream;
  714. snd_pcm_set_sync(substream);
  715. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  716. &constraints_rates);
  717. }
  718. static int
  719. snd_nm256_playback_open(snd_pcm_substream_t *substream)
  720. {
  721. nm256_t *chip = snd_pcm_substream_chip(substream);
  722. if (snd_nm256_acquire_irq(chip) < 0)
  723. return -EBUSY;
  724. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
  725. substream, &snd_nm256_playback);
  726. return 0;
  727. }
  728. static int
  729. snd_nm256_capture_open(snd_pcm_substream_t *substream)
  730. {
  731. nm256_t *chip = snd_pcm_substream_chip(substream);
  732. if (snd_nm256_acquire_irq(chip) < 0)
  733. return -EBUSY;
  734. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
  735. substream, &snd_nm256_capture);
  736. return 0;
  737. }
  738. /*
  739. * close - we don't have to do special..
  740. */
  741. static int
  742. snd_nm256_playback_close(snd_pcm_substream_t *substream)
  743. {
  744. nm256_t *chip = snd_pcm_substream_chip(substream);
  745. snd_nm256_release_irq(chip);
  746. return 0;
  747. }
  748. static int
  749. snd_nm256_capture_close(snd_pcm_substream_t *substream)
  750. {
  751. nm256_t *chip = snd_pcm_substream_chip(substream);
  752. snd_nm256_release_irq(chip);
  753. return 0;
  754. }
  755. /*
  756. * create a pcm instance
  757. */
  758. static snd_pcm_ops_t snd_nm256_playback_ops = {
  759. .open = snd_nm256_playback_open,
  760. .close = snd_nm256_playback_close,
  761. .ioctl = snd_pcm_lib_ioctl,
  762. .hw_params = snd_nm256_pcm_hw_params,
  763. .prepare = snd_nm256_pcm_prepare,
  764. .trigger = snd_nm256_playback_trigger,
  765. .pointer = snd_nm256_playback_pointer,
  766. #ifndef __i386__
  767. .copy = snd_nm256_playback_copy,
  768. .silence = snd_nm256_playback_silence,
  769. #endif
  770. .mmap = snd_pcm_lib_mmap_iomem,
  771. };
  772. static snd_pcm_ops_t snd_nm256_capture_ops = {
  773. .open = snd_nm256_capture_open,
  774. .close = snd_nm256_capture_close,
  775. .ioctl = snd_pcm_lib_ioctl,
  776. .hw_params = snd_nm256_pcm_hw_params,
  777. .prepare = snd_nm256_pcm_prepare,
  778. .trigger = snd_nm256_capture_trigger,
  779. .pointer = snd_nm256_capture_pointer,
  780. #ifndef __i386__
  781. .copy = snd_nm256_capture_copy,
  782. #endif
  783. .mmap = snd_pcm_lib_mmap_iomem,
  784. };
  785. static int __devinit
  786. snd_nm256_pcm(nm256_t *chip, int device)
  787. {
  788. snd_pcm_t *pcm;
  789. int i, err;
  790. for (i = 0; i < 2; i++) {
  791. nm256_stream_t *s = &chip->streams[i];
  792. s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
  793. s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
  794. }
  795. err = snd_pcm_new(chip->card, chip->card->driver, device,
  796. 1, 1, &pcm);
  797. if (err < 0)
  798. return err;
  799. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
  800. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
  801. pcm->private_data = chip;
  802. pcm->info_flags = 0;
  803. chip->pcm = pcm;
  804. return 0;
  805. }
  806. /*
  807. * Initialize the hardware.
  808. */
  809. static void
  810. snd_nm256_init_chip(nm256_t *chip)
  811. {
  812. /* Reset everything. */
  813. snd_nm256_writeb(chip, 0x0, 0x11);
  814. snd_nm256_writew(chip, 0x214, 0);
  815. /* stop sounds.. */
  816. //snd_nm256_playback_stop(chip);
  817. //snd_nm256_capture_stop(chip);
  818. }
  819. static irqreturn_t
  820. snd_nm256_intr_check(nm256_t *chip)
  821. {
  822. if (chip->badintrcount++ > 1000) {
  823. /*
  824. * I'm not sure if the best thing is to stop the card from
  825. * playing or just release the interrupt (after all, we're in
  826. * a bad situation, so doing fancy stuff may not be such a good
  827. * idea).
  828. *
  829. * I worry about the card engine continuing to play noise
  830. * over and over, however--that could become a very
  831. * obnoxious problem. And we know that when this usually
  832. * happens things are fairly safe, it just means the user's
  833. * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
  834. */
  835. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  836. snd_nm256_playback_stop(chip);
  837. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  838. snd_nm256_capture_stop(chip);
  839. chip->badintrcount = 0;
  840. return IRQ_HANDLED;
  841. }
  842. return IRQ_NONE;
  843. }
  844. /*
  845. * Handle a potential interrupt for the device referred to by DEV_ID.
  846. *
  847. * I don't like the cut-n-paste job here either between the two routines,
  848. * but there are sufficient differences between the two interrupt handlers
  849. * that parameterizing it isn't all that great either. (Could use a macro,
  850. * I suppose...yucky bleah.)
  851. */
  852. static irqreturn_t
  853. snd_nm256_interrupt(int irq, void *dev_id, struct pt_regs *dummy)
  854. {
  855. nm256_t *chip = dev_id;
  856. u16 status;
  857. u8 cbyte;
  858. status = snd_nm256_readw(chip, NM_INT_REG);
  859. /* Not ours. */
  860. if (status == 0)
  861. return snd_nm256_intr_check(chip);
  862. chip->badintrcount = 0;
  863. /* Rather boring; check for individual interrupts and process them. */
  864. spin_lock(&chip->reg_lock);
  865. if (status & NM_PLAYBACK_INT) {
  866. status &= ~NM_PLAYBACK_INT;
  867. NM_ACK_INT(chip, NM_PLAYBACK_INT);
  868. snd_nm256_playback_update(chip);
  869. }
  870. if (status & NM_RECORD_INT) {
  871. status &= ~NM_RECORD_INT;
  872. NM_ACK_INT(chip, NM_RECORD_INT);
  873. snd_nm256_capture_update(chip);
  874. }
  875. if (status & NM_MISC_INT_1) {
  876. status &= ~NM_MISC_INT_1;
  877. NM_ACK_INT(chip, NM_MISC_INT_1);
  878. snd_printd("NM256: Got misc interrupt #1\n");
  879. snd_nm256_writew(chip, NM_INT_REG, 0x8000);
  880. cbyte = snd_nm256_readb(chip, 0x400);
  881. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  882. }
  883. if (status & NM_MISC_INT_2) {
  884. status &= ~NM_MISC_INT_2;
  885. NM_ACK_INT(chip, NM_MISC_INT_2);
  886. snd_printd("NM256: Got misc interrupt #2\n");
  887. cbyte = snd_nm256_readb(chip, 0x400);
  888. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  889. }
  890. /* Unknown interrupt. */
  891. if (status) {
  892. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  893. status);
  894. /* Pray. */
  895. NM_ACK_INT(chip, status);
  896. }
  897. spin_unlock(&chip->reg_lock);
  898. return IRQ_HANDLED;
  899. }
  900. /*
  901. * Handle a potential interrupt for the device referred to by DEV_ID.
  902. * This handler is for the 256ZX, and is very similar to the non-ZX
  903. * routine.
  904. */
  905. static irqreturn_t
  906. snd_nm256_interrupt_zx(int irq, void *dev_id, struct pt_regs *dummy)
  907. {
  908. nm256_t *chip = dev_id;
  909. u32 status;
  910. u8 cbyte;
  911. status = snd_nm256_readl(chip, NM_INT_REG);
  912. /* Not ours. */
  913. if (status == 0)
  914. return snd_nm256_intr_check(chip);
  915. chip->badintrcount = 0;
  916. /* Rather boring; check for individual interrupts and process them. */
  917. spin_lock(&chip->reg_lock);
  918. if (status & NM2_PLAYBACK_INT) {
  919. status &= ~NM2_PLAYBACK_INT;
  920. NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
  921. snd_nm256_playback_update(chip);
  922. }
  923. if (status & NM2_RECORD_INT) {
  924. status &= ~NM2_RECORD_INT;
  925. NM2_ACK_INT(chip, NM2_RECORD_INT);
  926. snd_nm256_capture_update(chip);
  927. }
  928. if (status & NM2_MISC_INT_1) {
  929. status &= ~NM2_MISC_INT_1;
  930. NM2_ACK_INT(chip, NM2_MISC_INT_1);
  931. snd_printd("NM256: Got misc interrupt #1\n");
  932. cbyte = snd_nm256_readb(chip, 0x400);
  933. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  934. }
  935. if (status & NM2_MISC_INT_2) {
  936. status &= ~NM2_MISC_INT_2;
  937. NM2_ACK_INT(chip, NM2_MISC_INT_2);
  938. snd_printd("NM256: Got misc interrupt #2\n");
  939. cbyte = snd_nm256_readb(chip, 0x400);
  940. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  941. }
  942. /* Unknown interrupt. */
  943. if (status) {
  944. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  945. status);
  946. /* Pray. */
  947. NM2_ACK_INT(chip, status);
  948. }
  949. spin_unlock(&chip->reg_lock);
  950. return IRQ_HANDLED;
  951. }
  952. /*
  953. * AC97 interface
  954. */
  955. /*
  956. * Waits for the mixer to become ready to be written; returns a zero value
  957. * if it timed out.
  958. */
  959. static int
  960. snd_nm256_ac97_ready(nm256_t *chip)
  961. {
  962. int timeout = 10;
  963. u32 testaddr;
  964. u16 testb;
  965. testaddr = chip->mixer_status_offset;
  966. testb = chip->mixer_status_mask;
  967. /*
  968. * Loop around waiting for the mixer to become ready.
  969. */
  970. while (timeout-- > 0) {
  971. if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
  972. return 1;
  973. udelay(100);
  974. }
  975. return 0;
  976. }
  977. /*
  978. */
  979. static unsigned short
  980. snd_nm256_ac97_read(ac97_t *ac97, unsigned short reg)
  981. {
  982. nm256_t *chip = ac97->private_data;
  983. int res;
  984. if (reg >= 128)
  985. return 0;
  986. if (! snd_nm256_ac97_ready(chip))
  987. return 0;
  988. res = snd_nm256_readw(chip, chip->mixer_base + reg);
  989. /* Magic delay. Bleah yucky. */
  990. msleep(1);
  991. return res;
  992. }
  993. /*
  994. */
  995. static void
  996. snd_nm256_ac97_write(ac97_t *ac97,
  997. unsigned short reg, unsigned short val)
  998. {
  999. nm256_t *chip = ac97->private_data;
  1000. int tries = 2;
  1001. u32 base;
  1002. base = chip->mixer_base;
  1003. snd_nm256_ac97_ready(chip);
  1004. /* Wait for the write to take, too. */
  1005. while (tries-- > 0) {
  1006. snd_nm256_writew(chip, base + reg, val);
  1007. msleep(1); /* a little delay here seems better.. */
  1008. if (snd_nm256_ac97_ready(chip))
  1009. return;
  1010. }
  1011. snd_printd("nm256: ac97 codec not ready..\n");
  1012. }
  1013. /* initialize the ac97 into a known state */
  1014. static void
  1015. snd_nm256_ac97_reset(ac97_t *ac97)
  1016. {
  1017. nm256_t *chip = ac97->private_data;
  1018. /* Reset the mixer. 'Tis magic! */
  1019. snd_nm256_writeb(chip, 0x6c0, 1);
  1020. if (! chip->reset_workaround) {
  1021. /* Dell latitude LS will lock up by this */
  1022. snd_nm256_writeb(chip, 0x6cc, 0x87);
  1023. }
  1024. snd_nm256_writeb(chip, 0x6cc, 0x80);
  1025. snd_nm256_writeb(chip, 0x6cc, 0x0);
  1026. }
  1027. /* create an ac97 mixer interface */
  1028. static int __devinit
  1029. snd_nm256_mixer(nm256_t *chip)
  1030. {
  1031. ac97_bus_t *pbus;
  1032. ac97_template_t ac97;
  1033. int i, err;
  1034. static ac97_bus_ops_t ops = {
  1035. .reset = snd_nm256_ac97_reset,
  1036. .write = snd_nm256_ac97_write,
  1037. .read = snd_nm256_ac97_read,
  1038. };
  1039. /* looks like nm256 hangs up when unexpected registers are touched... */
  1040. static int mixer_regs[] = {
  1041. AC97_MASTER, AC97_HEADPHONE, AC97_MASTER_MONO,
  1042. AC97_PC_BEEP, AC97_PHONE, AC97_MIC, AC97_LINE, AC97_CD,
  1043. AC97_VIDEO, AC97_AUX, AC97_PCM, AC97_REC_SEL,
  1044. AC97_REC_GAIN, AC97_GENERAL_PURPOSE, AC97_3D_CONTROL,
  1045. /*AC97_EXTENDED_ID,*/
  1046. AC97_VENDOR_ID1, AC97_VENDOR_ID2,
  1047. -1
  1048. };
  1049. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1050. return err;
  1051. memset(&ac97, 0, sizeof(ac97));
  1052. ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
  1053. ac97.limited_regs = 1;
  1054. for (i = 0; mixer_regs[i] >= 0; i++)
  1055. set_bit(mixer_regs[i], ac97.reg_accessed);
  1056. ac97.private_data = chip;
  1057. pbus->no_vra = 1;
  1058. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1059. if (err < 0)
  1060. return err;
  1061. if (! (chip->ac97->id & (0xf0000000))) {
  1062. /* looks like an invalid id */
  1063. sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
  1064. }
  1065. return 0;
  1066. }
  1067. /*
  1068. * See if the signature left by the NM256 BIOS is intact; if so, we use
  1069. * the associated address as the end of our audio buffer in the video
  1070. * RAM.
  1071. */
  1072. static int __devinit
  1073. snd_nm256_peek_for_sig(nm256_t *chip)
  1074. {
  1075. /* The signature is located 1K below the end of video RAM. */
  1076. void __iomem *temp;
  1077. /* Default buffer end is 5120 bytes below the top of RAM. */
  1078. unsigned long pointer_found = chip->buffer_end - 0x1400;
  1079. u32 sig;
  1080. temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
  1081. if (temp == NULL) {
  1082. snd_printk("Unable to scan for card signature in video RAM\n");
  1083. return -EBUSY;
  1084. }
  1085. sig = readl(temp);
  1086. if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
  1087. u32 pointer = readl(temp + 4);
  1088. /*
  1089. * If it's obviously invalid, don't use it
  1090. */
  1091. if (pointer == 0xffffffff ||
  1092. pointer < chip->buffer_size ||
  1093. pointer > chip->buffer_end) {
  1094. snd_printk("invalid signature found: 0x%x\n", pointer);
  1095. iounmap(temp);
  1096. return -ENODEV;
  1097. } else {
  1098. pointer_found = pointer;
  1099. printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n", pointer);
  1100. }
  1101. }
  1102. iounmap(temp);
  1103. chip->buffer_end = pointer_found;
  1104. return 0;
  1105. }
  1106. #ifdef CONFIG_PM
  1107. /*
  1108. * APM event handler, so the card is properly reinitialized after a power
  1109. * event.
  1110. */
  1111. static int nm256_suspend(snd_card_t *card, pm_message_t state)
  1112. {
  1113. nm256_t *chip = card->pm_private_data;
  1114. snd_pcm_suspend_all(chip->pcm);
  1115. snd_ac97_suspend(chip->ac97);
  1116. chip->coeffs_current = 0;
  1117. pci_disable_device(chip->pci);
  1118. return 0;
  1119. }
  1120. static int nm256_resume(snd_card_t *card)
  1121. {
  1122. nm256_t *chip = card->pm_private_data;
  1123. int i;
  1124. /* Perform a full reset on the hardware */
  1125. pci_enable_device(chip->pci);
  1126. snd_nm256_init_chip(chip);
  1127. /* restore ac97 */
  1128. snd_ac97_resume(chip->ac97);
  1129. for (i = 0; i < 2; i++) {
  1130. nm256_stream_t *s = &chip->streams[i];
  1131. if (s->substream && s->suspended) {
  1132. spin_lock_irq(&chip->reg_lock);
  1133. snd_nm256_set_format(chip, s, s->substream);
  1134. spin_unlock_irq(&chip->reg_lock);
  1135. }
  1136. }
  1137. return 0;
  1138. }
  1139. #endif /* CONFIG_PM */
  1140. static int snd_nm256_free(nm256_t *chip)
  1141. {
  1142. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  1143. snd_nm256_playback_stop(chip);
  1144. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  1145. snd_nm256_capture_stop(chip);
  1146. if (chip->irq >= 0)
  1147. synchronize_irq(chip->irq);
  1148. if (chip->cport)
  1149. iounmap(chip->cport);
  1150. if (chip->buffer)
  1151. iounmap(chip->buffer);
  1152. release_and_free_resource(chip->res_cport);
  1153. release_and_free_resource(chip->res_buffer);
  1154. if (chip->irq >= 0)
  1155. free_irq(chip->irq, (void*)chip);
  1156. pci_disable_device(chip->pci);
  1157. kfree(chip);
  1158. return 0;
  1159. }
  1160. static int snd_nm256_dev_free(snd_device_t *device)
  1161. {
  1162. nm256_t *chip = device->device_data;
  1163. return snd_nm256_free(chip);
  1164. }
  1165. static int __devinit
  1166. snd_nm256_create(snd_card_t *card, struct pci_dev *pci,
  1167. int play_bufsize, int capt_bufsize,
  1168. int force_load,
  1169. u32 buffertop,
  1170. int usecache,
  1171. nm256_t **chip_ret)
  1172. {
  1173. nm256_t *chip;
  1174. int err, pval;
  1175. static snd_device_ops_t ops = {
  1176. .dev_free = snd_nm256_dev_free,
  1177. };
  1178. u32 addr;
  1179. *chip_ret = NULL;
  1180. if ((err = pci_enable_device(pci)) < 0)
  1181. return err;
  1182. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1183. if (chip == NULL) {
  1184. pci_disable_device(pci);
  1185. return -ENOMEM;
  1186. }
  1187. chip->card = card;
  1188. chip->pci = pci;
  1189. chip->use_cache = usecache;
  1190. spin_lock_init(&chip->reg_lock);
  1191. chip->irq = -1;
  1192. init_MUTEX(&chip->irq_mutex);
  1193. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = play_bufsize;
  1194. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capt_bufsize;
  1195. /*
  1196. * The NM256 has two memory ports. The first port is nothing
  1197. * more than a chunk of video RAM, which is used as the I/O ring
  1198. * buffer. The second port has the actual juicy stuff (like the
  1199. * mixer and the playback engine control registers).
  1200. */
  1201. chip->buffer_addr = pci_resource_start(pci, 0);
  1202. chip->cport_addr = pci_resource_start(pci, 1);
  1203. /* Init the memory port info. */
  1204. /* remap control port (#2) */
  1205. chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
  1206. card->driver);
  1207. if (chip->res_cport == NULL) {
  1208. snd_printk("memory region 0x%lx (size 0x%x) busy\n",
  1209. chip->cport_addr, NM_PORT2_SIZE);
  1210. err = -EBUSY;
  1211. goto __error;
  1212. }
  1213. chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
  1214. if (chip->cport == NULL) {
  1215. snd_printk("unable to map control port %lx\n", chip->cport_addr);
  1216. err = -ENOMEM;
  1217. goto __error;
  1218. }
  1219. if (!strcmp(card->driver, "NM256AV")) {
  1220. /* Ok, try to see if this is a non-AC97 version of the hardware. */
  1221. pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
  1222. if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
  1223. if (! force_load) {
  1224. printk(KERN_ERR "nm256: no ac97 is found!\n");
  1225. printk(KERN_ERR " force the driver to load by passing in the module parameter\n");
  1226. printk(KERN_ERR " force_ac97=1\n");
  1227. printk(KERN_ERR " or try sb16 or cs423x drivers instead.\n");
  1228. err = -ENXIO;
  1229. goto __error;
  1230. }
  1231. }
  1232. chip->buffer_end = 2560 * 1024;
  1233. chip->interrupt = snd_nm256_interrupt;
  1234. chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
  1235. chip->mixer_status_mask = NM_MIXER_READY_MASK;
  1236. } else {
  1237. /* Not sure if there is any relevant detect for the ZX or not. */
  1238. if (snd_nm256_readb(chip, 0xa0b) != 0)
  1239. chip->buffer_end = 6144 * 1024;
  1240. else
  1241. chip->buffer_end = 4096 * 1024;
  1242. chip->interrupt = snd_nm256_interrupt_zx;
  1243. chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
  1244. chip->mixer_status_mask = NM2_MIXER_READY_MASK;
  1245. }
  1246. chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1247. if (chip->use_cache)
  1248. chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
  1249. else
  1250. chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
  1251. if (buffertop >= chip->buffer_size && buffertop < chip->buffer_end)
  1252. chip->buffer_end = buffertop;
  1253. else {
  1254. /* get buffer end pointer from signature */
  1255. if ((err = snd_nm256_peek_for_sig(chip)) < 0)
  1256. goto __error;
  1257. }
  1258. chip->buffer_start = chip->buffer_end - chip->buffer_size;
  1259. chip->buffer_addr += chip->buffer_start;
  1260. printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
  1261. chip->buffer_start, chip->buffer_end);
  1262. chip->res_buffer = request_mem_region(chip->buffer_addr,
  1263. chip->buffer_size,
  1264. card->driver);
  1265. if (chip->res_buffer == NULL) {
  1266. snd_printk("nm256: buffer 0x%lx (size 0x%x) busy\n",
  1267. chip->buffer_addr, chip->buffer_size);
  1268. err = -EBUSY;
  1269. goto __error;
  1270. }
  1271. chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
  1272. if (chip->buffer == NULL) {
  1273. err = -ENOMEM;
  1274. snd_printk("unable to map ring buffer at %lx\n", chip->buffer_addr);
  1275. goto __error;
  1276. }
  1277. /* set offsets */
  1278. addr = chip->buffer_start;
  1279. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
  1280. addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
  1281. chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
  1282. addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1283. if (chip->use_cache) {
  1284. chip->all_coeff_buf = addr;
  1285. } else {
  1286. chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
  1287. addr += NM_MAX_PLAYBACK_COEF_SIZE;
  1288. chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
  1289. }
  1290. /* Fixed setting. */
  1291. chip->mixer_base = NM_MIXER_OFFSET;
  1292. chip->coeffs_current = 0;
  1293. snd_nm256_init_chip(chip);
  1294. // pci_set_master(pci); /* needed? */
  1295. snd_card_set_pm_callback(card, nm256_suspend, nm256_resume, chip);
  1296. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
  1297. goto __error;
  1298. snd_card_set_dev(card, &pci->dev);
  1299. *chip_ret = chip;
  1300. return 0;
  1301. __error:
  1302. snd_nm256_free(chip);
  1303. return err;
  1304. }
  1305. struct nm256_quirk {
  1306. unsigned short vendor;
  1307. unsigned short device;
  1308. int type;
  1309. };
  1310. enum { NM_BLACKLISTED, NM_RESET_WORKAROUND };
  1311. static struct nm256_quirk nm256_quirks[] __devinitdata = {
  1312. /* HP omnibook 4150 has cs4232 codec internally */
  1313. { .vendor = 0x103c, .device = 0x0007, .type = NM_BLACKLISTED },
  1314. /* Sony PCG-F305 */
  1315. { .vendor = 0x104d, .device = 0x8041, .type = NM_RESET_WORKAROUND },
  1316. /* Dell Latitude LS */
  1317. { .vendor = 0x1028, .device = 0x0080, .type = NM_RESET_WORKAROUND },
  1318. { } /* terminator */
  1319. };
  1320. static int __devinit snd_nm256_probe(struct pci_dev *pci,
  1321. const struct pci_device_id *pci_id)
  1322. {
  1323. static int dev;
  1324. snd_card_t *card;
  1325. nm256_t *chip;
  1326. int err;
  1327. unsigned int xbuffer_top;
  1328. struct nm256_quirk *q;
  1329. u16 subsystem_vendor, subsystem_device;
  1330. if (dev >= SNDRV_CARDS)
  1331. return -ENODEV;
  1332. if (!enable[dev]) {
  1333. dev++;
  1334. return -ENOENT;
  1335. }
  1336. pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
  1337. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device);
  1338. for (q = nm256_quirks; q->vendor; q++) {
  1339. if (q->vendor == subsystem_vendor && q->device == subsystem_device) {
  1340. switch (q->type) {
  1341. case NM_BLACKLISTED:
  1342. printk(KERN_INFO "nm256: The device is blacklisted. Loading stopped\n");
  1343. return -ENODEV;
  1344. case NM_RESET_WORKAROUND:
  1345. reset_workaround[dev] = 1;
  1346. break;
  1347. }
  1348. }
  1349. }
  1350. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1351. if (card == NULL)
  1352. return -ENOMEM;
  1353. switch (pci->device) {
  1354. case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
  1355. strcpy(card->driver, "NM256AV");
  1356. break;
  1357. case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
  1358. strcpy(card->driver, "NM256ZX");
  1359. break;
  1360. case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
  1361. strcpy(card->driver, "NM256XL+");
  1362. break;
  1363. default:
  1364. snd_printk("invalid device id 0x%x\n", pci->device);
  1365. snd_card_free(card);
  1366. return -EINVAL;
  1367. }
  1368. if (vaio_hack[dev])
  1369. xbuffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
  1370. else
  1371. xbuffer_top = buffer_top[dev];
  1372. if (playback_bufsize[dev] < 4)
  1373. playback_bufsize[dev] = 4;
  1374. if (playback_bufsize[dev] > 128)
  1375. playback_bufsize[dev] = 128;
  1376. if (capture_bufsize[dev] < 4)
  1377. capture_bufsize[dev] = 4;
  1378. if (capture_bufsize[dev] > 128)
  1379. capture_bufsize[dev] = 128;
  1380. if ((err = snd_nm256_create(card, pci,
  1381. playback_bufsize[dev] * 1024, /* in bytes */
  1382. capture_bufsize[dev] * 1024, /* in bytes */
  1383. force_ac97[dev],
  1384. xbuffer_top,
  1385. use_cache[dev],
  1386. &chip)) < 0) {
  1387. snd_card_free(card);
  1388. return err;
  1389. }
  1390. if (reset_workaround[dev]) {
  1391. snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
  1392. chip->reset_workaround = 1;
  1393. }
  1394. if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
  1395. (err = snd_nm256_mixer(chip)) < 0) {
  1396. snd_card_free(card);
  1397. return err;
  1398. }
  1399. sprintf(card->shortname, "NeoMagic %s", card->driver);
  1400. sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
  1401. card->shortname,
  1402. chip->buffer_addr, chip->cport_addr, chip->irq);
  1403. if ((err = snd_card_register(card)) < 0) {
  1404. snd_card_free(card);
  1405. return err;
  1406. }
  1407. pci_set_drvdata(pci, card);
  1408. dev++;
  1409. return 0;
  1410. }
  1411. static void __devexit snd_nm256_remove(struct pci_dev *pci)
  1412. {
  1413. snd_card_free(pci_get_drvdata(pci));
  1414. pci_set_drvdata(pci, NULL);
  1415. }
  1416. static struct pci_driver driver = {
  1417. .name = "NeoMagic 256",
  1418. .owner = THIS_MODULE,
  1419. .id_table = snd_nm256_ids,
  1420. .probe = snd_nm256_probe,
  1421. .remove = __devexit_p(snd_nm256_remove),
  1422. SND_PCI_PM_CALLBACKS
  1423. };
  1424. static int __init alsa_card_nm256_init(void)
  1425. {
  1426. return pci_register_driver(&driver);
  1427. }
  1428. static void __exit alsa_card_nm256_exit(void)
  1429. {
  1430. pci_unregister_driver(&driver);
  1431. }
  1432. module_init(alsa_card_nm256_init)
  1433. module_exit(alsa_card_nm256_exit)