iwl-core.c 86 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <net/mac80211.h>
  32. #include "iwl-eeprom.h"
  33. #include "iwl-dev.h" /* FIXME: remove */
  34. #include "iwl-debug.h"
  35. #include "iwl-core.h"
  36. #include "iwl-io.h"
  37. #include "iwl-rfkill.h"
  38. #include "iwl-power.h"
  39. #include "iwl-sta.h"
  40. #include "iwl-helpers.h"
  41. MODULE_DESCRIPTION("iwl core");
  42. MODULE_VERSION(IWLWIFI_VERSION);
  43. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  44. MODULE_LICENSE("GPL");
  45. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  46. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  47. IWL_RATE_SISO_##s##M_PLCP, \
  48. IWL_RATE_MIMO2_##s##M_PLCP,\
  49. IWL_RATE_MIMO3_##s##M_PLCP,\
  50. IWL_RATE_##r##M_IEEE, \
  51. IWL_RATE_##ip##M_INDEX, \
  52. IWL_RATE_##in##M_INDEX, \
  53. IWL_RATE_##rp##M_INDEX, \
  54. IWL_RATE_##rn##M_INDEX, \
  55. IWL_RATE_##pp##M_INDEX, \
  56. IWL_RATE_##np##M_INDEX }
  57. static irqreturn_t iwl_isr(int irq, void *data);
  58. /*
  59. * Parameter order:
  60. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  61. *
  62. * If there isn't a valid next or previous rate then INV is used which
  63. * maps to IWL_RATE_INVALID
  64. *
  65. */
  66. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  67. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  68. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  69. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  70. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  71. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  72. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  73. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  74. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  75. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  76. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  77. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  78. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  79. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  80. /* FIXME:RS: ^^ should be INV (legacy) */
  81. };
  82. EXPORT_SYMBOL(iwl_rates);
  83. /**
  84. * translate ucode response to mac80211 tx status control values
  85. */
  86. void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  87. struct ieee80211_tx_info *info)
  88. {
  89. int rate_index;
  90. struct ieee80211_tx_rate *r = &info->control.rates[0];
  91. info->antenna_sel_tx =
  92. ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
  93. if (rate_n_flags & RATE_MCS_HT_MSK)
  94. r->flags |= IEEE80211_TX_RC_MCS;
  95. if (rate_n_flags & RATE_MCS_GF_MSK)
  96. r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
  97. if (rate_n_flags & RATE_MCS_FAT_MSK)
  98. r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
  99. if (rate_n_flags & RATE_MCS_DUP_MSK)
  100. r->flags |= IEEE80211_TX_RC_DUP_DATA;
  101. if (rate_n_flags & RATE_MCS_SGI_MSK)
  102. r->flags |= IEEE80211_TX_RC_SHORT_GI;
  103. rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
  104. if (info->band == IEEE80211_BAND_5GHZ)
  105. rate_index -= IWL_FIRST_OFDM_RATE;
  106. r->idx = rate_index;
  107. }
  108. EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
  109. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  110. {
  111. int idx = 0;
  112. /* HT rate format */
  113. if (rate_n_flags & RATE_MCS_HT_MSK) {
  114. idx = (rate_n_flags & 0xff);
  115. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  116. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  117. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  118. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  119. idx += IWL_FIRST_OFDM_RATE;
  120. /* skip 9M not supported in ht*/
  121. if (idx >= IWL_RATE_9M_INDEX)
  122. idx += 1;
  123. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  124. return idx;
  125. /* legacy rate format, search for match in table */
  126. } else {
  127. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  128. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  129. return idx;
  130. }
  131. return -1;
  132. }
  133. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  134. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  135. {
  136. int i;
  137. u8 ind = ant;
  138. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  139. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  140. if (priv->hw_params.valid_tx_ant & BIT(ind))
  141. return ind;
  142. }
  143. return ant;
  144. }
  145. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  146. EXPORT_SYMBOL(iwl_bcast_addr);
  147. /* This function both allocates and initializes hw and priv. */
  148. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  149. struct ieee80211_ops *hw_ops)
  150. {
  151. struct iwl_priv *priv;
  152. /* mac80211 allocates memory for this device instance, including
  153. * space for this driver's private structure */
  154. struct ieee80211_hw *hw =
  155. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  156. if (hw == NULL) {
  157. printk(KERN_ERR "%s: Can not allocate network device\n",
  158. cfg->name);
  159. goto out;
  160. }
  161. priv = hw->priv;
  162. priv->hw = hw;
  163. out:
  164. return hw;
  165. }
  166. EXPORT_SYMBOL(iwl_alloc_all);
  167. void iwl_hw_detect(struct iwl_priv *priv)
  168. {
  169. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  170. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  171. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  172. }
  173. EXPORT_SYMBOL(iwl_hw_detect);
  174. int iwl_hw_nic_init(struct iwl_priv *priv)
  175. {
  176. unsigned long flags;
  177. struct iwl_rx_queue *rxq = &priv->rxq;
  178. int ret;
  179. /* nic_init */
  180. spin_lock_irqsave(&priv->lock, flags);
  181. priv->cfg->ops->lib->apm_ops.init(priv);
  182. iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
  183. spin_unlock_irqrestore(&priv->lock, flags);
  184. ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
  185. priv->cfg->ops->lib->apm_ops.config(priv);
  186. /* Allocate the RX queue, or reset if it is already allocated */
  187. if (!rxq->bd) {
  188. ret = iwl_rx_queue_alloc(priv);
  189. if (ret) {
  190. IWL_ERR(priv, "Unable to initialize Rx queue\n");
  191. return -ENOMEM;
  192. }
  193. } else
  194. iwl_rx_queue_reset(priv, rxq);
  195. iwl_rx_replenish(priv);
  196. iwl_rx_init(priv, rxq);
  197. spin_lock_irqsave(&priv->lock, flags);
  198. rxq->need_update = 1;
  199. iwl_rx_queue_update_write_ptr(priv, rxq);
  200. spin_unlock_irqrestore(&priv->lock, flags);
  201. /* Allocate and init all Tx and Command queues */
  202. ret = iwl_txq_ctx_reset(priv);
  203. if (ret)
  204. return ret;
  205. set_bit(STATUS_INIT, &priv->status);
  206. return 0;
  207. }
  208. EXPORT_SYMBOL(iwl_hw_nic_init);
  209. /*
  210. * QoS support
  211. */
  212. void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  213. {
  214. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  215. return;
  216. priv->qos_data.def_qos_parm.qos_flags = 0;
  217. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  218. !priv->qos_data.qos_cap.q_AP.txop_request)
  219. priv->qos_data.def_qos_parm.qos_flags |=
  220. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  221. if (priv->qos_data.qos_active)
  222. priv->qos_data.def_qos_parm.qos_flags |=
  223. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  224. if (priv->current_ht_config.is_ht)
  225. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  226. if (force || iwl_is_associated(priv)) {
  227. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  228. priv->qos_data.qos_active,
  229. priv->qos_data.def_qos_parm.qos_flags);
  230. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  231. sizeof(struct iwl_qosparam_cmd),
  232. &priv->qos_data.def_qos_parm, NULL);
  233. }
  234. }
  235. EXPORT_SYMBOL(iwl_activate_qos);
  236. /*
  237. * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
  238. * (802.11b) (802.11a/g)
  239. * AC_BK 15 1023 7 0 0
  240. * AC_BE 15 1023 3 0 0
  241. * AC_VI 7 15 2 6.016ms 3.008ms
  242. * AC_VO 3 7 2 3.264ms 1.504ms
  243. */
  244. void iwl_reset_qos(struct iwl_priv *priv)
  245. {
  246. u16 cw_min = 15;
  247. u16 cw_max = 1023;
  248. u8 aifs = 2;
  249. bool is_legacy = false;
  250. unsigned long flags;
  251. int i;
  252. spin_lock_irqsave(&priv->lock, flags);
  253. /* QoS always active in AP and ADHOC mode
  254. * In STA mode wait for association
  255. */
  256. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  257. priv->iw_mode == NL80211_IFTYPE_AP)
  258. priv->qos_data.qos_active = 1;
  259. else
  260. priv->qos_data.qos_active = 0;
  261. /* check for legacy mode */
  262. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  263. (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
  264. (priv->iw_mode == NL80211_IFTYPE_STATION &&
  265. (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
  266. cw_min = 31;
  267. is_legacy = 1;
  268. }
  269. if (priv->qos_data.qos_active)
  270. aifs = 3;
  271. /* AC_BE */
  272. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  273. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  274. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  275. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  276. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  277. if (priv->qos_data.qos_active) {
  278. /* AC_BK */
  279. i = 1;
  280. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  281. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  282. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  283. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  284. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  285. /* AC_VI */
  286. i = 2;
  287. priv->qos_data.def_qos_parm.ac[i].cw_min =
  288. cpu_to_le16((cw_min + 1) / 2 - 1);
  289. priv->qos_data.def_qos_parm.ac[i].cw_max =
  290. cpu_to_le16(cw_min);
  291. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  292. if (is_legacy)
  293. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  294. cpu_to_le16(6016);
  295. else
  296. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  297. cpu_to_le16(3008);
  298. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  299. /* AC_VO */
  300. i = 3;
  301. priv->qos_data.def_qos_parm.ac[i].cw_min =
  302. cpu_to_le16((cw_min + 1) / 4 - 1);
  303. priv->qos_data.def_qos_parm.ac[i].cw_max =
  304. cpu_to_le16((cw_min + 1) / 2 - 1);
  305. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  306. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  307. if (is_legacy)
  308. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  309. cpu_to_le16(3264);
  310. else
  311. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  312. cpu_to_le16(1504);
  313. } else {
  314. for (i = 1; i < 4; i++) {
  315. priv->qos_data.def_qos_parm.ac[i].cw_min =
  316. cpu_to_le16(cw_min);
  317. priv->qos_data.def_qos_parm.ac[i].cw_max =
  318. cpu_to_le16(cw_max);
  319. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  320. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  321. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  322. }
  323. }
  324. IWL_DEBUG_QOS(priv, "set QoS to default \n");
  325. spin_unlock_irqrestore(&priv->lock, flags);
  326. }
  327. EXPORT_SYMBOL(iwl_reset_qos);
  328. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  329. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  330. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  331. struct ieee80211_sta_ht_cap *ht_info,
  332. enum ieee80211_band band)
  333. {
  334. u16 max_bit_rate = 0;
  335. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  336. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  337. ht_info->cap = 0;
  338. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  339. ht_info->ht_supported = true;
  340. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  341. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  342. ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
  343. (WLAN_HT_CAP_SM_PS_DISABLED << 2));
  344. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  345. if (priv->hw_params.fat_channel & BIT(band)) {
  346. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  347. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  348. ht_info->mcs.rx_mask[4] = 0x01;
  349. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  350. }
  351. if (priv->cfg->mod_params->amsdu_size_8K)
  352. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  353. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  354. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  355. ht_info->mcs.rx_mask[0] = 0xFF;
  356. if (rx_chains_num >= 2)
  357. ht_info->mcs.rx_mask[1] = 0xFF;
  358. if (rx_chains_num >= 3)
  359. ht_info->mcs.rx_mask[2] = 0xFF;
  360. /* Highest supported Rx data rate */
  361. max_bit_rate *= rx_chains_num;
  362. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  363. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  364. /* Tx MCS capabilities */
  365. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  366. if (tx_chains_num != rx_chains_num) {
  367. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  368. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  369. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  370. }
  371. }
  372. static void iwlcore_init_hw_rates(struct iwl_priv *priv,
  373. struct ieee80211_rate *rates)
  374. {
  375. int i;
  376. for (i = 0; i < IWL_RATE_COUNT; i++) {
  377. rates[i].bitrate = iwl_rates[i].ieee * 5;
  378. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  379. rates[i].hw_value_short = i;
  380. rates[i].flags = 0;
  381. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  382. /*
  383. * If CCK != 1M then set short preamble rate flag.
  384. */
  385. rates[i].flags |=
  386. (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  387. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  388. }
  389. }
  390. }
  391. /**
  392. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  393. */
  394. int iwlcore_init_geos(struct iwl_priv *priv)
  395. {
  396. struct iwl_channel_info *ch;
  397. struct ieee80211_supported_band *sband;
  398. struct ieee80211_channel *channels;
  399. struct ieee80211_channel *geo_ch;
  400. struct ieee80211_rate *rates;
  401. int i = 0;
  402. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  403. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  404. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  405. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  406. return 0;
  407. }
  408. channels = kzalloc(sizeof(struct ieee80211_channel) *
  409. priv->channel_count, GFP_KERNEL);
  410. if (!channels)
  411. return -ENOMEM;
  412. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  413. GFP_KERNEL);
  414. if (!rates) {
  415. kfree(channels);
  416. return -ENOMEM;
  417. }
  418. /* 5.2GHz channels start after the 2.4GHz channels */
  419. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  420. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  421. /* just OFDM */
  422. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  423. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  424. if (priv->cfg->sku & IWL_SKU_N)
  425. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  426. IEEE80211_BAND_5GHZ);
  427. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  428. sband->channels = channels;
  429. /* OFDM & CCK */
  430. sband->bitrates = rates;
  431. sband->n_bitrates = IWL_RATE_COUNT;
  432. if (priv->cfg->sku & IWL_SKU_N)
  433. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  434. IEEE80211_BAND_2GHZ);
  435. priv->ieee_channels = channels;
  436. priv->ieee_rates = rates;
  437. for (i = 0; i < priv->channel_count; i++) {
  438. ch = &priv->channel_info[i];
  439. /* FIXME: might be removed if scan is OK */
  440. if (!is_channel_valid(ch))
  441. continue;
  442. if (is_channel_a_band(ch))
  443. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  444. else
  445. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  446. geo_ch = &sband->channels[sband->n_channels++];
  447. geo_ch->center_freq =
  448. ieee80211_channel_to_frequency(ch->channel);
  449. geo_ch->max_power = ch->max_power_avg;
  450. geo_ch->max_antenna_gain = 0xff;
  451. geo_ch->hw_value = ch->channel;
  452. if (is_channel_valid(ch)) {
  453. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  454. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  455. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  456. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  457. if (ch->flags & EEPROM_CHANNEL_RADAR)
  458. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  459. geo_ch->flags |= ch->fat_extension_channel;
  460. if (ch->max_power_avg > priv->tx_power_channel_lmt)
  461. priv->tx_power_channel_lmt = ch->max_power_avg;
  462. } else {
  463. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  464. }
  465. /* Save flags for reg domain usage */
  466. geo_ch->orig_flags = geo_ch->flags;
  467. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  468. ch->channel, geo_ch->center_freq,
  469. is_channel_a_band(ch) ? "5.2" : "2.4",
  470. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  471. "restricted" : "valid",
  472. geo_ch->flags);
  473. }
  474. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  475. priv->cfg->sku & IWL_SKU_A) {
  476. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  477. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  478. priv->pci_dev->device,
  479. priv->pci_dev->subsystem_device);
  480. priv->cfg->sku &= ~IWL_SKU_A;
  481. }
  482. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  483. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  484. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  485. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  486. return 0;
  487. }
  488. EXPORT_SYMBOL(iwlcore_init_geos);
  489. /*
  490. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  491. */
  492. void iwlcore_free_geos(struct iwl_priv *priv)
  493. {
  494. kfree(priv->ieee_channels);
  495. kfree(priv->ieee_rates);
  496. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  497. }
  498. EXPORT_SYMBOL(iwlcore_free_geos);
  499. static bool is_single_rx_stream(struct iwl_priv *priv)
  500. {
  501. return !priv->current_ht_config.is_ht ||
  502. ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
  503. (priv->current_ht_config.mcs.rx_mask[2] == 0));
  504. }
  505. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  506. enum ieee80211_band band,
  507. u16 channel, u8 extension_chan_offset)
  508. {
  509. const struct iwl_channel_info *ch_info;
  510. ch_info = iwl_get_channel_info(priv, band, channel);
  511. if (!is_channel_valid(ch_info))
  512. return 0;
  513. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  514. return !(ch_info->fat_extension_channel &
  515. IEEE80211_CHAN_NO_HT40PLUS);
  516. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  517. return !(ch_info->fat_extension_channel &
  518. IEEE80211_CHAN_NO_HT40MINUS);
  519. return 0;
  520. }
  521. u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
  522. struct ieee80211_sta_ht_cap *sta_ht_inf)
  523. {
  524. struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
  525. if ((!iwl_ht_conf->is_ht) ||
  526. (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
  527. return 0;
  528. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  529. * the bit will not set if it is pure 40MHz case
  530. */
  531. if (sta_ht_inf) {
  532. if (!sta_ht_inf->ht_supported)
  533. return 0;
  534. }
  535. if (iwl_ht_conf->ht_protection & IEEE80211_HT_OP_MODE_PROTECTION_20MHZ)
  536. return 1;
  537. else
  538. return iwl_is_channel_extension(priv, priv->band,
  539. le16_to_cpu(priv->staging_rxon.channel),
  540. iwl_ht_conf->extension_chan_offset);
  541. }
  542. EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
  543. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  544. {
  545. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  546. if (hw_decrypt)
  547. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  548. else
  549. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  550. }
  551. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  552. /**
  553. * iwl_check_rxon_cmd - validate RXON structure is valid
  554. *
  555. * NOTE: This is really only useful during development and can eventually
  556. * be #ifdef'd out once the driver is stable and folks aren't actively
  557. * making changes
  558. */
  559. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  560. {
  561. int error = 0;
  562. int counter = 1;
  563. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  564. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  565. error |= le32_to_cpu(rxon->flags &
  566. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  567. RXON_FLG_RADAR_DETECT_MSK));
  568. if (error)
  569. IWL_WARN(priv, "check 24G fields %d | %d\n",
  570. counter++, error);
  571. } else {
  572. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  573. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  574. if (error)
  575. IWL_WARN(priv, "check 52 fields %d | %d\n",
  576. counter++, error);
  577. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  578. if (error)
  579. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  580. counter++, error);
  581. }
  582. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  583. if (error)
  584. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  585. /* make sure basic rates 6Mbps and 1Mbps are supported */
  586. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  587. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  588. if (error)
  589. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  590. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  591. if (error)
  592. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  593. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  594. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  595. if (error)
  596. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  597. counter++, error);
  598. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  599. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  600. if (error)
  601. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  602. counter++, error);
  603. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  604. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  605. if (error)
  606. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  607. counter++, error);
  608. if (error)
  609. IWL_WARN(priv, "Tuning to channel %d\n",
  610. le16_to_cpu(rxon->channel));
  611. if (error) {
  612. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  613. return -1;
  614. }
  615. return 0;
  616. }
  617. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  618. /**
  619. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  620. * @priv: staging_rxon is compared to active_rxon
  621. *
  622. * If the RXON structure is changing enough to require a new tune,
  623. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  624. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  625. */
  626. int iwl_full_rxon_required(struct iwl_priv *priv)
  627. {
  628. /* These items are only settable from the full RXON command */
  629. if (!(iwl_is_associated(priv)) ||
  630. compare_ether_addr(priv->staging_rxon.bssid_addr,
  631. priv->active_rxon.bssid_addr) ||
  632. compare_ether_addr(priv->staging_rxon.node_addr,
  633. priv->active_rxon.node_addr) ||
  634. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  635. priv->active_rxon.wlap_bssid_addr) ||
  636. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  637. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  638. (priv->staging_rxon.air_propagation !=
  639. priv->active_rxon.air_propagation) ||
  640. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  641. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  642. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  643. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  644. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  645. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  646. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  647. return 1;
  648. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  649. * be updated with the RXON_ASSOC command -- however only some
  650. * flag transitions are allowed using RXON_ASSOC */
  651. /* Check if we are not switching bands */
  652. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  653. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  654. return 1;
  655. /* Check if we are switching association toggle */
  656. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  657. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  658. return 1;
  659. return 0;
  660. }
  661. EXPORT_SYMBOL(iwl_full_rxon_required);
  662. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  663. {
  664. int i;
  665. int rate_mask;
  666. /* Set rate mask*/
  667. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  668. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  669. else
  670. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  671. /* Find lowest valid rate */
  672. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  673. i = iwl_rates[i].next_ieee) {
  674. if (rate_mask & (1 << i))
  675. return iwl_rates[i].plcp;
  676. }
  677. /* No valid rate was found. Assign the lowest one */
  678. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  679. return IWL_RATE_1M_PLCP;
  680. else
  681. return IWL_RATE_6M_PLCP;
  682. }
  683. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  684. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
  685. {
  686. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  687. if (!ht_info->is_ht) {
  688. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  689. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  690. RXON_FLG_FAT_PROT_MSK |
  691. RXON_FLG_HT_PROT_MSK);
  692. return;
  693. }
  694. /* FIXME: if the definition of ht_protection changed, the "translation"
  695. * will be needed for rxon->flags
  696. */
  697. rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  698. /* Set up channel bandwidth:
  699. * 20 MHz only, 20/40 mixed or pure 40 if fat ok */
  700. /* clear the HT channel mode before set the mode */
  701. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  702. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  703. if (iwl_is_fat_tx_allowed(priv, NULL)) {
  704. /* pure 40 fat */
  705. if (rxon->flags & RXON_FLG_FAT_PROT_MSK)
  706. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  707. else {
  708. /* Note: control channel is opposite of extension channel */
  709. switch (ht_info->extension_chan_offset) {
  710. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  711. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  712. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  713. break;
  714. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  715. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  716. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  717. break;
  718. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  719. default:
  720. /* channel location only valid if in Mixed mode */
  721. IWL_ERR(priv, "invalid extension channel offset\n");
  722. break;
  723. }
  724. }
  725. } else {
  726. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  727. }
  728. if (priv->cfg->ops->hcmd->set_rxon_chain)
  729. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  730. IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
  731. "rxon flags 0x%X operation mode :0x%X "
  732. "extension channel offset 0x%x\n",
  733. ht_info->mcs.rx_mask[0],
  734. ht_info->mcs.rx_mask[1],
  735. ht_info->mcs.rx_mask[2],
  736. le32_to_cpu(rxon->flags), ht_info->ht_protection,
  737. ht_info->extension_chan_offset);
  738. return;
  739. }
  740. EXPORT_SYMBOL(iwl_set_rxon_ht);
  741. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  742. #define IWL_NUM_RX_CHAINS_SINGLE 2
  743. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  744. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  745. /* Determine how many receiver/antenna chains to use.
  746. * More provides better reception via diversity. Fewer saves power.
  747. * MIMO (dual stream) requires at least 2, but works better with 3.
  748. * This does not determine *which* chains to use, just how many.
  749. */
  750. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  751. {
  752. bool is_single = is_single_rx_stream(priv);
  753. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  754. /* # of Rx chains to use when expecting MIMO. */
  755. if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
  756. WLAN_HT_CAP_SM_PS_STATIC)))
  757. return IWL_NUM_RX_CHAINS_SINGLE;
  758. else
  759. return IWL_NUM_RX_CHAINS_MULTIPLE;
  760. }
  761. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  762. {
  763. int idle_cnt;
  764. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  765. /* # Rx chains when idling and maybe trying to save power */
  766. switch (priv->current_ht_config.sm_ps) {
  767. case WLAN_HT_CAP_SM_PS_STATIC:
  768. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  769. idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
  770. IWL_NUM_IDLE_CHAINS_SINGLE;
  771. break;
  772. case WLAN_HT_CAP_SM_PS_DISABLED:
  773. idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
  774. break;
  775. case WLAN_HT_CAP_SM_PS_INVALID:
  776. default:
  777. IWL_ERR(priv, "invalid mimo ps mode %d\n",
  778. priv->current_ht_config.sm_ps);
  779. WARN_ON(1);
  780. idle_cnt = -1;
  781. break;
  782. }
  783. return idle_cnt;
  784. }
  785. /* up to 4 chains */
  786. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  787. {
  788. u8 res;
  789. res = (chain_bitmap & BIT(0)) >> 0;
  790. res += (chain_bitmap & BIT(1)) >> 1;
  791. res += (chain_bitmap & BIT(2)) >> 2;
  792. res += (chain_bitmap & BIT(4)) >> 4;
  793. return res;
  794. }
  795. /**
  796. * iwl_is_monitor_mode - Determine if interface in monitor mode
  797. *
  798. * priv->iw_mode is set in add_interface, but add_interface is
  799. * never called for monitor mode. The only way mac80211 informs us about
  800. * monitor mode is through configuring filters (call to configure_filter).
  801. */
  802. bool iwl_is_monitor_mode(struct iwl_priv *priv)
  803. {
  804. return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
  805. }
  806. EXPORT_SYMBOL(iwl_is_monitor_mode);
  807. /**
  808. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  809. *
  810. * Selects how many and which Rx receivers/antennas/chains to use.
  811. * This should not be used for scan command ... it puts data in wrong place.
  812. */
  813. void iwl_set_rxon_chain(struct iwl_priv *priv)
  814. {
  815. bool is_single = is_single_rx_stream(priv);
  816. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  817. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  818. u32 active_chains;
  819. u16 rx_chain;
  820. /* Tell uCode which antennas are actually connected.
  821. * Before first association, we assume all antennas are connected.
  822. * Just after first association, iwl_chain_noise_calibration()
  823. * checks which antennas actually *are* connected. */
  824. if (priv->chain_noise_data.active_chains)
  825. active_chains = priv->chain_noise_data.active_chains;
  826. else
  827. active_chains = priv->hw_params.valid_rx_ant;
  828. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  829. /* How many receivers should we use? */
  830. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  831. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  832. /* correct rx chain count according hw settings
  833. * and chain noise calibration
  834. */
  835. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  836. if (valid_rx_cnt < active_rx_cnt)
  837. active_rx_cnt = valid_rx_cnt;
  838. if (valid_rx_cnt < idle_rx_cnt)
  839. idle_rx_cnt = valid_rx_cnt;
  840. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  841. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  842. /* copied from 'iwl_bg_request_scan()' */
  843. /* Force use of chains B and C (0x6) for Rx for 4965
  844. * Avoid A (0x1) because of its off-channel reception on A-band.
  845. * MIMO is not used here, but value is required */
  846. if (iwl_is_monitor_mode(priv) &&
  847. !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
  848. ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
  849. rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
  850. rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
  851. rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
  852. rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
  853. }
  854. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  855. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  856. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  857. else
  858. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  859. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  860. priv->staging_rxon.rx_chain,
  861. active_rx_cnt, idle_rx_cnt);
  862. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  863. active_rx_cnt < idle_rx_cnt);
  864. }
  865. EXPORT_SYMBOL(iwl_set_rxon_chain);
  866. /**
  867. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  868. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  869. * @channel: Any channel valid for the requested phymode
  870. * In addition to setting the staging RXON, priv->phymode is also set.
  871. *
  872. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  873. * in the staging RXON flag structure based on the phymode
  874. */
  875. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  876. {
  877. enum ieee80211_band band = ch->band;
  878. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  879. if (!iwl_get_channel_info(priv, band, channel)) {
  880. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  881. channel, band);
  882. return -EINVAL;
  883. }
  884. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  885. (priv->band == band))
  886. return 0;
  887. priv->staging_rxon.channel = cpu_to_le16(channel);
  888. if (band == IEEE80211_BAND_5GHZ)
  889. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  890. else
  891. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  892. priv->band = band;
  893. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  894. return 0;
  895. }
  896. EXPORT_SYMBOL(iwl_set_rxon_channel);
  897. void iwl_set_flags_for_band(struct iwl_priv *priv,
  898. enum ieee80211_band band)
  899. {
  900. if (band == IEEE80211_BAND_5GHZ) {
  901. priv->staging_rxon.flags &=
  902. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  903. | RXON_FLG_CCK_MSK);
  904. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  905. } else {
  906. /* Copied from iwl_post_associate() */
  907. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  908. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  909. else
  910. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  911. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  912. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  913. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  914. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  915. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  916. }
  917. }
  918. EXPORT_SYMBOL(iwl_set_flags_for_band);
  919. /*
  920. * initialize rxon structure with default values from eeprom
  921. */
  922. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  923. {
  924. const struct iwl_channel_info *ch_info;
  925. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  926. switch (mode) {
  927. case NL80211_IFTYPE_AP:
  928. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  929. break;
  930. case NL80211_IFTYPE_STATION:
  931. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  932. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  933. break;
  934. case NL80211_IFTYPE_ADHOC:
  935. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  936. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  937. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  938. RXON_FILTER_ACCEPT_GRP_MSK;
  939. break;
  940. default:
  941. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  942. break;
  943. }
  944. #if 0
  945. /* TODO: Figure out when short_preamble would be set and cache from
  946. * that */
  947. if (!hw_to_local(priv->hw)->short_preamble)
  948. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  949. else
  950. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  951. #endif
  952. ch_info = iwl_get_channel_info(priv, priv->band,
  953. le16_to_cpu(priv->active_rxon.channel));
  954. if (!ch_info)
  955. ch_info = &priv->channel_info[0];
  956. /*
  957. * in some case A channels are all non IBSS
  958. * in this case force B/G channel
  959. */
  960. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
  961. !(is_channel_ibss(ch_info)))
  962. ch_info = &priv->channel_info[0];
  963. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  964. priv->band = ch_info->band;
  965. iwl_set_flags_for_band(priv, priv->band);
  966. priv->staging_rxon.ofdm_basic_rates =
  967. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  968. priv->staging_rxon.cck_basic_rates =
  969. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  970. /* clear both MIX and PURE40 mode flag */
  971. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  972. RXON_FLG_CHANNEL_MODE_PURE_40);
  973. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  974. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  975. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  976. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  977. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  978. }
  979. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  980. static void iwl_set_rate(struct iwl_priv *priv)
  981. {
  982. const struct ieee80211_supported_band *hw = NULL;
  983. struct ieee80211_rate *rate;
  984. int i;
  985. hw = iwl_get_hw_mode(priv, priv->band);
  986. if (!hw) {
  987. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  988. return;
  989. }
  990. priv->active_rate = 0;
  991. priv->active_rate_basic = 0;
  992. for (i = 0; i < hw->n_bitrates; i++) {
  993. rate = &(hw->bitrates[i]);
  994. if (rate->hw_value < IWL_RATE_COUNT)
  995. priv->active_rate |= (1 << rate->hw_value);
  996. }
  997. IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
  998. priv->active_rate, priv->active_rate_basic);
  999. /*
  1000. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1001. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1002. * OFDM
  1003. */
  1004. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1005. priv->staging_rxon.cck_basic_rates =
  1006. ((priv->active_rate_basic &
  1007. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1008. else
  1009. priv->staging_rxon.cck_basic_rates =
  1010. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1011. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1012. priv->staging_rxon.ofdm_basic_rates =
  1013. ((priv->active_rate_basic &
  1014. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1015. IWL_FIRST_OFDM_RATE) & 0xFF;
  1016. else
  1017. priv->staging_rxon.ofdm_basic_rates =
  1018. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1019. }
  1020. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  1021. {
  1022. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1023. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  1024. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  1025. IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
  1026. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  1027. rxon->channel = csa->channel;
  1028. priv->staging_rxon.channel = csa->channel;
  1029. }
  1030. EXPORT_SYMBOL(iwl_rx_csa);
  1031. #ifdef CONFIG_IWLWIFI_DEBUG
  1032. static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  1033. {
  1034. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  1035. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  1036. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  1037. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  1038. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  1039. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  1040. le32_to_cpu(rxon->filter_flags));
  1041. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  1042. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  1043. rxon->ofdm_basic_rates);
  1044. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  1045. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  1046. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  1047. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  1048. }
  1049. #endif
  1050. /**
  1051. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  1052. */
  1053. void iwl_irq_handle_error(struct iwl_priv *priv)
  1054. {
  1055. /* Set the FW error flag -- cleared on iwl_down */
  1056. set_bit(STATUS_FW_ERROR, &priv->status);
  1057. /* Cancel currently queued command. */
  1058. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  1059. #ifdef CONFIG_IWLWIFI_DEBUG
  1060. if (priv->debug_level & IWL_DL_FW_ERRORS) {
  1061. iwl_dump_nic_error_log(priv);
  1062. iwl_dump_nic_event_log(priv);
  1063. iwl_print_rx_config_cmd(priv);
  1064. }
  1065. #endif
  1066. wake_up_interruptible(&priv->wait_command_queue);
  1067. /* Keep the restart process from trying to send host
  1068. * commands by clearing the INIT status bit */
  1069. clear_bit(STATUS_READY, &priv->status);
  1070. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1071. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  1072. "Restarting adapter due to uCode error.\n");
  1073. if (priv->cfg->mod_params->restart_fw)
  1074. queue_work(priv->workqueue, &priv->restart);
  1075. }
  1076. }
  1077. EXPORT_SYMBOL(iwl_irq_handle_error);
  1078. void iwl_configure_filter(struct ieee80211_hw *hw,
  1079. unsigned int changed_flags,
  1080. unsigned int *total_flags,
  1081. int mc_count, struct dev_addr_list *mc_list)
  1082. {
  1083. struct iwl_priv *priv = hw->priv;
  1084. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1085. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1086. changed_flags, *total_flags);
  1087. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1088. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1089. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1090. else
  1091. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1092. }
  1093. if (changed_flags & FIF_ALLMULTI) {
  1094. if (*total_flags & FIF_ALLMULTI)
  1095. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1096. else
  1097. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1098. }
  1099. if (changed_flags & FIF_CONTROL) {
  1100. if (*total_flags & FIF_CONTROL)
  1101. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1102. else
  1103. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1104. }
  1105. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1106. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1107. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1108. else
  1109. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1110. }
  1111. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1112. * since mac80211 will call ieee80211_hw_config immediately.
  1113. * (mc_list is not supported at this time). Otherwise, we need to
  1114. * queue a background iwl_commit_rxon work.
  1115. */
  1116. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1117. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1118. }
  1119. EXPORT_SYMBOL(iwl_configure_filter);
  1120. int iwl_setup_mac(struct iwl_priv *priv)
  1121. {
  1122. int ret;
  1123. struct ieee80211_hw *hw = priv->hw;
  1124. hw->rate_control_algorithm = "iwl-agn-rs";
  1125. /* Tell mac80211 our characteristics */
  1126. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  1127. IEEE80211_HW_NOISE_DBM |
  1128. IEEE80211_HW_AMPDU_AGGREGATION |
  1129. IEEE80211_HW_SPECTRUM_MGMT;
  1130. hw->wiphy->interface_modes =
  1131. BIT(NL80211_IFTYPE_STATION) |
  1132. BIT(NL80211_IFTYPE_ADHOC);
  1133. hw->wiphy->custom_regulatory = true;
  1134. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
  1135. /* we create the 802.11 header and a zero-length SSID element */
  1136. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  1137. /* Default value; 4 EDCA QOS priorities */
  1138. hw->queues = 4;
  1139. hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
  1140. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  1141. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  1142. &priv->bands[IEEE80211_BAND_2GHZ];
  1143. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  1144. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  1145. &priv->bands[IEEE80211_BAND_5GHZ];
  1146. ret = ieee80211_register_hw(priv->hw);
  1147. if (ret) {
  1148. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  1149. return ret;
  1150. }
  1151. priv->mac80211_registered = 1;
  1152. return 0;
  1153. }
  1154. EXPORT_SYMBOL(iwl_setup_mac);
  1155. int iwl_set_hw_params(struct iwl_priv *priv)
  1156. {
  1157. priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
  1158. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1159. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1160. if (priv->cfg->mod_params->amsdu_size_8K)
  1161. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1162. else
  1163. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1164. priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
  1165. if (priv->cfg->mod_params->disable_11n)
  1166. priv->cfg->sku &= ~IWL_SKU_N;
  1167. /* Device-specific setup */
  1168. return priv->cfg->ops->lib->set_hw_params(priv);
  1169. }
  1170. EXPORT_SYMBOL(iwl_set_hw_params);
  1171. int iwl_init_drv(struct iwl_priv *priv)
  1172. {
  1173. int ret;
  1174. priv->ibss_beacon = NULL;
  1175. spin_lock_init(&priv->lock);
  1176. spin_lock_init(&priv->sta_lock);
  1177. spin_lock_init(&priv->hcmd_lock);
  1178. INIT_LIST_HEAD(&priv->free_frames);
  1179. mutex_init(&priv->mutex);
  1180. /* Clear the driver's (not device's) station table */
  1181. iwl_clear_stations_table(priv);
  1182. priv->data_retry_limit = -1;
  1183. priv->ieee_channels = NULL;
  1184. priv->ieee_rates = NULL;
  1185. priv->band = IEEE80211_BAND_2GHZ;
  1186. priv->iw_mode = NL80211_IFTYPE_STATION;
  1187. priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
  1188. /* Choose which receivers/antennas to use */
  1189. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1190. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1191. iwl_init_scan_params(priv);
  1192. iwl_reset_qos(priv);
  1193. priv->qos_data.qos_active = 0;
  1194. priv->qos_data.qos_cap.val = 0;
  1195. priv->rates_mask = IWL_RATES_MASK;
  1196. /* If power management is turned on, default to CAM mode */
  1197. priv->power_mode = IWL_POWER_MODE_CAM;
  1198. priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
  1199. ret = iwl_init_channel_map(priv);
  1200. if (ret) {
  1201. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  1202. goto err;
  1203. }
  1204. ret = iwlcore_init_geos(priv);
  1205. if (ret) {
  1206. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  1207. goto err_free_channel_map;
  1208. }
  1209. iwlcore_init_hw_rates(priv, priv->ieee_rates);
  1210. return 0;
  1211. err_free_channel_map:
  1212. iwl_free_channel_map(priv);
  1213. err:
  1214. return ret;
  1215. }
  1216. EXPORT_SYMBOL(iwl_init_drv);
  1217. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1218. {
  1219. int ret = 0;
  1220. if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
  1221. IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
  1222. tx_power,
  1223. IWL_TX_POWER_TARGET_POWER_MIN);
  1224. return -EINVAL;
  1225. }
  1226. if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
  1227. IWL_WARN(priv, "Requested user TXPOWER %d above upper limit %d.\n",
  1228. tx_power,
  1229. IWL_TX_POWER_TARGET_POWER_MAX);
  1230. return -EINVAL;
  1231. }
  1232. if (priv->tx_power_user_lmt != tx_power)
  1233. force = true;
  1234. priv->tx_power_user_lmt = tx_power;
  1235. /* if nic is not up don't send command */
  1236. if (!iwl_is_ready_rf(priv))
  1237. return ret;
  1238. if (force && priv->cfg->ops->lib->send_tx_power)
  1239. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1240. return ret;
  1241. }
  1242. EXPORT_SYMBOL(iwl_set_tx_power);
  1243. void iwl_uninit_drv(struct iwl_priv *priv)
  1244. {
  1245. iwl_calib_free_results(priv);
  1246. iwlcore_free_geos(priv);
  1247. iwl_free_channel_map(priv);
  1248. kfree(priv->scan);
  1249. }
  1250. EXPORT_SYMBOL(iwl_uninit_drv);
  1251. void iwl_disable_interrupts(struct iwl_priv *priv)
  1252. {
  1253. clear_bit(STATUS_INT_ENABLED, &priv->status);
  1254. /* disable interrupts from uCode/NIC to host */
  1255. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1256. /* acknowledge/clear/reset any interrupts still pending
  1257. * from uCode or flow handler (Rx/Tx DMA) */
  1258. iwl_write32(priv, CSR_INT, 0xffffffff);
  1259. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  1260. IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
  1261. }
  1262. EXPORT_SYMBOL(iwl_disable_interrupts);
  1263. void iwl_enable_interrupts(struct iwl_priv *priv)
  1264. {
  1265. IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
  1266. set_bit(STATUS_INT_ENABLED, &priv->status);
  1267. iwl_write32(priv, CSR_INT_MASK, priv->inta_mask);
  1268. }
  1269. EXPORT_SYMBOL(iwl_enable_interrupts);
  1270. #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
  1271. /* Free dram table */
  1272. void iwl_free_isr_ict(struct iwl_priv *priv)
  1273. {
  1274. if (priv->ict_tbl_vir) {
  1275. pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
  1276. PAGE_SIZE, priv->ict_tbl_vir,
  1277. priv->ict_tbl_dma);
  1278. priv->ict_tbl_vir = NULL;
  1279. }
  1280. }
  1281. EXPORT_SYMBOL(iwl_free_isr_ict);
  1282. /* allocate dram shared table it is a PAGE_SIZE aligned
  1283. * also reset all data related to ICT table interrupt.
  1284. */
  1285. int iwl_alloc_isr_ict(struct iwl_priv *priv)
  1286. {
  1287. if (priv->cfg->use_isr_legacy)
  1288. return 0;
  1289. /* allocate shrared data table */
  1290. priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
  1291. ICT_COUNT) + PAGE_SIZE,
  1292. &priv->ict_tbl_dma);
  1293. if (!priv->ict_tbl_vir)
  1294. return -ENOMEM;
  1295. /* align table to PAGE_SIZE boundry */
  1296. priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
  1297. IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
  1298. (unsigned long long)priv->ict_tbl_dma,
  1299. (unsigned long long)priv->aligned_ict_tbl_dma,
  1300. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1301. priv->ict_tbl = priv->ict_tbl_vir +
  1302. (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
  1303. IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
  1304. priv->ict_tbl, priv->ict_tbl_vir,
  1305. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1306. /* reset table and index to all 0 */
  1307. memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
  1308. priv->ict_index = 0;
  1309. /* add periodic RX interrupt */
  1310. priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
  1311. return 0;
  1312. }
  1313. EXPORT_SYMBOL(iwl_alloc_isr_ict);
  1314. /* Device is going up inform it about using ICT interrupt table,
  1315. * also we need to tell the driver to start using ICT interrupt.
  1316. */
  1317. int iwl_reset_ict(struct iwl_priv *priv)
  1318. {
  1319. u32 val;
  1320. unsigned long flags;
  1321. if (!priv->ict_tbl_vir)
  1322. return 0;
  1323. spin_lock_irqsave(&priv->lock, flags);
  1324. iwl_disable_interrupts(priv);
  1325. memset(&priv->ict_tbl[0],0, sizeof(u32) * ICT_COUNT);
  1326. val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
  1327. val |= CSR_DRAM_INT_TBL_ENABLE;
  1328. val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
  1329. IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
  1330. "aligned dma address %Lx\n",
  1331. val, (unsigned long long)priv->aligned_ict_tbl_dma);
  1332. iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
  1333. priv->use_ict = true;
  1334. priv->ict_index = 0;
  1335. iwl_write32(priv, CSR_INT, priv->inta_mask);
  1336. iwl_enable_interrupts(priv);
  1337. spin_unlock_irqrestore(&priv->lock, flags);
  1338. return 0;
  1339. }
  1340. EXPORT_SYMBOL(iwl_reset_ict);
  1341. /* Device is going down disable ict interrupt usage */
  1342. void iwl_disable_ict(struct iwl_priv *priv)
  1343. {
  1344. unsigned long flags;
  1345. spin_lock_irqsave(&priv->lock, flags);
  1346. priv->use_ict = false;
  1347. spin_unlock_irqrestore(&priv->lock, flags);
  1348. }
  1349. EXPORT_SYMBOL(iwl_disable_ict);
  1350. /* interrupt handler using ict table, with this interrupt driver will
  1351. * stop using INTA register to get device's interrupt, reading this register
  1352. * is expensive, device will write interrupts in ICT dram table, increment
  1353. * index then will fire interrupt to driver, driver will OR all ICT table
  1354. * entries from current index up to table entry with 0 value. the result is
  1355. * the interrupt we need to service, driver will set the entries back to 0 and
  1356. * set index.
  1357. */
  1358. irqreturn_t iwl_isr_ict(int irq, void *data)
  1359. {
  1360. struct iwl_priv *priv = data;
  1361. u32 inta, inta_mask;
  1362. u32 val = 0;
  1363. if (!priv)
  1364. return IRQ_NONE;
  1365. /* dram interrupt table not set yet,
  1366. * use legacy interrupt.
  1367. */
  1368. if (!priv->use_ict)
  1369. return iwl_isr(irq, data);
  1370. spin_lock(&priv->lock);
  1371. /* Disable (but don't clear!) interrupts here to avoid
  1372. * back-to-back ISRs and sporadic interrupts from our NIC.
  1373. * If we have something to service, the tasklet will re-enable ints.
  1374. * If we *don't* have something, we'll re-enable before leaving here.
  1375. */
  1376. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1377. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1378. /* Ignore interrupt if there's nothing in NIC to service.
  1379. * This may be due to IRQ shared with another device,
  1380. * or due to sporadic interrupts thrown from our NIC. */
  1381. if (!priv->ict_tbl[priv->ict_index]) {
  1382. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1383. goto none;
  1384. }
  1385. /* read all entries that not 0 start with ict_index */
  1386. while (priv->ict_tbl[priv->ict_index]) {
  1387. val |= priv->ict_tbl[priv->ict_index];
  1388. IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
  1389. priv->ict_index,
  1390. priv->ict_tbl[priv->ict_index]);
  1391. priv->ict_tbl[priv->ict_index] = 0;
  1392. priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
  1393. ICT_COUNT);
  1394. }
  1395. /* We should not get this value, just ignore it. */
  1396. if (val == 0xffffffff)
  1397. val = 0;
  1398. inta = (0xff & val) | ((0xff00 & val) << 16);
  1399. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
  1400. inta, inta_mask, val);
  1401. inta &= priv->inta_mask;
  1402. priv->inta |= inta;
  1403. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1404. if (likely(inta))
  1405. tasklet_schedule(&priv->irq_tasklet);
  1406. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
  1407. /* Allow interrupt if was disabled by this handler and
  1408. * no tasklet was schedules, We should not enable interrupt,
  1409. * tasklet will enable it.
  1410. */
  1411. iwl_enable_interrupts(priv);
  1412. }
  1413. spin_unlock(&priv->lock);
  1414. return IRQ_HANDLED;
  1415. none:
  1416. /* re-enable interrupts here since we don't have anything to service.
  1417. * only Re-enable if disabled by irq.
  1418. */
  1419. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1420. iwl_enable_interrupts(priv);
  1421. spin_unlock(&priv->lock);
  1422. return IRQ_NONE;
  1423. }
  1424. EXPORT_SYMBOL(iwl_isr_ict);
  1425. static irqreturn_t iwl_isr(int irq, void *data)
  1426. {
  1427. struct iwl_priv *priv = data;
  1428. u32 inta, inta_mask;
  1429. #ifdef CONFIG_IWLWIFI_DEBUG
  1430. u32 inta_fh;
  1431. #endif
  1432. if (!priv)
  1433. return IRQ_NONE;
  1434. spin_lock(&priv->lock);
  1435. /* Disable (but don't clear!) interrupts here to avoid
  1436. * back-to-back ISRs and sporadic interrupts from our NIC.
  1437. * If we have something to service, the tasklet will re-enable ints.
  1438. * If we *don't* have something, we'll re-enable before leaving here. */
  1439. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1440. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1441. /* Discover which interrupts are active/pending */
  1442. inta = iwl_read32(priv, CSR_INT);
  1443. /* Ignore interrupt if there's nothing in NIC to service.
  1444. * This may be due to IRQ shared with another device,
  1445. * or due to sporadic interrupts thrown from our NIC. */
  1446. if (!inta) {
  1447. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1448. goto none;
  1449. }
  1450. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1451. /* Hardware disappeared. It might have already raised
  1452. * an interrupt */
  1453. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1454. goto unplugged;
  1455. }
  1456. #ifdef CONFIG_IWLWIFI_DEBUG
  1457. if (priv->debug_level & (IWL_DL_ISR)) {
  1458. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1459. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
  1460. "fh 0x%08x\n", inta, inta_mask, inta_fh);
  1461. }
  1462. #endif
  1463. priv->inta |= inta;
  1464. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1465. if (likely(inta))
  1466. tasklet_schedule(&priv->irq_tasklet);
  1467. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1468. iwl_enable_interrupts(priv);
  1469. unplugged:
  1470. spin_unlock(&priv->lock);
  1471. return IRQ_HANDLED;
  1472. none:
  1473. /* re-enable interrupts here since we don't have anything to service. */
  1474. /* only Re-enable if diabled by irq and no schedules tasklet. */
  1475. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1476. iwl_enable_interrupts(priv);
  1477. spin_unlock(&priv->lock);
  1478. return IRQ_NONE;
  1479. }
  1480. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1481. {
  1482. struct iwl_priv *priv = data;
  1483. u32 inta, inta_mask;
  1484. u32 inta_fh;
  1485. if (!priv)
  1486. return IRQ_NONE;
  1487. spin_lock(&priv->lock);
  1488. /* Disable (but don't clear!) interrupts here to avoid
  1489. * back-to-back ISRs and sporadic interrupts from our NIC.
  1490. * If we have something to service, the tasklet will re-enable ints.
  1491. * If we *don't* have something, we'll re-enable before leaving here. */
  1492. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1493. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1494. /* Discover which interrupts are active/pending */
  1495. inta = iwl_read32(priv, CSR_INT);
  1496. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1497. /* Ignore interrupt if there's nothing in NIC to service.
  1498. * This may be due to IRQ shared with another device,
  1499. * or due to sporadic interrupts thrown from our NIC. */
  1500. if (!inta && !inta_fh) {
  1501. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1502. goto none;
  1503. }
  1504. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1505. /* Hardware disappeared. It might have already raised
  1506. * an interrupt */
  1507. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1508. goto unplugged;
  1509. }
  1510. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1511. inta, inta_mask, inta_fh);
  1512. inta &= ~CSR_INT_BIT_SCD;
  1513. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1514. if (likely(inta || inta_fh))
  1515. tasklet_schedule(&priv->irq_tasklet);
  1516. unplugged:
  1517. spin_unlock(&priv->lock);
  1518. return IRQ_HANDLED;
  1519. none:
  1520. /* re-enable interrupts here since we don't have anything to service. */
  1521. /* only Re-enable if diabled by irq */
  1522. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1523. iwl_enable_interrupts(priv);
  1524. spin_unlock(&priv->lock);
  1525. return IRQ_NONE;
  1526. }
  1527. EXPORT_SYMBOL(iwl_isr_legacy);
  1528. int iwl_send_bt_config(struct iwl_priv *priv)
  1529. {
  1530. struct iwl_bt_cmd bt_cmd = {
  1531. .flags = 3,
  1532. .lead_time = 0xAA,
  1533. .max_kill = 1,
  1534. .kill_ack_mask = 0,
  1535. .kill_cts_mask = 0,
  1536. };
  1537. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1538. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1539. }
  1540. EXPORT_SYMBOL(iwl_send_bt_config);
  1541. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
  1542. {
  1543. u32 stat_flags = 0;
  1544. struct iwl_host_cmd cmd = {
  1545. .id = REPLY_STATISTICS_CMD,
  1546. .meta.flags = flags,
  1547. .len = sizeof(stat_flags),
  1548. .data = (u8 *) &stat_flags,
  1549. };
  1550. return iwl_send_cmd(priv, &cmd);
  1551. }
  1552. EXPORT_SYMBOL(iwl_send_statistics_request);
  1553. /**
  1554. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1555. * using sample data 100 bytes apart. If these sample points are good,
  1556. * it's a pretty good bet that everything between them is good, too.
  1557. */
  1558. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1559. {
  1560. u32 val;
  1561. int ret = 0;
  1562. u32 errcnt = 0;
  1563. u32 i;
  1564. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1565. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1566. /* read data comes through single port, auto-incr addr */
  1567. /* NOTE: Use the debugless read so we don't flood kernel log
  1568. * if IWL_DL_IO is set */
  1569. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1570. i + IWL49_RTC_INST_LOWER_BOUND);
  1571. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1572. if (val != le32_to_cpu(*image)) {
  1573. ret = -EIO;
  1574. errcnt++;
  1575. if (errcnt >= 3)
  1576. break;
  1577. }
  1578. }
  1579. return ret;
  1580. }
  1581. /**
  1582. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1583. * looking at all data.
  1584. */
  1585. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1586. u32 len)
  1587. {
  1588. u32 val;
  1589. u32 save_len = len;
  1590. int ret = 0;
  1591. u32 errcnt;
  1592. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1593. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1594. IWL49_RTC_INST_LOWER_BOUND);
  1595. errcnt = 0;
  1596. for (; len > 0; len -= sizeof(u32), image++) {
  1597. /* read data comes through single port, auto-incr addr */
  1598. /* NOTE: Use the debugless read so we don't flood kernel log
  1599. * if IWL_DL_IO is set */
  1600. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1601. if (val != le32_to_cpu(*image)) {
  1602. IWL_ERR(priv, "uCode INST section is invalid at "
  1603. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1604. save_len - len, val, le32_to_cpu(*image));
  1605. ret = -EIO;
  1606. errcnt++;
  1607. if (errcnt >= 20)
  1608. break;
  1609. }
  1610. }
  1611. if (!errcnt)
  1612. IWL_DEBUG_INFO(priv,
  1613. "ucode image in INSTRUCTION memory is good\n");
  1614. return ret;
  1615. }
  1616. /**
  1617. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1618. * and verify its contents
  1619. */
  1620. int iwl_verify_ucode(struct iwl_priv *priv)
  1621. {
  1622. __le32 *image;
  1623. u32 len;
  1624. int ret;
  1625. /* Try bootstrap */
  1626. image = (__le32 *)priv->ucode_boot.v_addr;
  1627. len = priv->ucode_boot.len;
  1628. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1629. if (!ret) {
  1630. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1631. return 0;
  1632. }
  1633. /* Try initialize */
  1634. image = (__le32 *)priv->ucode_init.v_addr;
  1635. len = priv->ucode_init.len;
  1636. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1637. if (!ret) {
  1638. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1639. return 0;
  1640. }
  1641. /* Try runtime/protocol */
  1642. image = (__le32 *)priv->ucode_code.v_addr;
  1643. len = priv->ucode_code.len;
  1644. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1645. if (!ret) {
  1646. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1647. return 0;
  1648. }
  1649. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1650. /* Since nothing seems to match, show first several data entries in
  1651. * instruction SRAM, so maybe visual inspection will give a clue.
  1652. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1653. image = (__le32 *)priv->ucode_boot.v_addr;
  1654. len = priv->ucode_boot.len;
  1655. ret = iwl_verify_inst_full(priv, image, len);
  1656. return ret;
  1657. }
  1658. EXPORT_SYMBOL(iwl_verify_ucode);
  1659. static const char *desc_lookup_text[] = {
  1660. "OK",
  1661. "FAIL",
  1662. "BAD_PARAM",
  1663. "BAD_CHECKSUM",
  1664. "NMI_INTERRUPT_WDG",
  1665. "SYSASSERT",
  1666. "FATAL_ERROR",
  1667. "BAD_COMMAND",
  1668. "HW_ERROR_TUNE_LOCK",
  1669. "HW_ERROR_TEMPERATURE",
  1670. "ILLEGAL_CHAN_FREQ",
  1671. "VCC_NOT_STABLE",
  1672. "FH_ERROR",
  1673. "NMI_INTERRUPT_HOST",
  1674. "NMI_INTERRUPT_ACTION_PT",
  1675. "NMI_INTERRUPT_UNKNOWN",
  1676. "UCODE_VERSION_MISMATCH",
  1677. "HW_ERROR_ABS_LOCK",
  1678. "HW_ERROR_CAL_LOCK_FAIL",
  1679. "NMI_INTERRUPT_INST_ACTION_PT",
  1680. "NMI_INTERRUPT_DATA_ACTION_PT",
  1681. "NMI_TRM_HW_ER",
  1682. "NMI_INTERRUPT_TRM",
  1683. "NMI_INTERRUPT_BREAK_POINT"
  1684. "DEBUG_0",
  1685. "DEBUG_1",
  1686. "DEBUG_2",
  1687. "DEBUG_3",
  1688. "UNKNOWN"
  1689. };
  1690. static const char *desc_lookup(int i)
  1691. {
  1692. int max = ARRAY_SIZE(desc_lookup_text) - 1;
  1693. if (i < 0 || i > max)
  1694. i = max;
  1695. return desc_lookup_text[i];
  1696. }
  1697. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1698. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1699. void iwl_dump_nic_error_log(struct iwl_priv *priv)
  1700. {
  1701. u32 data2, line;
  1702. u32 desc, time, count, base, data1;
  1703. u32 blink1, blink2, ilink1, ilink2;
  1704. if (priv->ucode_type == UCODE_INIT)
  1705. base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
  1706. else
  1707. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1708. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1709. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1710. return;
  1711. }
  1712. count = iwl_read_targ_mem(priv, base);
  1713. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1714. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1715. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1716. priv->status, count);
  1717. }
  1718. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  1719. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  1720. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  1721. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  1722. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  1723. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  1724. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  1725. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  1726. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  1727. IWL_ERR(priv, "Desc Time "
  1728. "data1 data2 line\n");
  1729. IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
  1730. desc_lookup(desc), desc, time, data1, data2, line);
  1731. IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
  1732. IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  1733. ilink1, ilink2);
  1734. }
  1735. EXPORT_SYMBOL(iwl_dump_nic_error_log);
  1736. #define EVENT_START_OFFSET (4 * sizeof(u32))
  1737. /**
  1738. * iwl_print_event_log - Dump error event log to syslog
  1739. *
  1740. */
  1741. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1742. u32 num_events, u32 mode)
  1743. {
  1744. u32 i;
  1745. u32 base; /* SRAM byte address of event log header */
  1746. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1747. u32 ptr; /* SRAM byte address of log data */
  1748. u32 ev, time, data; /* event log data */
  1749. if (num_events == 0)
  1750. return;
  1751. if (priv->ucode_type == UCODE_INIT)
  1752. base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
  1753. else
  1754. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1755. if (mode == 0)
  1756. event_size = 2 * sizeof(u32);
  1757. else
  1758. event_size = 3 * sizeof(u32);
  1759. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1760. /* "time" is actually "data" for mode 0 (no timestamp).
  1761. * place event id # at far right for easier visual parsing. */
  1762. for (i = 0; i < num_events; i++) {
  1763. ev = iwl_read_targ_mem(priv, ptr);
  1764. ptr += sizeof(u32);
  1765. time = iwl_read_targ_mem(priv, ptr);
  1766. ptr += sizeof(u32);
  1767. if (mode == 0) {
  1768. /* data, ev */
  1769. IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
  1770. } else {
  1771. data = iwl_read_targ_mem(priv, ptr);
  1772. ptr += sizeof(u32);
  1773. IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
  1774. time, data, ev);
  1775. }
  1776. }
  1777. }
  1778. void iwl_dump_nic_event_log(struct iwl_priv *priv)
  1779. {
  1780. u32 base; /* SRAM byte address of event log header */
  1781. u32 capacity; /* event log capacity in # entries */
  1782. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1783. u32 num_wraps; /* # times uCode wrapped to top of log */
  1784. u32 next_entry; /* index of next entry to be written by uCode */
  1785. u32 size; /* # entries that we'll print */
  1786. if (priv->ucode_type == UCODE_INIT)
  1787. base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
  1788. else
  1789. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1790. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1791. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1792. return;
  1793. }
  1794. /* event log header */
  1795. capacity = iwl_read_targ_mem(priv, base);
  1796. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1797. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1798. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1799. size = num_wraps ? capacity : next_entry;
  1800. /* bail out if nothing in log */
  1801. if (size == 0) {
  1802. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1803. return;
  1804. }
  1805. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1806. size, num_wraps);
  1807. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1808. * i.e the next one that uCode would fill. */
  1809. if (num_wraps)
  1810. iwl_print_event_log(priv, next_entry,
  1811. capacity - next_entry, mode);
  1812. /* (then/else) start at top of log */
  1813. iwl_print_event_log(priv, 0, next_entry, mode);
  1814. }
  1815. EXPORT_SYMBOL(iwl_dump_nic_event_log);
  1816. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1817. {
  1818. struct iwl_ct_kill_config cmd;
  1819. unsigned long flags;
  1820. int ret = 0;
  1821. spin_lock_irqsave(&priv->lock, flags);
  1822. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1823. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1824. spin_unlock_irqrestore(&priv->lock, flags);
  1825. cmd.critical_temperature_R =
  1826. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1827. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1828. sizeof(cmd), &cmd);
  1829. if (ret)
  1830. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1831. else
  1832. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
  1833. "critical temperature is %d\n",
  1834. cmd.critical_temperature_R);
  1835. }
  1836. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1837. /*
  1838. * CARD_STATE_CMD
  1839. *
  1840. * Use: Sets the device's internal card state to enable, disable, or halt
  1841. *
  1842. * When in the 'enable' state the card operates as normal.
  1843. * When in the 'disable' state, the card enters into a low power mode.
  1844. * When in the 'halt' state, the card is shut down and must be fully
  1845. * restarted to come back on.
  1846. */
  1847. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1848. {
  1849. struct iwl_host_cmd cmd = {
  1850. .id = REPLY_CARD_STATE_CMD,
  1851. .len = sizeof(u32),
  1852. .data = &flags,
  1853. .meta.flags = meta_flag,
  1854. };
  1855. return iwl_send_cmd(priv, &cmd);
  1856. }
  1857. EXPORT_SYMBOL(iwl_send_card_state);
  1858. void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv)
  1859. {
  1860. unsigned long flags;
  1861. if (test_bit(STATUS_RF_KILL_SW, &priv->status))
  1862. return;
  1863. IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO OFF\n");
  1864. iwl_scan_cancel(priv);
  1865. /* FIXME: This is a workaround for AP */
  1866. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  1867. spin_lock_irqsave(&priv->lock, flags);
  1868. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1869. CSR_UCODE_SW_BIT_RFKILL);
  1870. spin_unlock_irqrestore(&priv->lock, flags);
  1871. /* call the host command only if no hw rf-kill set */
  1872. if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
  1873. iwl_is_ready(priv))
  1874. iwl_send_card_state(priv,
  1875. CARD_STATE_CMD_DISABLE, 0);
  1876. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1877. /* make sure mac80211 stop sending Tx frame */
  1878. if (priv->mac80211_registered)
  1879. ieee80211_stop_queues(priv->hw);
  1880. }
  1881. }
  1882. EXPORT_SYMBOL(iwl_radio_kill_sw_disable_radio);
  1883. int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv)
  1884. {
  1885. unsigned long flags;
  1886. if (!test_bit(STATUS_RF_KILL_SW, &priv->status))
  1887. return 0;
  1888. IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO ON\n");
  1889. spin_lock_irqsave(&priv->lock, flags);
  1890. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1891. /* If the driver is up it will receive CARD_STATE_NOTIFICATION
  1892. * notification where it will clear SW rfkill status.
  1893. * Setting it here would break the handler. Only if the
  1894. * interface is down we can set here since we don't
  1895. * receive any further notification.
  1896. */
  1897. if (!priv->is_open)
  1898. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1899. spin_unlock_irqrestore(&priv->lock, flags);
  1900. /* wake up ucode */
  1901. msleep(10);
  1902. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  1903. spin_lock_irqsave(&priv->reg_lock, flags);
  1904. if (!iwl_grab_nic_access(priv))
  1905. iwl_release_nic_access(priv);
  1906. spin_unlock_irqrestore(&priv->reg_lock, flags);
  1907. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  1908. IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
  1909. "disabled by HW switch\n");
  1910. return 0;
  1911. }
  1912. /* when driver is up while rfkill is on, it wont receive
  1913. * any CARD_STATE_NOTIFICATION notifications so we have to
  1914. * restart it in here
  1915. */
  1916. if (priv->is_open && !test_bit(STATUS_ALIVE, &priv->status)) {
  1917. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1918. if (!iwl_is_rfkill(priv))
  1919. queue_work(priv->workqueue, &priv->up);
  1920. }
  1921. /* If the driver is already loaded, it will receive
  1922. * CARD_STATE_NOTIFICATION notifications and the handler will
  1923. * call restart to reload the driver.
  1924. */
  1925. return 1;
  1926. }
  1927. EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio);
  1928. void iwl_bg_rf_kill(struct work_struct *work)
  1929. {
  1930. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  1931. wake_up_interruptible(&priv->wait_command_queue);
  1932. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1933. return;
  1934. mutex_lock(&priv->mutex);
  1935. if (!iwl_is_rfkill(priv)) {
  1936. IWL_DEBUG_RF_KILL(priv,
  1937. "HW and/or SW RF Kill no longer active, restarting "
  1938. "device\n");
  1939. if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
  1940. priv->is_open)
  1941. queue_work(priv->workqueue, &priv->restart);
  1942. } else {
  1943. /* make sure mac80211 stop sending Tx frame */
  1944. if (priv->mac80211_registered)
  1945. ieee80211_stop_queues(priv->hw);
  1946. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  1947. IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
  1948. "disabled by SW switch\n");
  1949. else
  1950. IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
  1951. "Kill switch must be turned off for "
  1952. "wireless networking to work.\n");
  1953. }
  1954. mutex_unlock(&priv->mutex);
  1955. iwl_rfkill_set_hw_state(priv);
  1956. }
  1957. EXPORT_SYMBOL(iwl_bg_rf_kill);
  1958. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1959. struct iwl_rx_mem_buffer *rxb)
  1960. {
  1961. #ifdef CONFIG_IWLWIFI_DEBUG
  1962. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1963. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1964. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1965. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1966. #endif
  1967. }
  1968. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1969. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1970. struct iwl_rx_mem_buffer *rxb)
  1971. {
  1972. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1973. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1974. "notification for %s:\n",
  1975. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  1976. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  1977. }
  1978. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1979. void iwl_rx_reply_error(struct iwl_priv *priv,
  1980. struct iwl_rx_mem_buffer *rxb)
  1981. {
  1982. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1983. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1984. "seq 0x%04X ser 0x%08X\n",
  1985. le32_to_cpu(pkt->u.err_resp.error_type),
  1986. get_cmd_string(pkt->u.err_resp.cmd_id),
  1987. pkt->u.err_resp.cmd_id,
  1988. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1989. le32_to_cpu(pkt->u.err_resp.error_info));
  1990. }
  1991. EXPORT_SYMBOL(iwl_rx_reply_error);
  1992. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1993. {
  1994. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1995. }
  1996. EXPORT_SYMBOL(iwl_clear_isr_stats);
  1997. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1998. const struct ieee80211_tx_queue_params *params)
  1999. {
  2000. struct iwl_priv *priv = hw->priv;
  2001. unsigned long flags;
  2002. int q;
  2003. IWL_DEBUG_MAC80211(priv, "enter\n");
  2004. if (!iwl_is_ready_rf(priv)) {
  2005. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2006. return -EIO;
  2007. }
  2008. if (queue >= AC_NUM) {
  2009. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  2010. return 0;
  2011. }
  2012. q = AC_NUM - 1 - queue;
  2013. spin_lock_irqsave(&priv->lock, flags);
  2014. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  2015. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  2016. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  2017. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  2018. cpu_to_le16((params->txop * 32));
  2019. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  2020. priv->qos_data.qos_active = 1;
  2021. if (priv->iw_mode == NL80211_IFTYPE_AP)
  2022. iwl_activate_qos(priv, 1);
  2023. else if (priv->assoc_id && iwl_is_associated(priv))
  2024. iwl_activate_qos(priv, 0);
  2025. spin_unlock_irqrestore(&priv->lock, flags);
  2026. IWL_DEBUG_MAC80211(priv, "leave\n");
  2027. return 0;
  2028. }
  2029. EXPORT_SYMBOL(iwl_mac_conf_tx);
  2030. static void iwl_ht_conf(struct iwl_priv *priv,
  2031. struct ieee80211_bss_conf *bss_conf)
  2032. {
  2033. struct ieee80211_sta_ht_cap *ht_conf;
  2034. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  2035. struct ieee80211_sta *sta;
  2036. IWL_DEBUG_MAC80211(priv, "enter: \n");
  2037. if (!iwl_conf->is_ht)
  2038. return;
  2039. /*
  2040. * It is totally wrong to base global information on something
  2041. * that is valid only when associated, alas, this driver works
  2042. * that way and I don't know how to fix it.
  2043. */
  2044. rcu_read_lock();
  2045. sta = ieee80211_find_sta(priv->hw, priv->bssid);
  2046. if (!sta) {
  2047. rcu_read_unlock();
  2048. return;
  2049. }
  2050. ht_conf = &sta->ht_cap;
  2051. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  2052. iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
  2053. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  2054. iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
  2055. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  2056. iwl_conf->max_amsdu_size =
  2057. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  2058. iwl_conf->supported_chan_width =
  2059. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
  2060. /*
  2061. * XXX: The HT configuration needs to be moved into iwl_mac_config()
  2062. * to be done there correctly.
  2063. */
  2064. iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
  2065. if (conf_is_ht40_minus(&priv->hw->conf))
  2066. iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  2067. else if (conf_is_ht40_plus(&priv->hw->conf))
  2068. iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  2069. /* If no above or below channel supplied disable FAT channel */
  2070. if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
  2071. iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  2072. iwl_conf->supported_chan_width = 0;
  2073. iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
  2074. memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
  2075. iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
  2076. iwl_conf->ht_protection =
  2077. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  2078. iwl_conf->non_GF_STA_present =
  2079. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  2080. rcu_read_unlock();
  2081. IWL_DEBUG_MAC80211(priv, "leave\n");
  2082. }
  2083. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  2084. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  2085. struct ieee80211_vif *vif,
  2086. struct ieee80211_bss_conf *bss_conf,
  2087. u32 changes)
  2088. {
  2089. struct iwl_priv *priv = hw->priv;
  2090. int ret;
  2091. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  2092. if (!iwl_is_alive(priv))
  2093. return;
  2094. mutex_lock(&priv->mutex);
  2095. if (changes & BSS_CHANGED_BEACON &&
  2096. priv->iw_mode == NL80211_IFTYPE_AP) {
  2097. dev_kfree_skb(priv->ibss_beacon);
  2098. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  2099. }
  2100. if ((changes & BSS_CHANGED_BSSID) && !iwl_is_rfkill(priv)) {
  2101. /* If there is currently a HW scan going on in the background
  2102. * then we need to cancel it else the RXON below will fail. */
  2103. if (iwl_scan_cancel_timeout(priv, 100)) {
  2104. IWL_WARN(priv, "Aborted scan still in progress "
  2105. "after 100ms\n");
  2106. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  2107. mutex_unlock(&priv->mutex);
  2108. return;
  2109. }
  2110. memcpy(priv->staging_rxon.bssid_addr,
  2111. bss_conf->bssid, ETH_ALEN);
  2112. /* TODO: Audit driver for usage of these members and see
  2113. * if mac80211 deprecates them (priv->bssid looks like it
  2114. * shouldn't be there, but I haven't scanned the IBSS code
  2115. * to verify) - jpk */
  2116. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  2117. if (priv->iw_mode == NL80211_IFTYPE_AP)
  2118. iwlcore_config_ap(priv);
  2119. else {
  2120. int rc = iwlcore_commit_rxon(priv);
  2121. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  2122. iwl_rxon_add_station(
  2123. priv, priv->active_rxon.bssid_addr, 1);
  2124. }
  2125. } else if (!iwl_is_rfkill(priv)) {
  2126. iwl_scan_cancel_timeout(priv, 100);
  2127. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2128. iwlcore_commit_rxon(priv);
  2129. }
  2130. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  2131. changes & BSS_CHANGED_BEACON) {
  2132. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  2133. if (beacon)
  2134. iwl_mac_beacon_update(hw, beacon);
  2135. }
  2136. mutex_unlock(&priv->mutex);
  2137. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  2138. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  2139. bss_conf->use_short_preamble);
  2140. if (bss_conf->use_short_preamble)
  2141. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2142. else
  2143. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2144. }
  2145. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  2146. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  2147. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  2148. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  2149. else
  2150. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  2151. }
  2152. if (changes & BSS_CHANGED_HT) {
  2153. iwl_ht_conf(priv, bss_conf);
  2154. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2155. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2156. }
  2157. if (changes & BSS_CHANGED_ASSOC) {
  2158. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  2159. /* This should never happen as this function should
  2160. * never be called from interrupt context. */
  2161. if (WARN_ON_ONCE(in_interrupt()))
  2162. return;
  2163. if (bss_conf->assoc) {
  2164. priv->assoc_id = bss_conf->aid;
  2165. priv->beacon_int = bss_conf->beacon_int;
  2166. priv->power_data.dtim_period = bss_conf->dtim_period;
  2167. priv->timestamp = bss_conf->timestamp;
  2168. priv->assoc_capability = bss_conf->assoc_capability;
  2169. /* we have just associated, don't start scan too early
  2170. * leave time for EAPOL exchange to complete
  2171. */
  2172. priv->next_scan_jiffies = jiffies +
  2173. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  2174. mutex_lock(&priv->mutex);
  2175. priv->cfg->ops->lib->post_associate(priv);
  2176. mutex_unlock(&priv->mutex);
  2177. } else {
  2178. priv->assoc_id = 0;
  2179. IWL_DEBUG_MAC80211(priv, "DISASSOC %d\n", bss_conf->assoc);
  2180. }
  2181. } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  2182. IWL_DEBUG_MAC80211(priv, "Associated Changes %d\n", changes);
  2183. ret = iwl_send_rxon_assoc(priv);
  2184. if (!ret)
  2185. /* Sync active_rxon with latest change. */
  2186. memcpy((void *)&priv->active_rxon,
  2187. &priv->staging_rxon,
  2188. sizeof(struct iwl_rxon_cmd));
  2189. }
  2190. IWL_DEBUG_MAC80211(priv, "leave\n");
  2191. }
  2192. EXPORT_SYMBOL(iwl_bss_info_changed);
  2193. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  2194. {
  2195. struct iwl_priv *priv = hw->priv;
  2196. unsigned long flags;
  2197. __le64 timestamp;
  2198. IWL_DEBUG_MAC80211(priv, "enter\n");
  2199. if (!iwl_is_ready_rf(priv)) {
  2200. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2201. return -EIO;
  2202. }
  2203. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2204. IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
  2205. return -EIO;
  2206. }
  2207. spin_lock_irqsave(&priv->lock, flags);
  2208. if (priv->ibss_beacon)
  2209. dev_kfree_skb(priv->ibss_beacon);
  2210. priv->ibss_beacon = skb;
  2211. priv->assoc_id = 0;
  2212. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  2213. priv->timestamp = le64_to_cpu(timestamp);
  2214. IWL_DEBUG_MAC80211(priv, "leave\n");
  2215. spin_unlock_irqrestore(&priv->lock, flags);
  2216. iwl_reset_qos(priv);
  2217. priv->cfg->ops->lib->post_associate(priv);
  2218. return 0;
  2219. }
  2220. EXPORT_SYMBOL(iwl_mac_beacon_update);
  2221. int iwl_set_mode(struct iwl_priv *priv, int mode)
  2222. {
  2223. if (mode == NL80211_IFTYPE_ADHOC) {
  2224. const struct iwl_channel_info *ch_info;
  2225. ch_info = iwl_get_channel_info(priv,
  2226. priv->band,
  2227. le16_to_cpu(priv->staging_rxon.channel));
  2228. if (!ch_info || !is_channel_ibss(ch_info)) {
  2229. IWL_ERR(priv, "channel %d not IBSS channel\n",
  2230. le16_to_cpu(priv->staging_rxon.channel));
  2231. return -EINVAL;
  2232. }
  2233. }
  2234. iwl_connection_init_rx_config(priv, mode);
  2235. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2236. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2237. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2238. iwl_clear_stations_table(priv);
  2239. /* dont commit rxon if rf-kill is on*/
  2240. if (!iwl_is_ready_rf(priv))
  2241. return -EAGAIN;
  2242. iwlcore_commit_rxon(priv);
  2243. return 0;
  2244. }
  2245. EXPORT_SYMBOL(iwl_set_mode);
  2246. int iwl_mac_add_interface(struct ieee80211_hw *hw,
  2247. struct ieee80211_if_init_conf *conf)
  2248. {
  2249. struct iwl_priv *priv = hw->priv;
  2250. unsigned long flags;
  2251. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
  2252. if (priv->vif) {
  2253. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  2254. return -EOPNOTSUPP;
  2255. }
  2256. spin_lock_irqsave(&priv->lock, flags);
  2257. priv->vif = conf->vif;
  2258. priv->iw_mode = conf->type;
  2259. spin_unlock_irqrestore(&priv->lock, flags);
  2260. mutex_lock(&priv->mutex);
  2261. if (conf->mac_addr) {
  2262. IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
  2263. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  2264. }
  2265. if (iwl_set_mode(priv, conf->type) == -EAGAIN)
  2266. /* we are not ready, will run again when ready */
  2267. set_bit(STATUS_MODE_PENDING, &priv->status);
  2268. mutex_unlock(&priv->mutex);
  2269. IWL_DEBUG_MAC80211(priv, "leave\n");
  2270. return 0;
  2271. }
  2272. EXPORT_SYMBOL(iwl_mac_add_interface);
  2273. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  2274. struct ieee80211_if_init_conf *conf)
  2275. {
  2276. struct iwl_priv *priv = hw->priv;
  2277. IWL_DEBUG_MAC80211(priv, "enter\n");
  2278. mutex_lock(&priv->mutex);
  2279. if (iwl_is_ready_rf(priv)) {
  2280. iwl_scan_cancel_timeout(priv, 100);
  2281. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2282. iwlcore_commit_rxon(priv);
  2283. }
  2284. if (priv->vif == conf->vif) {
  2285. priv->vif = NULL;
  2286. memset(priv->bssid, 0, ETH_ALEN);
  2287. }
  2288. mutex_unlock(&priv->mutex);
  2289. IWL_DEBUG_MAC80211(priv, "leave\n");
  2290. }
  2291. EXPORT_SYMBOL(iwl_mac_remove_interface);
  2292. /**
  2293. * iwl_mac_config - mac80211 config callback
  2294. *
  2295. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  2296. * be set inappropriately and the driver currently sets the hardware up to
  2297. * use it whenever needed.
  2298. */
  2299. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  2300. {
  2301. struct iwl_priv *priv = hw->priv;
  2302. const struct iwl_channel_info *ch_info;
  2303. struct ieee80211_conf *conf = &hw->conf;
  2304. unsigned long flags = 0;
  2305. int ret = 0;
  2306. u16 ch;
  2307. int scan_active = 0;
  2308. mutex_lock(&priv->mutex);
  2309. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  2310. conf->channel->hw_value, changed);
  2311. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  2312. test_bit(STATUS_SCANNING, &priv->status))) {
  2313. scan_active = 1;
  2314. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  2315. }
  2316. /* during scanning mac80211 will delay channel setting until
  2317. * scan finish with changed = 0
  2318. */
  2319. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  2320. if (scan_active)
  2321. goto set_ch_out;
  2322. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  2323. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  2324. if (!is_channel_valid(ch_info)) {
  2325. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  2326. ret = -EINVAL;
  2327. goto set_ch_out;
  2328. }
  2329. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  2330. !is_channel_ibss(ch_info)) {
  2331. IWL_ERR(priv, "channel %d in band %d not "
  2332. "IBSS channel\n",
  2333. conf->channel->hw_value, conf->channel->band);
  2334. ret = -EINVAL;
  2335. goto set_ch_out;
  2336. }
  2337. priv->current_ht_config.is_ht = conf_is_ht(conf);
  2338. spin_lock_irqsave(&priv->lock, flags);
  2339. /* if we are switching from ht to 2.4 clear flags
  2340. * from any ht related info since 2.4 does not
  2341. * support ht */
  2342. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  2343. priv->staging_rxon.flags = 0;
  2344. iwl_set_rxon_channel(priv, conf->channel);
  2345. iwl_set_flags_for_band(priv, conf->channel->band);
  2346. spin_unlock_irqrestore(&priv->lock, flags);
  2347. set_ch_out:
  2348. /* The list of supported rates and rate mask can be different
  2349. * for each band; since the band may have changed, reset
  2350. * the rate mask to what mac80211 lists */
  2351. iwl_set_rate(priv);
  2352. }
  2353. if (changed & IEEE80211_CONF_CHANGE_PS &&
  2354. priv->iw_mode == NL80211_IFTYPE_STATION) {
  2355. priv->power_data.power_disabled =
  2356. !(conf->flags & IEEE80211_CONF_PS);
  2357. ret = iwl_power_update_mode(priv, 0);
  2358. if (ret)
  2359. IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
  2360. }
  2361. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  2362. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  2363. priv->tx_power_user_lmt, conf->power_level);
  2364. iwl_set_tx_power(priv, conf->power_level, false);
  2365. }
  2366. /* call to ensure that 4965 rx_chain is set properly in monitor mode */
  2367. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2368. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2369. if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
  2370. if (conf->radio_enabled &&
  2371. iwl_radio_kill_sw_enable_radio(priv)) {
  2372. IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
  2373. "waiting for uCode\n");
  2374. goto out;
  2375. }
  2376. if (!conf->radio_enabled)
  2377. iwl_radio_kill_sw_disable_radio(priv);
  2378. }
  2379. if (!conf->radio_enabled) {
  2380. IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
  2381. goto out;
  2382. }
  2383. if (!iwl_is_ready(priv)) {
  2384. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2385. goto out;
  2386. }
  2387. if (scan_active)
  2388. goto out;
  2389. if (memcmp(&priv->active_rxon,
  2390. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  2391. iwlcore_commit_rxon(priv);
  2392. else
  2393. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  2394. out:
  2395. IWL_DEBUG_MAC80211(priv, "leave\n");
  2396. mutex_unlock(&priv->mutex);
  2397. return ret;
  2398. }
  2399. EXPORT_SYMBOL(iwl_mac_config);
  2400. int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  2401. struct ieee80211_tx_queue_stats *stats)
  2402. {
  2403. struct iwl_priv *priv = hw->priv;
  2404. int i, avail;
  2405. struct iwl_tx_queue *txq;
  2406. struct iwl_queue *q;
  2407. unsigned long flags;
  2408. IWL_DEBUG_MAC80211(priv, "enter\n");
  2409. if (!iwl_is_ready_rf(priv)) {
  2410. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2411. return -EIO;
  2412. }
  2413. spin_lock_irqsave(&priv->lock, flags);
  2414. for (i = 0; i < AC_NUM; i++) {
  2415. txq = &priv->txq[i];
  2416. q = &txq->q;
  2417. avail = iwl_queue_space(q);
  2418. stats[i].len = q->n_window - avail;
  2419. stats[i].limit = q->n_window - q->high_mark;
  2420. stats[i].count = q->n_window;
  2421. }
  2422. spin_unlock_irqrestore(&priv->lock, flags);
  2423. IWL_DEBUG_MAC80211(priv, "leave\n");
  2424. return 0;
  2425. }
  2426. EXPORT_SYMBOL(iwl_mac_get_tx_stats);
  2427. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  2428. {
  2429. struct iwl_priv *priv = hw->priv;
  2430. unsigned long flags;
  2431. mutex_lock(&priv->mutex);
  2432. IWL_DEBUG_MAC80211(priv, "enter\n");
  2433. spin_lock_irqsave(&priv->lock, flags);
  2434. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  2435. spin_unlock_irqrestore(&priv->lock, flags);
  2436. iwl_reset_qos(priv);
  2437. spin_lock_irqsave(&priv->lock, flags);
  2438. priv->assoc_id = 0;
  2439. priv->assoc_capability = 0;
  2440. priv->assoc_station_added = 0;
  2441. /* new association get rid of ibss beacon skb */
  2442. if (priv->ibss_beacon)
  2443. dev_kfree_skb(priv->ibss_beacon);
  2444. priv->ibss_beacon = NULL;
  2445. priv->beacon_int = priv->vif->bss_conf.beacon_int;
  2446. priv->timestamp = 0;
  2447. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  2448. priv->beacon_int = 0;
  2449. spin_unlock_irqrestore(&priv->lock, flags);
  2450. if (!iwl_is_ready_rf(priv)) {
  2451. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2452. mutex_unlock(&priv->mutex);
  2453. return;
  2454. }
  2455. /* we are restarting association process
  2456. * clear RXON_FILTER_ASSOC_MSK bit
  2457. */
  2458. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  2459. iwl_scan_cancel_timeout(priv, 100);
  2460. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2461. iwlcore_commit_rxon(priv);
  2462. }
  2463. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2464. IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
  2465. mutex_unlock(&priv->mutex);
  2466. return;
  2467. }
  2468. iwl_set_rate(priv);
  2469. mutex_unlock(&priv->mutex);
  2470. IWL_DEBUG_MAC80211(priv, "leave\n");
  2471. }
  2472. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  2473. #ifdef CONFIG_PM
  2474. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2475. {
  2476. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2477. /*
  2478. * This function is called when system goes into suspend state
  2479. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2480. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2481. * it will not call apm_ops.stop() to stop the DMA operation.
  2482. * Calling apm_ops.stop here to make sure we stop the DMA.
  2483. */
  2484. priv->cfg->ops->lib->apm_ops.stop(priv);
  2485. pci_save_state(pdev);
  2486. pci_disable_device(pdev);
  2487. pci_set_power_state(pdev, PCI_D3hot);
  2488. return 0;
  2489. }
  2490. EXPORT_SYMBOL(iwl_pci_suspend);
  2491. int iwl_pci_resume(struct pci_dev *pdev)
  2492. {
  2493. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2494. int ret;
  2495. pci_set_power_state(pdev, PCI_D0);
  2496. ret = pci_enable_device(pdev);
  2497. if (ret)
  2498. return ret;
  2499. pci_restore_state(pdev);
  2500. iwl_enable_interrupts(priv);
  2501. return 0;
  2502. }
  2503. EXPORT_SYMBOL(iwl_pci_resume);
  2504. #endif /* CONFIG_PM */