iwl3945-base.c 118 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /**
  85. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  86. * @priv: eeprom and antenna fields are used to determine antenna flags
  87. *
  88. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  89. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  90. *
  91. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  92. * IWL_ANTENNA_MAIN - Force MAIN antenna
  93. * IWL_ANTENNA_AUX - Force AUX antenna
  94. */
  95. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  96. {
  97. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  98. switch (iwl3945_mod_params.antenna) {
  99. case IWL_ANTENNA_DIVERSITY:
  100. return 0;
  101. case IWL_ANTENNA_MAIN:
  102. if (eeprom->antenna_switch_type)
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  105. case IWL_ANTENNA_AUX:
  106. if (eeprom->antenna_switch_type)
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  109. }
  110. /* bad antenna selector value */
  111. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  112. iwl3945_mod_params.antenna);
  113. return 0; /* "diversity" is default if error */
  114. }
  115. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  116. struct ieee80211_key_conf *keyconf,
  117. u8 sta_id)
  118. {
  119. unsigned long flags;
  120. __le16 key_flags = 0;
  121. int ret;
  122. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  123. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  124. if (sta_id == priv->hw_params.bcast_sta_id)
  125. key_flags |= STA_KEY_MULTICAST_MSK;
  126. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  127. keyconf->hw_key_idx = keyconf->keyidx;
  128. key_flags &= ~STA_KEY_FLG_INVALID;
  129. spin_lock_irqsave(&priv->sta_lock, flags);
  130. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  131. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  132. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  133. keyconf->keylen);
  134. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  135. keyconf->keylen);
  136. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  137. == STA_KEY_FLG_NO_ENC)
  138. priv->stations[sta_id].sta.key.key_offset =
  139. iwl_get_free_ucode_key_index(priv);
  140. /* else, we are overriding an existing key => no need to allocated room
  141. * in uCode. */
  142. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  143. "no space for a new key");
  144. priv->stations[sta_id].sta.key.key_flags = key_flags;
  145. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  146. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  147. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  148. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  149. spin_unlock_irqrestore(&priv->sta_lock, flags);
  150. return ret;
  151. }
  152. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  153. struct ieee80211_key_conf *keyconf,
  154. u8 sta_id)
  155. {
  156. return -EOPNOTSUPP;
  157. }
  158. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  159. struct ieee80211_key_conf *keyconf,
  160. u8 sta_id)
  161. {
  162. return -EOPNOTSUPP;
  163. }
  164. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  165. {
  166. unsigned long flags;
  167. spin_lock_irqsave(&priv->sta_lock, flags);
  168. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  169. memset(&priv->stations[sta_id].sta.key, 0,
  170. sizeof(struct iwl4965_keyinfo));
  171. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  172. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  173. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  174. spin_unlock_irqrestore(&priv->sta_lock, flags);
  175. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  176. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  177. return 0;
  178. }
  179. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  180. struct ieee80211_key_conf *keyconf, u8 sta_id)
  181. {
  182. int ret = 0;
  183. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  184. switch (keyconf->alg) {
  185. case ALG_CCMP:
  186. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  187. break;
  188. case ALG_TKIP:
  189. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  190. break;
  191. case ALG_WEP:
  192. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  193. break;
  194. default:
  195. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  196. ret = -EINVAL;
  197. }
  198. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  200. sta_id, ret);
  201. return ret;
  202. }
  203. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int iwl3945_set_static_key(struct iwl_priv *priv,
  209. struct ieee80211_key_conf *key)
  210. {
  211. if (key->alg == ALG_WEP)
  212. return -EOPNOTSUPP;
  213. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  214. return -EINVAL;
  215. }
  216. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  217. {
  218. struct list_head *element;
  219. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  220. priv->frames_count);
  221. while (!list_empty(&priv->free_frames)) {
  222. element = priv->free_frames.next;
  223. list_del(element);
  224. kfree(list_entry(element, struct iwl3945_frame, list));
  225. priv->frames_count--;
  226. }
  227. if (priv->frames_count) {
  228. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  229. priv->frames_count);
  230. priv->frames_count = 0;
  231. }
  232. }
  233. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  234. {
  235. struct iwl3945_frame *frame;
  236. struct list_head *element;
  237. if (list_empty(&priv->free_frames)) {
  238. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  239. if (!frame) {
  240. IWL_ERR(priv, "Could not allocate frame!\n");
  241. return NULL;
  242. }
  243. priv->frames_count++;
  244. return frame;
  245. }
  246. element = priv->free_frames.next;
  247. list_del(element);
  248. return list_entry(element, struct iwl3945_frame, list);
  249. }
  250. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  251. {
  252. memset(frame, 0, sizeof(*frame));
  253. list_add(&frame->list, &priv->free_frames);
  254. }
  255. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  256. struct ieee80211_hdr *hdr,
  257. int left)
  258. {
  259. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  260. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  261. (priv->iw_mode != NL80211_IFTYPE_AP)))
  262. return 0;
  263. if (priv->ibss_beacon->len > left)
  264. return 0;
  265. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  266. return priv->ibss_beacon->len;
  267. }
  268. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  269. {
  270. struct iwl3945_frame *frame;
  271. unsigned int frame_size;
  272. int rc;
  273. u8 rate;
  274. frame = iwl3945_get_free_frame(priv);
  275. if (!frame) {
  276. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  277. "command.\n");
  278. return -ENOMEM;
  279. }
  280. rate = iwl_rate_get_lowest_plcp(priv);
  281. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  282. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  283. &frame->u.cmd[0]);
  284. iwl3945_free_frame(priv, frame);
  285. return rc;
  286. }
  287. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  288. {
  289. if (priv->shared_virt)
  290. pci_free_consistent(priv->pci_dev,
  291. sizeof(struct iwl3945_shared),
  292. priv->shared_virt,
  293. priv->shared_phys);
  294. }
  295. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  296. struct ieee80211_tx_info *info,
  297. struct iwl_device_cmd *cmd,
  298. struct sk_buff *skb_frag,
  299. int sta_id)
  300. {
  301. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  302. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  303. switch (keyinfo->alg) {
  304. case ALG_CCMP:
  305. tx->sec_ctl = TX_CMD_SEC_CCM;
  306. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  307. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  308. break;
  309. case ALG_TKIP:
  310. break;
  311. case ALG_WEP:
  312. tx->sec_ctl = TX_CMD_SEC_WEP |
  313. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  314. if (keyinfo->keylen == 13)
  315. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  316. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  317. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  318. "with key %d\n", info->control.hw_key->hw_key_idx);
  319. break;
  320. default:
  321. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  322. break;
  323. }
  324. }
  325. /*
  326. * handle build REPLY_TX command notification.
  327. */
  328. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  329. struct iwl_device_cmd *cmd,
  330. struct ieee80211_tx_info *info,
  331. struct ieee80211_hdr *hdr, u8 std_id)
  332. {
  333. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  334. __le32 tx_flags = tx->tx_flags;
  335. __le16 fc = hdr->frame_control;
  336. u8 rc_flags = info->control.rates[0].flags;
  337. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  338. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  339. tx_flags |= TX_CMD_FLG_ACK_MSK;
  340. if (ieee80211_is_mgmt(fc))
  341. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  342. if (ieee80211_is_probe_resp(fc) &&
  343. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  344. tx_flags |= TX_CMD_FLG_TSF_MSK;
  345. } else {
  346. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  347. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  348. }
  349. tx->sta_id = std_id;
  350. if (ieee80211_has_morefrags(fc))
  351. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  352. if (ieee80211_is_data_qos(fc)) {
  353. u8 *qc = ieee80211_get_qos_ctl(hdr);
  354. tx->tid_tspec = qc[0] & 0xf;
  355. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  356. } else {
  357. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  358. }
  359. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  360. tx_flags |= TX_CMD_FLG_RTS_MSK;
  361. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  362. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  363. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  364. tx_flags |= TX_CMD_FLG_CTS_MSK;
  365. }
  366. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  367. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  368. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  369. if (ieee80211_is_mgmt(fc)) {
  370. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  371. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  372. else
  373. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  374. } else {
  375. tx->timeout.pm_frame_timeout = 0;
  376. #ifdef CONFIG_IWLWIFI_LEDS
  377. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  378. #endif
  379. }
  380. tx->driver_txop = 0;
  381. tx->tx_flags = tx_flags;
  382. tx->next_frame_len = 0;
  383. }
  384. /*
  385. * start REPLY_TX command process
  386. */
  387. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  388. {
  389. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  390. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  391. struct iwl3945_tx_cmd *tx;
  392. struct iwl_tx_queue *txq = NULL;
  393. struct iwl_queue *q = NULL;
  394. struct iwl_device_cmd *out_cmd;
  395. struct iwl_cmd_meta *out_meta;
  396. dma_addr_t phys_addr;
  397. dma_addr_t txcmd_phys;
  398. int txq_id = skb_get_queue_mapping(skb);
  399. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  400. u8 id;
  401. u8 unicast;
  402. u8 sta_id;
  403. u8 tid = 0;
  404. u16 seq_number = 0;
  405. __le16 fc;
  406. u8 wait_write_ptr = 0;
  407. u8 *qc = NULL;
  408. unsigned long flags;
  409. int rc;
  410. spin_lock_irqsave(&priv->lock, flags);
  411. if (iwl_is_rfkill(priv)) {
  412. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  413. goto drop_unlock;
  414. }
  415. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  416. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  417. goto drop_unlock;
  418. }
  419. unicast = !is_multicast_ether_addr(hdr->addr1);
  420. id = 0;
  421. fc = hdr->frame_control;
  422. #ifdef CONFIG_IWLWIFI_DEBUG
  423. if (ieee80211_is_auth(fc))
  424. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  425. else if (ieee80211_is_assoc_req(fc))
  426. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  427. else if (ieee80211_is_reassoc_req(fc))
  428. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  429. #endif
  430. /* drop all data frame if we are not associated */
  431. if (ieee80211_is_data(fc) &&
  432. (!iwl_is_monitor_mode(priv)) && /* packet injection */
  433. (!iwl_is_associated(priv) ||
  434. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  435. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  436. goto drop_unlock;
  437. }
  438. spin_unlock_irqrestore(&priv->lock, flags);
  439. hdr_len = ieee80211_hdrlen(fc);
  440. /* Find (or create) index into station table for destination station */
  441. sta_id = iwl_get_sta_id(priv, hdr);
  442. if (sta_id == IWL_INVALID_STATION) {
  443. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  444. hdr->addr1);
  445. goto drop;
  446. }
  447. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  448. if (ieee80211_is_data_qos(fc)) {
  449. qc = ieee80211_get_qos_ctl(hdr);
  450. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  451. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  452. IEEE80211_SCTL_SEQ;
  453. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  454. (hdr->seq_ctrl &
  455. cpu_to_le16(IEEE80211_SCTL_FRAG));
  456. seq_number += 0x10;
  457. }
  458. /* Descriptor for chosen Tx queue */
  459. txq = &priv->txq[txq_id];
  460. q = &txq->q;
  461. spin_lock_irqsave(&priv->lock, flags);
  462. idx = get_cmd_index(q, q->write_ptr, 0);
  463. /* Set up driver data for this TFD */
  464. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  465. txq->txb[q->write_ptr].skb[0] = skb;
  466. /* Init first empty entry in queue's array of Tx/cmd buffers */
  467. out_cmd = txq->cmd[idx];
  468. out_meta = &txq->meta[idx];
  469. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  470. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  471. memset(tx, 0, sizeof(*tx));
  472. /*
  473. * Set up the Tx-command (not MAC!) header.
  474. * Store the chosen Tx queue and TFD index within the sequence field;
  475. * after Tx, uCode's Tx response will return this value so driver can
  476. * locate the frame within the tx queue and do post-tx processing.
  477. */
  478. out_cmd->hdr.cmd = REPLY_TX;
  479. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  480. INDEX_TO_SEQ(q->write_ptr)));
  481. /* Copy MAC header from skb into command buffer */
  482. memcpy(tx->hdr, hdr, hdr_len);
  483. if (info->control.hw_key)
  484. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  485. /* TODO need this for burst mode later on */
  486. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  487. /* set is_hcca to 0; it probably will never be implemented */
  488. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  489. /* Total # bytes to be transmitted */
  490. len = (u16)skb->len;
  491. tx->len = cpu_to_le16(len);
  492. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  493. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  494. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  495. txq->need_update = 1;
  496. if (qc)
  497. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  498. } else {
  499. wait_write_ptr = 1;
  500. txq->need_update = 0;
  501. }
  502. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  503. le16_to_cpu(out_cmd->hdr.sequence));
  504. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  505. iwl_print_hex_dump(IWL_DL_TX, tx, sizeof(*tx));
  506. iwl_print_hex_dump(IWL_DL_TX, (u8 *)tx->hdr,
  507. ieee80211_hdrlen(fc));
  508. /*
  509. * Use the first empty entry in this queue's command buffer array
  510. * to contain the Tx command and MAC header concatenated together
  511. * (payload data will be in another buffer).
  512. * Size of this varies, due to varying MAC header length.
  513. * If end is not dword aligned, we'll have 2 extra bytes at the end
  514. * of the MAC header (device reads on dword boundaries).
  515. * We'll tell device about this padding later.
  516. */
  517. len = sizeof(struct iwl3945_tx_cmd) +
  518. sizeof(struct iwl_cmd_header) + hdr_len;
  519. len_org = len;
  520. len = (len + 3) & ~3;
  521. if (len_org != len)
  522. len_org = 1;
  523. else
  524. len_org = 0;
  525. /* Physical address of this Tx command's header (not MAC header!),
  526. * within command buffer array. */
  527. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  528. len, PCI_DMA_TODEVICE);
  529. /* we do not map meta data ... so we can safely access address to
  530. * provide to unmap command*/
  531. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  532. pci_unmap_len_set(out_meta, len, len);
  533. /* Add buffer containing Tx command and MAC(!) header to TFD's
  534. * first entry */
  535. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  536. txcmd_phys, len, 1, 0);
  537. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  538. * if any (802.11 null frames have no payload). */
  539. len = skb->len - hdr_len;
  540. if (len) {
  541. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  542. len, PCI_DMA_TODEVICE);
  543. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  544. phys_addr, len,
  545. 0, U32_PAD(len));
  546. }
  547. /* Tell device the write index *just past* this latest filled TFD */
  548. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  549. rc = iwl_txq_update_write_ptr(priv, txq);
  550. spin_unlock_irqrestore(&priv->lock, flags);
  551. if (rc)
  552. return rc;
  553. if ((iwl_queue_space(q) < q->high_mark)
  554. && priv->mac80211_registered) {
  555. if (wait_write_ptr) {
  556. spin_lock_irqsave(&priv->lock, flags);
  557. txq->need_update = 1;
  558. iwl_txq_update_write_ptr(priv, txq);
  559. spin_unlock_irqrestore(&priv->lock, flags);
  560. }
  561. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  562. }
  563. return 0;
  564. drop_unlock:
  565. spin_unlock_irqrestore(&priv->lock, flags);
  566. drop:
  567. return -1;
  568. }
  569. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  570. #include "iwl-spectrum.h"
  571. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  572. #define BEACON_TIME_MASK_HIGH 0xFF000000
  573. #define TIME_UNIT 1024
  574. /*
  575. * extended beacon time format
  576. * time in usec will be changed into a 32-bit value in 8:24 format
  577. * the high 1 byte is the beacon counts
  578. * the lower 3 bytes is the time in usec within one beacon interval
  579. */
  580. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  581. {
  582. u32 quot;
  583. u32 rem;
  584. u32 interval = beacon_interval * 1024;
  585. if (!interval || !usec)
  586. return 0;
  587. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  588. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  589. return (quot << 24) + rem;
  590. }
  591. /* base is usually what we get from ucode with each received frame,
  592. * the same as HW timer counter counting down
  593. */
  594. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  595. {
  596. u32 base_low = base & BEACON_TIME_MASK_LOW;
  597. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  598. u32 interval = beacon_interval * TIME_UNIT;
  599. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  600. (addon & BEACON_TIME_MASK_HIGH);
  601. if (base_low > addon_low)
  602. res += base_low - addon_low;
  603. else if (base_low < addon_low) {
  604. res += interval + base_low - addon_low;
  605. res += (1 << 24);
  606. } else
  607. res += (1 << 24);
  608. return cpu_to_le32(res);
  609. }
  610. static int iwl3945_get_measurement(struct iwl_priv *priv,
  611. struct ieee80211_measurement_params *params,
  612. u8 type)
  613. {
  614. struct iwl_spectrum_cmd spectrum;
  615. struct iwl_rx_packet *res;
  616. struct iwl_host_cmd cmd = {
  617. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  618. .data = (void *)&spectrum,
  619. .flags = CMD_WANT_SKB,
  620. };
  621. u32 add_time = le64_to_cpu(params->start_time);
  622. int rc;
  623. int spectrum_resp_status;
  624. int duration = le16_to_cpu(params->duration);
  625. if (iwl_is_associated(priv))
  626. add_time =
  627. iwl3945_usecs_to_beacons(
  628. le64_to_cpu(params->start_time) - priv->last_tsf,
  629. le16_to_cpu(priv->rxon_timing.beacon_interval));
  630. memset(&spectrum, 0, sizeof(spectrum));
  631. spectrum.channel_count = cpu_to_le16(1);
  632. spectrum.flags =
  633. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  634. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  635. cmd.len = sizeof(spectrum);
  636. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  637. if (iwl_is_associated(priv))
  638. spectrum.start_time =
  639. iwl3945_add_beacon_time(priv->last_beacon_time,
  640. add_time,
  641. le16_to_cpu(priv->rxon_timing.beacon_interval));
  642. else
  643. spectrum.start_time = 0;
  644. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  645. spectrum.channels[0].channel = params->channel;
  646. spectrum.channels[0].type = type;
  647. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  648. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  649. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  650. rc = iwl_send_cmd_sync(priv, &cmd);
  651. if (rc)
  652. return rc;
  653. res = (struct iwl_rx_packet *)cmd.reply_skb->data;
  654. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  655. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  656. rc = -EIO;
  657. }
  658. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  659. switch (spectrum_resp_status) {
  660. case 0: /* Command will be handled */
  661. if (res->u.spectrum.id != 0xff) {
  662. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  663. res->u.spectrum.id);
  664. priv->measurement_status &= ~MEASUREMENT_READY;
  665. }
  666. priv->measurement_status |= MEASUREMENT_ACTIVE;
  667. rc = 0;
  668. break;
  669. case 1: /* Command will not be handled */
  670. rc = -EAGAIN;
  671. break;
  672. }
  673. dev_kfree_skb_any(cmd.reply_skb);
  674. return rc;
  675. }
  676. #endif
  677. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  678. struct iwl_rx_mem_buffer *rxb)
  679. {
  680. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  681. struct iwl_alive_resp *palive;
  682. struct delayed_work *pwork;
  683. palive = &pkt->u.alive_frame;
  684. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  685. "0x%01X 0x%01X\n",
  686. palive->is_valid, palive->ver_type,
  687. palive->ver_subtype);
  688. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  689. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  690. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  691. sizeof(struct iwl_alive_resp));
  692. pwork = &priv->init_alive_start;
  693. } else {
  694. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  695. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  696. sizeof(struct iwl_alive_resp));
  697. pwork = &priv->alive_start;
  698. iwl3945_disable_events(priv);
  699. }
  700. /* We delay the ALIVE response by 5ms to
  701. * give the HW RF Kill time to activate... */
  702. if (palive->is_valid == UCODE_VALID_OK)
  703. queue_delayed_work(priv->workqueue, pwork,
  704. msecs_to_jiffies(5));
  705. else
  706. IWL_WARN(priv, "uCode did not respond OK.\n");
  707. }
  708. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  709. struct iwl_rx_mem_buffer *rxb)
  710. {
  711. #ifdef CONFIG_IWLWIFI_DEBUG
  712. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  713. #endif
  714. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  715. return;
  716. }
  717. static void iwl3945_bg_beacon_update(struct work_struct *work)
  718. {
  719. struct iwl_priv *priv =
  720. container_of(work, struct iwl_priv, beacon_update);
  721. struct sk_buff *beacon;
  722. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  723. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  724. if (!beacon) {
  725. IWL_ERR(priv, "update beacon failed\n");
  726. return;
  727. }
  728. mutex_lock(&priv->mutex);
  729. /* new beacon skb is allocated every time; dispose previous.*/
  730. if (priv->ibss_beacon)
  731. dev_kfree_skb(priv->ibss_beacon);
  732. priv->ibss_beacon = beacon;
  733. mutex_unlock(&priv->mutex);
  734. iwl3945_send_beacon_cmd(priv);
  735. }
  736. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  737. struct iwl_rx_mem_buffer *rxb)
  738. {
  739. #ifdef CONFIG_IWLWIFI_DEBUG
  740. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  741. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  742. u8 rate = beacon->beacon_notify_hdr.rate;
  743. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  744. "tsf %d %d rate %d\n",
  745. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  746. beacon->beacon_notify_hdr.failure_frame,
  747. le32_to_cpu(beacon->ibss_mgr_status),
  748. le32_to_cpu(beacon->high_tsf),
  749. le32_to_cpu(beacon->low_tsf), rate);
  750. #endif
  751. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  752. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  753. queue_work(priv->workqueue, &priv->beacon_update);
  754. }
  755. /* Handle notification from uCode that card's power state is changing
  756. * due to software, hardware, or critical temperature RFKILL */
  757. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  758. struct iwl_rx_mem_buffer *rxb)
  759. {
  760. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  761. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  762. unsigned long status = priv->status;
  763. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  764. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  765. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  766. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  767. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  768. if (flags & HW_CARD_DISABLED)
  769. set_bit(STATUS_RF_KILL_HW, &priv->status);
  770. else
  771. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  772. iwl_scan_cancel(priv);
  773. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  774. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  775. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  776. test_bit(STATUS_RF_KILL_HW, &priv->status));
  777. else
  778. wake_up_interruptible(&priv->wait_command_queue);
  779. }
  780. /**
  781. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  782. *
  783. * Setup the RX handlers for each of the reply types sent from the uCode
  784. * to the host.
  785. *
  786. * This function chains into the hardware specific files for them to setup
  787. * any hardware specific handlers as well.
  788. */
  789. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  790. {
  791. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  792. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  793. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  794. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  795. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  796. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  797. iwl_rx_pm_debug_statistics_notif;
  798. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  799. /*
  800. * The same handler is used for both the REPLY to a discrete
  801. * statistics request from the host as well as for the periodic
  802. * statistics notifications (after received beacons) from the uCode.
  803. */
  804. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  805. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  806. iwl_setup_spectrum_handlers(priv);
  807. iwl_setup_rx_scan_handlers(priv);
  808. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  809. /* Set up hardware specific Rx handlers */
  810. iwl3945_hw_rx_handler_setup(priv);
  811. }
  812. /************************** RX-FUNCTIONS ****************************/
  813. /*
  814. * Rx theory of operation
  815. *
  816. * The host allocates 32 DMA target addresses and passes the host address
  817. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  818. * 0 to 31
  819. *
  820. * Rx Queue Indexes
  821. * The host/firmware share two index registers for managing the Rx buffers.
  822. *
  823. * The READ index maps to the first position that the firmware may be writing
  824. * to -- the driver can read up to (but not including) this position and get
  825. * good data.
  826. * The READ index is managed by the firmware once the card is enabled.
  827. *
  828. * The WRITE index maps to the last position the driver has read from -- the
  829. * position preceding WRITE is the last slot the firmware can place a packet.
  830. *
  831. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  832. * WRITE = READ.
  833. *
  834. * During initialization, the host sets up the READ queue position to the first
  835. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  836. *
  837. * When the firmware places a packet in a buffer, it will advance the READ index
  838. * and fire the RX interrupt. The driver can then query the READ index and
  839. * process as many packets as possible, moving the WRITE index forward as it
  840. * resets the Rx queue buffers with new memory.
  841. *
  842. * The management in the driver is as follows:
  843. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  844. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  845. * to replenish the iwl->rxq->rx_free.
  846. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  847. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  848. * 'processed' and 'read' driver indexes as well)
  849. * + A received packet is processed and handed to the kernel network stack,
  850. * detached from the iwl->rxq. The driver 'processed' index is updated.
  851. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  852. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  853. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  854. * were enough free buffers and RX_STALLED is set it is cleared.
  855. *
  856. *
  857. * Driver sequence:
  858. *
  859. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  860. * iwl3945_rx_queue_restock
  861. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  862. * queue, updates firmware pointers, and updates
  863. * the WRITE index. If insufficient rx_free buffers
  864. * are available, schedules iwl3945_rx_replenish
  865. *
  866. * -- enable interrupts --
  867. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  868. * READ INDEX, detaching the SKB from the pool.
  869. * Moves the packet buffer from queue to rx_used.
  870. * Calls iwl3945_rx_queue_restock to refill any empty
  871. * slots.
  872. * ...
  873. *
  874. */
  875. /**
  876. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  877. */
  878. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  879. dma_addr_t dma_addr)
  880. {
  881. return cpu_to_le32((u32)dma_addr);
  882. }
  883. /**
  884. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  885. *
  886. * If there are slots in the RX queue that need to be restocked,
  887. * and we have free pre-allocated buffers, fill the ranks as much
  888. * as we can, pulling from rx_free.
  889. *
  890. * This moves the 'write' index forward to catch up with 'processed', and
  891. * also updates the memory address in the firmware to reference the new
  892. * target buffer.
  893. */
  894. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  895. {
  896. struct iwl_rx_queue *rxq = &priv->rxq;
  897. struct list_head *element;
  898. struct iwl_rx_mem_buffer *rxb;
  899. unsigned long flags;
  900. int write, rc;
  901. spin_lock_irqsave(&rxq->lock, flags);
  902. write = rxq->write & ~0x7;
  903. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  904. /* Get next free Rx buffer, remove from free list */
  905. element = rxq->rx_free.next;
  906. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  907. list_del(element);
  908. /* Point to Rx buffer via next RBD in circular buffer */
  909. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  910. rxq->queue[rxq->write] = rxb;
  911. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  912. rxq->free_count--;
  913. }
  914. spin_unlock_irqrestore(&rxq->lock, flags);
  915. /* If the pre-allocated buffer pool is dropping low, schedule to
  916. * refill it */
  917. if (rxq->free_count <= RX_LOW_WATERMARK)
  918. queue_work(priv->workqueue, &priv->rx_replenish);
  919. /* If we've added more space for the firmware to place data, tell it.
  920. * Increment device's write pointer in multiples of 8. */
  921. if ((rxq->write_actual != (rxq->write & ~0x7))
  922. || (abs(rxq->write - rxq->read) > 7)) {
  923. spin_lock_irqsave(&rxq->lock, flags);
  924. rxq->need_update = 1;
  925. spin_unlock_irqrestore(&rxq->lock, flags);
  926. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  927. if (rc)
  928. return rc;
  929. }
  930. return 0;
  931. }
  932. /**
  933. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  934. *
  935. * When moving to rx_free an SKB is allocated for the slot.
  936. *
  937. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  938. * This is called as a scheduled work item (except for during initialization)
  939. */
  940. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  941. {
  942. struct iwl_rx_queue *rxq = &priv->rxq;
  943. struct list_head *element;
  944. struct iwl_rx_mem_buffer *rxb;
  945. unsigned long flags;
  946. while (1) {
  947. spin_lock_irqsave(&rxq->lock, flags);
  948. if (list_empty(&rxq->rx_used)) {
  949. spin_unlock_irqrestore(&rxq->lock, flags);
  950. return;
  951. }
  952. element = rxq->rx_used.next;
  953. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  954. list_del(element);
  955. spin_unlock_irqrestore(&rxq->lock, flags);
  956. /* Alloc a new receive buffer */
  957. rxb->skb =
  958. alloc_skb(priv->hw_params.rx_buf_size,
  959. priority);
  960. if (!rxb->skb) {
  961. if (net_ratelimit())
  962. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  963. /* We don't reschedule replenish work here -- we will
  964. * call the restock method and if it still needs
  965. * more buffers it will schedule replenish */
  966. break;
  967. }
  968. /* If radiotap head is required, reserve some headroom here.
  969. * The physical head count is a variable rx_stats->phy_count.
  970. * We reserve 4 bytes here. Plus these extra bytes, the
  971. * headroom of the physical head should be enough for the
  972. * radiotap head that iwl3945 supported. See iwl3945_rt.
  973. */
  974. skb_reserve(rxb->skb, 4);
  975. /* Get physical address of RB/SKB */
  976. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  977. rxb->skb->data,
  978. priv->hw_params.rx_buf_size,
  979. PCI_DMA_FROMDEVICE);
  980. spin_lock_irqsave(&rxq->lock, flags);
  981. list_add_tail(&rxb->list, &rxq->rx_free);
  982. priv->alloc_rxb_skb++;
  983. rxq->free_count++;
  984. spin_unlock_irqrestore(&rxq->lock, flags);
  985. }
  986. }
  987. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  988. {
  989. unsigned long flags;
  990. int i;
  991. spin_lock_irqsave(&rxq->lock, flags);
  992. INIT_LIST_HEAD(&rxq->rx_free);
  993. INIT_LIST_HEAD(&rxq->rx_used);
  994. /* Fill the rx_used queue with _all_ of the Rx buffers */
  995. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  996. /* In the reset function, these buffers may have been allocated
  997. * to an SKB, so we need to unmap and free potential storage */
  998. if (rxq->pool[i].skb != NULL) {
  999. pci_unmap_single(priv->pci_dev,
  1000. rxq->pool[i].real_dma_addr,
  1001. priv->hw_params.rx_buf_size,
  1002. PCI_DMA_FROMDEVICE);
  1003. priv->alloc_rxb_skb--;
  1004. dev_kfree_skb(rxq->pool[i].skb);
  1005. rxq->pool[i].skb = NULL;
  1006. }
  1007. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1008. }
  1009. /* Set us so that we have processed and used all buffers, but have
  1010. * not restocked the Rx queue with fresh buffers */
  1011. rxq->read = rxq->write = 0;
  1012. rxq->free_count = 0;
  1013. rxq->write_actual = 0;
  1014. spin_unlock_irqrestore(&rxq->lock, flags);
  1015. }
  1016. void iwl3945_rx_replenish(void *data)
  1017. {
  1018. struct iwl_priv *priv = data;
  1019. unsigned long flags;
  1020. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1021. spin_lock_irqsave(&priv->lock, flags);
  1022. iwl3945_rx_queue_restock(priv);
  1023. spin_unlock_irqrestore(&priv->lock, flags);
  1024. }
  1025. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1026. {
  1027. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1028. iwl3945_rx_queue_restock(priv);
  1029. }
  1030. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1031. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1032. * This free routine walks the list of POOL entries and if SKB is set to
  1033. * non NULL it is unmapped and freed
  1034. */
  1035. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1036. {
  1037. int i;
  1038. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1039. if (rxq->pool[i].skb != NULL) {
  1040. pci_unmap_single(priv->pci_dev,
  1041. rxq->pool[i].real_dma_addr,
  1042. priv->hw_params.rx_buf_size,
  1043. PCI_DMA_FROMDEVICE);
  1044. dev_kfree_skb(rxq->pool[i].skb);
  1045. }
  1046. }
  1047. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1048. rxq->dma_addr);
  1049. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1050. rxq->rb_stts, rxq->rb_stts_dma);
  1051. rxq->bd = NULL;
  1052. rxq->rb_stts = NULL;
  1053. }
  1054. /* Convert linear signal-to-noise ratio into dB */
  1055. static u8 ratio2dB[100] = {
  1056. /* 0 1 2 3 4 5 6 7 8 9 */
  1057. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1058. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1059. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1060. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1061. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1062. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1063. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1064. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1065. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1066. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1067. };
  1068. /* Calculates a relative dB value from a ratio of linear
  1069. * (i.e. not dB) signal levels.
  1070. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1071. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1072. {
  1073. /* 1000:1 or higher just report as 60 dB */
  1074. if (sig_ratio >= 1000)
  1075. return 60;
  1076. /* 100:1 or higher, divide by 10 and use table,
  1077. * add 20 dB to make up for divide by 10 */
  1078. if (sig_ratio >= 100)
  1079. return 20 + (int)ratio2dB[sig_ratio/10];
  1080. /* We shouldn't see this */
  1081. if (sig_ratio < 1)
  1082. return 0;
  1083. /* Use table for ratios 1:1 - 99:1 */
  1084. return (int)ratio2dB[sig_ratio];
  1085. }
  1086. #define PERFECT_RSSI (-20) /* dBm */
  1087. #define WORST_RSSI (-95) /* dBm */
  1088. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1089. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1090. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1091. * about formulas used below. */
  1092. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1093. {
  1094. int sig_qual;
  1095. int degradation = PERFECT_RSSI - rssi_dbm;
  1096. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1097. * as indicator; formula is (signal dbm - noise dbm).
  1098. * SNR at or above 40 is a great signal (100%).
  1099. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1100. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1101. if (noise_dbm) {
  1102. if (rssi_dbm - noise_dbm >= 40)
  1103. return 100;
  1104. else if (rssi_dbm < noise_dbm)
  1105. return 0;
  1106. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1107. /* Else use just the signal level.
  1108. * This formula is a least squares fit of data points collected and
  1109. * compared with a reference system that had a percentage (%) display
  1110. * for signal quality. */
  1111. } else
  1112. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1113. (15 * RSSI_RANGE + 62 * degradation)) /
  1114. (RSSI_RANGE * RSSI_RANGE);
  1115. if (sig_qual > 100)
  1116. sig_qual = 100;
  1117. else if (sig_qual < 1)
  1118. sig_qual = 0;
  1119. return sig_qual;
  1120. }
  1121. /**
  1122. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1123. *
  1124. * Uses the priv->rx_handlers callback function array to invoke
  1125. * the appropriate handlers, including command responses,
  1126. * frame-received notifications, and other notifications.
  1127. */
  1128. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1129. {
  1130. struct iwl_rx_mem_buffer *rxb;
  1131. struct iwl_rx_packet *pkt;
  1132. struct iwl_rx_queue *rxq = &priv->rxq;
  1133. u32 r, i;
  1134. int reclaim;
  1135. unsigned long flags;
  1136. u8 fill_rx = 0;
  1137. u32 count = 8;
  1138. int total_empty = 0;
  1139. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1140. * buffer that the driver may process (last buffer filled by ucode). */
  1141. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1142. i = rxq->read;
  1143. /* calculate total frames need to be restock after handling RX */
  1144. total_empty = r - priv->rxq.write_actual;
  1145. if (total_empty < 0)
  1146. total_empty += RX_QUEUE_SIZE;
  1147. if (total_empty > (RX_QUEUE_SIZE / 2))
  1148. fill_rx = 1;
  1149. /* Rx interrupt, but nothing sent from uCode */
  1150. if (i == r)
  1151. IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  1152. while (i != r) {
  1153. rxb = rxq->queue[i];
  1154. /* If an RXB doesn't have a Rx queue slot associated with it,
  1155. * then a bug has been introduced in the queue refilling
  1156. * routines -- catch it here */
  1157. BUG_ON(rxb == NULL);
  1158. rxq->queue[i] = NULL;
  1159. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1160. priv->hw_params.rx_buf_size,
  1161. PCI_DMA_FROMDEVICE);
  1162. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1163. /* Reclaim a command buffer only if this packet is a response
  1164. * to a (driver-originated) command.
  1165. * If the packet (e.g. Rx frame) originated from uCode,
  1166. * there is no command buffer to reclaim.
  1167. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1168. * but apparently a few don't get set; catch them here. */
  1169. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1170. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1171. (pkt->hdr.cmd != REPLY_TX);
  1172. /* Based on type of command response or notification,
  1173. * handle those that need handling via function in
  1174. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1175. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1176. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1177. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1178. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1179. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1180. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1181. } else {
  1182. /* No handling needed */
  1183. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1184. "r %d i %d No handler needed for %s, 0x%02x\n",
  1185. r, i, get_cmd_string(pkt->hdr.cmd),
  1186. pkt->hdr.cmd);
  1187. }
  1188. if (reclaim) {
  1189. /* Invoke any callbacks, transfer the skb to caller, and
  1190. * fire off the (possibly) blocking iwl_send_cmd()
  1191. * as we reclaim the driver command queue */
  1192. if (rxb && rxb->skb)
  1193. iwl_tx_cmd_complete(priv, rxb);
  1194. else
  1195. IWL_WARN(priv, "Claim null rxb?\n");
  1196. }
  1197. /* For now we just don't re-use anything. We can tweak this
  1198. * later to try and re-use notification packets and SKBs that
  1199. * fail to Rx correctly */
  1200. if (rxb->skb != NULL) {
  1201. priv->alloc_rxb_skb--;
  1202. dev_kfree_skb_any(rxb->skb);
  1203. rxb->skb = NULL;
  1204. }
  1205. spin_lock_irqsave(&rxq->lock, flags);
  1206. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1207. spin_unlock_irqrestore(&rxq->lock, flags);
  1208. i = (i + 1) & RX_QUEUE_MASK;
  1209. /* If there are a lot of unused frames,
  1210. * restock the Rx queue so ucode won't assert. */
  1211. if (fill_rx) {
  1212. count++;
  1213. if (count >= 8) {
  1214. priv->rxq.read = i;
  1215. iwl3945_rx_replenish_now(priv);
  1216. count = 0;
  1217. }
  1218. }
  1219. }
  1220. /* Backtrack one entry */
  1221. priv->rxq.read = i;
  1222. if (fill_rx)
  1223. iwl3945_rx_replenish_now(priv);
  1224. else
  1225. iwl3945_rx_queue_restock(priv);
  1226. }
  1227. /* call this function to flush any scheduled tasklet */
  1228. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1229. {
  1230. /* wait to make sure we flush pending tasklet*/
  1231. synchronize_irq(priv->pci_dev->irq);
  1232. tasklet_kill(&priv->irq_tasklet);
  1233. }
  1234. static const char *desc_lookup(int i)
  1235. {
  1236. switch (i) {
  1237. case 1:
  1238. return "FAIL";
  1239. case 2:
  1240. return "BAD_PARAM";
  1241. case 3:
  1242. return "BAD_CHECKSUM";
  1243. case 4:
  1244. return "NMI_INTERRUPT";
  1245. case 5:
  1246. return "SYSASSERT";
  1247. case 6:
  1248. return "FATAL_ERROR";
  1249. }
  1250. return "UNKNOWN";
  1251. }
  1252. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1253. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1254. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1255. {
  1256. u32 i;
  1257. u32 desc, time, count, base, data1;
  1258. u32 blink1, blink2, ilink1, ilink2;
  1259. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1260. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1261. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1262. return;
  1263. }
  1264. count = iwl_read_targ_mem(priv, base);
  1265. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1266. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1267. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1268. priv->status, count);
  1269. }
  1270. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1271. "ilink1 nmiPC Line\n");
  1272. for (i = ERROR_START_OFFSET;
  1273. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1274. i += ERROR_ELEM_SIZE) {
  1275. desc = iwl_read_targ_mem(priv, base + i);
  1276. time =
  1277. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1278. blink1 =
  1279. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1280. blink2 =
  1281. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1282. ilink1 =
  1283. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1284. ilink2 =
  1285. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1286. data1 =
  1287. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1288. IWL_ERR(priv,
  1289. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1290. desc_lookup(desc), desc, time, blink1, blink2,
  1291. ilink1, ilink2, data1);
  1292. }
  1293. }
  1294. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1295. /**
  1296. * iwl3945_print_event_log - Dump error event log to syslog
  1297. *
  1298. */
  1299. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1300. u32 num_events, u32 mode)
  1301. {
  1302. u32 i;
  1303. u32 base; /* SRAM byte address of event log header */
  1304. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1305. u32 ptr; /* SRAM byte address of log data */
  1306. u32 ev, time, data; /* event log data */
  1307. if (num_events == 0)
  1308. return;
  1309. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1310. if (mode == 0)
  1311. event_size = 2 * sizeof(u32);
  1312. else
  1313. event_size = 3 * sizeof(u32);
  1314. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1315. /* "time" is actually "data" for mode 0 (no timestamp).
  1316. * place event id # at far right for easier visual parsing. */
  1317. for (i = 0; i < num_events; i++) {
  1318. ev = iwl_read_targ_mem(priv, ptr);
  1319. ptr += sizeof(u32);
  1320. time = iwl_read_targ_mem(priv, ptr);
  1321. ptr += sizeof(u32);
  1322. if (mode == 0) {
  1323. /* data, ev */
  1324. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1325. } else {
  1326. data = iwl_read_targ_mem(priv, ptr);
  1327. ptr += sizeof(u32);
  1328. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1329. }
  1330. }
  1331. }
  1332. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1333. {
  1334. u32 base; /* SRAM byte address of event log header */
  1335. u32 capacity; /* event log capacity in # entries */
  1336. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1337. u32 num_wraps; /* # times uCode wrapped to top of log */
  1338. u32 next_entry; /* index of next entry to be written by uCode */
  1339. u32 size; /* # entries that we'll print */
  1340. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1341. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1342. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1343. return;
  1344. }
  1345. /* event log header */
  1346. capacity = iwl_read_targ_mem(priv, base);
  1347. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1348. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1349. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1350. size = num_wraps ? capacity : next_entry;
  1351. /* bail out if nothing in log */
  1352. if (size == 0) {
  1353. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1354. return;
  1355. }
  1356. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1357. size, num_wraps);
  1358. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1359. * i.e the next one that uCode would fill. */
  1360. if (num_wraps)
  1361. iwl3945_print_event_log(priv, next_entry,
  1362. capacity - next_entry, mode);
  1363. /* (then/else) start at top of log */
  1364. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1365. }
  1366. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1367. {
  1368. u32 inta, handled = 0;
  1369. u32 inta_fh;
  1370. unsigned long flags;
  1371. #ifdef CONFIG_IWLWIFI_DEBUG
  1372. u32 inta_mask;
  1373. #endif
  1374. spin_lock_irqsave(&priv->lock, flags);
  1375. /* Ack/clear/reset pending uCode interrupts.
  1376. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1377. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1378. inta = iwl_read32(priv, CSR_INT);
  1379. iwl_write32(priv, CSR_INT, inta);
  1380. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1381. * Any new interrupts that happen after this, either while we're
  1382. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1383. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1384. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1385. #ifdef CONFIG_IWLWIFI_DEBUG
  1386. if (iwl_debug_level & IWL_DL_ISR) {
  1387. /* just for debug */
  1388. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1389. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1390. inta, inta_mask, inta_fh);
  1391. }
  1392. #endif
  1393. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1394. * atomic, make sure that inta covers all the interrupts that
  1395. * we've discovered, even if FH interrupt came in just after
  1396. * reading CSR_INT. */
  1397. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1398. inta |= CSR_INT_BIT_FH_RX;
  1399. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1400. inta |= CSR_INT_BIT_FH_TX;
  1401. /* Now service all interrupt bits discovered above. */
  1402. if (inta & CSR_INT_BIT_HW_ERR) {
  1403. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1404. /* Tell the device to stop sending interrupts */
  1405. iwl_disable_interrupts(priv);
  1406. priv->isr_stats.hw++;
  1407. iwl_irq_handle_error(priv);
  1408. handled |= CSR_INT_BIT_HW_ERR;
  1409. spin_unlock_irqrestore(&priv->lock, flags);
  1410. return;
  1411. }
  1412. #ifdef CONFIG_IWLWIFI_DEBUG
  1413. if (iwl_debug_level & (IWL_DL_ISR)) {
  1414. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1415. if (inta & CSR_INT_BIT_SCD) {
  1416. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1417. "the frame/frames.\n");
  1418. priv->isr_stats.sch++;
  1419. }
  1420. /* Alive notification via Rx interrupt will do the real work */
  1421. if (inta & CSR_INT_BIT_ALIVE) {
  1422. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1423. priv->isr_stats.alive++;
  1424. }
  1425. }
  1426. #endif
  1427. /* Safely ignore these bits for debug checks below */
  1428. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1429. /* Error detected by uCode */
  1430. if (inta & CSR_INT_BIT_SW_ERR) {
  1431. IWL_ERR(priv, "Microcode SW error detected. "
  1432. "Restarting 0x%X.\n", inta);
  1433. priv->isr_stats.sw++;
  1434. priv->isr_stats.sw_err = inta;
  1435. iwl_irq_handle_error(priv);
  1436. handled |= CSR_INT_BIT_SW_ERR;
  1437. }
  1438. /* uCode wakes up after power-down sleep */
  1439. if (inta & CSR_INT_BIT_WAKEUP) {
  1440. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1441. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1442. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1443. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1444. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1445. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1446. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1447. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1448. priv->isr_stats.wakeup++;
  1449. handled |= CSR_INT_BIT_WAKEUP;
  1450. }
  1451. /* All uCode command responses, including Tx command responses,
  1452. * Rx "responses" (frame-received notification), and other
  1453. * notifications from uCode come through here*/
  1454. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1455. iwl3945_rx_handle(priv);
  1456. priv->isr_stats.rx++;
  1457. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1458. }
  1459. if (inta & CSR_INT_BIT_FH_TX) {
  1460. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1461. priv->isr_stats.tx++;
  1462. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1463. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1464. (FH39_SRVC_CHNL), 0x0);
  1465. handled |= CSR_INT_BIT_FH_TX;
  1466. }
  1467. if (inta & ~handled) {
  1468. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1469. priv->isr_stats.unhandled++;
  1470. }
  1471. if (inta & ~priv->inta_mask) {
  1472. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1473. inta & ~priv->inta_mask);
  1474. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1475. }
  1476. /* Re-enable all interrupts */
  1477. /* only Re-enable if disabled by irq */
  1478. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1479. iwl_enable_interrupts(priv);
  1480. #ifdef CONFIG_IWLWIFI_DEBUG
  1481. if (iwl_debug_level & (IWL_DL_ISR)) {
  1482. inta = iwl_read32(priv, CSR_INT);
  1483. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1484. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1485. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1486. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1487. }
  1488. #endif
  1489. spin_unlock_irqrestore(&priv->lock, flags);
  1490. }
  1491. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1492. enum ieee80211_band band,
  1493. u8 is_active, u8 n_probes,
  1494. struct iwl3945_scan_channel *scan_ch)
  1495. {
  1496. struct ieee80211_channel *chan;
  1497. const struct ieee80211_supported_band *sband;
  1498. const struct iwl_channel_info *ch_info;
  1499. u16 passive_dwell = 0;
  1500. u16 active_dwell = 0;
  1501. int added, i;
  1502. sband = iwl_get_hw_mode(priv, band);
  1503. if (!sband)
  1504. return 0;
  1505. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1506. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1507. if (passive_dwell <= active_dwell)
  1508. passive_dwell = active_dwell + 1;
  1509. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1510. chan = priv->scan_request->channels[i];
  1511. if (chan->band != band)
  1512. continue;
  1513. scan_ch->channel = chan->hw_value;
  1514. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1515. if (!is_channel_valid(ch_info)) {
  1516. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1517. scan_ch->channel);
  1518. continue;
  1519. }
  1520. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1521. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1522. /* If passive , set up for auto-switch
  1523. * and use long active_dwell time.
  1524. */
  1525. if (!is_active || is_channel_passive(ch_info) ||
  1526. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1527. scan_ch->type = 0; /* passive */
  1528. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1529. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1530. } else {
  1531. scan_ch->type = 1; /* active */
  1532. }
  1533. /* Set direct probe bits. These may be used both for active
  1534. * scan channels (probes gets sent right away),
  1535. * or for passive channels (probes get se sent only after
  1536. * hearing clear Rx packet).*/
  1537. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1538. if (n_probes)
  1539. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1540. } else {
  1541. /* uCode v1 does not allow setting direct probe bits on
  1542. * passive channel. */
  1543. if ((scan_ch->type & 1) && n_probes)
  1544. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1545. }
  1546. /* Set txpower levels to defaults */
  1547. scan_ch->tpc.dsp_atten = 110;
  1548. /* scan_pwr_info->tpc.dsp_atten; */
  1549. /*scan_pwr_info->tpc.tx_gain; */
  1550. if (band == IEEE80211_BAND_5GHZ)
  1551. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1552. else {
  1553. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1554. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1555. * power level:
  1556. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1557. */
  1558. }
  1559. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1560. scan_ch->channel,
  1561. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1562. (scan_ch->type & 1) ?
  1563. active_dwell : passive_dwell);
  1564. scan_ch++;
  1565. added++;
  1566. }
  1567. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1568. return added;
  1569. }
  1570. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1571. struct ieee80211_rate *rates)
  1572. {
  1573. int i;
  1574. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1575. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1576. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1577. rates[i].hw_value_short = i;
  1578. rates[i].flags = 0;
  1579. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1580. /*
  1581. * If CCK != 1M then set short preamble rate flag.
  1582. */
  1583. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1584. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1585. }
  1586. }
  1587. }
  1588. /******************************************************************************
  1589. *
  1590. * uCode download functions
  1591. *
  1592. ******************************************************************************/
  1593. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1594. {
  1595. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1596. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1597. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1598. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1599. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1600. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1601. }
  1602. /**
  1603. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1604. * looking at all data.
  1605. */
  1606. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1607. {
  1608. u32 val;
  1609. u32 save_len = len;
  1610. int rc = 0;
  1611. u32 errcnt;
  1612. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1613. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1614. IWL39_RTC_INST_LOWER_BOUND);
  1615. errcnt = 0;
  1616. for (; len > 0; len -= sizeof(u32), image++) {
  1617. /* read data comes through single port, auto-incr addr */
  1618. /* NOTE: Use the debugless read so we don't flood kernel log
  1619. * if IWL_DL_IO is set */
  1620. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1621. if (val != le32_to_cpu(*image)) {
  1622. IWL_ERR(priv, "uCode INST section is invalid at "
  1623. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1624. save_len - len, val, le32_to_cpu(*image));
  1625. rc = -EIO;
  1626. errcnt++;
  1627. if (errcnt >= 20)
  1628. break;
  1629. }
  1630. }
  1631. if (!errcnt)
  1632. IWL_DEBUG_INFO(priv,
  1633. "ucode image in INSTRUCTION memory is good\n");
  1634. return rc;
  1635. }
  1636. /**
  1637. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1638. * using sample data 100 bytes apart. If these sample points are good,
  1639. * it's a pretty good bet that everything between them is good, too.
  1640. */
  1641. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1642. {
  1643. u32 val;
  1644. int rc = 0;
  1645. u32 errcnt = 0;
  1646. u32 i;
  1647. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1648. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1649. /* read data comes through single port, auto-incr addr */
  1650. /* NOTE: Use the debugless read so we don't flood kernel log
  1651. * if IWL_DL_IO is set */
  1652. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1653. i + IWL39_RTC_INST_LOWER_BOUND);
  1654. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1655. if (val != le32_to_cpu(*image)) {
  1656. #if 0 /* Enable this if you want to see details */
  1657. IWL_ERR(priv, "uCode INST section is invalid at "
  1658. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1659. i, val, *image);
  1660. #endif
  1661. rc = -EIO;
  1662. errcnt++;
  1663. if (errcnt >= 3)
  1664. break;
  1665. }
  1666. }
  1667. return rc;
  1668. }
  1669. /**
  1670. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1671. * and verify its contents
  1672. */
  1673. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1674. {
  1675. __le32 *image;
  1676. u32 len;
  1677. int rc = 0;
  1678. /* Try bootstrap */
  1679. image = (__le32 *)priv->ucode_boot.v_addr;
  1680. len = priv->ucode_boot.len;
  1681. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1682. if (rc == 0) {
  1683. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1684. return 0;
  1685. }
  1686. /* Try initialize */
  1687. image = (__le32 *)priv->ucode_init.v_addr;
  1688. len = priv->ucode_init.len;
  1689. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1690. if (rc == 0) {
  1691. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1692. return 0;
  1693. }
  1694. /* Try runtime/protocol */
  1695. image = (__le32 *)priv->ucode_code.v_addr;
  1696. len = priv->ucode_code.len;
  1697. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1698. if (rc == 0) {
  1699. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1700. return 0;
  1701. }
  1702. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1703. /* Since nothing seems to match, show first several data entries in
  1704. * instruction SRAM, so maybe visual inspection will give a clue.
  1705. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1706. image = (__le32 *)priv->ucode_boot.v_addr;
  1707. len = priv->ucode_boot.len;
  1708. rc = iwl3945_verify_inst_full(priv, image, len);
  1709. return rc;
  1710. }
  1711. static void iwl3945_nic_start(struct iwl_priv *priv)
  1712. {
  1713. /* Remove all resets to allow NIC to operate */
  1714. iwl_write32(priv, CSR_RESET, 0);
  1715. }
  1716. /**
  1717. * iwl3945_read_ucode - Read uCode images from disk file.
  1718. *
  1719. * Copy into buffers for card to fetch via bus-mastering
  1720. */
  1721. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1722. {
  1723. const struct iwl_ucode_header *ucode;
  1724. int ret = -EINVAL, index;
  1725. const struct firmware *ucode_raw;
  1726. /* firmware file name contains uCode/driver compatibility version */
  1727. const char *name_pre = priv->cfg->fw_name_pre;
  1728. const unsigned int api_max = priv->cfg->ucode_api_max;
  1729. const unsigned int api_min = priv->cfg->ucode_api_min;
  1730. char buf[25];
  1731. u8 *src;
  1732. size_t len;
  1733. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1734. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1735. * request_firmware() is synchronous, file is in memory on return. */
  1736. for (index = api_max; index >= api_min; index--) {
  1737. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1738. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1739. if (ret < 0) {
  1740. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1741. buf, ret);
  1742. if (ret == -ENOENT)
  1743. continue;
  1744. else
  1745. goto error;
  1746. } else {
  1747. if (index < api_max)
  1748. IWL_ERR(priv, "Loaded firmware %s, "
  1749. "which is deprecated. "
  1750. " Please use API v%u instead.\n",
  1751. buf, api_max);
  1752. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1753. "(%zd bytes) from disk\n",
  1754. buf, ucode_raw->size);
  1755. break;
  1756. }
  1757. }
  1758. if (ret < 0)
  1759. goto error;
  1760. /* Make sure that we got at least our header! */
  1761. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1762. IWL_ERR(priv, "File size way too small!\n");
  1763. ret = -EINVAL;
  1764. goto err_release;
  1765. }
  1766. /* Data from ucode file: header followed by uCode images */
  1767. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1768. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1769. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1770. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1771. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1772. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1773. init_data_size =
  1774. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1775. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1776. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1777. /* api_ver should match the api version forming part of the
  1778. * firmware filename ... but we don't check for that and only rely
  1779. * on the API version read from firmware header from here on forward */
  1780. if (api_ver < api_min || api_ver > api_max) {
  1781. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1782. "Driver supports v%u, firmware is v%u.\n",
  1783. api_max, api_ver);
  1784. priv->ucode_ver = 0;
  1785. ret = -EINVAL;
  1786. goto err_release;
  1787. }
  1788. if (api_ver != api_max)
  1789. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1790. "got %u. New firmware can be obtained "
  1791. "from http://www.intellinuxwireless.org.\n",
  1792. api_max, api_ver);
  1793. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1794. IWL_UCODE_MAJOR(priv->ucode_ver),
  1795. IWL_UCODE_MINOR(priv->ucode_ver),
  1796. IWL_UCODE_API(priv->ucode_ver),
  1797. IWL_UCODE_SERIAL(priv->ucode_ver));
  1798. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1799. priv->ucode_ver);
  1800. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1801. inst_size);
  1802. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1803. data_size);
  1804. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1805. init_size);
  1806. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1807. init_data_size);
  1808. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1809. boot_size);
  1810. /* Verify size of file vs. image size info in file's header */
  1811. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1812. inst_size + data_size + init_size +
  1813. init_data_size + boot_size) {
  1814. IWL_DEBUG_INFO(priv,
  1815. "uCode file size %zd does not match expected size\n",
  1816. ucode_raw->size);
  1817. ret = -EINVAL;
  1818. goto err_release;
  1819. }
  1820. /* Verify that uCode images will fit in card's SRAM */
  1821. if (inst_size > IWL39_MAX_INST_SIZE) {
  1822. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1823. inst_size);
  1824. ret = -EINVAL;
  1825. goto err_release;
  1826. }
  1827. if (data_size > IWL39_MAX_DATA_SIZE) {
  1828. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1829. data_size);
  1830. ret = -EINVAL;
  1831. goto err_release;
  1832. }
  1833. if (init_size > IWL39_MAX_INST_SIZE) {
  1834. IWL_DEBUG_INFO(priv,
  1835. "uCode init instr len %d too large to fit in\n",
  1836. init_size);
  1837. ret = -EINVAL;
  1838. goto err_release;
  1839. }
  1840. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1841. IWL_DEBUG_INFO(priv,
  1842. "uCode init data len %d too large to fit in\n",
  1843. init_data_size);
  1844. ret = -EINVAL;
  1845. goto err_release;
  1846. }
  1847. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1848. IWL_DEBUG_INFO(priv,
  1849. "uCode boot instr len %d too large to fit in\n",
  1850. boot_size);
  1851. ret = -EINVAL;
  1852. goto err_release;
  1853. }
  1854. /* Allocate ucode buffers for card's bus-master loading ... */
  1855. /* Runtime instructions and 2 copies of data:
  1856. * 1) unmodified from disk
  1857. * 2) backup cache for save/restore during power-downs */
  1858. priv->ucode_code.len = inst_size;
  1859. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1860. priv->ucode_data.len = data_size;
  1861. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1862. priv->ucode_data_backup.len = data_size;
  1863. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1864. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1865. !priv->ucode_data_backup.v_addr)
  1866. goto err_pci_alloc;
  1867. /* Initialization instructions and data */
  1868. if (init_size && init_data_size) {
  1869. priv->ucode_init.len = init_size;
  1870. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1871. priv->ucode_init_data.len = init_data_size;
  1872. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1873. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1874. goto err_pci_alloc;
  1875. }
  1876. /* Bootstrap (instructions only, no data) */
  1877. if (boot_size) {
  1878. priv->ucode_boot.len = boot_size;
  1879. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1880. if (!priv->ucode_boot.v_addr)
  1881. goto err_pci_alloc;
  1882. }
  1883. /* Copy images into buffers for card's bus-master reads ... */
  1884. /* Runtime instructions (first block of data in file) */
  1885. len = inst_size;
  1886. IWL_DEBUG_INFO(priv,
  1887. "Copying (but not loading) uCode instr len %zd\n", len);
  1888. memcpy(priv->ucode_code.v_addr, src, len);
  1889. src += len;
  1890. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1891. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1892. /* Runtime data (2nd block)
  1893. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1894. len = data_size;
  1895. IWL_DEBUG_INFO(priv,
  1896. "Copying (but not loading) uCode data len %zd\n", len);
  1897. memcpy(priv->ucode_data.v_addr, src, len);
  1898. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1899. src += len;
  1900. /* Initialization instructions (3rd block) */
  1901. if (init_size) {
  1902. len = init_size;
  1903. IWL_DEBUG_INFO(priv,
  1904. "Copying (but not loading) init instr len %zd\n", len);
  1905. memcpy(priv->ucode_init.v_addr, src, len);
  1906. src += len;
  1907. }
  1908. /* Initialization data (4th block) */
  1909. if (init_data_size) {
  1910. len = init_data_size;
  1911. IWL_DEBUG_INFO(priv,
  1912. "Copying (but not loading) init data len %zd\n", len);
  1913. memcpy(priv->ucode_init_data.v_addr, src, len);
  1914. src += len;
  1915. }
  1916. /* Bootstrap instructions (5th block) */
  1917. len = boot_size;
  1918. IWL_DEBUG_INFO(priv,
  1919. "Copying (but not loading) boot instr len %zd\n", len);
  1920. memcpy(priv->ucode_boot.v_addr, src, len);
  1921. /* We have our copies now, allow OS release its copies */
  1922. release_firmware(ucode_raw);
  1923. return 0;
  1924. err_pci_alloc:
  1925. IWL_ERR(priv, "failed to allocate pci memory\n");
  1926. ret = -ENOMEM;
  1927. iwl3945_dealloc_ucode_pci(priv);
  1928. err_release:
  1929. release_firmware(ucode_raw);
  1930. error:
  1931. return ret;
  1932. }
  1933. /**
  1934. * iwl3945_set_ucode_ptrs - Set uCode address location
  1935. *
  1936. * Tell initialization uCode where to find runtime uCode.
  1937. *
  1938. * BSM registers initially contain pointers to initialization uCode.
  1939. * We need to replace them to load runtime uCode inst and data,
  1940. * and to save runtime data when powering down.
  1941. */
  1942. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1943. {
  1944. dma_addr_t pinst;
  1945. dma_addr_t pdata;
  1946. /* bits 31:0 for 3945 */
  1947. pinst = priv->ucode_code.p_addr;
  1948. pdata = priv->ucode_data_backup.p_addr;
  1949. /* Tell bootstrap uCode where to find image to load */
  1950. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  1951. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  1952. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  1953. priv->ucode_data.len);
  1954. /* Inst byte count must be last to set up, bit 31 signals uCode
  1955. * that all new ptr/size info is in place */
  1956. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  1957. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  1958. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  1959. return 0;
  1960. }
  1961. /**
  1962. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  1963. *
  1964. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  1965. *
  1966. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1967. */
  1968. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  1969. {
  1970. /* Check alive response for "valid" sign from uCode */
  1971. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  1972. /* We had an error bringing up the hardware, so take it
  1973. * all the way back down so we can try again */
  1974. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  1975. goto restart;
  1976. }
  1977. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1978. * This is a paranoid check, because we would not have gotten the
  1979. * "initialize" alive if code weren't properly loaded. */
  1980. if (iwl3945_verify_ucode(priv)) {
  1981. /* Runtime instruction load was bad;
  1982. * take it all the way back down so we can try again */
  1983. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  1984. goto restart;
  1985. }
  1986. /* Send pointers to protocol/runtime uCode image ... init code will
  1987. * load and launch runtime uCode, which will send us another "Alive"
  1988. * notification. */
  1989. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  1990. if (iwl3945_set_ucode_ptrs(priv)) {
  1991. /* Runtime instruction load won't happen;
  1992. * take it all the way back down so we can try again */
  1993. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  1994. goto restart;
  1995. }
  1996. return;
  1997. restart:
  1998. queue_work(priv->workqueue, &priv->restart);
  1999. }
  2000. /**
  2001. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2002. * from protocol/runtime uCode (initialization uCode's
  2003. * Alive gets handled by iwl3945_init_alive_start()).
  2004. */
  2005. static void iwl3945_alive_start(struct iwl_priv *priv)
  2006. {
  2007. int thermal_spin = 0;
  2008. u32 rfkill;
  2009. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2010. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2011. /* We had an error bringing up the hardware, so take it
  2012. * all the way back down so we can try again */
  2013. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2014. goto restart;
  2015. }
  2016. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2017. * This is a paranoid check, because we would not have gotten the
  2018. * "runtime" alive if code weren't properly loaded. */
  2019. if (iwl3945_verify_ucode(priv)) {
  2020. /* Runtime instruction load was bad;
  2021. * take it all the way back down so we can try again */
  2022. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2023. goto restart;
  2024. }
  2025. iwl_clear_stations_table(priv);
  2026. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2027. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2028. if (rfkill & 0x1) {
  2029. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2030. /* if RFKILL is not on, then wait for thermal
  2031. * sensor in adapter to kick in */
  2032. while (iwl3945_hw_get_temperature(priv) == 0) {
  2033. thermal_spin++;
  2034. udelay(10);
  2035. }
  2036. if (thermal_spin)
  2037. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2038. thermal_spin * 10);
  2039. } else
  2040. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2041. /* After the ALIVE response, we can send commands to 3945 uCode */
  2042. set_bit(STATUS_ALIVE, &priv->status);
  2043. if (iwl_is_rfkill(priv))
  2044. return;
  2045. ieee80211_wake_queues(priv->hw);
  2046. priv->active_rate = priv->rates_mask;
  2047. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2048. iwl_power_update_mode(priv, false);
  2049. if (iwl_is_associated(priv)) {
  2050. struct iwl3945_rxon_cmd *active_rxon =
  2051. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2052. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2053. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2054. } else {
  2055. /* Initialize our rx_config data */
  2056. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2057. }
  2058. /* Configure Bluetooth device coexistence support */
  2059. iwl_send_bt_config(priv);
  2060. /* Configure the adapter for unassociated operation */
  2061. iwlcore_commit_rxon(priv);
  2062. iwl3945_reg_txpower_periodic(priv);
  2063. iwl3945_led_register(priv);
  2064. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2065. set_bit(STATUS_READY, &priv->status);
  2066. wake_up_interruptible(&priv->wait_command_queue);
  2067. /* reassociate for ADHOC mode */
  2068. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2069. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2070. priv->vif);
  2071. if (beacon)
  2072. iwl_mac_beacon_update(priv->hw, beacon);
  2073. }
  2074. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2075. iwl_set_mode(priv, priv->iw_mode);
  2076. return;
  2077. restart:
  2078. queue_work(priv->workqueue, &priv->restart);
  2079. }
  2080. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2081. static void __iwl3945_down(struct iwl_priv *priv)
  2082. {
  2083. unsigned long flags;
  2084. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2085. struct ieee80211_conf *conf = NULL;
  2086. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2087. conf = ieee80211_get_hw_conf(priv->hw);
  2088. if (!exit_pending)
  2089. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2090. iwl3945_led_unregister(priv);
  2091. iwl_clear_stations_table(priv);
  2092. /* Unblock any waiting calls */
  2093. wake_up_interruptible_all(&priv->wait_command_queue);
  2094. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2095. * exiting the module */
  2096. if (!exit_pending)
  2097. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2098. /* stop and reset the on-board processor */
  2099. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2100. /* tell the device to stop sending interrupts */
  2101. spin_lock_irqsave(&priv->lock, flags);
  2102. iwl_disable_interrupts(priv);
  2103. spin_unlock_irqrestore(&priv->lock, flags);
  2104. iwl_synchronize_irq(priv);
  2105. if (priv->mac80211_registered)
  2106. ieee80211_stop_queues(priv->hw);
  2107. /* If we have not previously called iwl3945_init() then
  2108. * clear all bits but the RF Kill bits and return */
  2109. if (!iwl_is_init(priv)) {
  2110. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2111. STATUS_RF_KILL_HW |
  2112. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2113. STATUS_GEO_CONFIGURED |
  2114. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2115. STATUS_EXIT_PENDING;
  2116. goto exit;
  2117. }
  2118. /* ...otherwise clear out all the status bits but the RF Kill
  2119. * bit and continue taking the NIC down. */
  2120. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2121. STATUS_RF_KILL_HW |
  2122. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2123. STATUS_GEO_CONFIGURED |
  2124. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2125. STATUS_FW_ERROR |
  2126. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2127. STATUS_EXIT_PENDING;
  2128. priv->cfg->ops->lib->apm_ops.reset(priv);
  2129. spin_lock_irqsave(&priv->lock, flags);
  2130. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2131. spin_unlock_irqrestore(&priv->lock, flags);
  2132. iwl3945_hw_txq_ctx_stop(priv);
  2133. iwl3945_hw_rxq_stop(priv);
  2134. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2135. APMG_CLK_VAL_DMA_CLK_RQT);
  2136. udelay(5);
  2137. if (exit_pending)
  2138. priv->cfg->ops->lib->apm_ops.stop(priv);
  2139. else
  2140. priv->cfg->ops->lib->apm_ops.reset(priv);
  2141. exit:
  2142. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2143. if (priv->ibss_beacon)
  2144. dev_kfree_skb(priv->ibss_beacon);
  2145. priv->ibss_beacon = NULL;
  2146. /* clear out any free frames */
  2147. iwl3945_clear_free_frames(priv);
  2148. }
  2149. static void iwl3945_down(struct iwl_priv *priv)
  2150. {
  2151. mutex_lock(&priv->mutex);
  2152. __iwl3945_down(priv);
  2153. mutex_unlock(&priv->mutex);
  2154. iwl3945_cancel_deferred_work(priv);
  2155. }
  2156. #define MAX_HW_RESTARTS 5
  2157. static int __iwl3945_up(struct iwl_priv *priv)
  2158. {
  2159. int rc, i;
  2160. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2161. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2162. return -EIO;
  2163. }
  2164. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2165. IWL_ERR(priv, "ucode not available for device bring up\n");
  2166. return -EIO;
  2167. }
  2168. /* If platform's RF_KILL switch is NOT set to KILL */
  2169. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2170. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2171. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2172. else {
  2173. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2174. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2175. return -ENODEV;
  2176. }
  2177. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2178. rc = iwl3945_hw_nic_init(priv);
  2179. if (rc) {
  2180. IWL_ERR(priv, "Unable to int nic\n");
  2181. return rc;
  2182. }
  2183. /* make sure rfkill handshake bits are cleared */
  2184. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2185. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2186. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2187. /* clear (again), then enable host interrupts */
  2188. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2189. iwl_enable_interrupts(priv);
  2190. /* really make sure rfkill handshake bits are cleared */
  2191. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2192. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2193. /* Copy original ucode data image from disk into backup cache.
  2194. * This will be used to initialize the on-board processor's
  2195. * data SRAM for a clean start when the runtime program first loads. */
  2196. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2197. priv->ucode_data.len);
  2198. /* We return success when we resume from suspend and rf_kill is on. */
  2199. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2200. return 0;
  2201. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2202. iwl_clear_stations_table(priv);
  2203. /* load bootstrap state machine,
  2204. * load bootstrap program into processor's memory,
  2205. * prepare to load the "initialize" uCode */
  2206. priv->cfg->ops->lib->load_ucode(priv);
  2207. if (rc) {
  2208. IWL_ERR(priv,
  2209. "Unable to set up bootstrap uCode: %d\n", rc);
  2210. continue;
  2211. }
  2212. /* start card; "initialize" will load runtime ucode */
  2213. iwl3945_nic_start(priv);
  2214. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2215. return 0;
  2216. }
  2217. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2218. __iwl3945_down(priv);
  2219. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2220. /* tried to restart and config the device for as long as our
  2221. * patience could withstand */
  2222. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2223. return -EIO;
  2224. }
  2225. /*****************************************************************************
  2226. *
  2227. * Workqueue callbacks
  2228. *
  2229. *****************************************************************************/
  2230. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2231. {
  2232. struct iwl_priv *priv =
  2233. container_of(data, struct iwl_priv, init_alive_start.work);
  2234. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2235. return;
  2236. mutex_lock(&priv->mutex);
  2237. iwl3945_init_alive_start(priv);
  2238. mutex_unlock(&priv->mutex);
  2239. }
  2240. static void iwl3945_bg_alive_start(struct work_struct *data)
  2241. {
  2242. struct iwl_priv *priv =
  2243. container_of(data, struct iwl_priv, alive_start.work);
  2244. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2245. return;
  2246. mutex_lock(&priv->mutex);
  2247. iwl3945_alive_start(priv);
  2248. mutex_unlock(&priv->mutex);
  2249. }
  2250. static void iwl3945_rfkill_poll(struct work_struct *data)
  2251. {
  2252. struct iwl_priv *priv =
  2253. container_of(data, struct iwl_priv, rfkill_poll.work);
  2254. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2255. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2256. else
  2257. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2258. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  2259. test_bit(STATUS_RF_KILL_HW, &priv->status));
  2260. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2261. round_jiffies_relative(2 * HZ));
  2262. }
  2263. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2264. static void iwl3945_bg_request_scan(struct work_struct *data)
  2265. {
  2266. struct iwl_priv *priv =
  2267. container_of(data, struct iwl_priv, request_scan);
  2268. struct iwl_host_cmd cmd = {
  2269. .id = REPLY_SCAN_CMD,
  2270. .len = sizeof(struct iwl3945_scan_cmd),
  2271. .flags = CMD_SIZE_HUGE,
  2272. };
  2273. int rc = 0;
  2274. struct iwl3945_scan_cmd *scan;
  2275. struct ieee80211_conf *conf = NULL;
  2276. u8 n_probes = 0;
  2277. enum ieee80211_band band;
  2278. bool is_active = false;
  2279. conf = ieee80211_get_hw_conf(priv->hw);
  2280. mutex_lock(&priv->mutex);
  2281. cancel_delayed_work(&priv->scan_check);
  2282. if (!iwl_is_ready(priv)) {
  2283. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2284. goto done;
  2285. }
  2286. /* Make sure the scan wasn't canceled before this queued work
  2287. * was given the chance to run... */
  2288. if (!test_bit(STATUS_SCANNING, &priv->status))
  2289. goto done;
  2290. /* This should never be called or scheduled if there is currently
  2291. * a scan active in the hardware. */
  2292. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2293. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2294. "Ignoring second request.\n");
  2295. rc = -EIO;
  2296. goto done;
  2297. }
  2298. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2299. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2300. goto done;
  2301. }
  2302. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2303. IWL_DEBUG_HC(priv,
  2304. "Scan request while abort pending. Queuing.\n");
  2305. goto done;
  2306. }
  2307. if (iwl_is_rfkill(priv)) {
  2308. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2309. goto done;
  2310. }
  2311. if (!test_bit(STATUS_READY, &priv->status)) {
  2312. IWL_DEBUG_HC(priv,
  2313. "Scan request while uninitialized. Queuing.\n");
  2314. goto done;
  2315. }
  2316. if (!priv->scan_bands) {
  2317. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2318. goto done;
  2319. }
  2320. if (!priv->scan) {
  2321. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2322. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2323. if (!priv->scan) {
  2324. rc = -ENOMEM;
  2325. goto done;
  2326. }
  2327. }
  2328. scan = priv->scan;
  2329. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2330. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2331. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2332. if (iwl_is_associated(priv)) {
  2333. u16 interval = 0;
  2334. u32 extra;
  2335. u32 suspend_time = 100;
  2336. u32 scan_suspend_time = 100;
  2337. unsigned long flags;
  2338. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2339. spin_lock_irqsave(&priv->lock, flags);
  2340. interval = priv->beacon_int;
  2341. spin_unlock_irqrestore(&priv->lock, flags);
  2342. scan->suspend_time = 0;
  2343. scan->max_out_time = cpu_to_le32(200 * 1024);
  2344. if (!interval)
  2345. interval = suspend_time;
  2346. /*
  2347. * suspend time format:
  2348. * 0-19: beacon interval in usec (time before exec.)
  2349. * 20-23: 0
  2350. * 24-31: number of beacons (suspend between channels)
  2351. */
  2352. extra = (suspend_time / interval) << 24;
  2353. scan_suspend_time = 0xFF0FFFFF &
  2354. (extra | ((suspend_time % interval) * 1024));
  2355. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2356. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2357. scan_suspend_time, interval);
  2358. }
  2359. if (priv->scan_request->n_ssids) {
  2360. int i, p = 0;
  2361. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2362. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2363. /* always does wildcard anyway */
  2364. if (!priv->scan_request->ssids[i].ssid_len)
  2365. continue;
  2366. scan->direct_scan[p].id = WLAN_EID_SSID;
  2367. scan->direct_scan[p].len =
  2368. priv->scan_request->ssids[i].ssid_len;
  2369. memcpy(scan->direct_scan[p].ssid,
  2370. priv->scan_request->ssids[i].ssid,
  2371. priv->scan_request->ssids[i].ssid_len);
  2372. n_probes++;
  2373. p++;
  2374. }
  2375. is_active = true;
  2376. } else
  2377. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2378. /* We don't build a direct scan probe request; the uCode will do
  2379. * that based on the direct_mask added to each channel entry */
  2380. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2381. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2382. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2383. /* flags + rate selection */
  2384. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2385. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2386. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2387. scan->good_CRC_th = 0;
  2388. band = IEEE80211_BAND_2GHZ;
  2389. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2390. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2391. /*
  2392. * If active scaning is requested but a certain channel
  2393. * is marked passive, we can do active scanning if we
  2394. * detect transmissions.
  2395. */
  2396. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2397. band = IEEE80211_BAND_5GHZ;
  2398. } else {
  2399. IWL_WARN(priv, "Invalid scan band count\n");
  2400. goto done;
  2401. }
  2402. scan->tx_cmd.len = cpu_to_le16(
  2403. iwl_fill_probe_req(priv,
  2404. (struct ieee80211_mgmt *)scan->data,
  2405. priv->scan_request->ie,
  2406. priv->scan_request->ie_len,
  2407. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2408. /* select Rx antennas */
  2409. scan->flags |= iwl3945_get_antenna_flags(priv);
  2410. if (iwl_is_monitor_mode(priv))
  2411. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2412. scan->channel_count =
  2413. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2414. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2415. if (scan->channel_count == 0) {
  2416. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2417. goto done;
  2418. }
  2419. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2420. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2421. cmd.data = scan;
  2422. scan->len = cpu_to_le16(cmd.len);
  2423. set_bit(STATUS_SCAN_HW, &priv->status);
  2424. rc = iwl_send_cmd_sync(priv, &cmd);
  2425. if (rc)
  2426. goto done;
  2427. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2428. IWL_SCAN_CHECK_WATCHDOG);
  2429. mutex_unlock(&priv->mutex);
  2430. return;
  2431. done:
  2432. /* can not perform scan make sure we clear scanning
  2433. * bits from status so next scan request can be performed.
  2434. * if we dont clear scanning status bit here all next scan
  2435. * will fail
  2436. */
  2437. clear_bit(STATUS_SCAN_HW, &priv->status);
  2438. clear_bit(STATUS_SCANNING, &priv->status);
  2439. /* inform mac80211 scan aborted */
  2440. queue_work(priv->workqueue, &priv->scan_completed);
  2441. mutex_unlock(&priv->mutex);
  2442. }
  2443. static void iwl3945_bg_up(struct work_struct *data)
  2444. {
  2445. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2446. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2447. return;
  2448. mutex_lock(&priv->mutex);
  2449. __iwl3945_up(priv);
  2450. mutex_unlock(&priv->mutex);
  2451. }
  2452. static void iwl3945_bg_restart(struct work_struct *data)
  2453. {
  2454. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2455. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2456. return;
  2457. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2458. mutex_lock(&priv->mutex);
  2459. priv->vif = NULL;
  2460. priv->is_open = 0;
  2461. mutex_unlock(&priv->mutex);
  2462. iwl3945_down(priv);
  2463. ieee80211_restart_hw(priv->hw);
  2464. } else {
  2465. iwl3945_down(priv);
  2466. queue_work(priv->workqueue, &priv->up);
  2467. }
  2468. }
  2469. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2470. {
  2471. struct iwl_priv *priv =
  2472. container_of(data, struct iwl_priv, rx_replenish);
  2473. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2474. return;
  2475. mutex_lock(&priv->mutex);
  2476. iwl3945_rx_replenish(priv);
  2477. mutex_unlock(&priv->mutex);
  2478. }
  2479. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2480. void iwl3945_post_associate(struct iwl_priv *priv)
  2481. {
  2482. int rc = 0;
  2483. struct ieee80211_conf *conf = NULL;
  2484. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2485. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2486. return;
  2487. }
  2488. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2489. priv->assoc_id, priv->active_rxon.bssid_addr);
  2490. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2491. return;
  2492. if (!priv->vif || !priv->is_open)
  2493. return;
  2494. iwl_scan_cancel_timeout(priv, 200);
  2495. conf = ieee80211_get_hw_conf(priv->hw);
  2496. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2497. iwlcore_commit_rxon(priv);
  2498. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2499. iwl_setup_rxon_timing(priv);
  2500. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2501. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2502. if (rc)
  2503. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2504. "Attempting to continue.\n");
  2505. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2506. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2507. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2508. priv->assoc_id, priv->beacon_int);
  2509. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2510. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2511. else
  2512. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2513. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2514. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2515. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2516. else
  2517. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2518. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2519. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2520. }
  2521. iwlcore_commit_rxon(priv);
  2522. switch (priv->iw_mode) {
  2523. case NL80211_IFTYPE_STATION:
  2524. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2525. break;
  2526. case NL80211_IFTYPE_ADHOC:
  2527. priv->assoc_id = 1;
  2528. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2529. iwl3945_sync_sta(priv, IWL_STA_ID,
  2530. (priv->band == IEEE80211_BAND_5GHZ) ?
  2531. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2532. CMD_ASYNC);
  2533. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2534. iwl3945_send_beacon_cmd(priv);
  2535. break;
  2536. default:
  2537. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2538. __func__, priv->iw_mode);
  2539. break;
  2540. }
  2541. iwl_activate_qos(priv, 0);
  2542. /* we have just associated, don't start scan too early */
  2543. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2544. }
  2545. /*****************************************************************************
  2546. *
  2547. * mac80211 entry point functions
  2548. *
  2549. *****************************************************************************/
  2550. #define UCODE_READY_TIMEOUT (2 * HZ)
  2551. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2552. {
  2553. struct iwl_priv *priv = hw->priv;
  2554. int ret;
  2555. IWL_DEBUG_MAC80211(priv, "enter\n");
  2556. /* we should be verifying the device is ready to be opened */
  2557. mutex_lock(&priv->mutex);
  2558. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2559. * ucode filename and max sizes are card-specific. */
  2560. if (!priv->ucode_code.len) {
  2561. ret = iwl3945_read_ucode(priv);
  2562. if (ret) {
  2563. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2564. mutex_unlock(&priv->mutex);
  2565. goto out_release_irq;
  2566. }
  2567. }
  2568. ret = __iwl3945_up(priv);
  2569. mutex_unlock(&priv->mutex);
  2570. if (ret)
  2571. goto out_release_irq;
  2572. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2573. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2574. * mac80211 will not be run successfully. */
  2575. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2576. test_bit(STATUS_READY, &priv->status),
  2577. UCODE_READY_TIMEOUT);
  2578. if (!ret) {
  2579. if (!test_bit(STATUS_READY, &priv->status)) {
  2580. IWL_ERR(priv,
  2581. "Wait for START_ALIVE timeout after %dms.\n",
  2582. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2583. ret = -ETIMEDOUT;
  2584. goto out_release_irq;
  2585. }
  2586. }
  2587. /* ucode is running and will send rfkill notifications,
  2588. * no need to poll the killswitch state anymore */
  2589. cancel_delayed_work(&priv->rfkill_poll);
  2590. priv->is_open = 1;
  2591. IWL_DEBUG_MAC80211(priv, "leave\n");
  2592. return 0;
  2593. out_release_irq:
  2594. priv->is_open = 0;
  2595. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2596. return ret;
  2597. }
  2598. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2599. {
  2600. struct iwl_priv *priv = hw->priv;
  2601. IWL_DEBUG_MAC80211(priv, "enter\n");
  2602. if (!priv->is_open) {
  2603. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2604. return;
  2605. }
  2606. priv->is_open = 0;
  2607. if (iwl_is_ready_rf(priv)) {
  2608. /* stop mac, cancel any scan request and clear
  2609. * RXON_FILTER_ASSOC_MSK BIT
  2610. */
  2611. mutex_lock(&priv->mutex);
  2612. iwl_scan_cancel_timeout(priv, 100);
  2613. mutex_unlock(&priv->mutex);
  2614. }
  2615. iwl3945_down(priv);
  2616. flush_workqueue(priv->workqueue);
  2617. /* start polling the killswitch state again */
  2618. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2619. round_jiffies_relative(2 * HZ));
  2620. IWL_DEBUG_MAC80211(priv, "leave\n");
  2621. }
  2622. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2623. {
  2624. struct iwl_priv *priv = hw->priv;
  2625. IWL_DEBUG_MAC80211(priv, "enter\n");
  2626. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2627. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2628. if (iwl3945_tx_skb(priv, skb))
  2629. dev_kfree_skb_any(skb);
  2630. IWL_DEBUG_MAC80211(priv, "leave\n");
  2631. return NETDEV_TX_OK;
  2632. }
  2633. void iwl3945_config_ap(struct iwl_priv *priv)
  2634. {
  2635. int rc = 0;
  2636. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2637. return;
  2638. /* The following should be done only at AP bring up */
  2639. if (!(iwl_is_associated(priv))) {
  2640. /* RXON - unassoc (to set timing command) */
  2641. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2642. iwlcore_commit_rxon(priv);
  2643. /* RXON Timing */
  2644. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2645. iwl_setup_rxon_timing(priv);
  2646. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2647. sizeof(priv->rxon_timing),
  2648. &priv->rxon_timing);
  2649. if (rc)
  2650. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2651. "Attempting to continue.\n");
  2652. /* FIXME: what should be the assoc_id for AP? */
  2653. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2654. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2655. priv->staging_rxon.flags |=
  2656. RXON_FLG_SHORT_PREAMBLE_MSK;
  2657. else
  2658. priv->staging_rxon.flags &=
  2659. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2660. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2661. if (priv->assoc_capability &
  2662. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2663. priv->staging_rxon.flags |=
  2664. RXON_FLG_SHORT_SLOT_MSK;
  2665. else
  2666. priv->staging_rxon.flags &=
  2667. ~RXON_FLG_SHORT_SLOT_MSK;
  2668. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2669. priv->staging_rxon.flags &=
  2670. ~RXON_FLG_SHORT_SLOT_MSK;
  2671. }
  2672. /* restore RXON assoc */
  2673. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2674. iwlcore_commit_rxon(priv);
  2675. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2676. }
  2677. iwl3945_send_beacon_cmd(priv);
  2678. /* FIXME - we need to add code here to detect a totally new
  2679. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2680. * clear sta table, add BCAST sta... */
  2681. }
  2682. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2683. struct ieee80211_vif *vif,
  2684. struct ieee80211_sta *sta,
  2685. struct ieee80211_key_conf *key)
  2686. {
  2687. struct iwl_priv *priv = hw->priv;
  2688. const u8 *addr;
  2689. int ret = 0;
  2690. u8 sta_id = IWL_INVALID_STATION;
  2691. u8 static_key;
  2692. IWL_DEBUG_MAC80211(priv, "enter\n");
  2693. if (iwl3945_mod_params.sw_crypto) {
  2694. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2695. return -EOPNOTSUPP;
  2696. }
  2697. addr = sta ? sta->addr : iwl_bcast_addr;
  2698. static_key = !iwl_is_associated(priv);
  2699. if (!static_key) {
  2700. sta_id = iwl_find_station(priv, addr);
  2701. if (sta_id == IWL_INVALID_STATION) {
  2702. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2703. addr);
  2704. return -EINVAL;
  2705. }
  2706. }
  2707. mutex_lock(&priv->mutex);
  2708. iwl_scan_cancel_timeout(priv, 100);
  2709. mutex_unlock(&priv->mutex);
  2710. switch (cmd) {
  2711. case SET_KEY:
  2712. if (static_key)
  2713. ret = iwl3945_set_static_key(priv, key);
  2714. else
  2715. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2716. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2717. break;
  2718. case DISABLE_KEY:
  2719. if (static_key)
  2720. ret = iwl3945_remove_static_key(priv);
  2721. else
  2722. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2723. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2724. break;
  2725. default:
  2726. ret = -EINVAL;
  2727. }
  2728. IWL_DEBUG_MAC80211(priv, "leave\n");
  2729. return ret;
  2730. }
  2731. /*****************************************************************************
  2732. *
  2733. * sysfs attributes
  2734. *
  2735. *****************************************************************************/
  2736. #ifdef CONFIG_IWLWIFI_DEBUG
  2737. /*
  2738. * The following adds a new attribute to the sysfs representation
  2739. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2740. * used for controlling the debug level.
  2741. *
  2742. * See the level definitions in iwl for details.
  2743. *
  2744. * FIXME This file can be deprecated as the module parameter is
  2745. * writable and users can thus also change the debug level
  2746. * using the /sys/module/iwl3945/parameters/debug file.
  2747. */
  2748. static ssize_t show_debug_level(struct device *d,
  2749. struct device_attribute *attr, char *buf)
  2750. {
  2751. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  2752. }
  2753. static ssize_t store_debug_level(struct device *d,
  2754. struct device_attribute *attr,
  2755. const char *buf, size_t count)
  2756. {
  2757. struct iwl_priv *priv = dev_get_drvdata(d);
  2758. unsigned long val;
  2759. int ret;
  2760. ret = strict_strtoul(buf, 0, &val);
  2761. if (ret)
  2762. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2763. else
  2764. iwl_debug_level = val;
  2765. return strnlen(buf, count);
  2766. }
  2767. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2768. show_debug_level, store_debug_level);
  2769. #endif /* CONFIG_IWLWIFI_DEBUG */
  2770. static ssize_t show_temperature(struct device *d,
  2771. struct device_attribute *attr, char *buf)
  2772. {
  2773. struct iwl_priv *priv = dev_get_drvdata(d);
  2774. if (!iwl_is_alive(priv))
  2775. return -EAGAIN;
  2776. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2777. }
  2778. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2779. static ssize_t show_tx_power(struct device *d,
  2780. struct device_attribute *attr, char *buf)
  2781. {
  2782. struct iwl_priv *priv = dev_get_drvdata(d);
  2783. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2784. }
  2785. static ssize_t store_tx_power(struct device *d,
  2786. struct device_attribute *attr,
  2787. const char *buf, size_t count)
  2788. {
  2789. struct iwl_priv *priv = dev_get_drvdata(d);
  2790. char *p = (char *)buf;
  2791. u32 val;
  2792. val = simple_strtoul(p, &p, 10);
  2793. if (p == buf)
  2794. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2795. else
  2796. iwl3945_hw_reg_set_txpower(priv, val);
  2797. return count;
  2798. }
  2799. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2800. static ssize_t show_flags(struct device *d,
  2801. struct device_attribute *attr, char *buf)
  2802. {
  2803. struct iwl_priv *priv = dev_get_drvdata(d);
  2804. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2805. }
  2806. static ssize_t store_flags(struct device *d,
  2807. struct device_attribute *attr,
  2808. const char *buf, size_t count)
  2809. {
  2810. struct iwl_priv *priv = dev_get_drvdata(d);
  2811. u32 flags = simple_strtoul(buf, NULL, 0);
  2812. mutex_lock(&priv->mutex);
  2813. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2814. /* Cancel any currently running scans... */
  2815. if (iwl_scan_cancel_timeout(priv, 100))
  2816. IWL_WARN(priv, "Could not cancel scan.\n");
  2817. else {
  2818. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2819. flags);
  2820. priv->staging_rxon.flags = cpu_to_le32(flags);
  2821. iwlcore_commit_rxon(priv);
  2822. }
  2823. }
  2824. mutex_unlock(&priv->mutex);
  2825. return count;
  2826. }
  2827. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2828. static ssize_t show_filter_flags(struct device *d,
  2829. struct device_attribute *attr, char *buf)
  2830. {
  2831. struct iwl_priv *priv = dev_get_drvdata(d);
  2832. return sprintf(buf, "0x%04X\n",
  2833. le32_to_cpu(priv->active_rxon.filter_flags));
  2834. }
  2835. static ssize_t store_filter_flags(struct device *d,
  2836. struct device_attribute *attr,
  2837. const char *buf, size_t count)
  2838. {
  2839. struct iwl_priv *priv = dev_get_drvdata(d);
  2840. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2841. mutex_lock(&priv->mutex);
  2842. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2843. /* Cancel any currently running scans... */
  2844. if (iwl_scan_cancel_timeout(priv, 100))
  2845. IWL_WARN(priv, "Could not cancel scan.\n");
  2846. else {
  2847. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2848. "0x%04X\n", filter_flags);
  2849. priv->staging_rxon.filter_flags =
  2850. cpu_to_le32(filter_flags);
  2851. iwlcore_commit_rxon(priv);
  2852. }
  2853. }
  2854. mutex_unlock(&priv->mutex);
  2855. return count;
  2856. }
  2857. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2858. store_filter_flags);
  2859. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2860. static ssize_t show_measurement(struct device *d,
  2861. struct device_attribute *attr, char *buf)
  2862. {
  2863. struct iwl_priv *priv = dev_get_drvdata(d);
  2864. struct iwl_spectrum_notification measure_report;
  2865. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2866. u8 *data = (u8 *)&measure_report;
  2867. unsigned long flags;
  2868. spin_lock_irqsave(&priv->lock, flags);
  2869. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2870. spin_unlock_irqrestore(&priv->lock, flags);
  2871. return 0;
  2872. }
  2873. memcpy(&measure_report, &priv->measure_report, size);
  2874. priv->measurement_status = 0;
  2875. spin_unlock_irqrestore(&priv->lock, flags);
  2876. while (size && (PAGE_SIZE - len)) {
  2877. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2878. PAGE_SIZE - len, 1);
  2879. len = strlen(buf);
  2880. if (PAGE_SIZE - len)
  2881. buf[len++] = '\n';
  2882. ofs += 16;
  2883. size -= min(size, 16U);
  2884. }
  2885. return len;
  2886. }
  2887. static ssize_t store_measurement(struct device *d,
  2888. struct device_attribute *attr,
  2889. const char *buf, size_t count)
  2890. {
  2891. struct iwl_priv *priv = dev_get_drvdata(d);
  2892. struct ieee80211_measurement_params params = {
  2893. .channel = le16_to_cpu(priv->active_rxon.channel),
  2894. .start_time = cpu_to_le64(priv->last_tsf),
  2895. .duration = cpu_to_le16(1),
  2896. };
  2897. u8 type = IWL_MEASURE_BASIC;
  2898. u8 buffer[32];
  2899. u8 channel;
  2900. if (count) {
  2901. char *p = buffer;
  2902. strncpy(buffer, buf, min(sizeof(buffer), count));
  2903. channel = simple_strtoul(p, NULL, 0);
  2904. if (channel)
  2905. params.channel = channel;
  2906. p = buffer;
  2907. while (*p && *p != ' ')
  2908. p++;
  2909. if (*p)
  2910. type = simple_strtoul(p + 1, NULL, 0);
  2911. }
  2912. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2913. "channel %d (for '%s')\n", type, params.channel, buf);
  2914. iwl3945_get_measurement(priv, &params, type);
  2915. return count;
  2916. }
  2917. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2918. show_measurement, store_measurement);
  2919. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2920. static ssize_t store_retry_rate(struct device *d,
  2921. struct device_attribute *attr,
  2922. const char *buf, size_t count)
  2923. {
  2924. struct iwl_priv *priv = dev_get_drvdata(d);
  2925. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2926. if (priv->retry_rate <= 0)
  2927. priv->retry_rate = 1;
  2928. return count;
  2929. }
  2930. static ssize_t show_retry_rate(struct device *d,
  2931. struct device_attribute *attr, char *buf)
  2932. {
  2933. struct iwl_priv *priv = dev_get_drvdata(d);
  2934. return sprintf(buf, "%d", priv->retry_rate);
  2935. }
  2936. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  2937. store_retry_rate);
  2938. static ssize_t store_power_level(struct device *d,
  2939. struct device_attribute *attr,
  2940. const char *buf, size_t count)
  2941. {
  2942. struct iwl_priv *priv = dev_get_drvdata(d);
  2943. int ret;
  2944. unsigned long mode;
  2945. mutex_lock(&priv->mutex);
  2946. ret = strict_strtoul(buf, 10, &mode);
  2947. if (ret)
  2948. goto out;
  2949. ret = iwl_power_set_user_mode(priv, mode);
  2950. if (ret) {
  2951. IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
  2952. goto out;
  2953. }
  2954. ret = count;
  2955. out:
  2956. mutex_unlock(&priv->mutex);
  2957. return ret;
  2958. }
  2959. static ssize_t show_power_level(struct device *d,
  2960. struct device_attribute *attr, char *buf)
  2961. {
  2962. struct iwl_priv *priv = dev_get_drvdata(d);
  2963. int level = priv->power_data.power_mode;
  2964. char *p = buf;
  2965. p += sprintf(p, "%d\n", level);
  2966. return p - buf + 1;
  2967. }
  2968. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
  2969. show_power_level, store_power_level);
  2970. #define MAX_WX_STRING 80
  2971. /* Values are in microsecond */
  2972. static const s32 timeout_duration[] = {
  2973. 350000,
  2974. 250000,
  2975. 75000,
  2976. 37000,
  2977. 25000,
  2978. };
  2979. static const s32 period_duration[] = {
  2980. 400000,
  2981. 700000,
  2982. 1000000,
  2983. 1000000,
  2984. 1000000
  2985. };
  2986. static ssize_t show_channels(struct device *d,
  2987. struct device_attribute *attr, char *buf)
  2988. {
  2989. /* all this shit doesn't belong into sysfs anyway */
  2990. return 0;
  2991. }
  2992. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  2993. static ssize_t show_statistics(struct device *d,
  2994. struct device_attribute *attr, char *buf)
  2995. {
  2996. struct iwl_priv *priv = dev_get_drvdata(d);
  2997. u32 size = sizeof(struct iwl3945_notif_statistics);
  2998. u32 len = 0, ofs = 0;
  2999. u8 *data = (u8 *)&priv->statistics_39;
  3000. int rc = 0;
  3001. if (!iwl_is_alive(priv))
  3002. return -EAGAIN;
  3003. mutex_lock(&priv->mutex);
  3004. rc = iwl_send_statistics_request(priv, 0);
  3005. mutex_unlock(&priv->mutex);
  3006. if (rc) {
  3007. len = sprintf(buf,
  3008. "Error sending statistics request: 0x%08X\n", rc);
  3009. return len;
  3010. }
  3011. while (size && (PAGE_SIZE - len)) {
  3012. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3013. PAGE_SIZE - len, 1);
  3014. len = strlen(buf);
  3015. if (PAGE_SIZE - len)
  3016. buf[len++] = '\n';
  3017. ofs += 16;
  3018. size -= min(size, 16U);
  3019. }
  3020. return len;
  3021. }
  3022. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3023. static ssize_t show_antenna(struct device *d,
  3024. struct device_attribute *attr, char *buf)
  3025. {
  3026. struct iwl_priv *priv = dev_get_drvdata(d);
  3027. if (!iwl_is_alive(priv))
  3028. return -EAGAIN;
  3029. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3030. }
  3031. static ssize_t store_antenna(struct device *d,
  3032. struct device_attribute *attr,
  3033. const char *buf, size_t count)
  3034. {
  3035. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3036. int ant;
  3037. if (count == 0)
  3038. return 0;
  3039. if (sscanf(buf, "%1i", &ant) != 1) {
  3040. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3041. return count;
  3042. }
  3043. if ((ant >= 0) && (ant <= 2)) {
  3044. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3045. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3046. } else
  3047. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3048. return count;
  3049. }
  3050. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3051. static ssize_t show_status(struct device *d,
  3052. struct device_attribute *attr, char *buf)
  3053. {
  3054. struct iwl_priv *priv = dev_get_drvdata(d);
  3055. if (!iwl_is_alive(priv))
  3056. return -EAGAIN;
  3057. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3058. }
  3059. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3060. static ssize_t dump_error_log(struct device *d,
  3061. struct device_attribute *attr,
  3062. const char *buf, size_t count)
  3063. {
  3064. struct iwl_priv *priv = dev_get_drvdata(d);
  3065. char *p = (char *)buf;
  3066. if (p[0] == '1')
  3067. iwl3945_dump_nic_error_log(priv);
  3068. return strnlen(buf, count);
  3069. }
  3070. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3071. static ssize_t dump_event_log(struct device *d,
  3072. struct device_attribute *attr,
  3073. const char *buf, size_t count)
  3074. {
  3075. struct iwl_priv *priv = dev_get_drvdata(d);
  3076. char *p = (char *)buf;
  3077. if (p[0] == '1')
  3078. iwl3945_dump_nic_event_log(priv);
  3079. return strnlen(buf, count);
  3080. }
  3081. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  3082. /*****************************************************************************
  3083. *
  3084. * driver setup and tear down
  3085. *
  3086. *****************************************************************************/
  3087. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3088. {
  3089. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3090. init_waitqueue_head(&priv->wait_command_queue);
  3091. INIT_WORK(&priv->up, iwl3945_bg_up);
  3092. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3093. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3094. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3095. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3096. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3097. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3098. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3099. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3100. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3101. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3102. iwl3945_hw_setup_deferred_work(priv);
  3103. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3104. iwl3945_irq_tasklet, (unsigned long)priv);
  3105. }
  3106. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3107. {
  3108. iwl3945_hw_cancel_deferred_work(priv);
  3109. cancel_delayed_work_sync(&priv->init_alive_start);
  3110. cancel_delayed_work(&priv->scan_check);
  3111. cancel_delayed_work(&priv->alive_start);
  3112. cancel_work_sync(&priv->beacon_update);
  3113. }
  3114. static struct attribute *iwl3945_sysfs_entries[] = {
  3115. &dev_attr_antenna.attr,
  3116. &dev_attr_channels.attr,
  3117. &dev_attr_dump_errors.attr,
  3118. &dev_attr_dump_events.attr,
  3119. &dev_attr_flags.attr,
  3120. &dev_attr_filter_flags.attr,
  3121. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3122. &dev_attr_measurement.attr,
  3123. #endif
  3124. &dev_attr_power_level.attr,
  3125. &dev_attr_retry_rate.attr,
  3126. &dev_attr_statistics.attr,
  3127. &dev_attr_status.attr,
  3128. &dev_attr_temperature.attr,
  3129. &dev_attr_tx_power.attr,
  3130. #ifdef CONFIG_IWLWIFI_DEBUG
  3131. &dev_attr_debug_level.attr,
  3132. #endif
  3133. NULL
  3134. };
  3135. static struct attribute_group iwl3945_attribute_group = {
  3136. .name = NULL, /* put in device directory */
  3137. .attrs = iwl3945_sysfs_entries,
  3138. };
  3139. static struct ieee80211_ops iwl3945_hw_ops = {
  3140. .tx = iwl3945_mac_tx,
  3141. .start = iwl3945_mac_start,
  3142. .stop = iwl3945_mac_stop,
  3143. .add_interface = iwl_mac_add_interface,
  3144. .remove_interface = iwl_mac_remove_interface,
  3145. .config = iwl_mac_config,
  3146. .configure_filter = iwl_configure_filter,
  3147. .set_key = iwl3945_mac_set_key,
  3148. .get_tx_stats = iwl_mac_get_tx_stats,
  3149. .conf_tx = iwl_mac_conf_tx,
  3150. .reset_tsf = iwl_mac_reset_tsf,
  3151. .bss_info_changed = iwl_bss_info_changed,
  3152. .hw_scan = iwl_mac_hw_scan
  3153. };
  3154. static int iwl3945_init_drv(struct iwl_priv *priv)
  3155. {
  3156. int ret;
  3157. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3158. priv->retry_rate = 1;
  3159. priv->ibss_beacon = NULL;
  3160. spin_lock_init(&priv->lock);
  3161. spin_lock_init(&priv->sta_lock);
  3162. spin_lock_init(&priv->hcmd_lock);
  3163. INIT_LIST_HEAD(&priv->free_frames);
  3164. mutex_init(&priv->mutex);
  3165. /* Clear the driver's (not device's) station table */
  3166. iwl_clear_stations_table(priv);
  3167. priv->data_retry_limit = -1;
  3168. priv->ieee_channels = NULL;
  3169. priv->ieee_rates = NULL;
  3170. priv->band = IEEE80211_BAND_2GHZ;
  3171. priv->iw_mode = NL80211_IFTYPE_STATION;
  3172. iwl_reset_qos(priv);
  3173. priv->qos_data.qos_active = 0;
  3174. priv->qos_data.qos_cap.val = 0;
  3175. priv->rates_mask = IWL_RATES_MASK;
  3176. /* If power management is turned on, default to CAM mode */
  3177. priv->power_mode = IWL_POWER_MODE_CAM;
  3178. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3179. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3180. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3181. eeprom->version);
  3182. ret = -EINVAL;
  3183. goto err;
  3184. }
  3185. ret = iwl_init_channel_map(priv);
  3186. if (ret) {
  3187. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3188. goto err;
  3189. }
  3190. /* Set up txpower settings in driver for all channels */
  3191. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3192. ret = -EIO;
  3193. goto err_free_channel_map;
  3194. }
  3195. ret = iwlcore_init_geos(priv);
  3196. if (ret) {
  3197. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3198. goto err_free_channel_map;
  3199. }
  3200. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3201. return 0;
  3202. err_free_channel_map:
  3203. iwl_free_channel_map(priv);
  3204. err:
  3205. return ret;
  3206. }
  3207. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3208. {
  3209. int ret;
  3210. struct ieee80211_hw *hw = priv->hw;
  3211. hw->rate_control_algorithm = "iwl-3945-rs";
  3212. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3213. /* Tell mac80211 our characteristics */
  3214. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3215. IEEE80211_HW_NOISE_DBM |
  3216. IEEE80211_HW_SPECTRUM_MGMT;
  3217. hw->wiphy->interface_modes =
  3218. BIT(NL80211_IFTYPE_STATION) |
  3219. BIT(NL80211_IFTYPE_ADHOC);
  3220. hw->wiphy->custom_regulatory = true;
  3221. /* Firmware does not support this */
  3222. hw->wiphy->disable_beacon_hints = true;
  3223. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3224. /* we create the 802.11 header and a zero-length SSID element */
  3225. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3226. /* Default value; 4 EDCA QOS priorities */
  3227. hw->queues = 4;
  3228. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3229. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3230. &priv->bands[IEEE80211_BAND_2GHZ];
  3231. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3232. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3233. &priv->bands[IEEE80211_BAND_5GHZ];
  3234. ret = ieee80211_register_hw(priv->hw);
  3235. if (ret) {
  3236. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3237. return ret;
  3238. }
  3239. priv->mac80211_registered = 1;
  3240. return 0;
  3241. }
  3242. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3243. {
  3244. int err = 0;
  3245. struct iwl_priv *priv;
  3246. struct ieee80211_hw *hw;
  3247. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3248. struct iwl3945_eeprom *eeprom;
  3249. unsigned long flags;
  3250. /***********************
  3251. * 1. Allocating HW data
  3252. * ********************/
  3253. /* mac80211 allocates memory for this device instance, including
  3254. * space for this driver's private structure */
  3255. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3256. if (hw == NULL) {
  3257. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3258. err = -ENOMEM;
  3259. goto out;
  3260. }
  3261. priv = hw->priv;
  3262. SET_IEEE80211_DEV(hw, &pdev->dev);
  3263. /*
  3264. * Disabling hardware scan means that mac80211 will perform scans
  3265. * "the hard way", rather than using device's scan.
  3266. */
  3267. if (iwl3945_mod_params.disable_hw_scan) {
  3268. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3269. iwl3945_hw_ops.hw_scan = NULL;
  3270. }
  3271. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3272. priv->cfg = cfg;
  3273. priv->pci_dev = pdev;
  3274. priv->inta_mask = CSR_INI_SET_MASK;
  3275. #ifdef CONFIG_IWLWIFI_DEBUG
  3276. atomic_set(&priv->restrict_refcnt, 0);
  3277. #endif
  3278. /***************************
  3279. * 2. Initializing PCI bus
  3280. * *************************/
  3281. if (pci_enable_device(pdev)) {
  3282. err = -ENODEV;
  3283. goto out_ieee80211_free_hw;
  3284. }
  3285. pci_set_master(pdev);
  3286. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3287. if (!err)
  3288. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3289. if (err) {
  3290. IWL_WARN(priv, "No suitable DMA available.\n");
  3291. goto out_pci_disable_device;
  3292. }
  3293. pci_set_drvdata(pdev, priv);
  3294. err = pci_request_regions(pdev, DRV_NAME);
  3295. if (err)
  3296. goto out_pci_disable_device;
  3297. /***********************
  3298. * 3. Read REV Register
  3299. * ********************/
  3300. priv->hw_base = pci_iomap(pdev, 0, 0);
  3301. if (!priv->hw_base) {
  3302. err = -ENODEV;
  3303. goto out_pci_release_regions;
  3304. }
  3305. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3306. (unsigned long long) pci_resource_len(pdev, 0));
  3307. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3308. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3309. * PCI Tx retries from interfering with C3 CPU state */
  3310. pci_write_config_byte(pdev, 0x41, 0x00);
  3311. /* this spin lock will be used in apm_ops.init and EEPROM access
  3312. * we should init now
  3313. */
  3314. spin_lock_init(&priv->reg_lock);
  3315. /* amp init */
  3316. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3317. if (err < 0) {
  3318. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3319. goto out_iounmap;
  3320. }
  3321. /***********************
  3322. * 4. Read EEPROM
  3323. * ********************/
  3324. /* Read the EEPROM */
  3325. err = iwl_eeprom_init(priv);
  3326. if (err) {
  3327. IWL_ERR(priv, "Unable to init EEPROM\n");
  3328. goto out_iounmap;
  3329. }
  3330. /* MAC Address location in EEPROM same for 3945/4965 */
  3331. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3332. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3333. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3334. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3335. /***********************
  3336. * 5. Setup HW Constants
  3337. * ********************/
  3338. /* Device-specific setup */
  3339. if (iwl3945_hw_set_hw_params(priv)) {
  3340. IWL_ERR(priv, "failed to set hw settings\n");
  3341. goto out_eeprom_free;
  3342. }
  3343. /***********************
  3344. * 6. Setup priv
  3345. * ********************/
  3346. err = iwl3945_init_drv(priv);
  3347. if (err) {
  3348. IWL_ERR(priv, "initializing driver failed\n");
  3349. goto out_unset_hw_params;
  3350. }
  3351. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3352. priv->cfg->name);
  3353. /***********************
  3354. * 7. Setup Services
  3355. * ********************/
  3356. spin_lock_irqsave(&priv->lock, flags);
  3357. iwl_disable_interrupts(priv);
  3358. spin_unlock_irqrestore(&priv->lock, flags);
  3359. pci_enable_msi(priv->pci_dev);
  3360. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3361. IRQF_SHARED, DRV_NAME, priv);
  3362. if (err) {
  3363. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3364. goto out_disable_msi;
  3365. }
  3366. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3367. if (err) {
  3368. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3369. goto out_release_irq;
  3370. }
  3371. iwl_set_rxon_channel(priv,
  3372. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3373. iwl3945_setup_deferred_work(priv);
  3374. iwl3945_setup_rx_handlers(priv);
  3375. /*********************************
  3376. * 8. Setup and Register mac80211
  3377. * *******************************/
  3378. iwl_enable_interrupts(priv);
  3379. err = iwl3945_setup_mac(priv);
  3380. if (err)
  3381. goto out_remove_sysfs;
  3382. err = iwl_dbgfs_register(priv, DRV_NAME);
  3383. if (err)
  3384. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3385. /* Start monitoring the killswitch */
  3386. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3387. 2 * HZ);
  3388. return 0;
  3389. out_remove_sysfs:
  3390. destroy_workqueue(priv->workqueue);
  3391. priv->workqueue = NULL;
  3392. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3393. out_release_irq:
  3394. free_irq(priv->pci_dev->irq, priv);
  3395. out_disable_msi:
  3396. pci_disable_msi(priv->pci_dev);
  3397. iwlcore_free_geos(priv);
  3398. iwl_free_channel_map(priv);
  3399. out_unset_hw_params:
  3400. iwl3945_unset_hw_params(priv);
  3401. out_eeprom_free:
  3402. iwl_eeprom_free(priv);
  3403. out_iounmap:
  3404. pci_iounmap(pdev, priv->hw_base);
  3405. out_pci_release_regions:
  3406. pci_release_regions(pdev);
  3407. out_pci_disable_device:
  3408. pci_set_drvdata(pdev, NULL);
  3409. pci_disable_device(pdev);
  3410. out_ieee80211_free_hw:
  3411. ieee80211_free_hw(priv->hw);
  3412. out:
  3413. return err;
  3414. }
  3415. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3416. {
  3417. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3418. unsigned long flags;
  3419. if (!priv)
  3420. return;
  3421. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3422. iwl_dbgfs_unregister(priv);
  3423. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3424. if (priv->mac80211_registered) {
  3425. ieee80211_unregister_hw(priv->hw);
  3426. priv->mac80211_registered = 0;
  3427. } else {
  3428. iwl3945_down(priv);
  3429. }
  3430. /* make sure we flush any pending irq or
  3431. * tasklet for the driver
  3432. */
  3433. spin_lock_irqsave(&priv->lock, flags);
  3434. iwl_disable_interrupts(priv);
  3435. spin_unlock_irqrestore(&priv->lock, flags);
  3436. iwl_synchronize_irq(priv);
  3437. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3438. cancel_delayed_work_sync(&priv->rfkill_poll);
  3439. iwl3945_dealloc_ucode_pci(priv);
  3440. if (priv->rxq.bd)
  3441. iwl3945_rx_queue_free(priv, &priv->rxq);
  3442. iwl3945_hw_txq_ctx_free(priv);
  3443. iwl3945_unset_hw_params(priv);
  3444. iwl_clear_stations_table(priv);
  3445. /*netif_stop_queue(dev); */
  3446. flush_workqueue(priv->workqueue);
  3447. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3448. * priv->workqueue... so we can't take down the workqueue
  3449. * until now... */
  3450. destroy_workqueue(priv->workqueue);
  3451. priv->workqueue = NULL;
  3452. free_irq(pdev->irq, priv);
  3453. pci_disable_msi(pdev);
  3454. pci_iounmap(pdev, priv->hw_base);
  3455. pci_release_regions(pdev);
  3456. pci_disable_device(pdev);
  3457. pci_set_drvdata(pdev, NULL);
  3458. iwl_free_channel_map(priv);
  3459. iwlcore_free_geos(priv);
  3460. kfree(priv->scan);
  3461. if (priv->ibss_beacon)
  3462. dev_kfree_skb(priv->ibss_beacon);
  3463. ieee80211_free_hw(priv->hw);
  3464. }
  3465. /*****************************************************************************
  3466. *
  3467. * driver and module entry point
  3468. *
  3469. *****************************************************************************/
  3470. static struct pci_driver iwl3945_driver = {
  3471. .name = DRV_NAME,
  3472. .id_table = iwl3945_hw_card_ids,
  3473. .probe = iwl3945_pci_probe,
  3474. .remove = __devexit_p(iwl3945_pci_remove),
  3475. #ifdef CONFIG_PM
  3476. .suspend = iwl_pci_suspend,
  3477. .resume = iwl_pci_resume,
  3478. #endif
  3479. };
  3480. static int __init iwl3945_init(void)
  3481. {
  3482. int ret;
  3483. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3484. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3485. ret = iwl3945_rate_control_register();
  3486. if (ret) {
  3487. printk(KERN_ERR DRV_NAME
  3488. "Unable to register rate control algorithm: %d\n", ret);
  3489. return ret;
  3490. }
  3491. ret = pci_register_driver(&iwl3945_driver);
  3492. if (ret) {
  3493. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3494. goto error_register;
  3495. }
  3496. return ret;
  3497. error_register:
  3498. iwl3945_rate_control_unregister();
  3499. return ret;
  3500. }
  3501. static void __exit iwl3945_exit(void)
  3502. {
  3503. pci_unregister_driver(&iwl3945_driver);
  3504. iwl3945_rate_control_unregister();
  3505. }
  3506. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3507. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  3508. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3509. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  3510. MODULE_PARM_DESC(swcrypto,
  3511. "using software crypto (default 1 [software])\n");
  3512. #ifdef CONFIG_IWLWIFI_DEBUG
  3513. module_param_named(debug, iwl_debug_level, uint, 0644);
  3514. MODULE_PARM_DESC(debug, "debug output mask");
  3515. #endif
  3516. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  3517. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3518. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  3519. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3520. module_exit(iwl3945_exit);
  3521. module_init(iwl3945_init);