iwl-eeprom.c 22 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22. * USA
  23. *
  24. * The full GNU General Public License is included in this distribution
  25. * in the file called LICENSE.GPL.
  26. *
  27. * Contact Information:
  28. * Intel Linux Wireless <ilw@linux.intel.com>
  29. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30. *
  31. * BSD LICENSE
  32. *
  33. * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
  34. * All rights reserved.
  35. *
  36. * Redistribution and use in source and binary forms, with or without
  37. * modification, are permitted provided that the following conditions
  38. * are met:
  39. *
  40. * * Redistributions of source code must retain the above copyright
  41. * notice, this list of conditions and the following disclaimer.
  42. * * Redistributions in binary form must reproduce the above copyright
  43. * notice, this list of conditions and the following disclaimer in
  44. * the documentation and/or other materials provided with the
  45. * distribution.
  46. * * Neither the name Intel Corporation nor the names of its
  47. * contributors may be used to endorse or promote products derived
  48. * from this software without specific prior written permission.
  49. *
  50. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61. *****************************************************************************/
  62. #include <linux/kernel.h>
  63. #include <linux/module.h>
  64. #include <linux/init.h>
  65. #include <net/mac80211.h>
  66. #include "iwl-commands.h"
  67. #include "iwl-dev.h"
  68. #include "iwl-core.h"
  69. #include "iwl-debug.h"
  70. #include "iwl-eeprom.h"
  71. #include "iwl-io.h"
  72. /************************** EEPROM BANDS ****************************
  73. *
  74. * The iwl_eeprom_band definitions below provide the mapping from the
  75. * EEPROM contents to the specific channel number supported for each
  76. * band.
  77. *
  78. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  79. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  80. * The specific geography and calibration information for that channel
  81. * is contained in the eeprom map itself.
  82. *
  83. * During init, we copy the eeprom information and channel map
  84. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  85. *
  86. * channel_map_24/52 provides the index in the channel_info array for a
  87. * given channel. We have to have two separate maps as there is channel
  88. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  89. * band_2
  90. *
  91. * A value of 0xff stored in the channel_map indicates that the channel
  92. * is not supported by the hardware at all.
  93. *
  94. * A value of 0xfe in the channel_map indicates that the channel is not
  95. * valid for Tx with the current hardware. This means that
  96. * while the system can tune and receive on a given channel, it may not
  97. * be able to associate or transmit any frames on that
  98. * channel. There is no corresponding channel information for that
  99. * entry.
  100. *
  101. *********************************************************************/
  102. /* 2.4 GHz */
  103. const u8 iwl_eeprom_band_1[14] = {
  104. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  105. };
  106. /* 5.2 GHz bands */
  107. static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
  108. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  109. };
  110. static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
  111. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  112. };
  113. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  114. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  115. };
  116. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  117. 145, 149, 153, 157, 161, 165
  118. };
  119. static const u8 iwl_eeprom_band_6[] = { /* 2.4 FAT channel */
  120. 1, 2, 3, 4, 5, 6, 7
  121. };
  122. static const u8 iwl_eeprom_band_7[] = { /* 5.2 FAT channel */
  123. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  124. };
  125. /******************************************************************************
  126. *
  127. * EEPROM related functions
  128. *
  129. ******************************************************************************/
  130. int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
  131. {
  132. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  133. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  134. IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  135. return -ENOENT;
  136. }
  137. return 0;
  138. }
  139. EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
  140. static int iwlcore_get_nvm_type(struct iwl_priv *priv)
  141. {
  142. u32 otpgp;
  143. int nvm_type;
  144. /* OTP only valid for CP/PP and after */
  145. switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
  146. case CSR_HW_REV_TYPE_NONE:
  147. IWL_ERR(priv, "Unknown hardware type\n");
  148. return -ENOENT;
  149. case CSR_HW_REV_TYPE_3945:
  150. case CSR_HW_REV_TYPE_4965:
  151. case CSR_HW_REV_TYPE_5300:
  152. case CSR_HW_REV_TYPE_5350:
  153. case CSR_HW_REV_TYPE_5100:
  154. case CSR_HW_REV_TYPE_5150:
  155. nvm_type = NVM_DEVICE_TYPE_EEPROM;
  156. break;
  157. default:
  158. otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
  159. if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
  160. nvm_type = NVM_DEVICE_TYPE_OTP;
  161. else
  162. nvm_type = NVM_DEVICE_TYPE_EEPROM;
  163. break;
  164. }
  165. return nvm_type;
  166. }
  167. /*
  168. * The device's EEPROM semaphore prevents conflicts between driver and uCode
  169. * when accessing the EEPROM; each access is a series of pulses to/from the
  170. * EEPROM chip, not a single event, so even reads could conflict if they
  171. * weren't arbitrated by the semaphore.
  172. */
  173. int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
  174. {
  175. u16 count;
  176. int ret;
  177. for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
  178. /* Request semaphore */
  179. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  180. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  181. /* See if we got it */
  182. ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG,
  183. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
  184. EEPROM_SEM_TIMEOUT);
  185. if (ret >= 0) {
  186. IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
  187. count+1);
  188. return ret;
  189. }
  190. }
  191. return ret;
  192. }
  193. EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
  194. void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
  195. {
  196. iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  197. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  198. }
  199. EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
  200. const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
  201. {
  202. BUG_ON(offset >= priv->cfg->eeprom_size);
  203. return &priv->eeprom[offset];
  204. }
  205. EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
  206. static int iwl_init_otp_access(struct iwl_priv *priv)
  207. {
  208. int ret;
  209. /* Enable 40MHz radio clock */
  210. _iwl_write32(priv, CSR_GP_CNTRL,
  211. _iwl_read32(priv, CSR_GP_CNTRL) |
  212. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  213. /* wait for clock to be ready */
  214. ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
  215. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  216. 25000);
  217. if (ret < 0)
  218. IWL_ERR(priv, "Time out access OTP\n");
  219. else {
  220. iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
  221. APMG_PS_CTRL_VAL_RESET_REQ);
  222. udelay(5);
  223. iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
  224. APMG_PS_CTRL_VAL_RESET_REQ);
  225. }
  226. return ret;
  227. }
  228. /**
  229. * iwl_eeprom_init - read EEPROM contents
  230. *
  231. * Load the EEPROM contents from adapter into priv->eeprom
  232. *
  233. * NOTE: This routine uses the non-debug IO access functions.
  234. */
  235. int iwl_eeprom_init(struct iwl_priv *priv)
  236. {
  237. u16 *e;
  238. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  239. int sz;
  240. int ret;
  241. u16 addr;
  242. u32 otpgp;
  243. priv->nvm_device_type = iwlcore_get_nvm_type(priv);
  244. if (priv->nvm_device_type == -ENOENT)
  245. return -ENOENT;
  246. /* allocate eeprom */
  247. if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
  248. priv->cfg->eeprom_size =
  249. OTP_BLOCK_SIZE * OTP_LOWER_BLOCKS_TOTAL;
  250. sz = priv->cfg->eeprom_size;
  251. priv->eeprom = kzalloc(sz, GFP_KERNEL);
  252. if (!priv->eeprom) {
  253. ret = -ENOMEM;
  254. goto alloc_err;
  255. }
  256. e = (u16 *)priv->eeprom;
  257. ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
  258. if (ret < 0) {
  259. IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  260. ret = -ENOENT;
  261. goto err;
  262. }
  263. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  264. ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
  265. if (ret < 0) {
  266. IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
  267. ret = -ENOENT;
  268. goto err;
  269. }
  270. if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
  271. ret = iwl_init_otp_access(priv);
  272. if (ret) {
  273. IWL_ERR(priv, "Failed to initialize OTP access.\n");
  274. ret = -ENOENT;
  275. goto err;
  276. }
  277. _iwl_write32(priv, CSR_EEPROM_GP,
  278. iwl_read32(priv, CSR_EEPROM_GP) &
  279. ~CSR_EEPROM_GP_IF_OWNER_MSK);
  280. /* clear */
  281. _iwl_write32(priv, CSR_OTP_GP_REG,
  282. iwl_read32(priv, CSR_OTP_GP_REG) |
  283. CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
  284. CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
  285. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  286. u32 r;
  287. _iwl_write32(priv, CSR_EEPROM_REG,
  288. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  289. ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
  290. CSR_EEPROM_REG_READ_VALID_MSK,
  291. IWL_EEPROM_ACCESS_TIMEOUT);
  292. if (ret < 0) {
  293. IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
  294. goto done;
  295. }
  296. r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
  297. /* check for ECC errors: */
  298. otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
  299. if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
  300. /* stop in this case */
  301. IWL_ERR(priv, "Uncorrectable OTP ECC error, Abort OTP read\n");
  302. goto done;
  303. }
  304. if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
  305. /* continue in this case */
  306. _iwl_write32(priv, CSR_OTP_GP_REG,
  307. iwl_read32(priv, CSR_OTP_GP_REG) |
  308. CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
  309. IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
  310. }
  311. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  312. }
  313. } else {
  314. /* eeprom is an array of 16bit values */
  315. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  316. u32 r;
  317. _iwl_write32(priv, CSR_EEPROM_REG,
  318. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  319. ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
  320. CSR_EEPROM_REG_READ_VALID_MSK,
  321. IWL_EEPROM_ACCESS_TIMEOUT);
  322. if (ret < 0) {
  323. IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
  324. goto done;
  325. }
  326. r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
  327. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  328. }
  329. }
  330. ret = 0;
  331. done:
  332. priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
  333. err:
  334. if (ret)
  335. iwl_eeprom_free(priv);
  336. alloc_err:
  337. return ret;
  338. }
  339. EXPORT_SYMBOL(iwl_eeprom_init);
  340. void iwl_eeprom_free(struct iwl_priv *priv)
  341. {
  342. kfree(priv->eeprom);
  343. priv->eeprom = NULL;
  344. }
  345. EXPORT_SYMBOL(iwl_eeprom_free);
  346. int iwl_eeprom_check_version(struct iwl_priv *priv)
  347. {
  348. u16 eeprom_ver;
  349. u16 calib_ver;
  350. eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
  351. calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
  352. if (eeprom_ver < priv->cfg->eeprom_ver ||
  353. calib_ver < priv->cfg->eeprom_calib_ver)
  354. goto err;
  355. return 0;
  356. err:
  357. IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
  358. eeprom_ver, priv->cfg->eeprom_ver,
  359. calib_ver, priv->cfg->eeprom_calib_ver);
  360. return -EINVAL;
  361. }
  362. EXPORT_SYMBOL(iwl_eeprom_check_version);
  363. const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
  364. {
  365. return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
  366. }
  367. EXPORT_SYMBOL(iwl_eeprom_query_addr);
  368. u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
  369. {
  370. if (!priv->eeprom)
  371. return 0;
  372. return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
  373. }
  374. EXPORT_SYMBOL(iwl_eeprom_query16);
  375. void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
  376. {
  377. const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
  378. EEPROM_MAC_ADDRESS);
  379. memcpy(mac, addr, ETH_ALEN);
  380. }
  381. EXPORT_SYMBOL(iwl_eeprom_get_mac);
  382. static void iwl_init_band_reference(const struct iwl_priv *priv,
  383. int eep_band, int *eeprom_ch_count,
  384. const struct iwl_eeprom_channel **eeprom_ch_info,
  385. const u8 **eeprom_ch_index)
  386. {
  387. u32 offset = priv->cfg->ops->lib->
  388. eeprom_ops.regulatory_bands[eep_band - 1];
  389. switch (eep_band) {
  390. case 1: /* 2.4GHz band */
  391. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  392. *eeprom_ch_info = (struct iwl_eeprom_channel *)
  393. iwl_eeprom_query_addr(priv, offset);
  394. *eeprom_ch_index = iwl_eeprom_band_1;
  395. break;
  396. case 2: /* 4.9GHz band */
  397. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  398. *eeprom_ch_info = (struct iwl_eeprom_channel *)
  399. iwl_eeprom_query_addr(priv, offset);
  400. *eeprom_ch_index = iwl_eeprom_band_2;
  401. break;
  402. case 3: /* 5.2GHz band */
  403. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  404. *eeprom_ch_info = (struct iwl_eeprom_channel *)
  405. iwl_eeprom_query_addr(priv, offset);
  406. *eeprom_ch_index = iwl_eeprom_band_3;
  407. break;
  408. case 4: /* 5.5GHz band */
  409. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  410. *eeprom_ch_info = (struct iwl_eeprom_channel *)
  411. iwl_eeprom_query_addr(priv, offset);
  412. *eeprom_ch_index = iwl_eeprom_band_4;
  413. break;
  414. case 5: /* 5.7GHz band */
  415. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  416. *eeprom_ch_info = (struct iwl_eeprom_channel *)
  417. iwl_eeprom_query_addr(priv, offset);
  418. *eeprom_ch_index = iwl_eeprom_band_5;
  419. break;
  420. case 6: /* 2.4GHz FAT channels */
  421. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
  422. *eeprom_ch_info = (struct iwl_eeprom_channel *)
  423. iwl_eeprom_query_addr(priv, offset);
  424. *eeprom_ch_index = iwl_eeprom_band_6;
  425. break;
  426. case 7: /* 5 GHz FAT channels */
  427. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
  428. *eeprom_ch_info = (struct iwl_eeprom_channel *)
  429. iwl_eeprom_query_addr(priv, offset);
  430. *eeprom_ch_index = iwl_eeprom_band_7;
  431. break;
  432. default:
  433. BUG();
  434. return;
  435. }
  436. }
  437. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  438. ? # x " " : "")
  439. /**
  440. * iwl_set_fat_chan_info - Copy fat channel info into driver's priv.
  441. *
  442. * Does not set up a command, or touch hardware.
  443. */
  444. static int iwl_set_fat_chan_info(struct iwl_priv *priv,
  445. enum ieee80211_band band, u16 channel,
  446. const struct iwl_eeprom_channel *eeprom_ch,
  447. u8 fat_extension_channel)
  448. {
  449. struct iwl_channel_info *ch_info;
  450. ch_info = (struct iwl_channel_info *)
  451. iwl_get_channel_info(priv, band, channel);
  452. if (!is_channel_valid(ch_info))
  453. return -1;
  454. IWL_DEBUG_INFO(priv, "FAT Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
  455. " Ad-Hoc %ssupported\n",
  456. ch_info->channel,
  457. is_channel_a_band(ch_info) ?
  458. "5.2" : "2.4",
  459. CHECK_AND_PRINT(IBSS),
  460. CHECK_AND_PRINT(ACTIVE),
  461. CHECK_AND_PRINT(RADAR),
  462. CHECK_AND_PRINT(WIDE),
  463. CHECK_AND_PRINT(DFS),
  464. eeprom_ch->flags,
  465. eeprom_ch->max_power_avg,
  466. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
  467. && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
  468. "" : "not ");
  469. ch_info->fat_eeprom = *eeprom_ch;
  470. ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
  471. ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
  472. ch_info->fat_min_power = 0;
  473. ch_info->fat_scan_power = eeprom_ch->max_power_avg;
  474. ch_info->fat_flags = eeprom_ch->flags;
  475. ch_info->fat_extension_channel = fat_extension_channel;
  476. return 0;
  477. }
  478. #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  479. ? # x " " : "")
  480. /**
  481. * iwl_init_channel_map - Set up driver's info for all possible channels
  482. */
  483. int iwl_init_channel_map(struct iwl_priv *priv)
  484. {
  485. int eeprom_ch_count = 0;
  486. const u8 *eeprom_ch_index = NULL;
  487. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  488. int band, ch;
  489. struct iwl_channel_info *ch_info;
  490. if (priv->channel_count) {
  491. IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
  492. return 0;
  493. }
  494. IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
  495. priv->channel_count =
  496. ARRAY_SIZE(iwl_eeprom_band_1) +
  497. ARRAY_SIZE(iwl_eeprom_band_2) +
  498. ARRAY_SIZE(iwl_eeprom_band_3) +
  499. ARRAY_SIZE(iwl_eeprom_band_4) +
  500. ARRAY_SIZE(iwl_eeprom_band_5);
  501. IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
  502. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  503. priv->channel_count, GFP_KERNEL);
  504. if (!priv->channel_info) {
  505. IWL_ERR(priv, "Could not allocate channel_info\n");
  506. priv->channel_count = 0;
  507. return -ENOMEM;
  508. }
  509. ch_info = priv->channel_info;
  510. /* Loop through the 5 EEPROM bands adding them in order to the
  511. * channel map we maintain (that contains additional information than
  512. * what just in the EEPROM) */
  513. for (band = 1; band <= 5; band++) {
  514. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  515. &eeprom_ch_info, &eeprom_ch_index);
  516. /* Loop through each band adding each of the channels */
  517. for (ch = 0; ch < eeprom_ch_count; ch++) {
  518. ch_info->channel = eeprom_ch_index[ch];
  519. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  520. IEEE80211_BAND_5GHZ;
  521. /* permanently store EEPROM's channel regulatory flags
  522. * and max power in channel info database. */
  523. ch_info->eeprom = eeprom_ch_info[ch];
  524. /* Copy the run-time flags so they are there even on
  525. * invalid channels */
  526. ch_info->flags = eeprom_ch_info[ch].flags;
  527. /* First write that fat is not enabled, and then enable
  528. * one by one */
  529. ch_info->fat_extension_channel =
  530. (IEEE80211_CHAN_NO_HT40PLUS |
  531. IEEE80211_CHAN_NO_HT40MINUS);
  532. if (!(is_channel_valid(ch_info))) {
  533. IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
  534. "No traffic\n",
  535. ch_info->channel,
  536. ch_info->flags,
  537. is_channel_a_band(ch_info) ?
  538. "5.2" : "2.4");
  539. ch_info++;
  540. continue;
  541. }
  542. /* Initialize regulatory-based run-time data */
  543. ch_info->max_power_avg = ch_info->curr_txpow =
  544. eeprom_ch_info[ch].max_power_avg;
  545. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  546. ch_info->min_power = 0;
  547. IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
  548. " Ad-Hoc %ssupported\n",
  549. ch_info->channel,
  550. is_channel_a_band(ch_info) ?
  551. "5.2" : "2.4",
  552. CHECK_AND_PRINT_I(VALID),
  553. CHECK_AND_PRINT_I(IBSS),
  554. CHECK_AND_PRINT_I(ACTIVE),
  555. CHECK_AND_PRINT_I(RADAR),
  556. CHECK_AND_PRINT_I(WIDE),
  557. CHECK_AND_PRINT_I(DFS),
  558. eeprom_ch_info[ch].flags,
  559. eeprom_ch_info[ch].max_power_avg,
  560. ((eeprom_ch_info[ch].
  561. flags & EEPROM_CHANNEL_IBSS)
  562. && !(eeprom_ch_info[ch].
  563. flags & EEPROM_CHANNEL_RADAR))
  564. ? "" : "not ");
  565. /* Set the tx_power_user_lmt to the highest power
  566. * supported by any channel */
  567. if (eeprom_ch_info[ch].max_power_avg >
  568. priv->tx_power_user_lmt)
  569. priv->tx_power_user_lmt =
  570. eeprom_ch_info[ch].max_power_avg;
  571. ch_info++;
  572. }
  573. }
  574. /* Check if we do have FAT channels */
  575. if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
  576. EEPROM_REGULATORY_BAND_NO_FAT &&
  577. priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
  578. EEPROM_REGULATORY_BAND_NO_FAT)
  579. return 0;
  580. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  581. for (band = 6; band <= 7; band++) {
  582. enum ieee80211_band ieeeband;
  583. u8 fat_extension_chan;
  584. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  585. &eeprom_ch_info, &eeprom_ch_index);
  586. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  587. ieeeband =
  588. (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  589. /* Loop through each band adding each of the channels */
  590. for (ch = 0; ch < eeprom_ch_count; ch++) {
  591. if ((band == 6) &&
  592. ((eeprom_ch_index[ch] == 5) ||
  593. (eeprom_ch_index[ch] == 6) ||
  594. (eeprom_ch_index[ch] == 7)))
  595. /* both are allowed: above and below */
  596. fat_extension_chan = 0;
  597. else
  598. fat_extension_chan =
  599. IEEE80211_CHAN_NO_HT40MINUS;
  600. /* Set up driver's info for lower half */
  601. iwl_set_fat_chan_info(priv, ieeeband,
  602. eeprom_ch_index[ch],
  603. &(eeprom_ch_info[ch]),
  604. fat_extension_chan);
  605. /* Set up driver's info for upper half */
  606. iwl_set_fat_chan_info(priv, ieeeband,
  607. (eeprom_ch_index[ch] + 4),
  608. &(eeprom_ch_info[ch]),
  609. IEEE80211_CHAN_NO_HT40PLUS);
  610. }
  611. }
  612. return 0;
  613. }
  614. EXPORT_SYMBOL(iwl_init_channel_map);
  615. /*
  616. * iwl_free_channel_map - undo allocations in iwl_init_channel_map
  617. */
  618. void iwl_free_channel_map(struct iwl_priv *priv)
  619. {
  620. kfree(priv->channel_info);
  621. priv->channel_count = 0;
  622. }
  623. EXPORT_SYMBOL(iwl_free_channel_map);
  624. /**
  625. * iwl_get_channel_info - Find driver's private channel info
  626. *
  627. * Based on band and channel number.
  628. */
  629. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  630. enum ieee80211_band band, u16 channel)
  631. {
  632. int i;
  633. switch (band) {
  634. case IEEE80211_BAND_5GHZ:
  635. for (i = 14; i < priv->channel_count; i++) {
  636. if (priv->channel_info[i].channel == channel)
  637. return &priv->channel_info[i];
  638. }
  639. break;
  640. case IEEE80211_BAND_2GHZ:
  641. if (channel >= 1 && channel <= 14)
  642. return &priv->channel_info[channel - 1];
  643. break;
  644. default:
  645. BUG();
  646. }
  647. return NULL;
  648. }
  649. EXPORT_SYMBOL(iwl_get_channel_info);