cnic.c 65 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734
  1. /* cnic.c: Broadcom CNIC core network driver.
  2. *
  3. * Copyright (c) 2006-2009 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
  10. * Modified and maintained by: Michael Chan <mchan@broadcom.com>
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/list.h>
  16. #include <linux/slab.h>
  17. #include <linux/pci.h>
  18. #include <linux/init.h>
  19. #include <linux/netdevice.h>
  20. #include <linux/uio_driver.h>
  21. #include <linux/in.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/delay.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/if_vlan.h>
  26. #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  27. #define BCM_VLAN 1
  28. #endif
  29. #include <net/ip.h>
  30. #include <net/tcp.h>
  31. #include <net/route.h>
  32. #include <net/ipv6.h>
  33. #include <net/ip6_route.h>
  34. #include <scsi/iscsi_if.h>
  35. #include "cnic_if.h"
  36. #include "bnx2.h"
  37. #include "cnic.h"
  38. #include "cnic_defs.h"
  39. #define DRV_MODULE_NAME "cnic"
  40. #define PFX DRV_MODULE_NAME ": "
  41. static char version[] __devinitdata =
  42. "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
  43. MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
  44. "Chen (zongxi@broadcom.com");
  45. MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
  46. MODULE_LICENSE("GPL");
  47. MODULE_VERSION(CNIC_MODULE_VERSION);
  48. static LIST_HEAD(cnic_dev_list);
  49. static DEFINE_RWLOCK(cnic_dev_lock);
  50. static DEFINE_MUTEX(cnic_lock);
  51. static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
  52. static int cnic_service_bnx2(void *, void *);
  53. static int cnic_ctl(void *, struct cnic_ctl_info *);
  54. static struct cnic_ops cnic_bnx2_ops = {
  55. .cnic_owner = THIS_MODULE,
  56. .cnic_handler = cnic_service_bnx2,
  57. .cnic_ctl = cnic_ctl,
  58. };
  59. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *);
  60. static void cnic_init_bnx2_tx_ring(struct cnic_dev *);
  61. static void cnic_init_bnx2_rx_ring(struct cnic_dev *);
  62. static int cnic_cm_set_pg(struct cnic_sock *);
  63. static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
  64. {
  65. struct cnic_dev *dev = uinfo->priv;
  66. struct cnic_local *cp = dev->cnic_priv;
  67. if (!capable(CAP_NET_ADMIN))
  68. return -EPERM;
  69. if (cp->uio_dev != -1)
  70. return -EBUSY;
  71. cp->uio_dev = iminor(inode);
  72. cnic_shutdown_bnx2_rx_ring(dev);
  73. cnic_init_bnx2_tx_ring(dev);
  74. cnic_init_bnx2_rx_ring(dev);
  75. return 0;
  76. }
  77. static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
  78. {
  79. struct cnic_dev *dev = uinfo->priv;
  80. struct cnic_local *cp = dev->cnic_priv;
  81. cp->uio_dev = -1;
  82. return 0;
  83. }
  84. static inline void cnic_hold(struct cnic_dev *dev)
  85. {
  86. atomic_inc(&dev->ref_count);
  87. }
  88. static inline void cnic_put(struct cnic_dev *dev)
  89. {
  90. atomic_dec(&dev->ref_count);
  91. }
  92. static inline void csk_hold(struct cnic_sock *csk)
  93. {
  94. atomic_inc(&csk->ref_count);
  95. }
  96. static inline void csk_put(struct cnic_sock *csk)
  97. {
  98. atomic_dec(&csk->ref_count);
  99. }
  100. static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
  101. {
  102. struct cnic_dev *cdev;
  103. read_lock(&cnic_dev_lock);
  104. list_for_each_entry(cdev, &cnic_dev_list, list) {
  105. if (netdev == cdev->netdev) {
  106. cnic_hold(cdev);
  107. read_unlock(&cnic_dev_lock);
  108. return cdev;
  109. }
  110. }
  111. read_unlock(&cnic_dev_lock);
  112. return NULL;
  113. }
  114. static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
  115. {
  116. struct cnic_local *cp = dev->cnic_priv;
  117. struct cnic_eth_dev *ethdev = cp->ethdev;
  118. struct drv_ctl_info info;
  119. struct drv_ctl_io *io = &info.data.io;
  120. info.cmd = DRV_CTL_CTX_WR_CMD;
  121. io->cid_addr = cid_addr;
  122. io->offset = off;
  123. io->data = val;
  124. ethdev->drv_ctl(dev->netdev, &info);
  125. }
  126. static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
  127. {
  128. struct cnic_local *cp = dev->cnic_priv;
  129. struct cnic_eth_dev *ethdev = cp->ethdev;
  130. struct drv_ctl_info info;
  131. struct drv_ctl_io *io = &info.data.io;
  132. info.cmd = DRV_CTL_IO_WR_CMD;
  133. io->offset = off;
  134. io->data = val;
  135. ethdev->drv_ctl(dev->netdev, &info);
  136. }
  137. static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
  138. {
  139. struct cnic_local *cp = dev->cnic_priv;
  140. struct cnic_eth_dev *ethdev = cp->ethdev;
  141. struct drv_ctl_info info;
  142. struct drv_ctl_io *io = &info.data.io;
  143. info.cmd = DRV_CTL_IO_RD_CMD;
  144. io->offset = off;
  145. ethdev->drv_ctl(dev->netdev, &info);
  146. return io->data;
  147. }
  148. static int cnic_in_use(struct cnic_sock *csk)
  149. {
  150. return test_bit(SK_F_INUSE, &csk->flags);
  151. }
  152. static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
  153. {
  154. struct cnic_local *cp = dev->cnic_priv;
  155. struct cnic_eth_dev *ethdev = cp->ethdev;
  156. struct drv_ctl_info info;
  157. info.cmd = DRV_CTL_COMPLETION_CMD;
  158. info.data.comp.comp_count = count;
  159. ethdev->drv_ctl(dev->netdev, &info);
  160. }
  161. static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
  162. struct cnic_sock *csk)
  163. {
  164. struct iscsi_path path_req;
  165. char *buf = NULL;
  166. u16 len = 0;
  167. u32 msg_type = ISCSI_KEVENT_IF_DOWN;
  168. struct cnic_ulp_ops *ulp_ops;
  169. if (cp->uio_dev == -1)
  170. return -ENODEV;
  171. if (csk) {
  172. len = sizeof(path_req);
  173. buf = (char *) &path_req;
  174. memset(&path_req, 0, len);
  175. msg_type = ISCSI_KEVENT_PATH_REQ;
  176. path_req.handle = (u64) csk->l5_cid;
  177. if (test_bit(SK_F_IPV6, &csk->flags)) {
  178. memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
  179. sizeof(struct in6_addr));
  180. path_req.ip_addr_len = 16;
  181. } else {
  182. memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
  183. sizeof(struct in_addr));
  184. path_req.ip_addr_len = 4;
  185. }
  186. path_req.vlan_id = csk->vlan_id;
  187. path_req.pmtu = csk->mtu;
  188. }
  189. rcu_read_lock();
  190. ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
  191. if (ulp_ops)
  192. ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
  193. rcu_read_unlock();
  194. return 0;
  195. }
  196. static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
  197. char *buf, u16 len)
  198. {
  199. int rc = -EINVAL;
  200. switch (msg_type) {
  201. case ISCSI_UEVENT_PATH_UPDATE: {
  202. struct cnic_local *cp;
  203. u32 l5_cid;
  204. struct cnic_sock *csk;
  205. struct iscsi_path *path_resp;
  206. if (len < sizeof(*path_resp))
  207. break;
  208. path_resp = (struct iscsi_path *) buf;
  209. cp = dev->cnic_priv;
  210. l5_cid = (u32) path_resp->handle;
  211. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  212. break;
  213. csk = &cp->csk_tbl[l5_cid];
  214. csk_hold(csk);
  215. if (cnic_in_use(csk)) {
  216. memcpy(csk->ha, path_resp->mac_addr, 6);
  217. if (test_bit(SK_F_IPV6, &csk->flags))
  218. memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
  219. sizeof(struct in6_addr));
  220. else
  221. memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
  222. sizeof(struct in_addr));
  223. if (is_valid_ether_addr(csk->ha))
  224. cnic_cm_set_pg(csk);
  225. }
  226. csk_put(csk);
  227. rc = 0;
  228. }
  229. }
  230. return rc;
  231. }
  232. static int cnic_offld_prep(struct cnic_sock *csk)
  233. {
  234. if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  235. return 0;
  236. if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
  237. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  238. return 0;
  239. }
  240. return 1;
  241. }
  242. static int cnic_close_prep(struct cnic_sock *csk)
  243. {
  244. clear_bit(SK_F_CONNECT_START, &csk->flags);
  245. smp_mb__after_clear_bit();
  246. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  247. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  248. msleep(1);
  249. return 1;
  250. }
  251. return 0;
  252. }
  253. static int cnic_abort_prep(struct cnic_sock *csk)
  254. {
  255. clear_bit(SK_F_CONNECT_START, &csk->flags);
  256. smp_mb__after_clear_bit();
  257. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  258. msleep(1);
  259. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  260. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  261. return 1;
  262. }
  263. return 0;
  264. }
  265. static void cnic_uio_stop(void)
  266. {
  267. struct cnic_dev *dev;
  268. read_lock(&cnic_dev_lock);
  269. list_for_each_entry(dev, &cnic_dev_list, list) {
  270. struct cnic_local *cp = dev->cnic_priv;
  271. if (cp->cnic_uinfo)
  272. cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
  273. }
  274. read_unlock(&cnic_dev_lock);
  275. }
  276. int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
  277. {
  278. struct cnic_dev *dev;
  279. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  280. printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
  281. ulp_type);
  282. return -EINVAL;
  283. }
  284. mutex_lock(&cnic_lock);
  285. if (cnic_ulp_tbl[ulp_type]) {
  286. printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
  287. "been registered\n", ulp_type);
  288. mutex_unlock(&cnic_lock);
  289. return -EBUSY;
  290. }
  291. read_lock(&cnic_dev_lock);
  292. list_for_each_entry(dev, &cnic_dev_list, list) {
  293. struct cnic_local *cp = dev->cnic_priv;
  294. clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
  295. }
  296. read_unlock(&cnic_dev_lock);
  297. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
  298. mutex_unlock(&cnic_lock);
  299. /* Prevent race conditions with netdev_event */
  300. rtnl_lock();
  301. read_lock(&cnic_dev_lock);
  302. list_for_each_entry(dev, &cnic_dev_list, list) {
  303. struct cnic_local *cp = dev->cnic_priv;
  304. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
  305. ulp_ops->cnic_init(dev);
  306. }
  307. read_unlock(&cnic_dev_lock);
  308. rtnl_unlock();
  309. return 0;
  310. }
  311. int cnic_unregister_driver(int ulp_type)
  312. {
  313. struct cnic_dev *dev;
  314. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  315. printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
  316. ulp_type);
  317. return -EINVAL;
  318. }
  319. mutex_lock(&cnic_lock);
  320. if (!cnic_ulp_tbl[ulp_type]) {
  321. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
  322. "been registered\n", ulp_type);
  323. goto out_unlock;
  324. }
  325. read_lock(&cnic_dev_lock);
  326. list_for_each_entry(dev, &cnic_dev_list, list) {
  327. struct cnic_local *cp = dev->cnic_priv;
  328. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  329. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
  330. "still has devices registered\n", ulp_type);
  331. read_unlock(&cnic_dev_lock);
  332. goto out_unlock;
  333. }
  334. }
  335. read_unlock(&cnic_dev_lock);
  336. if (ulp_type == CNIC_ULP_ISCSI)
  337. cnic_uio_stop();
  338. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
  339. mutex_unlock(&cnic_lock);
  340. synchronize_rcu();
  341. return 0;
  342. out_unlock:
  343. mutex_unlock(&cnic_lock);
  344. return -EINVAL;
  345. }
  346. static int cnic_start_hw(struct cnic_dev *);
  347. static void cnic_stop_hw(struct cnic_dev *);
  348. static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
  349. void *ulp_ctx)
  350. {
  351. struct cnic_local *cp = dev->cnic_priv;
  352. struct cnic_ulp_ops *ulp_ops;
  353. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  354. printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
  355. ulp_type);
  356. return -EINVAL;
  357. }
  358. mutex_lock(&cnic_lock);
  359. if (cnic_ulp_tbl[ulp_type] == NULL) {
  360. printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
  361. "has not been registered\n", ulp_type);
  362. mutex_unlock(&cnic_lock);
  363. return -EAGAIN;
  364. }
  365. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  366. printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
  367. "been registered to this device\n", ulp_type);
  368. mutex_unlock(&cnic_lock);
  369. return -EBUSY;
  370. }
  371. clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
  372. cp->ulp_handle[ulp_type] = ulp_ctx;
  373. ulp_ops = cnic_ulp_tbl[ulp_type];
  374. rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
  375. cnic_hold(dev);
  376. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  377. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
  378. ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
  379. mutex_unlock(&cnic_lock);
  380. return 0;
  381. }
  382. EXPORT_SYMBOL(cnic_register_driver);
  383. static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
  384. {
  385. struct cnic_local *cp = dev->cnic_priv;
  386. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  387. printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
  388. ulp_type);
  389. return -EINVAL;
  390. }
  391. mutex_lock(&cnic_lock);
  392. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  393. rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
  394. cnic_put(dev);
  395. } else {
  396. printk(KERN_ERR PFX "cnic_unregister_device: device not "
  397. "registered to this ulp type %d\n", ulp_type);
  398. mutex_unlock(&cnic_lock);
  399. return -EINVAL;
  400. }
  401. mutex_unlock(&cnic_lock);
  402. synchronize_rcu();
  403. return 0;
  404. }
  405. EXPORT_SYMBOL(cnic_unregister_driver);
  406. static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
  407. {
  408. id_tbl->start = start_id;
  409. id_tbl->max = size;
  410. id_tbl->next = 0;
  411. spin_lock_init(&id_tbl->lock);
  412. id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
  413. if (!id_tbl->table)
  414. return -ENOMEM;
  415. return 0;
  416. }
  417. static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
  418. {
  419. kfree(id_tbl->table);
  420. id_tbl->table = NULL;
  421. }
  422. static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
  423. {
  424. int ret = -1;
  425. id -= id_tbl->start;
  426. if (id >= id_tbl->max)
  427. return ret;
  428. spin_lock(&id_tbl->lock);
  429. if (!test_bit(id, id_tbl->table)) {
  430. set_bit(id, id_tbl->table);
  431. ret = 0;
  432. }
  433. spin_unlock(&id_tbl->lock);
  434. return ret;
  435. }
  436. /* Returns -1 if not successful */
  437. static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
  438. {
  439. u32 id;
  440. spin_lock(&id_tbl->lock);
  441. id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
  442. if (id >= id_tbl->max) {
  443. id = -1;
  444. if (id_tbl->next != 0) {
  445. id = find_first_zero_bit(id_tbl->table, id_tbl->next);
  446. if (id >= id_tbl->next)
  447. id = -1;
  448. }
  449. }
  450. if (id < id_tbl->max) {
  451. set_bit(id, id_tbl->table);
  452. id_tbl->next = (id + 1) & (id_tbl->max - 1);
  453. id += id_tbl->start;
  454. }
  455. spin_unlock(&id_tbl->lock);
  456. return id;
  457. }
  458. static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
  459. {
  460. if (id == -1)
  461. return;
  462. id -= id_tbl->start;
  463. if (id >= id_tbl->max)
  464. return;
  465. clear_bit(id, id_tbl->table);
  466. }
  467. static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
  468. {
  469. int i;
  470. if (!dma->pg_arr)
  471. return;
  472. for (i = 0; i < dma->num_pages; i++) {
  473. if (dma->pg_arr[i]) {
  474. pci_free_consistent(dev->pcidev, BCM_PAGE_SIZE,
  475. dma->pg_arr[i], dma->pg_map_arr[i]);
  476. dma->pg_arr[i] = NULL;
  477. }
  478. }
  479. if (dma->pgtbl) {
  480. pci_free_consistent(dev->pcidev, dma->pgtbl_size,
  481. dma->pgtbl, dma->pgtbl_map);
  482. dma->pgtbl = NULL;
  483. }
  484. kfree(dma->pg_arr);
  485. dma->pg_arr = NULL;
  486. dma->num_pages = 0;
  487. }
  488. static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
  489. {
  490. int i;
  491. u32 *page_table = dma->pgtbl;
  492. for (i = 0; i < dma->num_pages; i++) {
  493. /* Each entry needs to be in big endian format. */
  494. *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
  495. page_table++;
  496. *page_table = (u32) dma->pg_map_arr[i];
  497. page_table++;
  498. }
  499. }
  500. static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
  501. int pages, int use_pg_tbl)
  502. {
  503. int i, size;
  504. struct cnic_local *cp = dev->cnic_priv;
  505. size = pages * (sizeof(void *) + sizeof(dma_addr_t));
  506. dma->pg_arr = kzalloc(size, GFP_ATOMIC);
  507. if (dma->pg_arr == NULL)
  508. return -ENOMEM;
  509. dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
  510. dma->num_pages = pages;
  511. for (i = 0; i < pages; i++) {
  512. dma->pg_arr[i] = pci_alloc_consistent(dev->pcidev,
  513. BCM_PAGE_SIZE,
  514. &dma->pg_map_arr[i]);
  515. if (dma->pg_arr[i] == NULL)
  516. goto error;
  517. }
  518. if (!use_pg_tbl)
  519. return 0;
  520. dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
  521. ~(BCM_PAGE_SIZE - 1);
  522. dma->pgtbl = pci_alloc_consistent(dev->pcidev, dma->pgtbl_size,
  523. &dma->pgtbl_map);
  524. if (dma->pgtbl == NULL)
  525. goto error;
  526. cp->setup_pgtbl(dev, dma);
  527. return 0;
  528. error:
  529. cnic_free_dma(dev, dma);
  530. return -ENOMEM;
  531. }
  532. static void cnic_free_resc(struct cnic_dev *dev)
  533. {
  534. struct cnic_local *cp = dev->cnic_priv;
  535. int i = 0;
  536. if (cp->cnic_uinfo) {
  537. while (cp->uio_dev != -1 && i < 15) {
  538. msleep(100);
  539. i++;
  540. }
  541. uio_unregister_device(cp->cnic_uinfo);
  542. kfree(cp->cnic_uinfo);
  543. cp->cnic_uinfo = NULL;
  544. }
  545. if (cp->l2_buf) {
  546. pci_free_consistent(dev->pcidev, cp->l2_buf_size,
  547. cp->l2_buf, cp->l2_buf_map);
  548. cp->l2_buf = NULL;
  549. }
  550. if (cp->l2_ring) {
  551. pci_free_consistent(dev->pcidev, cp->l2_ring_size,
  552. cp->l2_ring, cp->l2_ring_map);
  553. cp->l2_ring = NULL;
  554. }
  555. for (i = 0; i < cp->ctx_blks; i++) {
  556. if (cp->ctx_arr[i].ctx) {
  557. pci_free_consistent(dev->pcidev, cp->ctx_blk_size,
  558. cp->ctx_arr[i].ctx,
  559. cp->ctx_arr[i].mapping);
  560. cp->ctx_arr[i].ctx = NULL;
  561. }
  562. }
  563. kfree(cp->ctx_arr);
  564. cp->ctx_arr = NULL;
  565. cp->ctx_blks = 0;
  566. cnic_free_dma(dev, &cp->gbl_buf_info);
  567. cnic_free_dma(dev, &cp->conn_buf_info);
  568. cnic_free_dma(dev, &cp->kwq_info);
  569. cnic_free_dma(dev, &cp->kcq_info);
  570. kfree(cp->iscsi_tbl);
  571. cp->iscsi_tbl = NULL;
  572. kfree(cp->ctx_tbl);
  573. cp->ctx_tbl = NULL;
  574. cnic_free_id_tbl(&cp->cid_tbl);
  575. }
  576. static int cnic_alloc_context(struct cnic_dev *dev)
  577. {
  578. struct cnic_local *cp = dev->cnic_priv;
  579. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  580. int i, k, arr_size;
  581. cp->ctx_blk_size = BCM_PAGE_SIZE;
  582. cp->cids_per_blk = BCM_PAGE_SIZE / 128;
  583. arr_size = BNX2_MAX_CID / cp->cids_per_blk *
  584. sizeof(struct cnic_ctx);
  585. cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
  586. if (cp->ctx_arr == NULL)
  587. return -ENOMEM;
  588. k = 0;
  589. for (i = 0; i < 2; i++) {
  590. u32 j, reg, off, lo, hi;
  591. if (i == 0)
  592. off = BNX2_PG_CTX_MAP;
  593. else
  594. off = BNX2_ISCSI_CTX_MAP;
  595. reg = cnic_reg_rd_ind(dev, off);
  596. lo = reg >> 16;
  597. hi = reg & 0xffff;
  598. for (j = lo; j < hi; j += cp->cids_per_blk, k++)
  599. cp->ctx_arr[k].cid = j;
  600. }
  601. cp->ctx_blks = k;
  602. if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
  603. cp->ctx_blks = 0;
  604. return -ENOMEM;
  605. }
  606. for (i = 0; i < cp->ctx_blks; i++) {
  607. cp->ctx_arr[i].ctx =
  608. pci_alloc_consistent(dev->pcidev, BCM_PAGE_SIZE,
  609. &cp->ctx_arr[i].mapping);
  610. if (cp->ctx_arr[i].ctx == NULL)
  611. return -ENOMEM;
  612. }
  613. }
  614. return 0;
  615. }
  616. static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
  617. {
  618. struct cnic_local *cp = dev->cnic_priv;
  619. struct uio_info *uinfo;
  620. int ret;
  621. ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
  622. if (ret)
  623. goto error;
  624. cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
  625. ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
  626. if (ret)
  627. goto error;
  628. cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
  629. ret = cnic_alloc_context(dev);
  630. if (ret)
  631. goto error;
  632. cp->l2_ring_size = 2 * BCM_PAGE_SIZE;
  633. cp->l2_ring = pci_alloc_consistent(dev->pcidev, cp->l2_ring_size,
  634. &cp->l2_ring_map);
  635. if (!cp->l2_ring)
  636. goto error;
  637. cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
  638. cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
  639. cp->l2_buf = pci_alloc_consistent(dev->pcidev, cp->l2_buf_size,
  640. &cp->l2_buf_map);
  641. if (!cp->l2_buf)
  642. goto error;
  643. uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
  644. if (!uinfo)
  645. goto error;
  646. uinfo->mem[0].addr = dev->netdev->base_addr;
  647. uinfo->mem[0].internal_addr = dev->regview;
  648. uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
  649. uinfo->mem[0].memtype = UIO_MEM_PHYS;
  650. uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
  651. if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
  652. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
  653. else
  654. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
  655. uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
  656. uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
  657. uinfo->mem[2].size = cp->l2_ring_size;
  658. uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
  659. uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
  660. uinfo->mem[3].size = cp->l2_buf_size;
  661. uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
  662. uinfo->name = "bnx2_cnic";
  663. uinfo->version = CNIC_MODULE_VERSION;
  664. uinfo->irq = UIO_IRQ_CUSTOM;
  665. uinfo->open = cnic_uio_open;
  666. uinfo->release = cnic_uio_close;
  667. uinfo->priv = dev;
  668. ret = uio_register_device(&dev->pcidev->dev, uinfo);
  669. if (ret) {
  670. kfree(uinfo);
  671. goto error;
  672. }
  673. cp->cnic_uinfo = uinfo;
  674. return 0;
  675. error:
  676. cnic_free_resc(dev);
  677. return ret;
  678. }
  679. static inline u32 cnic_kwq_avail(struct cnic_local *cp)
  680. {
  681. return cp->max_kwq_idx -
  682. ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
  683. }
  684. static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
  685. u32 num_wqes)
  686. {
  687. struct cnic_local *cp = dev->cnic_priv;
  688. struct kwqe *prod_qe;
  689. u16 prod, sw_prod, i;
  690. if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
  691. return -EAGAIN; /* bnx2 is down */
  692. spin_lock_bh(&cp->cnic_ulp_lock);
  693. if (num_wqes > cnic_kwq_avail(cp) &&
  694. !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
  695. spin_unlock_bh(&cp->cnic_ulp_lock);
  696. return -EAGAIN;
  697. }
  698. cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
  699. prod = cp->kwq_prod_idx;
  700. sw_prod = prod & MAX_KWQ_IDX;
  701. for (i = 0; i < num_wqes; i++) {
  702. prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
  703. memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
  704. prod++;
  705. sw_prod = prod & MAX_KWQ_IDX;
  706. }
  707. cp->kwq_prod_idx = prod;
  708. CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
  709. spin_unlock_bh(&cp->cnic_ulp_lock);
  710. return 0;
  711. }
  712. static void service_kcqes(struct cnic_dev *dev, int num_cqes)
  713. {
  714. struct cnic_local *cp = dev->cnic_priv;
  715. int i, j;
  716. i = 0;
  717. j = 1;
  718. while (num_cqes) {
  719. struct cnic_ulp_ops *ulp_ops;
  720. int ulp_type;
  721. u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
  722. u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
  723. if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
  724. cnic_kwq_completion(dev, 1);
  725. while (j < num_cqes) {
  726. u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
  727. if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
  728. break;
  729. if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
  730. cnic_kwq_completion(dev, 1);
  731. j++;
  732. }
  733. if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
  734. ulp_type = CNIC_ULP_RDMA;
  735. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
  736. ulp_type = CNIC_ULP_ISCSI;
  737. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
  738. ulp_type = CNIC_ULP_L4;
  739. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
  740. goto end;
  741. else {
  742. printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
  743. dev->netdev->name, kcqe_op_flag);
  744. goto end;
  745. }
  746. rcu_read_lock();
  747. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  748. if (likely(ulp_ops)) {
  749. ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
  750. cp->completed_kcq + i, j);
  751. }
  752. rcu_read_unlock();
  753. end:
  754. num_cqes -= j;
  755. i += j;
  756. j = 1;
  757. }
  758. return;
  759. }
  760. static u16 cnic_bnx2_next_idx(u16 idx)
  761. {
  762. return idx + 1;
  763. }
  764. static u16 cnic_bnx2_hw_idx(u16 idx)
  765. {
  766. return idx;
  767. }
  768. static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
  769. {
  770. struct cnic_local *cp = dev->cnic_priv;
  771. u16 i, ri, last;
  772. struct kcqe *kcqe;
  773. int kcqe_cnt = 0, last_cnt = 0;
  774. i = ri = last = *sw_prod;
  775. ri &= MAX_KCQ_IDX;
  776. while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
  777. kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
  778. cp->completed_kcq[kcqe_cnt++] = kcqe;
  779. i = cp->next_idx(i);
  780. ri = i & MAX_KCQ_IDX;
  781. if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
  782. last_cnt = kcqe_cnt;
  783. last = i;
  784. }
  785. }
  786. *sw_prod = last;
  787. return last_cnt;
  788. }
  789. static void cnic_chk_bnx2_pkt_rings(struct cnic_local *cp)
  790. {
  791. u16 rx_cons = *cp->rx_cons_ptr;
  792. u16 tx_cons = *cp->tx_cons_ptr;
  793. if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
  794. cp->tx_cons = tx_cons;
  795. cp->rx_cons = rx_cons;
  796. uio_event_notify(cp->cnic_uinfo);
  797. }
  798. }
  799. static int cnic_service_bnx2(void *data, void *status_blk)
  800. {
  801. struct cnic_dev *dev = data;
  802. struct status_block *sblk = status_blk;
  803. struct cnic_local *cp = dev->cnic_priv;
  804. u32 status_idx = sblk->status_idx;
  805. u16 hw_prod, sw_prod;
  806. int kcqe_cnt;
  807. if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  808. return status_idx;
  809. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  810. hw_prod = sblk->status_completion_producer_index;
  811. sw_prod = cp->kcq_prod_idx;
  812. while (sw_prod != hw_prod) {
  813. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  814. if (kcqe_cnt == 0)
  815. goto done;
  816. service_kcqes(dev, kcqe_cnt);
  817. /* Tell compiler that status_blk fields can change. */
  818. barrier();
  819. if (status_idx != sblk->status_idx) {
  820. status_idx = sblk->status_idx;
  821. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  822. hw_prod = sblk->status_completion_producer_index;
  823. } else
  824. break;
  825. }
  826. done:
  827. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  828. cp->kcq_prod_idx = sw_prod;
  829. cnic_chk_bnx2_pkt_rings(cp);
  830. return status_idx;
  831. }
  832. static void cnic_service_bnx2_msix(unsigned long data)
  833. {
  834. struct cnic_dev *dev = (struct cnic_dev *) data;
  835. struct cnic_local *cp = dev->cnic_priv;
  836. struct status_block_msix *status_blk = cp->bnx2_status_blk;
  837. u32 status_idx = status_blk->status_idx;
  838. u16 hw_prod, sw_prod;
  839. int kcqe_cnt;
  840. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  841. hw_prod = status_blk->status_completion_producer_index;
  842. sw_prod = cp->kcq_prod_idx;
  843. while (sw_prod != hw_prod) {
  844. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  845. if (kcqe_cnt == 0)
  846. goto done;
  847. service_kcqes(dev, kcqe_cnt);
  848. /* Tell compiler that status_blk fields can change. */
  849. barrier();
  850. if (status_idx != status_blk->status_idx) {
  851. status_idx = status_blk->status_idx;
  852. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  853. hw_prod = status_blk->status_completion_producer_index;
  854. } else
  855. break;
  856. }
  857. done:
  858. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  859. cp->kcq_prod_idx = sw_prod;
  860. cnic_chk_bnx2_pkt_rings(cp);
  861. cp->last_status_idx = status_idx;
  862. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  863. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  864. }
  865. static irqreturn_t cnic_irq(int irq, void *dev_instance)
  866. {
  867. struct cnic_dev *dev = dev_instance;
  868. struct cnic_local *cp = dev->cnic_priv;
  869. u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
  870. if (cp->ack_int)
  871. cp->ack_int(dev);
  872. prefetch(cp->status_blk);
  873. prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
  874. if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  875. tasklet_schedule(&cp->cnic_irq_task);
  876. return IRQ_HANDLED;
  877. }
  878. static void cnic_ulp_stop(struct cnic_dev *dev)
  879. {
  880. struct cnic_local *cp = dev->cnic_priv;
  881. int if_type;
  882. if (cp->cnic_uinfo)
  883. cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
  884. rcu_read_lock();
  885. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  886. struct cnic_ulp_ops *ulp_ops;
  887. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  888. if (!ulp_ops)
  889. continue;
  890. if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  891. ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
  892. }
  893. rcu_read_unlock();
  894. }
  895. static void cnic_ulp_start(struct cnic_dev *dev)
  896. {
  897. struct cnic_local *cp = dev->cnic_priv;
  898. int if_type;
  899. rcu_read_lock();
  900. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  901. struct cnic_ulp_ops *ulp_ops;
  902. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  903. if (!ulp_ops || !ulp_ops->cnic_start)
  904. continue;
  905. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  906. ulp_ops->cnic_start(cp->ulp_handle[if_type]);
  907. }
  908. rcu_read_unlock();
  909. }
  910. static int cnic_ctl(void *data, struct cnic_ctl_info *info)
  911. {
  912. struct cnic_dev *dev = data;
  913. switch (info->cmd) {
  914. case CNIC_CTL_STOP_CMD:
  915. cnic_hold(dev);
  916. mutex_lock(&cnic_lock);
  917. cnic_ulp_stop(dev);
  918. cnic_stop_hw(dev);
  919. mutex_unlock(&cnic_lock);
  920. cnic_put(dev);
  921. break;
  922. case CNIC_CTL_START_CMD:
  923. cnic_hold(dev);
  924. mutex_lock(&cnic_lock);
  925. if (!cnic_start_hw(dev))
  926. cnic_ulp_start(dev);
  927. mutex_unlock(&cnic_lock);
  928. cnic_put(dev);
  929. break;
  930. default:
  931. return -EINVAL;
  932. }
  933. return 0;
  934. }
  935. static void cnic_ulp_init(struct cnic_dev *dev)
  936. {
  937. int i;
  938. struct cnic_local *cp = dev->cnic_priv;
  939. rcu_read_lock();
  940. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  941. struct cnic_ulp_ops *ulp_ops;
  942. ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
  943. if (!ulp_ops || !ulp_ops->cnic_init)
  944. continue;
  945. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  946. ulp_ops->cnic_init(dev);
  947. }
  948. rcu_read_unlock();
  949. }
  950. static void cnic_ulp_exit(struct cnic_dev *dev)
  951. {
  952. int i;
  953. struct cnic_local *cp = dev->cnic_priv;
  954. rcu_read_lock();
  955. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  956. struct cnic_ulp_ops *ulp_ops;
  957. ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
  958. if (!ulp_ops || !ulp_ops->cnic_exit)
  959. continue;
  960. if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  961. ulp_ops->cnic_exit(dev);
  962. }
  963. rcu_read_unlock();
  964. }
  965. static int cnic_cm_offload_pg(struct cnic_sock *csk)
  966. {
  967. struct cnic_dev *dev = csk->dev;
  968. struct l4_kwq_offload_pg *l4kwqe;
  969. struct kwqe *wqes[1];
  970. l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
  971. memset(l4kwqe, 0, sizeof(*l4kwqe));
  972. wqes[0] = (struct kwqe *) l4kwqe;
  973. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
  974. l4kwqe->flags =
  975. L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
  976. l4kwqe->l2hdr_nbytes = ETH_HLEN;
  977. l4kwqe->da0 = csk->ha[0];
  978. l4kwqe->da1 = csk->ha[1];
  979. l4kwqe->da2 = csk->ha[2];
  980. l4kwqe->da3 = csk->ha[3];
  981. l4kwqe->da4 = csk->ha[4];
  982. l4kwqe->da5 = csk->ha[5];
  983. l4kwqe->sa0 = dev->mac_addr[0];
  984. l4kwqe->sa1 = dev->mac_addr[1];
  985. l4kwqe->sa2 = dev->mac_addr[2];
  986. l4kwqe->sa3 = dev->mac_addr[3];
  987. l4kwqe->sa4 = dev->mac_addr[4];
  988. l4kwqe->sa5 = dev->mac_addr[5];
  989. l4kwqe->etype = ETH_P_IP;
  990. l4kwqe->ipid_count = DEF_IPID_COUNT;
  991. l4kwqe->host_opaque = csk->l5_cid;
  992. if (csk->vlan_id) {
  993. l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
  994. l4kwqe->vlan_tag = csk->vlan_id;
  995. l4kwqe->l2hdr_nbytes += 4;
  996. }
  997. return dev->submit_kwqes(dev, wqes, 1);
  998. }
  999. static int cnic_cm_update_pg(struct cnic_sock *csk)
  1000. {
  1001. struct cnic_dev *dev = csk->dev;
  1002. struct l4_kwq_update_pg *l4kwqe;
  1003. struct kwqe *wqes[1];
  1004. l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
  1005. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1006. wqes[0] = (struct kwqe *) l4kwqe;
  1007. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
  1008. l4kwqe->flags =
  1009. L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
  1010. l4kwqe->pg_cid = csk->pg_cid;
  1011. l4kwqe->da0 = csk->ha[0];
  1012. l4kwqe->da1 = csk->ha[1];
  1013. l4kwqe->da2 = csk->ha[2];
  1014. l4kwqe->da3 = csk->ha[3];
  1015. l4kwqe->da4 = csk->ha[4];
  1016. l4kwqe->da5 = csk->ha[5];
  1017. l4kwqe->pg_host_opaque = csk->l5_cid;
  1018. l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
  1019. return dev->submit_kwqes(dev, wqes, 1);
  1020. }
  1021. static int cnic_cm_upload_pg(struct cnic_sock *csk)
  1022. {
  1023. struct cnic_dev *dev = csk->dev;
  1024. struct l4_kwq_upload *l4kwqe;
  1025. struct kwqe *wqes[1];
  1026. l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
  1027. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1028. wqes[0] = (struct kwqe *) l4kwqe;
  1029. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
  1030. l4kwqe->flags =
  1031. L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
  1032. l4kwqe->cid = csk->pg_cid;
  1033. return dev->submit_kwqes(dev, wqes, 1);
  1034. }
  1035. static int cnic_cm_conn_req(struct cnic_sock *csk)
  1036. {
  1037. struct cnic_dev *dev = csk->dev;
  1038. struct l4_kwq_connect_req1 *l4kwqe1;
  1039. struct l4_kwq_connect_req2 *l4kwqe2;
  1040. struct l4_kwq_connect_req3 *l4kwqe3;
  1041. struct kwqe *wqes[3];
  1042. u8 tcp_flags = 0;
  1043. int num_wqes = 2;
  1044. l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
  1045. l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
  1046. l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
  1047. memset(l4kwqe1, 0, sizeof(*l4kwqe1));
  1048. memset(l4kwqe2, 0, sizeof(*l4kwqe2));
  1049. memset(l4kwqe3, 0, sizeof(*l4kwqe3));
  1050. l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
  1051. l4kwqe3->flags =
  1052. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
  1053. l4kwqe3->ka_timeout = csk->ka_timeout;
  1054. l4kwqe3->ka_interval = csk->ka_interval;
  1055. l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
  1056. l4kwqe3->tos = csk->tos;
  1057. l4kwqe3->ttl = csk->ttl;
  1058. l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
  1059. l4kwqe3->pmtu = csk->mtu;
  1060. l4kwqe3->rcv_buf = csk->rcv_buf;
  1061. l4kwqe3->snd_buf = csk->snd_buf;
  1062. l4kwqe3->seed = csk->seed;
  1063. wqes[0] = (struct kwqe *) l4kwqe1;
  1064. if (test_bit(SK_F_IPV6, &csk->flags)) {
  1065. wqes[1] = (struct kwqe *) l4kwqe2;
  1066. wqes[2] = (struct kwqe *) l4kwqe3;
  1067. num_wqes = 3;
  1068. l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
  1069. l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
  1070. l4kwqe2->flags =
  1071. L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
  1072. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
  1073. l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
  1074. l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
  1075. l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
  1076. l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
  1077. l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
  1078. l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
  1079. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
  1080. sizeof(struct tcphdr);
  1081. } else {
  1082. wqes[1] = (struct kwqe *) l4kwqe3;
  1083. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
  1084. sizeof(struct tcphdr);
  1085. }
  1086. l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
  1087. l4kwqe1->flags =
  1088. (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
  1089. L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
  1090. l4kwqe1->cid = csk->cid;
  1091. l4kwqe1->pg_cid = csk->pg_cid;
  1092. l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
  1093. l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
  1094. l4kwqe1->src_port = be16_to_cpu(csk->src_port);
  1095. l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
  1096. if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
  1097. tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
  1098. if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
  1099. tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
  1100. if (csk->tcp_flags & SK_TCP_NAGLE)
  1101. tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
  1102. if (csk->tcp_flags & SK_TCP_TIMESTAMP)
  1103. tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
  1104. if (csk->tcp_flags & SK_TCP_SACK)
  1105. tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
  1106. if (csk->tcp_flags & SK_TCP_SEG_SCALING)
  1107. tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
  1108. l4kwqe1->tcp_flags = tcp_flags;
  1109. return dev->submit_kwqes(dev, wqes, num_wqes);
  1110. }
  1111. static int cnic_cm_close_req(struct cnic_sock *csk)
  1112. {
  1113. struct cnic_dev *dev = csk->dev;
  1114. struct l4_kwq_close_req *l4kwqe;
  1115. struct kwqe *wqes[1];
  1116. l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
  1117. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1118. wqes[0] = (struct kwqe *) l4kwqe;
  1119. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
  1120. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
  1121. l4kwqe->cid = csk->cid;
  1122. return dev->submit_kwqes(dev, wqes, 1);
  1123. }
  1124. static int cnic_cm_abort_req(struct cnic_sock *csk)
  1125. {
  1126. struct cnic_dev *dev = csk->dev;
  1127. struct l4_kwq_reset_req *l4kwqe;
  1128. struct kwqe *wqes[1];
  1129. l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
  1130. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1131. wqes[0] = (struct kwqe *) l4kwqe;
  1132. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
  1133. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
  1134. l4kwqe->cid = csk->cid;
  1135. return dev->submit_kwqes(dev, wqes, 1);
  1136. }
  1137. static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
  1138. u32 l5_cid, struct cnic_sock **csk, void *context)
  1139. {
  1140. struct cnic_local *cp = dev->cnic_priv;
  1141. struct cnic_sock *csk1;
  1142. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1143. return -EINVAL;
  1144. csk1 = &cp->csk_tbl[l5_cid];
  1145. if (atomic_read(&csk1->ref_count))
  1146. return -EAGAIN;
  1147. if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
  1148. return -EBUSY;
  1149. csk1->dev = dev;
  1150. csk1->cid = cid;
  1151. csk1->l5_cid = l5_cid;
  1152. csk1->ulp_type = ulp_type;
  1153. csk1->context = context;
  1154. csk1->ka_timeout = DEF_KA_TIMEOUT;
  1155. csk1->ka_interval = DEF_KA_INTERVAL;
  1156. csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
  1157. csk1->tos = DEF_TOS;
  1158. csk1->ttl = DEF_TTL;
  1159. csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
  1160. csk1->rcv_buf = DEF_RCV_BUF;
  1161. csk1->snd_buf = DEF_SND_BUF;
  1162. csk1->seed = DEF_SEED;
  1163. *csk = csk1;
  1164. return 0;
  1165. }
  1166. static void cnic_cm_cleanup(struct cnic_sock *csk)
  1167. {
  1168. if (csk->src_port) {
  1169. struct cnic_dev *dev = csk->dev;
  1170. struct cnic_local *cp = dev->cnic_priv;
  1171. cnic_free_id(&cp->csk_port_tbl, csk->src_port);
  1172. csk->src_port = 0;
  1173. }
  1174. }
  1175. static void cnic_close_conn(struct cnic_sock *csk)
  1176. {
  1177. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
  1178. cnic_cm_upload_pg(csk);
  1179. clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1180. }
  1181. cnic_cm_cleanup(csk);
  1182. }
  1183. static int cnic_cm_destroy(struct cnic_sock *csk)
  1184. {
  1185. if (!cnic_in_use(csk))
  1186. return -EINVAL;
  1187. csk_hold(csk);
  1188. clear_bit(SK_F_INUSE, &csk->flags);
  1189. smp_mb__after_clear_bit();
  1190. while (atomic_read(&csk->ref_count) != 1)
  1191. msleep(1);
  1192. cnic_cm_cleanup(csk);
  1193. csk->flags = 0;
  1194. csk_put(csk);
  1195. return 0;
  1196. }
  1197. static inline u16 cnic_get_vlan(struct net_device *dev,
  1198. struct net_device **vlan_dev)
  1199. {
  1200. if (dev->priv_flags & IFF_802_1Q_VLAN) {
  1201. *vlan_dev = vlan_dev_real_dev(dev);
  1202. return vlan_dev_vlan_id(dev);
  1203. }
  1204. *vlan_dev = dev;
  1205. return 0;
  1206. }
  1207. static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
  1208. struct dst_entry **dst)
  1209. {
  1210. #if defined(CONFIG_INET)
  1211. struct flowi fl;
  1212. int err;
  1213. struct rtable *rt;
  1214. memset(&fl, 0, sizeof(fl));
  1215. fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
  1216. err = ip_route_output_key(&init_net, &rt, &fl);
  1217. if (!err)
  1218. *dst = &rt->u.dst;
  1219. return err;
  1220. #else
  1221. return -ENETUNREACH;
  1222. #endif
  1223. }
  1224. static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
  1225. struct dst_entry **dst)
  1226. {
  1227. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1228. struct flowi fl;
  1229. memset(&fl, 0, sizeof(fl));
  1230. ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
  1231. if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
  1232. fl.oif = dst_addr->sin6_scope_id;
  1233. *dst = ip6_route_output(&init_net, NULL, &fl);
  1234. if (*dst)
  1235. return 0;
  1236. #endif
  1237. return -ENETUNREACH;
  1238. }
  1239. static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
  1240. int ulp_type)
  1241. {
  1242. struct cnic_dev *dev = NULL;
  1243. struct dst_entry *dst;
  1244. struct net_device *netdev = NULL;
  1245. int err = -ENETUNREACH;
  1246. if (dst_addr->sin_family == AF_INET)
  1247. err = cnic_get_v4_route(dst_addr, &dst);
  1248. else if (dst_addr->sin_family == AF_INET6) {
  1249. struct sockaddr_in6 *dst_addr6 =
  1250. (struct sockaddr_in6 *) dst_addr;
  1251. err = cnic_get_v6_route(dst_addr6, &dst);
  1252. } else
  1253. return NULL;
  1254. if (err)
  1255. return NULL;
  1256. if (!dst->dev)
  1257. goto done;
  1258. cnic_get_vlan(dst->dev, &netdev);
  1259. dev = cnic_from_netdev(netdev);
  1260. done:
  1261. dst_release(dst);
  1262. if (dev)
  1263. cnic_put(dev);
  1264. return dev;
  1265. }
  1266. static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1267. {
  1268. struct cnic_dev *dev = csk->dev;
  1269. struct cnic_local *cp = dev->cnic_priv;
  1270. return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
  1271. }
  1272. static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1273. {
  1274. struct cnic_dev *dev = csk->dev;
  1275. struct cnic_local *cp = dev->cnic_priv;
  1276. int is_v6, err, rc = -ENETUNREACH;
  1277. struct dst_entry *dst;
  1278. struct net_device *realdev;
  1279. u32 local_port;
  1280. if (saddr->local.v6.sin6_family == AF_INET6 &&
  1281. saddr->remote.v6.sin6_family == AF_INET6)
  1282. is_v6 = 1;
  1283. else if (saddr->local.v4.sin_family == AF_INET &&
  1284. saddr->remote.v4.sin_family == AF_INET)
  1285. is_v6 = 0;
  1286. else
  1287. return -EINVAL;
  1288. clear_bit(SK_F_IPV6, &csk->flags);
  1289. if (is_v6) {
  1290. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1291. set_bit(SK_F_IPV6, &csk->flags);
  1292. err = cnic_get_v6_route(&saddr->remote.v6, &dst);
  1293. if (err)
  1294. return err;
  1295. if (!dst || dst->error || !dst->dev)
  1296. goto err_out;
  1297. memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
  1298. sizeof(struct in6_addr));
  1299. csk->dst_port = saddr->remote.v6.sin6_port;
  1300. local_port = saddr->local.v6.sin6_port;
  1301. #else
  1302. return rc;
  1303. #endif
  1304. } else {
  1305. err = cnic_get_v4_route(&saddr->remote.v4, &dst);
  1306. if (err)
  1307. return err;
  1308. if (!dst || dst->error || !dst->dev)
  1309. goto err_out;
  1310. csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
  1311. csk->dst_port = saddr->remote.v4.sin_port;
  1312. local_port = saddr->local.v4.sin_port;
  1313. }
  1314. csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
  1315. if (realdev != dev->netdev)
  1316. goto err_out;
  1317. if (local_port >= CNIC_LOCAL_PORT_MIN &&
  1318. local_port < CNIC_LOCAL_PORT_MAX) {
  1319. if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
  1320. local_port = 0;
  1321. } else
  1322. local_port = 0;
  1323. if (!local_port) {
  1324. local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
  1325. if (local_port == -1) {
  1326. rc = -ENOMEM;
  1327. goto err_out;
  1328. }
  1329. }
  1330. csk->src_port = local_port;
  1331. csk->mtu = dst_mtu(dst);
  1332. rc = 0;
  1333. err_out:
  1334. dst_release(dst);
  1335. return rc;
  1336. }
  1337. static void cnic_init_csk_state(struct cnic_sock *csk)
  1338. {
  1339. csk->state = 0;
  1340. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1341. clear_bit(SK_F_CLOSING, &csk->flags);
  1342. }
  1343. static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1344. {
  1345. int err = 0;
  1346. if (!cnic_in_use(csk))
  1347. return -EINVAL;
  1348. if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
  1349. return -EINVAL;
  1350. cnic_init_csk_state(csk);
  1351. err = cnic_get_route(csk, saddr);
  1352. if (err)
  1353. goto err_out;
  1354. err = cnic_resolve_addr(csk, saddr);
  1355. if (!err)
  1356. return 0;
  1357. err_out:
  1358. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1359. return err;
  1360. }
  1361. static int cnic_cm_abort(struct cnic_sock *csk)
  1362. {
  1363. struct cnic_local *cp = csk->dev->cnic_priv;
  1364. u32 opcode;
  1365. if (!cnic_in_use(csk))
  1366. return -EINVAL;
  1367. if (cnic_abort_prep(csk))
  1368. return cnic_cm_abort_req(csk);
  1369. /* Getting here means that we haven't started connect, or
  1370. * connect was not successful.
  1371. */
  1372. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  1373. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1374. opcode = csk->state;
  1375. else
  1376. opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
  1377. cp->close_conn(csk, opcode);
  1378. return 0;
  1379. }
  1380. static int cnic_cm_close(struct cnic_sock *csk)
  1381. {
  1382. if (!cnic_in_use(csk))
  1383. return -EINVAL;
  1384. if (cnic_close_prep(csk)) {
  1385. csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
  1386. return cnic_cm_close_req(csk);
  1387. }
  1388. return 0;
  1389. }
  1390. static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
  1391. u8 opcode)
  1392. {
  1393. struct cnic_ulp_ops *ulp_ops;
  1394. int ulp_type = csk->ulp_type;
  1395. rcu_read_lock();
  1396. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  1397. if (ulp_ops) {
  1398. if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
  1399. ulp_ops->cm_connect_complete(csk);
  1400. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
  1401. ulp_ops->cm_close_complete(csk);
  1402. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
  1403. ulp_ops->cm_remote_abort(csk);
  1404. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
  1405. ulp_ops->cm_abort_complete(csk);
  1406. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
  1407. ulp_ops->cm_remote_close(csk);
  1408. }
  1409. rcu_read_unlock();
  1410. }
  1411. static int cnic_cm_set_pg(struct cnic_sock *csk)
  1412. {
  1413. if (cnic_offld_prep(csk)) {
  1414. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1415. cnic_cm_update_pg(csk);
  1416. else
  1417. cnic_cm_offload_pg(csk);
  1418. }
  1419. return 0;
  1420. }
  1421. static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
  1422. {
  1423. struct cnic_local *cp = dev->cnic_priv;
  1424. u32 l5_cid = kcqe->pg_host_opaque;
  1425. u8 opcode = kcqe->op_code;
  1426. struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
  1427. csk_hold(csk);
  1428. if (!cnic_in_use(csk))
  1429. goto done;
  1430. if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1431. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1432. goto done;
  1433. }
  1434. csk->pg_cid = kcqe->pg_cid;
  1435. set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1436. cnic_cm_conn_req(csk);
  1437. done:
  1438. csk_put(csk);
  1439. }
  1440. static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
  1441. {
  1442. struct cnic_local *cp = dev->cnic_priv;
  1443. struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
  1444. u8 opcode = l4kcqe->op_code;
  1445. u32 l5_cid;
  1446. struct cnic_sock *csk;
  1447. if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
  1448. opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1449. cnic_cm_process_offld_pg(dev, l4kcqe);
  1450. return;
  1451. }
  1452. l5_cid = l4kcqe->conn_id;
  1453. if (opcode & 0x80)
  1454. l5_cid = l4kcqe->cid;
  1455. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1456. return;
  1457. csk = &cp->csk_tbl[l5_cid];
  1458. csk_hold(csk);
  1459. if (!cnic_in_use(csk)) {
  1460. csk_put(csk);
  1461. return;
  1462. }
  1463. switch (opcode) {
  1464. case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
  1465. if (l4kcqe->status == 0)
  1466. set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
  1467. smp_mb__before_clear_bit();
  1468. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1469. cnic_cm_upcall(cp, csk, opcode);
  1470. break;
  1471. case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
  1472. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
  1473. csk->state = opcode;
  1474. /* fall through */
  1475. case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
  1476. case L4_KCQE_OPCODE_VALUE_RESET_COMP:
  1477. cp->close_conn(csk, opcode);
  1478. break;
  1479. case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
  1480. cnic_cm_upcall(cp, csk, opcode);
  1481. break;
  1482. }
  1483. csk_put(csk);
  1484. }
  1485. static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
  1486. {
  1487. struct cnic_dev *dev = data;
  1488. int i;
  1489. for (i = 0; i < num; i++)
  1490. cnic_cm_process_kcqe(dev, kcqe[i]);
  1491. }
  1492. static struct cnic_ulp_ops cm_ulp_ops = {
  1493. .indicate_kcqes = cnic_cm_indicate_kcqe,
  1494. };
  1495. static void cnic_cm_free_mem(struct cnic_dev *dev)
  1496. {
  1497. struct cnic_local *cp = dev->cnic_priv;
  1498. kfree(cp->csk_tbl);
  1499. cp->csk_tbl = NULL;
  1500. cnic_free_id_tbl(&cp->csk_port_tbl);
  1501. }
  1502. static int cnic_cm_alloc_mem(struct cnic_dev *dev)
  1503. {
  1504. struct cnic_local *cp = dev->cnic_priv;
  1505. cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
  1506. GFP_KERNEL);
  1507. if (!cp->csk_tbl)
  1508. return -ENOMEM;
  1509. if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
  1510. CNIC_LOCAL_PORT_MIN)) {
  1511. cnic_cm_free_mem(dev);
  1512. return -ENOMEM;
  1513. }
  1514. return 0;
  1515. }
  1516. static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
  1517. {
  1518. if ((opcode == csk->state) ||
  1519. (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
  1520. csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
  1521. if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
  1522. return 1;
  1523. }
  1524. return 0;
  1525. }
  1526. static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
  1527. {
  1528. struct cnic_dev *dev = csk->dev;
  1529. struct cnic_local *cp = dev->cnic_priv;
  1530. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1531. if (cnic_ready_to_close(csk, opcode)) {
  1532. cnic_close_conn(csk);
  1533. cnic_cm_upcall(cp, csk, opcode);
  1534. }
  1535. }
  1536. static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
  1537. {
  1538. }
  1539. static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
  1540. {
  1541. u32 seed;
  1542. get_random_bytes(&seed, 4);
  1543. cnic_ctx_wr(dev, 45, 0, seed);
  1544. return 0;
  1545. }
  1546. static int cnic_cm_open(struct cnic_dev *dev)
  1547. {
  1548. struct cnic_local *cp = dev->cnic_priv;
  1549. int err;
  1550. err = cnic_cm_alloc_mem(dev);
  1551. if (err)
  1552. return err;
  1553. err = cp->start_cm(dev);
  1554. if (err)
  1555. goto err_out;
  1556. dev->cm_create = cnic_cm_create;
  1557. dev->cm_destroy = cnic_cm_destroy;
  1558. dev->cm_connect = cnic_cm_connect;
  1559. dev->cm_abort = cnic_cm_abort;
  1560. dev->cm_close = cnic_cm_close;
  1561. dev->cm_select_dev = cnic_cm_select_dev;
  1562. cp->ulp_handle[CNIC_ULP_L4] = dev;
  1563. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
  1564. return 0;
  1565. err_out:
  1566. cnic_cm_free_mem(dev);
  1567. return err;
  1568. }
  1569. static int cnic_cm_shutdown(struct cnic_dev *dev)
  1570. {
  1571. struct cnic_local *cp = dev->cnic_priv;
  1572. int i;
  1573. cp->stop_cm(dev);
  1574. if (!cp->csk_tbl)
  1575. return 0;
  1576. for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
  1577. struct cnic_sock *csk = &cp->csk_tbl[i];
  1578. clear_bit(SK_F_INUSE, &csk->flags);
  1579. cnic_cm_cleanup(csk);
  1580. }
  1581. cnic_cm_free_mem(dev);
  1582. return 0;
  1583. }
  1584. static void cnic_init_context(struct cnic_dev *dev, u32 cid)
  1585. {
  1586. struct cnic_local *cp = dev->cnic_priv;
  1587. u32 cid_addr;
  1588. int i;
  1589. if (CHIP_NUM(cp) == CHIP_NUM_5709)
  1590. return;
  1591. cid_addr = GET_CID_ADDR(cid);
  1592. for (i = 0; i < CTX_SIZE; i += 4)
  1593. cnic_ctx_wr(dev, cid_addr, i, 0);
  1594. }
  1595. static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
  1596. {
  1597. struct cnic_local *cp = dev->cnic_priv;
  1598. int ret = 0, i;
  1599. u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
  1600. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1601. return 0;
  1602. for (i = 0; i < cp->ctx_blks; i++) {
  1603. int j;
  1604. u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
  1605. u32 val;
  1606. memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
  1607. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
  1608. (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
  1609. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
  1610. (u64) cp->ctx_arr[i].mapping >> 32);
  1611. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
  1612. BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
  1613. for (j = 0; j < 10; j++) {
  1614. val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
  1615. if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
  1616. break;
  1617. udelay(5);
  1618. }
  1619. if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
  1620. ret = -EBUSY;
  1621. break;
  1622. }
  1623. }
  1624. return ret;
  1625. }
  1626. static void cnic_free_irq(struct cnic_dev *dev)
  1627. {
  1628. struct cnic_local *cp = dev->cnic_priv;
  1629. struct cnic_eth_dev *ethdev = cp->ethdev;
  1630. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1631. cp->disable_int_sync(dev);
  1632. tasklet_disable(&cp->cnic_irq_task);
  1633. free_irq(ethdev->irq_arr[0].vector, dev);
  1634. }
  1635. }
  1636. static int cnic_init_bnx2_irq(struct cnic_dev *dev)
  1637. {
  1638. struct cnic_local *cp = dev->cnic_priv;
  1639. struct cnic_eth_dev *ethdev = cp->ethdev;
  1640. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1641. int err, i = 0;
  1642. int sblk_num = cp->status_blk_num;
  1643. u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
  1644. BNX2_HC_SB_CONFIG_1;
  1645. CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
  1646. CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
  1647. CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
  1648. CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
  1649. cp->bnx2_status_blk = cp->status_blk;
  1650. cp->last_status_idx = cp->bnx2_status_blk->status_idx;
  1651. tasklet_init(&cp->cnic_irq_task, &cnic_service_bnx2_msix,
  1652. (unsigned long) dev);
  1653. err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
  1654. "cnic", dev);
  1655. if (err) {
  1656. tasklet_disable(&cp->cnic_irq_task);
  1657. return err;
  1658. }
  1659. while (cp->bnx2_status_blk->status_completion_producer_index &&
  1660. i < 10) {
  1661. CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
  1662. 1 << (11 + sblk_num));
  1663. udelay(10);
  1664. i++;
  1665. barrier();
  1666. }
  1667. if (cp->bnx2_status_blk->status_completion_producer_index) {
  1668. cnic_free_irq(dev);
  1669. goto failed;
  1670. }
  1671. } else {
  1672. struct status_block *sblk = cp->status_blk;
  1673. u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
  1674. int i = 0;
  1675. while (sblk->status_completion_producer_index && i < 10) {
  1676. CNIC_WR(dev, BNX2_HC_COMMAND,
  1677. hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
  1678. udelay(10);
  1679. i++;
  1680. barrier();
  1681. }
  1682. if (sblk->status_completion_producer_index)
  1683. goto failed;
  1684. }
  1685. return 0;
  1686. failed:
  1687. printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
  1688. dev->netdev->name);
  1689. return -EBUSY;
  1690. }
  1691. static void cnic_enable_bnx2_int(struct cnic_dev *dev)
  1692. {
  1693. struct cnic_local *cp = dev->cnic_priv;
  1694. struct cnic_eth_dev *ethdev = cp->ethdev;
  1695. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1696. return;
  1697. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1698. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  1699. }
  1700. static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
  1701. {
  1702. struct cnic_local *cp = dev->cnic_priv;
  1703. struct cnic_eth_dev *ethdev = cp->ethdev;
  1704. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1705. return;
  1706. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1707. BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
  1708. CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
  1709. synchronize_irq(ethdev->irq_arr[0].vector);
  1710. }
  1711. static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
  1712. {
  1713. struct cnic_local *cp = dev->cnic_priv;
  1714. struct cnic_eth_dev *ethdev = cp->ethdev;
  1715. u32 cid_addr, tx_cid, sb_id;
  1716. u32 val, offset0, offset1, offset2, offset3;
  1717. int i;
  1718. struct tx_bd *txbd;
  1719. dma_addr_t buf_map;
  1720. struct status_block *s_blk = cp->status_blk;
  1721. sb_id = cp->status_blk_num;
  1722. tx_cid = 20;
  1723. cnic_init_context(dev, tx_cid);
  1724. cnic_init_context(dev, tx_cid + 1);
  1725. cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
  1726. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1727. struct status_block_msix *sblk = cp->status_blk;
  1728. tx_cid = TX_TSS_CID + sb_id - 1;
  1729. cnic_init_context(dev, tx_cid);
  1730. CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
  1731. (TX_TSS_CID << 7));
  1732. cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
  1733. }
  1734. cp->tx_cons = *cp->tx_cons_ptr;
  1735. cid_addr = GET_CID_ADDR(tx_cid);
  1736. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  1737. u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
  1738. for (i = 0; i < PHY_CTX_SIZE; i += 4)
  1739. cnic_ctx_wr(dev, cid_addr2, i, 0);
  1740. offset0 = BNX2_L2CTX_TYPE_XI;
  1741. offset1 = BNX2_L2CTX_CMD_TYPE_XI;
  1742. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
  1743. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
  1744. } else {
  1745. offset0 = BNX2_L2CTX_TYPE;
  1746. offset1 = BNX2_L2CTX_CMD_TYPE;
  1747. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
  1748. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
  1749. }
  1750. val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
  1751. cnic_ctx_wr(dev, cid_addr, offset0, val);
  1752. val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
  1753. cnic_ctx_wr(dev, cid_addr, offset1, val);
  1754. txbd = (struct tx_bd *) cp->l2_ring;
  1755. buf_map = cp->l2_buf_map;
  1756. for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
  1757. txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
  1758. txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1759. }
  1760. val = (u64) cp->l2_ring_map >> 32;
  1761. cnic_ctx_wr(dev, cid_addr, offset2, val);
  1762. txbd->tx_bd_haddr_hi = val;
  1763. val = (u64) cp->l2_ring_map & 0xffffffff;
  1764. cnic_ctx_wr(dev, cid_addr, offset3, val);
  1765. txbd->tx_bd_haddr_lo = val;
  1766. }
  1767. static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
  1768. {
  1769. struct cnic_local *cp = dev->cnic_priv;
  1770. struct cnic_eth_dev *ethdev = cp->ethdev;
  1771. u32 cid_addr, sb_id, val, coal_reg, coal_val;
  1772. int i;
  1773. struct rx_bd *rxbd;
  1774. struct status_block *s_blk = cp->status_blk;
  1775. sb_id = cp->status_blk_num;
  1776. cnic_init_context(dev, 2);
  1777. cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
  1778. coal_reg = BNX2_HC_COMMAND;
  1779. coal_val = CNIC_RD(dev, coal_reg);
  1780. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1781. struct status_block_msix *sblk = cp->status_blk;
  1782. cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
  1783. coal_reg = BNX2_HC_COALESCE_NOW;
  1784. coal_val = 1 << (11 + sb_id);
  1785. }
  1786. i = 0;
  1787. while (!(*cp->rx_cons_ptr != 0) && i < 10) {
  1788. CNIC_WR(dev, coal_reg, coal_val);
  1789. udelay(10);
  1790. i++;
  1791. barrier();
  1792. }
  1793. cp->rx_cons = *cp->rx_cons_ptr;
  1794. cid_addr = GET_CID_ADDR(2);
  1795. val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
  1796. BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
  1797. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
  1798. if (sb_id == 0)
  1799. val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT;
  1800. else
  1801. val = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1802. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
  1803. rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
  1804. for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
  1805. dma_addr_t buf_map;
  1806. int n = (i % cp->l2_rx_ring_size) + 1;
  1807. buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
  1808. rxbd->rx_bd_len = cp->l2_single_buf_size;
  1809. rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
  1810. rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
  1811. rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1812. }
  1813. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
  1814. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
  1815. rxbd->rx_bd_haddr_hi = val;
  1816. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
  1817. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
  1818. rxbd->rx_bd_haddr_lo = val;
  1819. val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
  1820. cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
  1821. }
  1822. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
  1823. {
  1824. struct kwqe *wqes[1], l2kwqe;
  1825. memset(&l2kwqe, 0, sizeof(l2kwqe));
  1826. wqes[0] = &l2kwqe;
  1827. l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
  1828. (L2_KWQE_OPCODE_VALUE_FLUSH <<
  1829. KWQE_OPCODE_SHIFT) | 2;
  1830. dev->submit_kwqes(dev, wqes, 1);
  1831. }
  1832. static void cnic_set_bnx2_mac(struct cnic_dev *dev)
  1833. {
  1834. struct cnic_local *cp = dev->cnic_priv;
  1835. u32 val;
  1836. val = cp->func << 2;
  1837. cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
  1838. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1839. BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
  1840. dev->mac_addr[0] = (u8) (val >> 8);
  1841. dev->mac_addr[1] = (u8) val;
  1842. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
  1843. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1844. BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
  1845. dev->mac_addr[2] = (u8) (val >> 24);
  1846. dev->mac_addr[3] = (u8) (val >> 16);
  1847. dev->mac_addr[4] = (u8) (val >> 8);
  1848. dev->mac_addr[5] = (u8) val;
  1849. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
  1850. val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
  1851. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1852. val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
  1853. CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
  1854. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
  1855. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
  1856. }
  1857. static int cnic_start_bnx2_hw(struct cnic_dev *dev)
  1858. {
  1859. struct cnic_local *cp = dev->cnic_priv;
  1860. struct cnic_eth_dev *ethdev = cp->ethdev;
  1861. struct status_block *sblk = cp->status_blk;
  1862. u32 val;
  1863. int err;
  1864. cnic_set_bnx2_mac(dev);
  1865. val = CNIC_RD(dev, BNX2_MQ_CONFIG);
  1866. val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
  1867. if (BCM_PAGE_BITS > 12)
  1868. val |= (12 - 8) << 4;
  1869. else
  1870. val |= (BCM_PAGE_BITS - 8) << 4;
  1871. CNIC_WR(dev, BNX2_MQ_CONFIG, val);
  1872. CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
  1873. CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
  1874. CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
  1875. err = cnic_setup_5709_context(dev, 1);
  1876. if (err)
  1877. return err;
  1878. cnic_init_context(dev, KWQ_CID);
  1879. cnic_init_context(dev, KCQ_CID);
  1880. cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
  1881. cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
  1882. cp->max_kwq_idx = MAX_KWQ_IDX;
  1883. cp->kwq_prod_idx = 0;
  1884. cp->kwq_con_idx = 0;
  1885. cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
  1886. if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
  1887. cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
  1888. else
  1889. cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
  1890. /* Initialize the kernel work queue context. */
  1891. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1892. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1893. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
  1894. val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
  1895. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1896. val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
  1897. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1898. val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
  1899. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1900. val = (u32) cp->kwq_info.pgtbl_map;
  1901. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1902. cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
  1903. cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
  1904. cp->kcq_prod_idx = 0;
  1905. /* Initialize the kernel complete queue context. */
  1906. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1907. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1908. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
  1909. val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
  1910. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1911. val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
  1912. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1913. val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
  1914. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1915. val = (u32) cp->kcq_info.pgtbl_map;
  1916. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1917. cp->int_num = 0;
  1918. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1919. u32 sb_id = cp->status_blk_num;
  1920. u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1921. cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
  1922. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1923. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1924. }
  1925. /* Enable Commnad Scheduler notification when we write to the
  1926. * host producer index of the kernel contexts. */
  1927. CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
  1928. /* Enable Command Scheduler notification when we write to either
  1929. * the Send Queue or Receive Queue producer indexes of the kernel
  1930. * bypass contexts. */
  1931. CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
  1932. CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
  1933. /* Notify COM when the driver post an application buffer. */
  1934. CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
  1935. /* Set the CP and COM doorbells. These two processors polls the
  1936. * doorbell for a non zero value before running. This must be done
  1937. * after setting up the kernel queue contexts. */
  1938. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
  1939. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
  1940. cnic_init_bnx2_tx_ring(dev);
  1941. cnic_init_bnx2_rx_ring(dev);
  1942. err = cnic_init_bnx2_irq(dev);
  1943. if (err) {
  1944. printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
  1945. dev->netdev->name);
  1946. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  1947. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  1948. return err;
  1949. }
  1950. return 0;
  1951. }
  1952. static int cnic_start_hw(struct cnic_dev *dev)
  1953. {
  1954. struct cnic_local *cp = dev->cnic_priv;
  1955. struct cnic_eth_dev *ethdev = cp->ethdev;
  1956. int err;
  1957. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  1958. return -EALREADY;
  1959. err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
  1960. if (err) {
  1961. printk(KERN_ERR PFX "%s: register_cnic failed\n",
  1962. dev->netdev->name);
  1963. goto err2;
  1964. }
  1965. dev->regview = ethdev->io_base;
  1966. cp->chip_id = ethdev->chip_id;
  1967. pci_dev_get(dev->pcidev);
  1968. cp->func = PCI_FUNC(dev->pcidev->devfn);
  1969. cp->status_blk = ethdev->irq_arr[0].status_blk;
  1970. cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
  1971. err = cp->alloc_resc(dev);
  1972. if (err) {
  1973. printk(KERN_ERR PFX "%s: allocate resource failure\n",
  1974. dev->netdev->name);
  1975. goto err1;
  1976. }
  1977. err = cp->start_hw(dev);
  1978. if (err)
  1979. goto err1;
  1980. err = cnic_cm_open(dev);
  1981. if (err)
  1982. goto err1;
  1983. set_bit(CNIC_F_CNIC_UP, &dev->flags);
  1984. cp->enable_int(dev);
  1985. return 0;
  1986. err1:
  1987. ethdev->drv_unregister_cnic(dev->netdev);
  1988. cp->free_resc(dev);
  1989. pci_dev_put(dev->pcidev);
  1990. err2:
  1991. return err;
  1992. }
  1993. static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
  1994. {
  1995. struct cnic_local *cp = dev->cnic_priv;
  1996. struct cnic_eth_dev *ethdev = cp->ethdev;
  1997. cnic_disable_bnx2_int_sync(dev);
  1998. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  1999. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  2000. cnic_init_context(dev, KWQ_CID);
  2001. cnic_init_context(dev, KCQ_CID);
  2002. cnic_setup_5709_context(dev, 0);
  2003. cnic_free_irq(dev);
  2004. ethdev->drv_unregister_cnic(dev->netdev);
  2005. cnic_free_resc(dev);
  2006. }
  2007. static void cnic_stop_hw(struct cnic_dev *dev)
  2008. {
  2009. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  2010. struct cnic_local *cp = dev->cnic_priv;
  2011. clear_bit(CNIC_F_CNIC_UP, &dev->flags);
  2012. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
  2013. synchronize_rcu();
  2014. cnic_cm_shutdown(dev);
  2015. cp->stop_hw(dev);
  2016. pci_dev_put(dev->pcidev);
  2017. }
  2018. }
  2019. static void cnic_free_dev(struct cnic_dev *dev)
  2020. {
  2021. int i = 0;
  2022. while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
  2023. msleep(100);
  2024. i++;
  2025. }
  2026. if (atomic_read(&dev->ref_count) != 0)
  2027. printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
  2028. " to zero.\n", dev->netdev->name);
  2029. printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
  2030. dev_put(dev->netdev);
  2031. kfree(dev);
  2032. }
  2033. static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
  2034. struct pci_dev *pdev)
  2035. {
  2036. struct cnic_dev *cdev;
  2037. struct cnic_local *cp;
  2038. int alloc_size;
  2039. alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
  2040. cdev = kzalloc(alloc_size , GFP_KERNEL);
  2041. if (cdev == NULL) {
  2042. printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
  2043. dev->name);
  2044. return NULL;
  2045. }
  2046. cdev->netdev = dev;
  2047. cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
  2048. cdev->register_device = cnic_register_device;
  2049. cdev->unregister_device = cnic_unregister_device;
  2050. cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
  2051. cp = cdev->cnic_priv;
  2052. cp->dev = cdev;
  2053. cp->uio_dev = -1;
  2054. cp->l2_single_buf_size = 0x400;
  2055. cp->l2_rx_ring_size = 3;
  2056. spin_lock_init(&cp->cnic_ulp_lock);
  2057. printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
  2058. return cdev;
  2059. }
  2060. static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
  2061. {
  2062. struct pci_dev *pdev;
  2063. struct cnic_dev *cdev;
  2064. struct cnic_local *cp;
  2065. struct cnic_eth_dev *ethdev = NULL;
  2066. struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
  2067. probe = symbol_get(bnx2_cnic_probe);
  2068. if (probe) {
  2069. ethdev = (*probe)(dev);
  2070. symbol_put_addr(probe);
  2071. }
  2072. if (!ethdev)
  2073. return NULL;
  2074. pdev = ethdev->pdev;
  2075. if (!pdev)
  2076. return NULL;
  2077. dev_hold(dev);
  2078. pci_dev_get(pdev);
  2079. if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
  2080. pdev->device == PCI_DEVICE_ID_NX2_5709S) {
  2081. u8 rev;
  2082. pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
  2083. if (rev < 0x10) {
  2084. pci_dev_put(pdev);
  2085. goto cnic_err;
  2086. }
  2087. }
  2088. pci_dev_put(pdev);
  2089. cdev = cnic_alloc_dev(dev, pdev);
  2090. if (cdev == NULL)
  2091. goto cnic_err;
  2092. set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
  2093. cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
  2094. cp = cdev->cnic_priv;
  2095. cp->ethdev = ethdev;
  2096. cdev->pcidev = pdev;
  2097. cp->cnic_ops = &cnic_bnx2_ops;
  2098. cp->start_hw = cnic_start_bnx2_hw;
  2099. cp->stop_hw = cnic_stop_bnx2_hw;
  2100. cp->setup_pgtbl = cnic_setup_page_tbl;
  2101. cp->alloc_resc = cnic_alloc_bnx2_resc;
  2102. cp->free_resc = cnic_free_resc;
  2103. cp->start_cm = cnic_cm_init_bnx2_hw;
  2104. cp->stop_cm = cnic_cm_stop_bnx2_hw;
  2105. cp->enable_int = cnic_enable_bnx2_int;
  2106. cp->disable_int_sync = cnic_disable_bnx2_int_sync;
  2107. cp->close_conn = cnic_close_bnx2_conn;
  2108. cp->next_idx = cnic_bnx2_next_idx;
  2109. cp->hw_idx = cnic_bnx2_hw_idx;
  2110. return cdev;
  2111. cnic_err:
  2112. dev_put(dev);
  2113. return NULL;
  2114. }
  2115. static struct cnic_dev *is_cnic_dev(struct net_device *dev)
  2116. {
  2117. struct ethtool_drvinfo drvinfo;
  2118. struct cnic_dev *cdev = NULL;
  2119. if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
  2120. memset(&drvinfo, 0, sizeof(drvinfo));
  2121. dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
  2122. if (!strcmp(drvinfo.driver, "bnx2"))
  2123. cdev = init_bnx2_cnic(dev);
  2124. if (cdev) {
  2125. write_lock(&cnic_dev_lock);
  2126. list_add(&cdev->list, &cnic_dev_list);
  2127. write_unlock(&cnic_dev_lock);
  2128. }
  2129. }
  2130. return cdev;
  2131. }
  2132. /**
  2133. * netdev event handler
  2134. */
  2135. static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
  2136. void *ptr)
  2137. {
  2138. struct net_device *netdev = ptr;
  2139. struct cnic_dev *dev;
  2140. int if_type;
  2141. int new_dev = 0;
  2142. dev = cnic_from_netdev(netdev);
  2143. if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
  2144. /* Check for the hot-plug device */
  2145. dev = is_cnic_dev(netdev);
  2146. if (dev) {
  2147. new_dev = 1;
  2148. cnic_hold(dev);
  2149. }
  2150. }
  2151. if (dev) {
  2152. struct cnic_local *cp = dev->cnic_priv;
  2153. if (new_dev)
  2154. cnic_ulp_init(dev);
  2155. else if (event == NETDEV_UNREGISTER)
  2156. cnic_ulp_exit(dev);
  2157. else if (event == NETDEV_UP) {
  2158. mutex_lock(&cnic_lock);
  2159. if (!cnic_start_hw(dev))
  2160. cnic_ulp_start(dev);
  2161. mutex_unlock(&cnic_lock);
  2162. }
  2163. rcu_read_lock();
  2164. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  2165. struct cnic_ulp_ops *ulp_ops;
  2166. void *ctx;
  2167. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  2168. if (!ulp_ops || !ulp_ops->indicate_netevent)
  2169. continue;
  2170. ctx = cp->ulp_handle[if_type];
  2171. ulp_ops->indicate_netevent(ctx, event);
  2172. }
  2173. rcu_read_unlock();
  2174. if (event == NETDEV_GOING_DOWN) {
  2175. mutex_lock(&cnic_lock);
  2176. cnic_ulp_stop(dev);
  2177. cnic_stop_hw(dev);
  2178. mutex_unlock(&cnic_lock);
  2179. } else if (event == NETDEV_UNREGISTER) {
  2180. write_lock(&cnic_dev_lock);
  2181. list_del_init(&dev->list);
  2182. write_unlock(&cnic_dev_lock);
  2183. cnic_put(dev);
  2184. cnic_free_dev(dev);
  2185. goto done;
  2186. }
  2187. cnic_put(dev);
  2188. }
  2189. done:
  2190. return NOTIFY_DONE;
  2191. }
  2192. static struct notifier_block cnic_netdev_notifier = {
  2193. .notifier_call = cnic_netdev_event
  2194. };
  2195. static void cnic_release(void)
  2196. {
  2197. struct cnic_dev *dev;
  2198. while (!list_empty(&cnic_dev_list)) {
  2199. dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
  2200. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  2201. cnic_ulp_stop(dev);
  2202. cnic_stop_hw(dev);
  2203. }
  2204. cnic_ulp_exit(dev);
  2205. list_del_init(&dev->list);
  2206. cnic_free_dev(dev);
  2207. }
  2208. }
  2209. static int __init cnic_init(void)
  2210. {
  2211. int rc = 0;
  2212. printk(KERN_INFO "%s", version);
  2213. rc = register_netdevice_notifier(&cnic_netdev_notifier);
  2214. if (rc) {
  2215. cnic_release();
  2216. return rc;
  2217. }
  2218. return 0;
  2219. }
  2220. static void __exit cnic_exit(void)
  2221. {
  2222. unregister_netdevice_notifier(&cnic_netdev_notifier);
  2223. cnic_release();
  2224. return;
  2225. }
  2226. module_init(cnic_init);
  2227. module_exit(cnic_exit);