kirkwood.dtsi 3.9 KB

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  1. /include/ "skeleton.dtsi"
  2. / {
  3. compatible = "marvell,kirkwood";
  4. interrupt-parent = <&intc>;
  5. cpus {
  6. #address-cells = <1>;
  7. #size-cells = <0>;
  8. cpu@0 {
  9. device_type = "cpu";
  10. compatible = "marvell,feroceon";
  11. clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  12. clock-names = "cpu_clk", "ddrclk", "powersave";
  13. };
  14. };
  15. aliases {
  16. gpio0 = &gpio0;
  17. gpio1 = &gpio1;
  18. };
  19. intc: interrupt-controller {
  20. compatible = "marvell,orion-intc", "marvell,intc";
  21. interrupt-controller;
  22. #interrupt-cells = <1>;
  23. reg = <0xf1020204 0x04>,
  24. <0xf1020214 0x04>;
  25. };
  26. ocp@f1000000 {
  27. compatible = "simple-bus";
  28. ranges = <0x00000000 0xf1000000 0x4000000
  29. 0xf5000000 0xf5000000 0x0000400>;
  30. #address-cells = <1>;
  31. #size-cells = <1>;
  32. core_clk: core-clocks@10030 {
  33. compatible = "marvell,kirkwood-core-clock";
  34. reg = <0x10030 0x4>;
  35. #clock-cells = <1>;
  36. };
  37. gpio0: gpio@10100 {
  38. compatible = "marvell,orion-gpio";
  39. #gpio-cells = <2>;
  40. gpio-controller;
  41. reg = <0x10100 0x40>;
  42. ngpios = <32>;
  43. interrupt-controller;
  44. #interrupt-cells = <2>;
  45. interrupts = <35>, <36>, <37>, <38>;
  46. clocks = <&gate_clk 7>;
  47. };
  48. gpio1: gpio@10140 {
  49. compatible = "marvell,orion-gpio";
  50. #gpio-cells = <2>;
  51. gpio-controller;
  52. reg = <0x10140 0x40>;
  53. ngpios = <18>;
  54. interrupt-controller;
  55. #interrupt-cells = <2>;
  56. interrupts = <39>, <40>, <41>;
  57. clocks = <&gate_clk 7>;
  58. };
  59. serial@12000 {
  60. compatible = "ns16550a";
  61. reg = <0x12000 0x100>;
  62. reg-shift = <2>;
  63. interrupts = <33>;
  64. clocks = <&gate_clk 7>;
  65. status = "disabled";
  66. };
  67. serial@12100 {
  68. compatible = "ns16550a";
  69. reg = <0x12100 0x100>;
  70. reg-shift = <2>;
  71. interrupts = <34>;
  72. clocks = <&gate_clk 7>;
  73. status = "disabled";
  74. };
  75. spi@10600 {
  76. compatible = "marvell,orion-spi";
  77. #address-cells = <1>;
  78. #size-cells = <0>;
  79. cell-index = <0>;
  80. interrupts = <23>;
  81. reg = <0x10600 0x28>;
  82. clocks = <&gate_clk 7>;
  83. status = "disabled";
  84. };
  85. gate_clk: clock-gating-control@2011c {
  86. compatible = "marvell,kirkwood-gating-clock";
  87. reg = <0x2011c 0x4>;
  88. clocks = <&core_clk 0>;
  89. #clock-cells = <1>;
  90. };
  91. wdt@20300 {
  92. compatible = "marvell,orion-wdt";
  93. reg = <0x20300 0x28>;
  94. clocks = <&gate_clk 7>;
  95. status = "okay";
  96. };
  97. xor@60800 {
  98. compatible = "marvell,orion-xor";
  99. reg = <0x60800 0x100
  100. 0x60A00 0x100>;
  101. status = "okay";
  102. clocks = <&gate_clk 8>;
  103. xor00 {
  104. interrupts = <5>;
  105. dmacap,memcpy;
  106. dmacap,xor;
  107. };
  108. xor01 {
  109. interrupts = <6>;
  110. dmacap,memcpy;
  111. dmacap,xor;
  112. dmacap,memset;
  113. };
  114. };
  115. xor@60900 {
  116. compatible = "marvell,orion-xor";
  117. reg = <0x60900 0x100
  118. 0xd0B00 0x100>;
  119. status = "okay";
  120. clocks = <&gate_clk 16>;
  121. xor00 {
  122. interrupts = <7>;
  123. dmacap,memcpy;
  124. dmacap,xor;
  125. };
  126. xor01 {
  127. interrupts = <8>;
  128. dmacap,memcpy;
  129. dmacap,xor;
  130. dmacap,memset;
  131. };
  132. };
  133. ehci@50000 {
  134. compatible = "marvell,orion-ehci";
  135. reg = <0x50000 0x1000>;
  136. interrupts = <19>;
  137. clocks = <&gate_clk 3>;
  138. status = "okay";
  139. };
  140. nand@3000000 {
  141. #address-cells = <1>;
  142. #size-cells = <1>;
  143. cle = <0>;
  144. ale = <1>;
  145. bank-width = <1>;
  146. compatible = "marvell,orion-nand";
  147. reg = <0x3000000 0x400>;
  148. chip-delay = <25>;
  149. /* set partition map and/or chip-delay in board dts */
  150. clocks = <&gate_clk 7>;
  151. status = "disabled";
  152. };
  153. i2c@11000 {
  154. compatible = "marvell,mv64xxx-i2c";
  155. reg = <0x11000 0x20>;
  156. #address-cells = <1>;
  157. #size-cells = <0>;
  158. interrupts = <29>;
  159. clock-frequency = <100000>;
  160. clocks = <&gate_clk 7>;
  161. status = "disabled";
  162. };
  163. crypto@30000 {
  164. compatible = "marvell,orion-crypto";
  165. reg = <0x30000 0x10000>,
  166. <0xf5000000 0x800>;
  167. reg-names = "regs", "sram";
  168. interrupts = <22>;
  169. clocks = <&gate_clk 17>;
  170. status = "okay";
  171. };
  172. };
  173. };