apply.c 29 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. bool extra_info_dirty;
  84. bool shadow_extra_info_dirty;
  85. struct omap_video_timings timings;
  86. struct dss_lcd_mgr_config lcd_config;
  87. };
  88. static struct {
  89. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  90. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  91. bool irq_enabled;
  92. } dss_data;
  93. /* protects dss_data */
  94. static spinlock_t data_lock;
  95. /* lock for blocking functions */
  96. static DEFINE_MUTEX(apply_lock);
  97. static DECLARE_COMPLETION(extra_updated_completion);
  98. static void dss_register_vsync_isr(void);
  99. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  100. {
  101. return &dss_data.ovl_priv_data_array[ovl->id];
  102. }
  103. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  104. {
  105. return &dss_data.mgr_priv_data_array[mgr->id];
  106. }
  107. void dss_apply_init(void)
  108. {
  109. const int num_ovls = dss_feat_get_num_ovls();
  110. struct mgr_priv_data *mp;
  111. int i;
  112. spin_lock_init(&data_lock);
  113. for (i = 0; i < num_ovls; ++i) {
  114. struct ovl_priv_data *op;
  115. op = &dss_data.ovl_priv_data_array[i];
  116. op->info.global_alpha = 255;
  117. switch (i) {
  118. case 0:
  119. op->info.zorder = 0;
  120. break;
  121. case 1:
  122. op->info.zorder =
  123. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  124. break;
  125. case 2:
  126. op->info.zorder =
  127. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  128. break;
  129. case 3:
  130. op->info.zorder =
  131. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  132. break;
  133. }
  134. op->user_info = op->info;
  135. }
  136. /*
  137. * Initialize some of the lcd_config fields for TV manager, this lets
  138. * us prevent checking if the manager is LCD or TV at some places
  139. */
  140. mp = &dss_data.mgr_priv_data_array[OMAP_DSS_CHANNEL_DIGIT];
  141. mp->lcd_config.video_port_width = 24;
  142. mp->lcd_config.clock_info.lck_div = 1;
  143. mp->lcd_config.clock_info.pck_div = 1;
  144. }
  145. /*
  146. * A LCD manager's stallmode decides whether it is in manual or auto update. TV
  147. * manager is always auto update, stallmode field for TV manager is false by
  148. * default
  149. */
  150. static bool ovl_manual_update(struct omap_overlay *ovl)
  151. {
  152. struct mgr_priv_data *mp = get_mgr_priv(ovl->manager);
  153. return mp->lcd_config.stallmode;
  154. }
  155. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  156. {
  157. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  158. return mp->lcd_config.stallmode;
  159. }
  160. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  161. bool applying)
  162. {
  163. struct omap_overlay_info *oi;
  164. struct omap_overlay_manager_info *mi;
  165. struct omap_overlay *ovl;
  166. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  167. struct ovl_priv_data *op;
  168. struct mgr_priv_data *mp;
  169. mp = get_mgr_priv(mgr);
  170. if (!mp->enabled)
  171. return 0;
  172. if (applying && mp->user_info_dirty)
  173. mi = &mp->user_info;
  174. else
  175. mi = &mp->info;
  176. /* collect the infos to be tested into the array */
  177. list_for_each_entry(ovl, &mgr->overlays, list) {
  178. op = get_ovl_priv(ovl);
  179. if (!op->enabled && !op->enabling)
  180. oi = NULL;
  181. else if (applying && op->user_info_dirty)
  182. oi = &op->user_info;
  183. else
  184. oi = &op->info;
  185. ois[ovl->id] = oi;
  186. }
  187. return dss_mgr_check(mgr, mi, &mp->timings, &mp->lcd_config, ois);
  188. }
  189. /*
  190. * check manager and overlay settings using overlay_info from data->info
  191. */
  192. static int dss_check_settings(struct omap_overlay_manager *mgr)
  193. {
  194. return dss_check_settings_low(mgr, false);
  195. }
  196. /*
  197. * check manager and overlay settings using overlay_info from ovl->info if
  198. * dirty and from data->info otherwise
  199. */
  200. static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
  201. {
  202. return dss_check_settings_low(mgr, true);
  203. }
  204. static bool need_isr(void)
  205. {
  206. const int num_mgrs = dss_feat_get_num_mgrs();
  207. int i;
  208. for (i = 0; i < num_mgrs; ++i) {
  209. struct omap_overlay_manager *mgr;
  210. struct mgr_priv_data *mp;
  211. struct omap_overlay *ovl;
  212. mgr = omap_dss_get_overlay_manager(i);
  213. mp = get_mgr_priv(mgr);
  214. if (!mp->enabled)
  215. continue;
  216. if (mgr_manual_update(mgr)) {
  217. /* to catch FRAMEDONE */
  218. if (mp->updating)
  219. return true;
  220. } else {
  221. /* to catch GO bit going down */
  222. if (mp->busy)
  223. return true;
  224. /* to write new values to registers */
  225. if (mp->info_dirty)
  226. return true;
  227. /* to set GO bit */
  228. if (mp->shadow_info_dirty)
  229. return true;
  230. /*
  231. * NOTE: we don't check extra_info flags for disabled
  232. * managers, once the manager is enabled, the extra_info
  233. * related manager changes will be taken in by HW.
  234. */
  235. /* to write new values to registers */
  236. if (mp->extra_info_dirty)
  237. return true;
  238. /* to set GO bit */
  239. if (mp->shadow_extra_info_dirty)
  240. return true;
  241. list_for_each_entry(ovl, &mgr->overlays, list) {
  242. struct ovl_priv_data *op;
  243. op = get_ovl_priv(ovl);
  244. /*
  245. * NOTE: we check extra_info flags even for
  246. * disabled overlays, as extra_infos need to be
  247. * always written.
  248. */
  249. /* to write new values to registers */
  250. if (op->extra_info_dirty)
  251. return true;
  252. /* to set GO bit */
  253. if (op->shadow_extra_info_dirty)
  254. return true;
  255. if (!op->enabled)
  256. continue;
  257. /* to write new values to registers */
  258. if (op->info_dirty)
  259. return true;
  260. /* to set GO bit */
  261. if (op->shadow_info_dirty)
  262. return true;
  263. }
  264. }
  265. }
  266. return false;
  267. }
  268. static bool need_go(struct omap_overlay_manager *mgr)
  269. {
  270. struct omap_overlay *ovl;
  271. struct mgr_priv_data *mp;
  272. struct ovl_priv_data *op;
  273. mp = get_mgr_priv(mgr);
  274. if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
  275. return true;
  276. list_for_each_entry(ovl, &mgr->overlays, list) {
  277. op = get_ovl_priv(ovl);
  278. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  279. return true;
  280. }
  281. return false;
  282. }
  283. /* returns true if an extra_info field is currently being updated */
  284. static bool extra_info_update_ongoing(void)
  285. {
  286. const int num_mgrs = dss_feat_get_num_mgrs();
  287. int i;
  288. for (i = 0; i < num_mgrs; ++i) {
  289. struct omap_overlay_manager *mgr;
  290. struct omap_overlay *ovl;
  291. struct mgr_priv_data *mp;
  292. mgr = omap_dss_get_overlay_manager(i);
  293. mp = get_mgr_priv(mgr);
  294. if (!mp->enabled)
  295. continue;
  296. if (!mp->updating)
  297. continue;
  298. if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
  299. return true;
  300. list_for_each_entry(ovl, &mgr->overlays, list) {
  301. struct ovl_priv_data *op = get_ovl_priv(ovl);
  302. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  303. return true;
  304. }
  305. }
  306. return false;
  307. }
  308. /* wait until no extra_info updates are pending */
  309. static void wait_pending_extra_info_updates(void)
  310. {
  311. bool updating;
  312. unsigned long flags;
  313. unsigned long t;
  314. int r;
  315. spin_lock_irqsave(&data_lock, flags);
  316. updating = extra_info_update_ongoing();
  317. if (!updating) {
  318. spin_unlock_irqrestore(&data_lock, flags);
  319. return;
  320. }
  321. init_completion(&extra_updated_completion);
  322. spin_unlock_irqrestore(&data_lock, flags);
  323. t = msecs_to_jiffies(500);
  324. r = wait_for_completion_timeout(&extra_updated_completion, t);
  325. if (r == 0)
  326. DSSWARN("timeout in wait_pending_extra_info_updates\n");
  327. else if (r < 0)
  328. DSSERR("wait_pending_extra_info_updates failed: %d\n", r);
  329. }
  330. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  331. {
  332. unsigned long timeout = msecs_to_jiffies(500);
  333. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  334. u32 irq;
  335. unsigned long flags;
  336. int r;
  337. int i;
  338. spin_lock_irqsave(&data_lock, flags);
  339. if (mgr_manual_update(mgr)) {
  340. spin_unlock_irqrestore(&data_lock, flags);
  341. return 0;
  342. }
  343. if (!mp->enabled) {
  344. spin_unlock_irqrestore(&data_lock, flags);
  345. return 0;
  346. }
  347. spin_unlock_irqrestore(&data_lock, flags);
  348. r = dispc_runtime_get();
  349. if (r)
  350. return r;
  351. irq = dispc_mgr_get_vsync_irq(mgr->id);
  352. i = 0;
  353. while (1) {
  354. bool shadow_dirty, dirty;
  355. spin_lock_irqsave(&data_lock, flags);
  356. dirty = mp->info_dirty;
  357. shadow_dirty = mp->shadow_info_dirty;
  358. spin_unlock_irqrestore(&data_lock, flags);
  359. if (!dirty && !shadow_dirty) {
  360. r = 0;
  361. break;
  362. }
  363. /* 4 iterations is the worst case:
  364. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  365. * 2 - first VSYNC, dirty = true
  366. * 3 - dirty = false, shadow_dirty = true
  367. * 4 - shadow_dirty = false */
  368. if (i++ == 3) {
  369. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  370. mgr->id);
  371. r = 0;
  372. break;
  373. }
  374. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  375. if (r == -ERESTARTSYS)
  376. break;
  377. if (r) {
  378. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  379. break;
  380. }
  381. }
  382. dispc_runtime_put();
  383. return r;
  384. }
  385. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  386. {
  387. unsigned long timeout = msecs_to_jiffies(500);
  388. struct ovl_priv_data *op;
  389. struct mgr_priv_data *mp;
  390. u32 irq;
  391. unsigned long flags;
  392. int r;
  393. int i;
  394. if (!ovl->manager)
  395. return 0;
  396. mp = get_mgr_priv(ovl->manager);
  397. spin_lock_irqsave(&data_lock, flags);
  398. if (ovl_manual_update(ovl)) {
  399. spin_unlock_irqrestore(&data_lock, flags);
  400. return 0;
  401. }
  402. if (!mp->enabled) {
  403. spin_unlock_irqrestore(&data_lock, flags);
  404. return 0;
  405. }
  406. spin_unlock_irqrestore(&data_lock, flags);
  407. r = dispc_runtime_get();
  408. if (r)
  409. return r;
  410. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  411. op = get_ovl_priv(ovl);
  412. i = 0;
  413. while (1) {
  414. bool shadow_dirty, dirty;
  415. spin_lock_irqsave(&data_lock, flags);
  416. dirty = op->info_dirty;
  417. shadow_dirty = op->shadow_info_dirty;
  418. spin_unlock_irqrestore(&data_lock, flags);
  419. if (!dirty && !shadow_dirty) {
  420. r = 0;
  421. break;
  422. }
  423. /* 4 iterations is the worst case:
  424. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  425. * 2 - first VSYNC, dirty = true
  426. * 3 - dirty = false, shadow_dirty = true
  427. * 4 - shadow_dirty = false */
  428. if (i++ == 3) {
  429. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  430. ovl->id);
  431. r = 0;
  432. break;
  433. }
  434. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  435. if (r == -ERESTARTSYS)
  436. break;
  437. if (r) {
  438. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  439. break;
  440. }
  441. }
  442. dispc_runtime_put();
  443. return r;
  444. }
  445. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  446. {
  447. struct ovl_priv_data *op = get_ovl_priv(ovl);
  448. struct omap_overlay_info *oi;
  449. bool replication;
  450. struct mgr_priv_data *mp;
  451. int r;
  452. DSSDBG("writing ovl %d regs", ovl->id);
  453. if (!op->enabled || !op->info_dirty)
  454. return;
  455. oi = &op->info;
  456. mp = get_mgr_priv(ovl->manager);
  457. replication = dss_ovl_use_replication(mp->lcd_config, oi->color_mode);
  458. r = dispc_ovl_setup(ovl->id, oi, replication, &mp->timings, false);
  459. if (r) {
  460. /*
  461. * We can't do much here, as this function can be called from
  462. * vsync interrupt.
  463. */
  464. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  465. /* This will leave fifo configurations in a nonoptimal state */
  466. op->enabled = false;
  467. dispc_ovl_enable(ovl->id, false);
  468. return;
  469. }
  470. op->info_dirty = false;
  471. if (mp->updating)
  472. op->shadow_info_dirty = true;
  473. }
  474. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  475. {
  476. struct ovl_priv_data *op = get_ovl_priv(ovl);
  477. struct mgr_priv_data *mp;
  478. DSSDBG("writing ovl %d regs extra", ovl->id);
  479. if (!op->extra_info_dirty)
  480. return;
  481. /* note: write also when op->enabled == false, so that the ovl gets
  482. * disabled */
  483. dispc_ovl_enable(ovl->id, op->enabled);
  484. dispc_ovl_set_channel_out(ovl->id, op->channel);
  485. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  486. mp = get_mgr_priv(ovl->manager);
  487. op->extra_info_dirty = false;
  488. if (mp->updating)
  489. op->shadow_extra_info_dirty = true;
  490. }
  491. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  492. {
  493. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  494. struct omap_overlay *ovl;
  495. DSSDBG("writing mgr %d regs", mgr->id);
  496. if (!mp->enabled)
  497. return;
  498. WARN_ON(mp->busy);
  499. /* Commit overlay settings */
  500. list_for_each_entry(ovl, &mgr->overlays, list) {
  501. dss_ovl_write_regs(ovl);
  502. dss_ovl_write_regs_extra(ovl);
  503. }
  504. if (mp->info_dirty) {
  505. dispc_mgr_setup(mgr->id, &mp->info);
  506. mp->info_dirty = false;
  507. if (mp->updating)
  508. mp->shadow_info_dirty = true;
  509. }
  510. }
  511. static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
  512. {
  513. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  514. DSSDBG("writing mgr %d regs extra", mgr->id);
  515. if (!mp->extra_info_dirty)
  516. return;
  517. dispc_mgr_set_timings(mgr->id, &mp->timings);
  518. /* lcd_config parameters */
  519. if (dss_mgr_is_lcd(mgr->id))
  520. dispc_mgr_set_lcd_config(mgr->id, &mp->lcd_config);
  521. mp->extra_info_dirty = false;
  522. if (mp->updating)
  523. mp->shadow_extra_info_dirty = true;
  524. }
  525. static void dss_write_regs(void)
  526. {
  527. const int num_mgrs = omap_dss_get_num_overlay_managers();
  528. int i;
  529. for (i = 0; i < num_mgrs; ++i) {
  530. struct omap_overlay_manager *mgr;
  531. struct mgr_priv_data *mp;
  532. int r;
  533. mgr = omap_dss_get_overlay_manager(i);
  534. mp = get_mgr_priv(mgr);
  535. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  536. continue;
  537. r = dss_check_settings(mgr);
  538. if (r) {
  539. DSSERR("cannot write registers for manager %s: "
  540. "illegal configuration\n", mgr->name);
  541. continue;
  542. }
  543. dss_mgr_write_regs(mgr);
  544. dss_mgr_write_regs_extra(mgr);
  545. }
  546. }
  547. static void dss_set_go_bits(void)
  548. {
  549. const int num_mgrs = omap_dss_get_num_overlay_managers();
  550. int i;
  551. for (i = 0; i < num_mgrs; ++i) {
  552. struct omap_overlay_manager *mgr;
  553. struct mgr_priv_data *mp;
  554. mgr = omap_dss_get_overlay_manager(i);
  555. mp = get_mgr_priv(mgr);
  556. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  557. continue;
  558. if (!need_go(mgr))
  559. continue;
  560. mp->busy = true;
  561. if (!dss_data.irq_enabled && need_isr())
  562. dss_register_vsync_isr();
  563. dispc_mgr_go(mgr->id);
  564. }
  565. }
  566. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  567. {
  568. struct omap_overlay *ovl;
  569. struct mgr_priv_data *mp;
  570. struct ovl_priv_data *op;
  571. mp = get_mgr_priv(mgr);
  572. mp->shadow_info_dirty = false;
  573. mp->shadow_extra_info_dirty = false;
  574. list_for_each_entry(ovl, &mgr->overlays, list) {
  575. op = get_ovl_priv(ovl);
  576. op->shadow_info_dirty = false;
  577. op->shadow_extra_info_dirty = false;
  578. }
  579. }
  580. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  581. {
  582. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  583. unsigned long flags;
  584. int r;
  585. spin_lock_irqsave(&data_lock, flags);
  586. WARN_ON(mp->updating);
  587. r = dss_check_settings(mgr);
  588. if (r) {
  589. DSSERR("cannot start manual update: illegal configuration\n");
  590. spin_unlock_irqrestore(&data_lock, flags);
  591. return;
  592. }
  593. dss_mgr_write_regs(mgr);
  594. dss_mgr_write_regs_extra(mgr);
  595. mp->updating = true;
  596. if (!dss_data.irq_enabled && need_isr())
  597. dss_register_vsync_isr();
  598. dispc_mgr_enable(mgr->id);
  599. mgr_clear_shadow_dirty(mgr);
  600. spin_unlock_irqrestore(&data_lock, flags);
  601. }
  602. static void dss_apply_irq_handler(void *data, u32 mask);
  603. static void dss_register_vsync_isr(void)
  604. {
  605. const int num_mgrs = dss_feat_get_num_mgrs();
  606. u32 mask;
  607. int r, i;
  608. mask = 0;
  609. for (i = 0; i < num_mgrs; ++i)
  610. mask |= dispc_mgr_get_vsync_irq(i);
  611. for (i = 0; i < num_mgrs; ++i)
  612. mask |= dispc_mgr_get_framedone_irq(i);
  613. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  614. WARN_ON(r);
  615. dss_data.irq_enabled = true;
  616. }
  617. static void dss_unregister_vsync_isr(void)
  618. {
  619. const int num_mgrs = dss_feat_get_num_mgrs();
  620. u32 mask;
  621. int r, i;
  622. mask = 0;
  623. for (i = 0; i < num_mgrs; ++i)
  624. mask |= dispc_mgr_get_vsync_irq(i);
  625. for (i = 0; i < num_mgrs; ++i)
  626. mask |= dispc_mgr_get_framedone_irq(i);
  627. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  628. WARN_ON(r);
  629. dss_data.irq_enabled = false;
  630. }
  631. static void dss_apply_irq_handler(void *data, u32 mask)
  632. {
  633. const int num_mgrs = dss_feat_get_num_mgrs();
  634. int i;
  635. bool extra_updating;
  636. spin_lock(&data_lock);
  637. /* clear busy, updating flags, shadow_dirty flags */
  638. for (i = 0; i < num_mgrs; i++) {
  639. struct omap_overlay_manager *mgr;
  640. struct mgr_priv_data *mp;
  641. bool was_updating;
  642. mgr = omap_dss_get_overlay_manager(i);
  643. mp = get_mgr_priv(mgr);
  644. if (!mp->enabled)
  645. continue;
  646. was_updating = mp->updating;
  647. mp->updating = dispc_mgr_is_enabled(i);
  648. if (!mgr_manual_update(mgr)) {
  649. bool was_busy = mp->busy;
  650. mp->busy = dispc_mgr_go_busy(i);
  651. if (was_busy && !mp->busy)
  652. mgr_clear_shadow_dirty(mgr);
  653. }
  654. }
  655. dss_write_regs();
  656. dss_set_go_bits();
  657. extra_updating = extra_info_update_ongoing();
  658. if (!extra_updating)
  659. complete_all(&extra_updated_completion);
  660. if (!need_isr())
  661. dss_unregister_vsync_isr();
  662. spin_unlock(&data_lock);
  663. }
  664. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  665. {
  666. struct ovl_priv_data *op;
  667. op = get_ovl_priv(ovl);
  668. if (!op->user_info_dirty)
  669. return;
  670. op->user_info_dirty = false;
  671. op->info_dirty = true;
  672. op->info = op->user_info;
  673. }
  674. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  675. {
  676. struct mgr_priv_data *mp;
  677. mp = get_mgr_priv(mgr);
  678. if (!mp->user_info_dirty)
  679. return;
  680. mp->user_info_dirty = false;
  681. mp->info_dirty = true;
  682. mp->info = mp->user_info;
  683. }
  684. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  685. {
  686. unsigned long flags;
  687. struct omap_overlay *ovl;
  688. int r;
  689. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  690. spin_lock_irqsave(&data_lock, flags);
  691. r = dss_check_settings_apply(mgr);
  692. if (r) {
  693. spin_unlock_irqrestore(&data_lock, flags);
  694. DSSERR("failed to apply settings: illegal configuration.\n");
  695. return r;
  696. }
  697. /* Configure overlays */
  698. list_for_each_entry(ovl, &mgr->overlays, list)
  699. omap_dss_mgr_apply_ovl(ovl);
  700. /* Configure manager */
  701. omap_dss_mgr_apply_mgr(mgr);
  702. dss_write_regs();
  703. dss_set_go_bits();
  704. spin_unlock_irqrestore(&data_lock, flags);
  705. return 0;
  706. }
  707. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  708. {
  709. struct ovl_priv_data *op;
  710. op = get_ovl_priv(ovl);
  711. if (op->enabled == enable)
  712. return;
  713. op->enabled = enable;
  714. op->extra_info_dirty = true;
  715. }
  716. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  717. u32 fifo_low, u32 fifo_high)
  718. {
  719. struct ovl_priv_data *op = get_ovl_priv(ovl);
  720. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  721. return;
  722. op->fifo_low = fifo_low;
  723. op->fifo_high = fifo_high;
  724. op->extra_info_dirty = true;
  725. }
  726. static void dss_ovl_setup_fifo(struct omap_overlay *ovl)
  727. {
  728. struct ovl_priv_data *op = get_ovl_priv(ovl);
  729. u32 fifo_low, fifo_high;
  730. bool use_fifo_merge = false;
  731. if (!op->enabled && !op->enabling)
  732. return;
  733. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  734. use_fifo_merge, ovl_manual_update(ovl));
  735. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  736. }
  737. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr)
  738. {
  739. struct omap_overlay *ovl;
  740. struct mgr_priv_data *mp;
  741. mp = get_mgr_priv(mgr);
  742. if (!mp->enabled)
  743. return;
  744. list_for_each_entry(ovl, &mgr->overlays, list)
  745. dss_ovl_setup_fifo(ovl);
  746. }
  747. static void dss_setup_fifos(void)
  748. {
  749. const int num_mgrs = omap_dss_get_num_overlay_managers();
  750. struct omap_overlay_manager *mgr;
  751. int i;
  752. for (i = 0; i < num_mgrs; ++i) {
  753. mgr = omap_dss_get_overlay_manager(i);
  754. dss_mgr_setup_fifos(mgr);
  755. }
  756. }
  757. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  758. {
  759. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  760. unsigned long flags;
  761. int r;
  762. mutex_lock(&apply_lock);
  763. if (mp->enabled)
  764. goto out;
  765. spin_lock_irqsave(&data_lock, flags);
  766. mp->enabled = true;
  767. r = dss_check_settings(mgr);
  768. if (r) {
  769. DSSERR("failed to enable manager %d: check_settings failed\n",
  770. mgr->id);
  771. goto err;
  772. }
  773. dss_setup_fifos();
  774. dss_write_regs();
  775. dss_set_go_bits();
  776. if (!mgr_manual_update(mgr))
  777. mp->updating = true;
  778. if (!dss_data.irq_enabled && need_isr())
  779. dss_register_vsync_isr();
  780. spin_unlock_irqrestore(&data_lock, flags);
  781. if (!mgr_manual_update(mgr))
  782. dispc_mgr_enable(mgr->id);
  783. out:
  784. mutex_unlock(&apply_lock);
  785. return 0;
  786. err:
  787. mp->enabled = false;
  788. spin_unlock_irqrestore(&data_lock, flags);
  789. mutex_unlock(&apply_lock);
  790. return r;
  791. }
  792. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  793. {
  794. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  795. unsigned long flags;
  796. mutex_lock(&apply_lock);
  797. if (!mp->enabled)
  798. goto out;
  799. if (!mgr_manual_update(mgr))
  800. dispc_mgr_disable(mgr->id);
  801. spin_lock_irqsave(&data_lock, flags);
  802. mp->updating = false;
  803. mp->enabled = false;
  804. spin_unlock_irqrestore(&data_lock, flags);
  805. out:
  806. mutex_unlock(&apply_lock);
  807. }
  808. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  809. struct omap_overlay_manager_info *info)
  810. {
  811. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  812. unsigned long flags;
  813. int r;
  814. r = dss_mgr_simple_check(mgr, info);
  815. if (r)
  816. return r;
  817. spin_lock_irqsave(&data_lock, flags);
  818. mp->user_info = *info;
  819. mp->user_info_dirty = true;
  820. spin_unlock_irqrestore(&data_lock, flags);
  821. return 0;
  822. }
  823. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  824. struct omap_overlay_manager_info *info)
  825. {
  826. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  827. unsigned long flags;
  828. spin_lock_irqsave(&data_lock, flags);
  829. *info = mp->user_info;
  830. spin_unlock_irqrestore(&data_lock, flags);
  831. }
  832. int dss_mgr_set_output(struct omap_overlay_manager *mgr,
  833. struct omap_dss_output *output)
  834. {
  835. int r;
  836. mutex_lock(&apply_lock);
  837. if (mgr->output) {
  838. DSSERR("manager %s is already connected to an output\n",
  839. mgr->name);
  840. r = -EINVAL;
  841. goto err;
  842. }
  843. if ((mgr->supported_outputs & output->id) == 0) {
  844. DSSERR("output does not support manager %s\n",
  845. mgr->name);
  846. r = -EINVAL;
  847. goto err;
  848. }
  849. output->manager = mgr;
  850. mgr->output = output;
  851. mutex_unlock(&apply_lock);
  852. return 0;
  853. err:
  854. mutex_unlock(&apply_lock);
  855. return r;
  856. }
  857. int dss_mgr_unset_output(struct omap_overlay_manager *mgr)
  858. {
  859. int r;
  860. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  861. unsigned long flags;
  862. mutex_lock(&apply_lock);
  863. if (!mgr->output) {
  864. DSSERR("failed to unset output, output not set\n");
  865. r = -EINVAL;
  866. goto err;
  867. }
  868. spin_lock_irqsave(&data_lock, flags);
  869. if (mp->enabled) {
  870. DSSERR("output can't be unset when manager is enabled\n");
  871. r = -EINVAL;
  872. goto err1;
  873. }
  874. spin_unlock_irqrestore(&data_lock, flags);
  875. mgr->output->manager = NULL;
  876. mgr->output = NULL;
  877. mutex_unlock(&apply_lock);
  878. return 0;
  879. err1:
  880. spin_unlock_irqrestore(&data_lock, flags);
  881. err:
  882. mutex_unlock(&apply_lock);
  883. return r;
  884. }
  885. static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
  886. const struct omap_video_timings *timings)
  887. {
  888. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  889. mp->timings = *timings;
  890. mp->extra_info_dirty = true;
  891. }
  892. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  893. const struct omap_video_timings *timings)
  894. {
  895. unsigned long flags;
  896. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  897. spin_lock_irqsave(&data_lock, flags);
  898. if (mp->updating) {
  899. DSSERR("cannot set timings for %s: manager needs to be disabled\n",
  900. mgr->name);
  901. goto out;
  902. }
  903. dss_apply_mgr_timings(mgr, timings);
  904. out:
  905. spin_unlock_irqrestore(&data_lock, flags);
  906. }
  907. static void dss_apply_mgr_lcd_config(struct omap_overlay_manager *mgr,
  908. const struct dss_lcd_mgr_config *config)
  909. {
  910. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  911. mp->lcd_config = *config;
  912. mp->extra_info_dirty = true;
  913. }
  914. void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
  915. const struct dss_lcd_mgr_config *config)
  916. {
  917. unsigned long flags;
  918. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  919. spin_lock_irqsave(&data_lock, flags);
  920. if (mp->enabled) {
  921. DSSERR("cannot apply lcd config for %s: manager needs to be disabled\n",
  922. mgr->name);
  923. goto out;
  924. }
  925. dss_apply_mgr_lcd_config(mgr, config);
  926. out:
  927. spin_unlock_irqrestore(&data_lock, flags);
  928. }
  929. int dss_ovl_set_info(struct omap_overlay *ovl,
  930. struct omap_overlay_info *info)
  931. {
  932. struct ovl_priv_data *op = get_ovl_priv(ovl);
  933. unsigned long flags;
  934. int r;
  935. r = dss_ovl_simple_check(ovl, info);
  936. if (r)
  937. return r;
  938. spin_lock_irqsave(&data_lock, flags);
  939. op->user_info = *info;
  940. op->user_info_dirty = true;
  941. spin_unlock_irqrestore(&data_lock, flags);
  942. return 0;
  943. }
  944. void dss_ovl_get_info(struct omap_overlay *ovl,
  945. struct omap_overlay_info *info)
  946. {
  947. struct ovl_priv_data *op = get_ovl_priv(ovl);
  948. unsigned long flags;
  949. spin_lock_irqsave(&data_lock, flags);
  950. *info = op->user_info;
  951. spin_unlock_irqrestore(&data_lock, flags);
  952. }
  953. int dss_ovl_set_manager(struct omap_overlay *ovl,
  954. struct omap_overlay_manager *mgr)
  955. {
  956. struct ovl_priv_data *op = get_ovl_priv(ovl);
  957. unsigned long flags;
  958. int r;
  959. if (!mgr)
  960. return -EINVAL;
  961. mutex_lock(&apply_lock);
  962. if (ovl->manager) {
  963. DSSERR("overlay '%s' already has a manager '%s'\n",
  964. ovl->name, ovl->manager->name);
  965. r = -EINVAL;
  966. goto err;
  967. }
  968. spin_lock_irqsave(&data_lock, flags);
  969. if (op->enabled) {
  970. spin_unlock_irqrestore(&data_lock, flags);
  971. DSSERR("overlay has to be disabled to change the manager\n");
  972. r = -EINVAL;
  973. goto err;
  974. }
  975. op->channel = mgr->id;
  976. op->extra_info_dirty = true;
  977. ovl->manager = mgr;
  978. list_add_tail(&ovl->list, &mgr->overlays);
  979. spin_unlock_irqrestore(&data_lock, flags);
  980. /* XXX: When there is an overlay on a DSI manual update display, and
  981. * the overlay is first disabled, then moved to tv, and enabled, we
  982. * seem to get SYNC_LOST_DIGIT error.
  983. *
  984. * Waiting doesn't seem to help, but updating the manual update display
  985. * after disabling the overlay seems to fix this. This hints that the
  986. * overlay is perhaps somehow tied to the LCD output until the output
  987. * is updated.
  988. *
  989. * Userspace workaround for this is to update the LCD after disabling
  990. * the overlay, but before moving the overlay to TV.
  991. */
  992. mutex_unlock(&apply_lock);
  993. return 0;
  994. err:
  995. mutex_unlock(&apply_lock);
  996. return r;
  997. }
  998. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  999. {
  1000. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1001. unsigned long flags;
  1002. int r;
  1003. mutex_lock(&apply_lock);
  1004. if (!ovl->manager) {
  1005. DSSERR("failed to detach overlay: manager not set\n");
  1006. r = -EINVAL;
  1007. goto err;
  1008. }
  1009. spin_lock_irqsave(&data_lock, flags);
  1010. if (op->enabled) {
  1011. spin_unlock_irqrestore(&data_lock, flags);
  1012. DSSERR("overlay has to be disabled to unset the manager\n");
  1013. r = -EINVAL;
  1014. goto err;
  1015. }
  1016. spin_unlock_irqrestore(&data_lock, flags);
  1017. /* wait for pending extra_info updates to ensure the ovl is disabled */
  1018. wait_pending_extra_info_updates();
  1019. spin_lock_irqsave(&data_lock, flags);
  1020. op->channel = -1;
  1021. ovl->manager = NULL;
  1022. list_del(&ovl->list);
  1023. spin_unlock_irqrestore(&data_lock, flags);
  1024. mutex_unlock(&apply_lock);
  1025. return 0;
  1026. err:
  1027. mutex_unlock(&apply_lock);
  1028. return r;
  1029. }
  1030. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1031. {
  1032. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1033. unsigned long flags;
  1034. bool e;
  1035. spin_lock_irqsave(&data_lock, flags);
  1036. e = op->enabled;
  1037. spin_unlock_irqrestore(&data_lock, flags);
  1038. return e;
  1039. }
  1040. int dss_ovl_enable(struct omap_overlay *ovl)
  1041. {
  1042. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1043. unsigned long flags;
  1044. int r;
  1045. mutex_lock(&apply_lock);
  1046. if (op->enabled) {
  1047. r = 0;
  1048. goto err1;
  1049. }
  1050. if (ovl->manager == NULL || ovl->manager->output == NULL) {
  1051. r = -EINVAL;
  1052. goto err1;
  1053. }
  1054. spin_lock_irqsave(&data_lock, flags);
  1055. op->enabling = true;
  1056. r = dss_check_settings(ovl->manager);
  1057. if (r) {
  1058. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1059. ovl->id);
  1060. goto err2;
  1061. }
  1062. dss_setup_fifos();
  1063. op->enabling = false;
  1064. dss_apply_ovl_enable(ovl, true);
  1065. dss_write_regs();
  1066. dss_set_go_bits();
  1067. spin_unlock_irqrestore(&data_lock, flags);
  1068. mutex_unlock(&apply_lock);
  1069. return 0;
  1070. err2:
  1071. op->enabling = false;
  1072. spin_unlock_irqrestore(&data_lock, flags);
  1073. err1:
  1074. mutex_unlock(&apply_lock);
  1075. return r;
  1076. }
  1077. int dss_ovl_disable(struct omap_overlay *ovl)
  1078. {
  1079. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1080. unsigned long flags;
  1081. int r;
  1082. mutex_lock(&apply_lock);
  1083. if (!op->enabled) {
  1084. r = 0;
  1085. goto err;
  1086. }
  1087. if (ovl->manager == NULL || ovl->manager->output == NULL) {
  1088. r = -EINVAL;
  1089. goto err;
  1090. }
  1091. spin_lock_irqsave(&data_lock, flags);
  1092. dss_apply_ovl_enable(ovl, false);
  1093. dss_write_regs();
  1094. dss_set_go_bits();
  1095. spin_unlock_irqrestore(&data_lock, flags);
  1096. mutex_unlock(&apply_lock);
  1097. return 0;
  1098. err:
  1099. mutex_unlock(&apply_lock);
  1100. return r;
  1101. }