xhci-hcd.c 41 KB

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  1. /*
  2. * xHCI host controller driver
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/irq.h>
  23. #include <linux/module.h>
  24. #include "xhci.h"
  25. #define DRIVER_AUTHOR "Sarah Sharp"
  26. #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
  27. /* TODO: copied from ehci-hcd.c - can this be refactored? */
  28. /*
  29. * handshake - spin reading hc until handshake completes or fails
  30. * @ptr: address of hc register to be read
  31. * @mask: bits to look at in result of read
  32. * @done: value of those bits when handshake succeeds
  33. * @usec: timeout in microseconds
  34. *
  35. * Returns negative errno, or zero on success
  36. *
  37. * Success happens when the "mask" bits have the specified value (hardware
  38. * handshake done). There are two failure modes: "usec" have passed (major
  39. * hardware flakeout), or the register reads as all-ones (hardware removed).
  40. */
  41. static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
  42. u32 mask, u32 done, int usec)
  43. {
  44. u32 result;
  45. do {
  46. result = xhci_readl(xhci, ptr);
  47. if (result == ~(u32)0) /* card removed */
  48. return -ENODEV;
  49. result &= mask;
  50. if (result == done)
  51. return 0;
  52. udelay(1);
  53. usec--;
  54. } while (usec > 0);
  55. return -ETIMEDOUT;
  56. }
  57. /*
  58. * Force HC into halt state.
  59. *
  60. * Disable any IRQs and clear the run/stop bit.
  61. * HC will complete any current and actively pipelined transactions, and
  62. * should halt within 16 microframes of the run/stop bit being cleared.
  63. * Read HC Halted bit in the status register to see when the HC is finished.
  64. * XXX: shouldn't we set HC_STATE_HALT here somewhere?
  65. */
  66. int xhci_halt(struct xhci_hcd *xhci)
  67. {
  68. u32 halted;
  69. u32 cmd;
  70. u32 mask;
  71. xhci_dbg(xhci, "// Halt the HC\n");
  72. /* Disable all interrupts from the host controller */
  73. mask = ~(XHCI_IRQS);
  74. halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
  75. if (!halted)
  76. mask &= ~CMD_RUN;
  77. cmd = xhci_readl(xhci, &xhci->op_regs->command);
  78. cmd &= mask;
  79. xhci_writel(xhci, cmd, &xhci->op_regs->command);
  80. return handshake(xhci, &xhci->op_regs->status,
  81. STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
  82. }
  83. /*
  84. * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
  85. *
  86. * This resets pipelines, timers, counters, state machines, etc.
  87. * Transactions will be terminated immediately, and operational registers
  88. * will be set to their defaults.
  89. */
  90. int xhci_reset(struct xhci_hcd *xhci)
  91. {
  92. u32 command;
  93. u32 state;
  94. state = xhci_readl(xhci, &xhci->op_regs->status);
  95. BUG_ON((state & STS_HALT) == 0);
  96. xhci_dbg(xhci, "// Reset the HC\n");
  97. command = xhci_readl(xhci, &xhci->op_regs->command);
  98. command |= CMD_RESET;
  99. xhci_writel(xhci, command, &xhci->op_regs->command);
  100. /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
  101. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  102. return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
  103. }
  104. /*
  105. * Stop the HC from processing the endpoint queues.
  106. */
  107. static void xhci_quiesce(struct xhci_hcd *xhci)
  108. {
  109. /*
  110. * Queues are per endpoint, so we need to disable an endpoint or slot.
  111. *
  112. * To disable a slot, we need to insert a disable slot command on the
  113. * command ring and ring the doorbell. This will also free any internal
  114. * resources associated with the slot (which might not be what we want).
  115. *
  116. * A Release Endpoint command sounds better - doesn't free internal HC
  117. * memory, but removes the endpoints from the schedule and releases the
  118. * bandwidth, disables the doorbells, and clears the endpoint enable
  119. * flag. Usually used prior to a set interface command.
  120. *
  121. * TODO: Implement after command ring code is done.
  122. */
  123. BUG_ON(!HC_IS_RUNNING(xhci_to_hcd(xhci)->state));
  124. xhci_dbg(xhci, "Finished quiescing -- code not written yet\n");
  125. }
  126. #if 0
  127. /* Set up MSI-X table for entry 0 (may claim other entries later) */
  128. static int xhci_setup_msix(struct xhci_hcd *xhci)
  129. {
  130. int ret;
  131. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  132. xhci->msix_count = 0;
  133. /* XXX: did I do this right? ixgbe does kcalloc for more than one */
  134. xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL);
  135. if (!xhci->msix_entries) {
  136. xhci_err(xhci, "Failed to allocate MSI-X entries\n");
  137. return -ENOMEM;
  138. }
  139. xhci->msix_entries[0].entry = 0;
  140. ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
  141. if (ret) {
  142. xhci_err(xhci, "Failed to enable MSI-X\n");
  143. goto free_entries;
  144. }
  145. /*
  146. * Pass the xhci pointer value as the request_irq "cookie".
  147. * If more irqs are added, this will need to be unique for each one.
  148. */
  149. ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0,
  150. "xHCI", xhci_to_hcd(xhci));
  151. if (ret) {
  152. xhci_err(xhci, "Failed to allocate MSI-X interrupt\n");
  153. goto disable_msix;
  154. }
  155. xhci_dbg(xhci, "Finished setting up MSI-X\n");
  156. return 0;
  157. disable_msix:
  158. pci_disable_msix(pdev);
  159. free_entries:
  160. kfree(xhci->msix_entries);
  161. xhci->msix_entries = NULL;
  162. return ret;
  163. }
  164. /* XXX: code duplication; can xhci_setup_msix call this? */
  165. /* Free any IRQs and disable MSI-X */
  166. static void xhci_cleanup_msix(struct xhci_hcd *xhci)
  167. {
  168. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  169. if (!xhci->msix_entries)
  170. return;
  171. free_irq(xhci->msix_entries[0].vector, xhci);
  172. pci_disable_msix(pdev);
  173. kfree(xhci->msix_entries);
  174. xhci->msix_entries = NULL;
  175. xhci_dbg(xhci, "Finished cleaning up MSI-X\n");
  176. }
  177. #endif
  178. /*
  179. * Initialize memory for HCD and xHC (one-time init).
  180. *
  181. * Program the PAGESIZE register, initialize the device context array, create
  182. * device contexts (?), set up a command ring segment (or two?), create event
  183. * ring (one for now).
  184. */
  185. int xhci_init(struct usb_hcd *hcd)
  186. {
  187. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  188. int retval = 0;
  189. xhci_dbg(xhci, "xhci_init\n");
  190. spin_lock_init(&xhci->lock);
  191. retval = xhci_mem_init(xhci, GFP_KERNEL);
  192. xhci_dbg(xhci, "Finished xhci_init\n");
  193. return retval;
  194. }
  195. /*
  196. * Called in interrupt context when there might be work
  197. * queued on the event ring
  198. *
  199. * xhci->lock must be held by caller.
  200. */
  201. static void xhci_work(struct xhci_hcd *xhci)
  202. {
  203. u32 temp;
  204. /*
  205. * Clear the op reg interrupt status first,
  206. * so we can receive interrupts from other MSI-X interrupters.
  207. * Write 1 to clear the interrupt status.
  208. */
  209. temp = xhci_readl(xhci, &xhci->op_regs->status);
  210. temp |= STS_EINT;
  211. xhci_writel(xhci, temp, &xhci->op_regs->status);
  212. /* FIXME when MSI-X is supported and there are multiple vectors */
  213. /* Clear the MSI-X event interrupt status */
  214. /* Acknowledge the interrupt */
  215. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  216. temp |= 0x3;
  217. xhci_writel(xhci, temp, &xhci->ir_set->irq_pending);
  218. /* Flush posted writes */
  219. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  220. /* FIXME this should be a delayed service routine that clears the EHB */
  221. xhci_handle_event(xhci);
  222. /* Clear the event handler busy flag; the event ring should be empty. */
  223. temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
  224. xhci_writel(xhci, temp & ~ERST_EHB, &xhci->ir_set->erst_dequeue[0]);
  225. /* Flush posted writes -- FIXME is this necessary? */
  226. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  227. }
  228. /*-------------------------------------------------------------------------*/
  229. /*
  230. * xHCI spec says we can get an interrupt, and if the HC has an error condition,
  231. * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
  232. * indicators of an event TRB error, but we check the status *first* to be safe.
  233. */
  234. irqreturn_t xhci_irq(struct usb_hcd *hcd)
  235. {
  236. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  237. u32 temp, temp2;
  238. spin_lock(&xhci->lock);
  239. /* Check if the xHC generated the interrupt, or the irq is shared */
  240. temp = xhci_readl(xhci, &xhci->op_regs->status);
  241. temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  242. if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) {
  243. spin_unlock(&xhci->lock);
  244. return IRQ_NONE;
  245. }
  246. if (temp & STS_FATAL) {
  247. xhci_warn(xhci, "WARNING: Host System Error\n");
  248. xhci_halt(xhci);
  249. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  250. spin_unlock(&xhci->lock);
  251. return -ESHUTDOWN;
  252. }
  253. xhci_work(xhci);
  254. spin_unlock(&xhci->lock);
  255. return IRQ_HANDLED;
  256. }
  257. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  258. void xhci_event_ring_work(unsigned long arg)
  259. {
  260. unsigned long flags;
  261. int temp;
  262. struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
  263. int i, j;
  264. xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
  265. spin_lock_irqsave(&xhci->lock, flags);
  266. temp = xhci_readl(xhci, &xhci->op_regs->status);
  267. xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
  268. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  269. xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
  270. xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
  271. xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
  272. xhci->error_bitmask = 0;
  273. xhci_dbg(xhci, "Event ring:\n");
  274. xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
  275. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  276. temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
  277. temp &= ERST_PTR_MASK;
  278. xhci_dbg(xhci, "ERST deq = 0x%x\n", temp);
  279. xhci_dbg(xhci, "Command ring:\n");
  280. xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
  281. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  282. xhci_dbg_cmd_ptrs(xhci);
  283. for (i = 0; i < MAX_HC_SLOTS; ++i) {
  284. if (xhci->devs[i]) {
  285. for (j = 0; j < 31; ++j) {
  286. if (xhci->devs[i]->ep_rings[j]) {
  287. xhci_dbg(xhci, "Dev %d endpoint ring %d:\n", i, j);
  288. xhci_debug_segment(xhci, xhci->devs[i]->ep_rings[j]->deq_seg);
  289. }
  290. }
  291. }
  292. }
  293. if (xhci->noops_submitted != NUM_TEST_NOOPS)
  294. if (xhci_setup_one_noop(xhci))
  295. xhci_ring_cmd_db(xhci);
  296. spin_unlock_irqrestore(&xhci->lock, flags);
  297. if (!xhci->zombie)
  298. mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
  299. else
  300. xhci_dbg(xhci, "Quit polling the event ring.\n");
  301. }
  302. #endif
  303. /*
  304. * Start the HC after it was halted.
  305. *
  306. * This function is called by the USB core when the HC driver is added.
  307. * Its opposite is xhci_stop().
  308. *
  309. * xhci_init() must be called once before this function can be called.
  310. * Reset the HC, enable device slot contexts, program DCBAAP, and
  311. * set command ring pointer and event ring pointer.
  312. *
  313. * Setup MSI-X vectors and enable interrupts.
  314. */
  315. int xhci_run(struct usb_hcd *hcd)
  316. {
  317. u32 temp;
  318. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  319. void (*doorbell)(struct xhci_hcd *) = NULL;
  320. hcd->uses_new_polling = 1;
  321. hcd->poll_rh = 0;
  322. xhci_dbg(xhci, "xhci_run\n");
  323. #if 0 /* FIXME: MSI not setup yet */
  324. /* Do this at the very last minute */
  325. ret = xhci_setup_msix(xhci);
  326. if (!ret)
  327. return ret;
  328. return -ENOSYS;
  329. #endif
  330. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  331. init_timer(&xhci->event_ring_timer);
  332. xhci->event_ring_timer.data = (unsigned long) xhci;
  333. xhci->event_ring_timer.function = xhci_event_ring_work;
  334. /* Poll the event ring */
  335. xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
  336. xhci->zombie = 0;
  337. xhci_dbg(xhci, "Setting event ring polling timer\n");
  338. add_timer(&xhci->event_ring_timer);
  339. #endif
  340. xhci_dbg(xhci, "// Set the interrupt modulation register\n");
  341. temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
  342. temp &= ~ER_IRQ_INTERVAL_MASK;
  343. temp |= (u32) 160;
  344. xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
  345. /* Set the HCD state before we enable the irqs */
  346. hcd->state = HC_STATE_RUNNING;
  347. temp = xhci_readl(xhci, &xhci->op_regs->command);
  348. temp |= (CMD_EIE);
  349. xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
  350. temp);
  351. xhci_writel(xhci, temp, &xhci->op_regs->command);
  352. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  353. xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
  354. xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
  355. xhci_writel(xhci, ER_IRQ_ENABLE(temp),
  356. &xhci->ir_set->irq_pending);
  357. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  358. if (NUM_TEST_NOOPS > 0)
  359. doorbell = xhci_setup_one_noop(xhci);
  360. xhci_dbg(xhci, "Command ring memory map follows:\n");
  361. xhci_debug_ring(xhci, xhci->cmd_ring);
  362. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  363. xhci_dbg_cmd_ptrs(xhci);
  364. xhci_dbg(xhci, "ERST memory map follows:\n");
  365. xhci_dbg_erst(xhci, &xhci->erst);
  366. xhci_dbg(xhci, "Event ring:\n");
  367. xhci_debug_ring(xhci, xhci->event_ring);
  368. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  369. temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
  370. temp &= ERST_PTR_MASK;
  371. xhci_dbg(xhci, "ERST deq = 0x%x\n", temp);
  372. temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[1]);
  373. xhci_dbg(xhci, "ERST deq upper = 0x%x\n", temp);
  374. temp = xhci_readl(xhci, &xhci->op_regs->command);
  375. temp |= (CMD_RUN);
  376. xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
  377. temp);
  378. xhci_writel(xhci, temp, &xhci->op_regs->command);
  379. /* Flush PCI posted writes */
  380. temp = xhci_readl(xhci, &xhci->op_regs->command);
  381. xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
  382. if (doorbell)
  383. (*doorbell)(xhci);
  384. xhci_dbg(xhci, "Finished xhci_run\n");
  385. return 0;
  386. }
  387. /*
  388. * Stop xHCI driver.
  389. *
  390. * This function is called by the USB core when the HC driver is removed.
  391. * Its opposite is xhci_run().
  392. *
  393. * Disable device contexts, disable IRQs, and quiesce the HC.
  394. * Reset the HC, finish any completed transactions, and cleanup memory.
  395. */
  396. void xhci_stop(struct usb_hcd *hcd)
  397. {
  398. u32 temp;
  399. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  400. spin_lock_irq(&xhci->lock);
  401. if (HC_IS_RUNNING(hcd->state))
  402. xhci_quiesce(xhci);
  403. xhci_halt(xhci);
  404. xhci_reset(xhci);
  405. spin_unlock_irq(&xhci->lock);
  406. #if 0 /* No MSI yet */
  407. xhci_cleanup_msix(xhci);
  408. #endif
  409. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  410. /* Tell the event ring poll function not to reschedule */
  411. xhci->zombie = 1;
  412. del_timer_sync(&xhci->event_ring_timer);
  413. #endif
  414. xhci_dbg(xhci, "// Disabling event ring interrupts\n");
  415. temp = xhci_readl(xhci, &xhci->op_regs->status);
  416. xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
  417. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  418. xhci_writel(xhci, ER_IRQ_DISABLE(temp),
  419. &xhci->ir_set->irq_pending);
  420. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  421. xhci_dbg(xhci, "cleaning up memory\n");
  422. xhci_mem_cleanup(xhci);
  423. xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
  424. xhci_readl(xhci, &xhci->op_regs->status));
  425. }
  426. /*
  427. * Shutdown HC (not bus-specific)
  428. *
  429. * This is called when the machine is rebooting or halting. We assume that the
  430. * machine will be powered off, and the HC's internal state will be reset.
  431. * Don't bother to free memory.
  432. */
  433. void xhci_shutdown(struct usb_hcd *hcd)
  434. {
  435. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  436. spin_lock_irq(&xhci->lock);
  437. xhci_halt(xhci);
  438. spin_unlock_irq(&xhci->lock);
  439. #if 0
  440. xhci_cleanup_msix(xhci);
  441. #endif
  442. xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
  443. xhci_readl(xhci, &xhci->op_regs->status));
  444. }
  445. /*-------------------------------------------------------------------------*/
  446. /**
  447. * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
  448. * HCDs. Find the index for an endpoint given its descriptor. Use the return
  449. * value to right shift 1 for the bitmask.
  450. *
  451. * Index = (epnum * 2) + direction - 1,
  452. * where direction = 0 for OUT, 1 for IN.
  453. * For control endpoints, the IN index is used (OUT index is unused), so
  454. * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
  455. */
  456. unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
  457. {
  458. unsigned int index;
  459. if (usb_endpoint_xfer_control(desc))
  460. index = (unsigned int) (usb_endpoint_num(desc)*2);
  461. else
  462. index = (unsigned int) (usb_endpoint_num(desc)*2) +
  463. (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
  464. return index;
  465. }
  466. /* Find the flag for this endpoint (for use in the control context). Use the
  467. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  468. * bit 1, etc.
  469. */
  470. unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
  471. {
  472. return 1 << (xhci_get_endpoint_index(desc) + 1);
  473. }
  474. /* Compute the last valid endpoint context index. Basically, this is the
  475. * endpoint index plus one. For slot contexts with more than valid endpoint,
  476. * we find the most significant bit set in the added contexts flags.
  477. * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
  478. * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
  479. */
  480. static inline unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
  481. {
  482. return fls(added_ctxs) - 1;
  483. }
  484. /* Returns 1 if the arguments are OK;
  485. * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
  486. */
  487. int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
  488. struct usb_host_endpoint *ep, int check_ep, const char *func) {
  489. if (!hcd || (check_ep && !ep) || !udev) {
  490. printk(KERN_DEBUG "xHCI %s called with invalid args\n",
  491. func);
  492. return -EINVAL;
  493. }
  494. if (!udev->parent) {
  495. printk(KERN_DEBUG "xHCI %s called for root hub\n",
  496. func);
  497. return 0;
  498. }
  499. if (!udev->slot_id) {
  500. printk(KERN_DEBUG "xHCI %s called with unaddressed device\n",
  501. func);
  502. return -EINVAL;
  503. }
  504. return 1;
  505. }
  506. /*
  507. * non-error returns are a promise to giveback() the urb later
  508. * we drop ownership so next owner (or urb unlink) can get it
  509. */
  510. int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  511. {
  512. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  513. unsigned long flags;
  514. int ret = 0;
  515. unsigned int slot_id, ep_index;
  516. if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0)
  517. return -EINVAL;
  518. slot_id = urb->dev->slot_id;
  519. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  520. spin_lock_irqsave(&xhci->lock, flags);
  521. if (!xhci->devs || !xhci->devs[slot_id]) {
  522. if (!in_interrupt())
  523. dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n");
  524. ret = -EINVAL;
  525. goto exit;
  526. }
  527. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
  528. if (!in_interrupt())
  529. xhci_dbg(xhci, "urb submitted during PCI suspend\n");
  530. ret = -ESHUTDOWN;
  531. goto exit;
  532. }
  533. if (usb_endpoint_xfer_control(&urb->ep->desc))
  534. /* We have a spinlock and interrupts disabled, so we must pass
  535. * atomic context to this function, which may allocate memory.
  536. */
  537. ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
  538. slot_id, ep_index);
  539. else if (usb_endpoint_xfer_bulk(&urb->ep->desc))
  540. ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
  541. slot_id, ep_index);
  542. else
  543. ret = -EINVAL;
  544. exit:
  545. spin_unlock_irqrestore(&xhci->lock, flags);
  546. return ret;
  547. }
  548. /*
  549. * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
  550. * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
  551. * should pick up where it left off in the TD, unless a Set Transfer Ring
  552. * Dequeue Pointer is issued.
  553. *
  554. * The TRBs that make up the buffers for the canceled URB will be "removed" from
  555. * the ring. Since the ring is a contiguous structure, they can't be physically
  556. * removed. Instead, there are two options:
  557. *
  558. * 1) If the HC is in the middle of processing the URB to be canceled, we
  559. * simply move the ring's dequeue pointer past those TRBs using the Set
  560. * Transfer Ring Dequeue Pointer command. This will be the common case,
  561. * when drivers timeout on the last submitted URB and attempt to cancel.
  562. *
  563. * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
  564. * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
  565. * HC will need to invalidate the any TRBs it has cached after the stop
  566. * endpoint command, as noted in the xHCI 0.95 errata.
  567. *
  568. * 3) The TD may have completed by the time the Stop Endpoint Command
  569. * completes, so software needs to handle that case too.
  570. *
  571. * This function should protect against the TD enqueueing code ringing the
  572. * doorbell while this code is waiting for a Stop Endpoint command to complete.
  573. * It also needs to account for multiple cancellations on happening at the same
  574. * time for the same endpoint.
  575. *
  576. * Note that this function can be called in any context, or so says
  577. * usb_hcd_unlink_urb()
  578. */
  579. int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  580. {
  581. unsigned long flags;
  582. int ret;
  583. struct xhci_hcd *xhci;
  584. struct xhci_td *td;
  585. unsigned int ep_index;
  586. struct xhci_ring *ep_ring;
  587. xhci = hcd_to_xhci(hcd);
  588. spin_lock_irqsave(&xhci->lock, flags);
  589. /* Make sure the URB hasn't completed or been unlinked already */
  590. ret = usb_hcd_check_unlink_urb(hcd, urb, status);
  591. if (ret || !urb->hcpriv)
  592. goto done;
  593. xhci_dbg(xhci, "Cancel URB %p\n", urb);
  594. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  595. ep_ring = xhci->devs[urb->dev->slot_id]->ep_rings[ep_index];
  596. td = (struct xhci_td *) urb->hcpriv;
  597. ep_ring->cancels_pending++;
  598. list_add_tail(&td->cancelled_td_list, &ep_ring->cancelled_td_list);
  599. /* Queue a stop endpoint command, but only if this is
  600. * the first cancellation to be handled.
  601. */
  602. if (ep_ring->cancels_pending == 1) {
  603. xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index);
  604. xhci_ring_cmd_db(xhci);
  605. }
  606. done:
  607. spin_unlock_irqrestore(&xhci->lock, flags);
  608. return ret;
  609. }
  610. /* Drop an endpoint from a new bandwidth configuration for this device.
  611. * Only one call to this function is allowed per endpoint before
  612. * check_bandwidth() or reset_bandwidth() must be called.
  613. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  614. * add the endpoint to the schedule with possibly new parameters denoted by a
  615. * different endpoint descriptor in usb_host_endpoint.
  616. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  617. * not allowed.
  618. *
  619. * The USB core will not allow URBs to be queued to an endpoint that is being
  620. * disabled, so there's no need for mutual exclusion to protect
  621. * the xhci->devs[slot_id] structure.
  622. */
  623. int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  624. struct usb_host_endpoint *ep)
  625. {
  626. struct xhci_hcd *xhci;
  627. struct xhci_device_control *in_ctx;
  628. unsigned int last_ctx;
  629. unsigned int ep_index;
  630. struct xhci_ep_ctx *ep_ctx;
  631. u32 drop_flag;
  632. u32 new_add_flags, new_drop_flags, new_slot_info;
  633. int ret;
  634. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  635. if (ret <= 0)
  636. return ret;
  637. xhci = hcd_to_xhci(hcd);
  638. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  639. drop_flag = xhci_get_endpoint_flag(&ep->desc);
  640. if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
  641. xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
  642. __func__, drop_flag);
  643. return 0;
  644. }
  645. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  646. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  647. __func__);
  648. return -EINVAL;
  649. }
  650. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  651. ep_index = xhci_get_endpoint_index(&ep->desc);
  652. ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index];
  653. /* If the HC already knows the endpoint is disabled,
  654. * or the HCD has noted it is disabled, ignore this request
  655. */
  656. if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
  657. in_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
  658. xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
  659. __func__, ep);
  660. return 0;
  661. }
  662. in_ctx->drop_flags |= drop_flag;
  663. new_drop_flags = in_ctx->drop_flags;
  664. in_ctx->add_flags = ~drop_flag;
  665. new_add_flags = in_ctx->add_flags;
  666. last_ctx = xhci_last_valid_endpoint(in_ctx->add_flags);
  667. /* Update the last valid endpoint context, if we deleted the last one */
  668. if ((in_ctx->slot.dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
  669. in_ctx->slot.dev_info &= ~LAST_CTX_MASK;
  670. in_ctx->slot.dev_info |= LAST_CTX(last_ctx);
  671. }
  672. new_slot_info = in_ctx->slot.dev_info;
  673. xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
  674. xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  675. (unsigned int) ep->desc.bEndpointAddress,
  676. udev->slot_id,
  677. (unsigned int) new_drop_flags,
  678. (unsigned int) new_add_flags,
  679. (unsigned int) new_slot_info);
  680. return 0;
  681. }
  682. /* Add an endpoint to a new possible bandwidth configuration for this device.
  683. * Only one call to this function is allowed per endpoint before
  684. * check_bandwidth() or reset_bandwidth() must be called.
  685. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  686. * add the endpoint to the schedule with possibly new parameters denoted by a
  687. * different endpoint descriptor in usb_host_endpoint.
  688. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  689. * not allowed.
  690. *
  691. * The USB core will not allow URBs to be queued to an endpoint until the
  692. * configuration or alt setting is installed in the device, so there's no need
  693. * for mutual exclusion to protect the xhci->devs[slot_id] structure.
  694. */
  695. int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  696. struct usb_host_endpoint *ep)
  697. {
  698. struct xhci_hcd *xhci;
  699. struct xhci_device_control *in_ctx;
  700. unsigned int ep_index;
  701. struct xhci_ep_ctx *ep_ctx;
  702. u32 added_ctxs;
  703. unsigned int last_ctx;
  704. u32 new_add_flags, new_drop_flags, new_slot_info;
  705. int ret = 0;
  706. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  707. if (ret <= 0) {
  708. /* So we won't queue a reset ep command for a root hub */
  709. ep->hcpriv = NULL;
  710. return ret;
  711. }
  712. xhci = hcd_to_xhci(hcd);
  713. added_ctxs = xhci_get_endpoint_flag(&ep->desc);
  714. last_ctx = xhci_last_valid_endpoint(added_ctxs);
  715. if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
  716. /* FIXME when we have to issue an evaluate endpoint command to
  717. * deal with ep0 max packet size changing once we get the
  718. * descriptors
  719. */
  720. xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
  721. __func__, added_ctxs);
  722. return 0;
  723. }
  724. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  725. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  726. __func__);
  727. return -EINVAL;
  728. }
  729. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  730. ep_index = xhci_get_endpoint_index(&ep->desc);
  731. ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index];
  732. /* If the HCD has already noted the endpoint is enabled,
  733. * ignore this request.
  734. */
  735. if (in_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
  736. xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
  737. __func__, ep);
  738. return 0;
  739. }
  740. /*
  741. * Configuration and alternate setting changes must be done in
  742. * process context, not interrupt context (or so documenation
  743. * for usb_set_interface() and usb_set_configuration() claim).
  744. */
  745. if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
  746. udev, ep, GFP_KERNEL) < 0) {
  747. dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
  748. __func__, ep->desc.bEndpointAddress);
  749. return -ENOMEM;
  750. }
  751. in_ctx->add_flags |= added_ctxs;
  752. new_add_flags = in_ctx->add_flags;
  753. /* If xhci_endpoint_disable() was called for this endpoint, but the
  754. * xHC hasn't been notified yet through the check_bandwidth() call,
  755. * this re-adds a new state for the endpoint from the new endpoint
  756. * descriptors. We must drop and re-add this endpoint, so we leave the
  757. * drop flags alone.
  758. */
  759. new_drop_flags = in_ctx->drop_flags;
  760. /* Update the last valid endpoint context, if we just added one past */
  761. if ((in_ctx->slot.dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
  762. in_ctx->slot.dev_info &= ~LAST_CTX_MASK;
  763. in_ctx->slot.dev_info |= LAST_CTX(last_ctx);
  764. }
  765. new_slot_info = in_ctx->slot.dev_info;
  766. /* Store the usb_device pointer for later use */
  767. ep->hcpriv = udev;
  768. xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  769. (unsigned int) ep->desc.bEndpointAddress,
  770. udev->slot_id,
  771. (unsigned int) new_drop_flags,
  772. (unsigned int) new_add_flags,
  773. (unsigned int) new_slot_info);
  774. return 0;
  775. }
  776. static void xhci_zero_in_ctx(struct xhci_virt_device *virt_dev)
  777. {
  778. struct xhci_ep_ctx *ep_ctx;
  779. int i;
  780. /* When a device's add flag and drop flag are zero, any subsequent
  781. * configure endpoint command will leave that endpoint's state
  782. * untouched. Make sure we don't leave any old state in the input
  783. * endpoint contexts.
  784. */
  785. virt_dev->in_ctx->drop_flags = 0;
  786. virt_dev->in_ctx->add_flags = 0;
  787. virt_dev->in_ctx->slot.dev_info &= ~LAST_CTX_MASK;
  788. /* Endpoint 0 is always valid */
  789. virt_dev->in_ctx->slot.dev_info |= LAST_CTX(1);
  790. for (i = 1; i < 31; ++i) {
  791. ep_ctx = &virt_dev->in_ctx->ep[i];
  792. ep_ctx->ep_info = 0;
  793. ep_ctx->ep_info2 = 0;
  794. ep_ctx->deq[0] = 0;
  795. ep_ctx->deq[1] = 0;
  796. ep_ctx->tx_info = 0;
  797. }
  798. }
  799. /* Called after one or more calls to xhci_add_endpoint() or
  800. * xhci_drop_endpoint(). If this call fails, the USB core is expected
  801. * to call xhci_reset_bandwidth().
  802. *
  803. * Since we are in the middle of changing either configuration or
  804. * installing a new alt setting, the USB core won't allow URBs to be
  805. * enqueued for any endpoint on the old config or interface. Nothing
  806. * else should be touching the xhci->devs[slot_id] structure, so we
  807. * don't need to take the xhci->lock for manipulating that.
  808. */
  809. int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  810. {
  811. int i;
  812. int ret = 0;
  813. int timeleft;
  814. unsigned long flags;
  815. struct xhci_hcd *xhci;
  816. struct xhci_virt_device *virt_dev;
  817. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  818. if (ret <= 0)
  819. return ret;
  820. xhci = hcd_to_xhci(hcd);
  821. if (!udev->slot_id || !xhci->devs || !xhci->devs[udev->slot_id]) {
  822. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  823. __func__);
  824. return -EINVAL;
  825. }
  826. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  827. virt_dev = xhci->devs[udev->slot_id];
  828. /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
  829. virt_dev->in_ctx->add_flags |= SLOT_FLAG;
  830. virt_dev->in_ctx->add_flags &= ~EP0_FLAG;
  831. virt_dev->in_ctx->drop_flags &= ~SLOT_FLAG;
  832. virt_dev->in_ctx->drop_flags &= ~EP0_FLAG;
  833. xhci_dbg(xhci, "New Input Control Context:\n");
  834. xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma,
  835. LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info));
  836. spin_lock_irqsave(&xhci->lock, flags);
  837. ret = xhci_queue_configure_endpoint(xhci, virt_dev->in_ctx_dma,
  838. udev->slot_id);
  839. if (ret < 0) {
  840. spin_unlock_irqrestore(&xhci->lock, flags);
  841. xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
  842. return -ENOMEM;
  843. }
  844. xhci_ring_cmd_db(xhci);
  845. spin_unlock_irqrestore(&xhci->lock, flags);
  846. /* Wait for the configure endpoint command to complete */
  847. timeleft = wait_for_completion_interruptible_timeout(
  848. &virt_dev->cmd_completion,
  849. USB_CTRL_SET_TIMEOUT);
  850. if (timeleft <= 0) {
  851. xhci_warn(xhci, "%s while waiting for configure endpoint command\n",
  852. timeleft == 0 ? "Timeout" : "Signal");
  853. /* FIXME cancel the configure endpoint command */
  854. return -ETIME;
  855. }
  856. switch (virt_dev->cmd_status) {
  857. case COMP_ENOMEM:
  858. dev_warn(&udev->dev, "Not enough host controller resources "
  859. "for new device state.\n");
  860. ret = -ENOMEM;
  861. /* FIXME: can we allocate more resources for the HC? */
  862. break;
  863. case COMP_BW_ERR:
  864. dev_warn(&udev->dev, "Not enough bandwidth "
  865. "for new device state.\n");
  866. ret = -ENOSPC;
  867. /* FIXME: can we go back to the old state? */
  868. break;
  869. case COMP_TRB_ERR:
  870. /* the HCD set up something wrong */
  871. dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, add flag = 1, "
  872. "and endpoint is not disabled.\n");
  873. ret = -EINVAL;
  874. break;
  875. case COMP_SUCCESS:
  876. dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
  877. break;
  878. default:
  879. xhci_err(xhci, "ERROR: unexpected command completion "
  880. "code 0x%x.\n", virt_dev->cmd_status);
  881. ret = -EINVAL;
  882. break;
  883. }
  884. if (ret) {
  885. /* Callee should call reset_bandwidth() */
  886. return ret;
  887. }
  888. xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
  889. xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma,
  890. LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info));
  891. xhci_zero_in_ctx(virt_dev);
  892. /* Free any old rings */
  893. for (i = 1; i < 31; ++i) {
  894. if (virt_dev->new_ep_rings[i]) {
  895. xhci_ring_free(xhci, virt_dev->ep_rings[i]);
  896. virt_dev->ep_rings[i] = virt_dev->new_ep_rings[i];
  897. virt_dev->new_ep_rings[i] = NULL;
  898. }
  899. }
  900. return ret;
  901. }
  902. void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  903. {
  904. struct xhci_hcd *xhci;
  905. struct xhci_virt_device *virt_dev;
  906. int i, ret;
  907. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  908. if (ret <= 0)
  909. return;
  910. xhci = hcd_to_xhci(hcd);
  911. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  912. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  913. __func__);
  914. return;
  915. }
  916. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  917. virt_dev = xhci->devs[udev->slot_id];
  918. /* Free any rings allocated for added endpoints */
  919. for (i = 0; i < 31; ++i) {
  920. if (virt_dev->new_ep_rings[i]) {
  921. xhci_ring_free(xhci, virt_dev->new_ep_rings[i]);
  922. virt_dev->new_ep_rings[i] = NULL;
  923. }
  924. }
  925. xhci_zero_in_ctx(virt_dev);
  926. }
  927. /* Deal with stalled endpoints. The core should have sent the control message
  928. * to clear the halt condition. However, we need to make the xHCI hardware
  929. * reset its sequence number, since a device will expect a sequence number of
  930. * zero after the halt condition is cleared.
  931. * Context: in_interrupt
  932. */
  933. void xhci_endpoint_reset(struct usb_hcd *hcd,
  934. struct usb_host_endpoint *ep)
  935. {
  936. struct xhci_hcd *xhci;
  937. struct usb_device *udev;
  938. unsigned int ep_index;
  939. unsigned long flags;
  940. int ret;
  941. xhci = hcd_to_xhci(hcd);
  942. udev = (struct usb_device *) ep->hcpriv;
  943. /* Called with a root hub endpoint (or an endpoint that wasn't added
  944. * with xhci_add_endpoint()
  945. */
  946. if (!ep->hcpriv)
  947. return;
  948. ep_index = xhci_get_endpoint_index(&ep->desc);
  949. xhci_dbg(xhci, "Queueing reset endpoint command\n");
  950. spin_lock_irqsave(&xhci->lock, flags);
  951. ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
  952. if (!ret) {
  953. xhci_ring_cmd_db(xhci);
  954. }
  955. spin_unlock_irqrestore(&xhci->lock, flags);
  956. if (ret)
  957. xhci_warn(xhci, "FIXME allocate a new ring segment\n");
  958. }
  959. /*
  960. * At this point, the struct usb_device is about to go away, the device has
  961. * disconnected, and all traffic has been stopped and the endpoints have been
  962. * disabled. Free any HC data structures associated with that device.
  963. */
  964. void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
  965. {
  966. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  967. unsigned long flags;
  968. if (udev->slot_id == 0)
  969. return;
  970. spin_lock_irqsave(&xhci->lock, flags);
  971. if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
  972. spin_unlock_irqrestore(&xhci->lock, flags);
  973. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  974. return;
  975. }
  976. xhci_ring_cmd_db(xhci);
  977. spin_unlock_irqrestore(&xhci->lock, flags);
  978. /*
  979. * Event command completion handler will free any data structures
  980. * associated with the slot. XXX Can free sleep?
  981. */
  982. }
  983. /*
  984. * Returns 0 if the xHC ran out of device slots, the Enable Slot command
  985. * timed out, or allocating memory failed. Returns 1 on success.
  986. */
  987. int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
  988. {
  989. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  990. unsigned long flags;
  991. int timeleft;
  992. int ret;
  993. spin_lock_irqsave(&xhci->lock, flags);
  994. ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
  995. if (ret) {
  996. spin_unlock_irqrestore(&xhci->lock, flags);
  997. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  998. return 0;
  999. }
  1000. xhci_ring_cmd_db(xhci);
  1001. spin_unlock_irqrestore(&xhci->lock, flags);
  1002. /* XXX: how much time for xHC slot assignment? */
  1003. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1004. USB_CTRL_SET_TIMEOUT);
  1005. if (timeleft <= 0) {
  1006. xhci_warn(xhci, "%s while waiting for a slot\n",
  1007. timeleft == 0 ? "Timeout" : "Signal");
  1008. /* FIXME cancel the enable slot request */
  1009. return 0;
  1010. }
  1011. if (!xhci->slot_id) {
  1012. xhci_err(xhci, "Error while assigning device slot ID\n");
  1013. return 0;
  1014. }
  1015. /* xhci_alloc_virt_device() does not touch rings; no need to lock */
  1016. if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
  1017. /* Disable slot, if we can do it without mem alloc */
  1018. xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
  1019. spin_lock_irqsave(&xhci->lock, flags);
  1020. if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
  1021. xhci_ring_cmd_db(xhci);
  1022. spin_unlock_irqrestore(&xhci->lock, flags);
  1023. return 0;
  1024. }
  1025. udev->slot_id = xhci->slot_id;
  1026. /* Is this a LS or FS device under a HS hub? */
  1027. /* Hub or peripherial? */
  1028. return 1;
  1029. }
  1030. /*
  1031. * Issue an Address Device command (which will issue a SetAddress request to
  1032. * the device).
  1033. * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
  1034. * we should only issue and wait on one address command at the same time.
  1035. *
  1036. * We add one to the device address issued by the hardware because the USB core
  1037. * uses address 1 for the root hubs (even though they're not really devices).
  1038. */
  1039. int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
  1040. {
  1041. unsigned long flags;
  1042. int timeleft;
  1043. struct xhci_virt_device *virt_dev;
  1044. int ret = 0;
  1045. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1046. u32 temp;
  1047. if (!udev->slot_id) {
  1048. xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
  1049. return -EINVAL;
  1050. }
  1051. virt_dev = xhci->devs[udev->slot_id];
  1052. /* If this is a Set Address to an unconfigured device, setup ep 0 */
  1053. if (!udev->config)
  1054. xhci_setup_addressable_virt_dev(xhci, udev);
  1055. /* Otherwise, assume the core has the device configured how it wants */
  1056. spin_lock_irqsave(&xhci->lock, flags);
  1057. ret = xhci_queue_address_device(xhci, virt_dev->in_ctx_dma,
  1058. udev->slot_id);
  1059. if (ret) {
  1060. spin_unlock_irqrestore(&xhci->lock, flags);
  1061. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1062. return ret;
  1063. }
  1064. xhci_ring_cmd_db(xhci);
  1065. spin_unlock_irqrestore(&xhci->lock, flags);
  1066. /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
  1067. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1068. USB_CTRL_SET_TIMEOUT);
  1069. /* FIXME: From section 4.3.4: "Software shall be responsible for timing
  1070. * the SetAddress() "recovery interval" required by USB and aborting the
  1071. * command on a timeout.
  1072. */
  1073. if (timeleft <= 0) {
  1074. xhci_warn(xhci, "%s while waiting for a slot\n",
  1075. timeleft == 0 ? "Timeout" : "Signal");
  1076. /* FIXME cancel the address device command */
  1077. return -ETIME;
  1078. }
  1079. switch (virt_dev->cmd_status) {
  1080. case COMP_CTX_STATE:
  1081. case COMP_EBADSLT:
  1082. xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
  1083. udev->slot_id);
  1084. ret = -EINVAL;
  1085. break;
  1086. case COMP_TX_ERR:
  1087. dev_warn(&udev->dev, "Device not responding to set address.\n");
  1088. ret = -EPROTO;
  1089. break;
  1090. case COMP_SUCCESS:
  1091. xhci_dbg(xhci, "Successful Address Device command\n");
  1092. break;
  1093. default:
  1094. xhci_err(xhci, "ERROR: unexpected command completion "
  1095. "code 0x%x.\n", virt_dev->cmd_status);
  1096. ret = -EINVAL;
  1097. break;
  1098. }
  1099. if (ret) {
  1100. return ret;
  1101. }
  1102. temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[0]);
  1103. xhci_dbg(xhci, "Op regs DCBAA ptr[0] = %#08x\n", temp);
  1104. temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[1]);
  1105. xhci_dbg(xhci, "Op regs DCBAA ptr[1] = %#08x\n", temp);
  1106. xhci_dbg(xhci, "Slot ID %d dcbaa entry[0] @%p = %#08x\n",
  1107. udev->slot_id,
  1108. &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id],
  1109. xhci->dcbaa->dev_context_ptrs[2*udev->slot_id]);
  1110. xhci_dbg(xhci, "Slot ID %d dcbaa entry[1] @%p = %#08x\n",
  1111. udev->slot_id,
  1112. &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1],
  1113. xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1]);
  1114. xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
  1115. (unsigned long long)virt_dev->out_ctx_dma);
  1116. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1117. xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma, 2);
  1118. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1119. xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma, 2);
  1120. /*
  1121. * USB core uses address 1 for the roothubs, so we add one to the
  1122. * address given back to us by the HC.
  1123. */
  1124. udev->devnum = (virt_dev->out_ctx->slot.dev_state & DEV_ADDR_MASK) + 1;
  1125. /* Zero the input context control for later use */
  1126. virt_dev->in_ctx->add_flags = 0;
  1127. virt_dev->in_ctx->drop_flags = 0;
  1128. /* Mirror flags in the output context for future ep enable/disable */
  1129. virt_dev->out_ctx->add_flags = SLOT_FLAG | EP0_FLAG;
  1130. virt_dev->out_ctx->drop_flags = 0;
  1131. xhci_dbg(xhci, "Device address = %d\n", udev->devnum);
  1132. /* XXX Meh, not sure if anyone else but choose_address uses this. */
  1133. set_bit(udev->devnum, udev->bus->devmap.devicemap);
  1134. return 0;
  1135. }
  1136. int xhci_get_frame(struct usb_hcd *hcd)
  1137. {
  1138. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1139. /* EHCI mods by the periodic size. Why? */
  1140. return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
  1141. }
  1142. MODULE_DESCRIPTION(DRIVER_DESC);
  1143. MODULE_AUTHOR(DRIVER_AUTHOR);
  1144. MODULE_LICENSE("GPL");
  1145. static int __init xhci_hcd_init(void)
  1146. {
  1147. #ifdef CONFIG_PCI
  1148. int retval = 0;
  1149. retval = xhci_register_pci();
  1150. if (retval < 0) {
  1151. printk(KERN_DEBUG "Problem registering PCI driver.");
  1152. return retval;
  1153. }
  1154. #endif
  1155. /*
  1156. * Check the compiler generated sizes of structures that must be laid
  1157. * out in specific ways for hardware access.
  1158. */
  1159. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1160. BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
  1161. BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
  1162. /* xhci_device_control has eight fields, and also
  1163. * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
  1164. */
  1165. BUILD_BUG_ON(sizeof(struct xhci_device_control) != (8+8+8*31)*32/8);
  1166. BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
  1167. BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
  1168. BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
  1169. BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
  1170. BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
  1171. /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
  1172. BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
  1173. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1174. return 0;
  1175. }
  1176. module_init(xhci_hcd_init);
  1177. static void __exit xhci_hcd_cleanup(void)
  1178. {
  1179. #ifdef CONFIG_PCI
  1180. xhci_unregister_pci();
  1181. #endif
  1182. }
  1183. module_exit(xhci_hcd_cleanup);