mpt2sas_base.c 132 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2012 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int mpt2sas_fwfault_debug;
  74. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  75. "and halt firmware - (default=0)");
  76. static int disable_discovery = -1;
  77. module_param(disable_discovery, int, 0);
  78. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  79. /**
  80. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  81. *
  82. */
  83. static int
  84. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  85. {
  86. int ret = param_set_int(val, kp);
  87. struct MPT2SAS_ADAPTER *ioc;
  88. if (ret)
  89. return ret;
  90. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  91. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  92. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  93. return 0;
  94. }
  95. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  96. param_get_int, &mpt2sas_fwfault_debug, 0644);
  97. /**
  98. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  99. * @arg: input argument, used to derive ioc
  100. *
  101. * Return 0 if controller is removed from pci subsystem.
  102. * Return -1 for other case.
  103. */
  104. static int mpt2sas_remove_dead_ioc_func(void *arg)
  105. {
  106. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  107. struct pci_dev *pdev;
  108. if ((ioc == NULL))
  109. return -1;
  110. pdev = ioc->pdev;
  111. if ((pdev == NULL))
  112. return -1;
  113. pci_stop_and_remove_bus_device(pdev);
  114. return 0;
  115. }
  116. /**
  117. * _base_fault_reset_work - workq handling ioc fault conditions
  118. * @work: input argument, used to derive ioc
  119. * Context: sleep.
  120. *
  121. * Return nothing.
  122. */
  123. static void
  124. _base_fault_reset_work(struct work_struct *work)
  125. {
  126. struct MPT2SAS_ADAPTER *ioc =
  127. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  128. unsigned long flags;
  129. u32 doorbell;
  130. int rc;
  131. struct task_struct *p;
  132. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  133. if (ioc->shost_recovery || ioc->pci_error_recovery)
  134. goto rearm_timer;
  135. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  136. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  137. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  138. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  139. ioc->name, __func__);
  140. /* It may be possible that EEH recovery can resolve some of
  141. * pci bus failure issues rather removing the dead ioc function
  142. * by considering controller is in a non-operational state. So
  143. * here priority is given to the EEH recovery. If it doesn't
  144. * not resolve this issue, mpt2sas driver will consider this
  145. * controller to non-operational state and remove the dead ioc
  146. * function.
  147. */
  148. if (ioc->non_operational_loop++ < 5) {
  149. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
  150. flags);
  151. goto rearm_timer;
  152. }
  153. /*
  154. * Call _scsih_flush_pending_cmds callback so that we flush all
  155. * pending commands back to OS. This call is required to aovid
  156. * deadlock at block layer. Dead IOC will fail to do diag reset,
  157. * and this call is safe since dead ioc will never return any
  158. * command back from HW.
  159. */
  160. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  161. /*
  162. * Set remove_host flag early since kernel thread will
  163. * take some time to execute.
  164. */
  165. ioc->remove_host = 1;
  166. /*Remove the Dead Host */
  167. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  168. "mpt2sas_dead_ioc_%d", ioc->id);
  169. if (IS_ERR(p)) {
  170. printk(MPT2SAS_ERR_FMT
  171. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  172. ioc->name, __func__);
  173. } else {
  174. printk(MPT2SAS_ERR_FMT
  175. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  176. ioc->name, __func__);
  177. }
  178. return; /* don't rearm timer */
  179. }
  180. ioc->non_operational_loop = 0;
  181. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  182. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  183. FORCE_BIG_HAMMER);
  184. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  185. __func__, (rc == 0) ? "success" : "failed");
  186. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  187. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  188. mpt2sas_base_fault_info(ioc, doorbell &
  189. MPI2_DOORBELL_DATA_MASK);
  190. }
  191. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  192. rearm_timer:
  193. if (ioc->fault_reset_work_q)
  194. queue_delayed_work(ioc->fault_reset_work_q,
  195. &ioc->fault_reset_work,
  196. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  197. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  198. }
  199. /**
  200. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  201. * @ioc: per adapter object
  202. * Context: sleep.
  203. *
  204. * Return nothing.
  205. */
  206. void
  207. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  208. {
  209. unsigned long flags;
  210. if (ioc->fault_reset_work_q)
  211. return;
  212. /* initialize fault polling */
  213. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  214. snprintf(ioc->fault_reset_work_q_name,
  215. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  216. ioc->fault_reset_work_q =
  217. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  218. if (!ioc->fault_reset_work_q) {
  219. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  220. ioc->name, __func__, __LINE__);
  221. return;
  222. }
  223. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  224. if (ioc->fault_reset_work_q)
  225. queue_delayed_work(ioc->fault_reset_work_q,
  226. &ioc->fault_reset_work,
  227. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  228. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  229. }
  230. /**
  231. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  232. * @ioc: per adapter object
  233. * Context: sleep.
  234. *
  235. * Return nothing.
  236. */
  237. void
  238. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  239. {
  240. unsigned long flags;
  241. struct workqueue_struct *wq;
  242. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  243. wq = ioc->fault_reset_work_q;
  244. ioc->fault_reset_work_q = NULL;
  245. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  246. if (wq) {
  247. if (!cancel_delayed_work(&ioc->fault_reset_work))
  248. flush_workqueue(wq);
  249. destroy_workqueue(wq);
  250. }
  251. }
  252. /**
  253. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  254. * @ioc: per adapter object
  255. * @fault_code: fault code
  256. *
  257. * Return nothing.
  258. */
  259. void
  260. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  261. {
  262. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  263. ioc->name, fault_code);
  264. }
  265. /**
  266. * mpt2sas_halt_firmware - halt's mpt controller firmware
  267. * @ioc: per adapter object
  268. *
  269. * For debugging timeout related issues. Writing 0xCOFFEE00
  270. * to the doorbell register will halt controller firmware. With
  271. * the purpose to stop both driver and firmware, the enduser can
  272. * obtain a ring buffer from controller UART.
  273. */
  274. void
  275. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  276. {
  277. u32 doorbell;
  278. if (!ioc->fwfault_debug)
  279. return;
  280. dump_stack();
  281. doorbell = readl(&ioc->chip->Doorbell);
  282. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  283. mpt2sas_base_fault_info(ioc , doorbell);
  284. else {
  285. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  286. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  287. "timeout\n", ioc->name);
  288. }
  289. panic("panic in %s\n", __func__);
  290. }
  291. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  292. /**
  293. * _base_sas_ioc_info - verbose translation of the ioc status
  294. * @ioc: per adapter object
  295. * @mpi_reply: reply mf payload returned from firmware
  296. * @request_hdr: request mf
  297. *
  298. * Return nothing.
  299. */
  300. static void
  301. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  302. MPI2RequestHeader_t *request_hdr)
  303. {
  304. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  305. MPI2_IOCSTATUS_MASK;
  306. char *desc = NULL;
  307. u16 frame_sz;
  308. char *func_str = NULL;
  309. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  310. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  311. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  312. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  313. return;
  314. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  315. return;
  316. switch (ioc_status) {
  317. /****************************************************************************
  318. * Common IOCStatus values for all replies
  319. ****************************************************************************/
  320. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  321. desc = "invalid function";
  322. break;
  323. case MPI2_IOCSTATUS_BUSY:
  324. desc = "busy";
  325. break;
  326. case MPI2_IOCSTATUS_INVALID_SGL:
  327. desc = "invalid sgl";
  328. break;
  329. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  330. desc = "internal error";
  331. break;
  332. case MPI2_IOCSTATUS_INVALID_VPID:
  333. desc = "invalid vpid";
  334. break;
  335. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  336. desc = "insufficient resources";
  337. break;
  338. case MPI2_IOCSTATUS_INVALID_FIELD:
  339. desc = "invalid field";
  340. break;
  341. case MPI2_IOCSTATUS_INVALID_STATE:
  342. desc = "invalid state";
  343. break;
  344. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  345. desc = "op state not supported";
  346. break;
  347. /****************************************************************************
  348. * Config IOCStatus values
  349. ****************************************************************************/
  350. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  351. desc = "config invalid action";
  352. break;
  353. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  354. desc = "config invalid type";
  355. break;
  356. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  357. desc = "config invalid page";
  358. break;
  359. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  360. desc = "config invalid data";
  361. break;
  362. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  363. desc = "config no defaults";
  364. break;
  365. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  366. desc = "config cant commit";
  367. break;
  368. /****************************************************************************
  369. * SCSI IO Reply
  370. ****************************************************************************/
  371. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  372. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  373. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  374. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  375. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  376. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  377. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  378. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  379. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  380. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  381. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  382. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  383. break;
  384. /****************************************************************************
  385. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  386. ****************************************************************************/
  387. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  388. desc = "eedp guard error";
  389. break;
  390. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  391. desc = "eedp ref tag error";
  392. break;
  393. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  394. desc = "eedp app tag error";
  395. break;
  396. /****************************************************************************
  397. * SCSI Target values
  398. ****************************************************************************/
  399. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  400. desc = "target invalid io index";
  401. break;
  402. case MPI2_IOCSTATUS_TARGET_ABORTED:
  403. desc = "target aborted";
  404. break;
  405. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  406. desc = "target no conn retryable";
  407. break;
  408. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  409. desc = "target no connection";
  410. break;
  411. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  412. desc = "target xfer count mismatch";
  413. break;
  414. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  415. desc = "target data offset error";
  416. break;
  417. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  418. desc = "target too much write data";
  419. break;
  420. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  421. desc = "target iu too short";
  422. break;
  423. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  424. desc = "target ack nak timeout";
  425. break;
  426. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  427. desc = "target nak received";
  428. break;
  429. /****************************************************************************
  430. * Serial Attached SCSI values
  431. ****************************************************************************/
  432. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  433. desc = "smp request failed";
  434. break;
  435. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  436. desc = "smp data overrun";
  437. break;
  438. /****************************************************************************
  439. * Diagnostic Buffer Post / Diagnostic Release values
  440. ****************************************************************************/
  441. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  442. desc = "diagnostic released";
  443. break;
  444. default:
  445. break;
  446. }
  447. if (!desc)
  448. return;
  449. switch (request_hdr->Function) {
  450. case MPI2_FUNCTION_CONFIG:
  451. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  452. func_str = "config_page";
  453. break;
  454. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  455. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  456. func_str = "task_mgmt";
  457. break;
  458. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  459. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  460. func_str = "sas_iounit_ctl";
  461. break;
  462. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  463. frame_sz = sizeof(Mpi2SepRequest_t);
  464. func_str = "enclosure";
  465. break;
  466. case MPI2_FUNCTION_IOC_INIT:
  467. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  468. func_str = "ioc_init";
  469. break;
  470. case MPI2_FUNCTION_PORT_ENABLE:
  471. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  472. func_str = "port_enable";
  473. break;
  474. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  475. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  476. func_str = "smp_passthru";
  477. break;
  478. default:
  479. frame_sz = 32;
  480. func_str = "unknown";
  481. break;
  482. }
  483. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  484. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  485. _debug_dump_mf(request_hdr, frame_sz/4);
  486. }
  487. /**
  488. * _base_display_event_data - verbose translation of firmware asyn events
  489. * @ioc: per adapter object
  490. * @mpi_reply: reply mf payload returned from firmware
  491. *
  492. * Return nothing.
  493. */
  494. static void
  495. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  496. Mpi2EventNotificationReply_t *mpi_reply)
  497. {
  498. char *desc = NULL;
  499. u16 event;
  500. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  501. return;
  502. event = le16_to_cpu(mpi_reply->Event);
  503. switch (event) {
  504. case MPI2_EVENT_LOG_DATA:
  505. desc = "Log Data";
  506. break;
  507. case MPI2_EVENT_STATE_CHANGE:
  508. desc = "Status Change";
  509. break;
  510. case MPI2_EVENT_HARD_RESET_RECEIVED:
  511. desc = "Hard Reset Received";
  512. break;
  513. case MPI2_EVENT_EVENT_CHANGE:
  514. desc = "Event Change";
  515. break;
  516. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  517. desc = "Device Status Change";
  518. break;
  519. case MPI2_EVENT_IR_OPERATION_STATUS:
  520. if (!ioc->hide_ir_msg)
  521. desc = "IR Operation Status";
  522. break;
  523. case MPI2_EVENT_SAS_DISCOVERY:
  524. {
  525. Mpi2EventDataSasDiscovery_t *event_data =
  526. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  527. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  528. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  529. "start" : "stop");
  530. if (event_data->DiscoveryStatus)
  531. printk("discovery_status(0x%08x)",
  532. le32_to_cpu(event_data->DiscoveryStatus));
  533. printk("\n");
  534. return;
  535. }
  536. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  537. desc = "SAS Broadcast Primitive";
  538. break;
  539. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  540. desc = "SAS Init Device Status Change";
  541. break;
  542. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  543. desc = "SAS Init Table Overflow";
  544. break;
  545. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  546. desc = "SAS Topology Change List";
  547. break;
  548. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  549. desc = "SAS Enclosure Device Status Change";
  550. break;
  551. case MPI2_EVENT_IR_VOLUME:
  552. if (!ioc->hide_ir_msg)
  553. desc = "IR Volume";
  554. break;
  555. case MPI2_EVENT_IR_PHYSICAL_DISK:
  556. if (!ioc->hide_ir_msg)
  557. desc = "IR Physical Disk";
  558. break;
  559. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  560. if (!ioc->hide_ir_msg)
  561. desc = "IR Configuration Change List";
  562. break;
  563. case MPI2_EVENT_LOG_ENTRY_ADDED:
  564. if (!ioc->hide_ir_msg)
  565. desc = "Log Entry Added";
  566. break;
  567. }
  568. if (!desc)
  569. return;
  570. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  571. }
  572. #endif
  573. /**
  574. * _base_sas_log_info - verbose translation of firmware log info
  575. * @ioc: per adapter object
  576. * @log_info: log info
  577. *
  578. * Return nothing.
  579. */
  580. static void
  581. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  582. {
  583. union loginfo_type {
  584. u32 loginfo;
  585. struct {
  586. u32 subcode:16;
  587. u32 code:8;
  588. u32 originator:4;
  589. u32 bus_type:4;
  590. } dw;
  591. };
  592. union loginfo_type sas_loginfo;
  593. char *originator_str = NULL;
  594. sas_loginfo.loginfo = log_info;
  595. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  596. return;
  597. /* each nexus loss loginfo */
  598. if (log_info == 0x31170000)
  599. return;
  600. /* eat the loginfos associated with task aborts */
  601. if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
  602. 0x31140000 || log_info == 0x31130000))
  603. return;
  604. switch (sas_loginfo.dw.originator) {
  605. case 0:
  606. originator_str = "IOP";
  607. break;
  608. case 1:
  609. originator_str = "PL";
  610. break;
  611. case 2:
  612. if (!ioc->hide_ir_msg)
  613. originator_str = "IR";
  614. else
  615. originator_str = "WarpDrive";
  616. break;
  617. }
  618. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  619. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  620. originator_str, sas_loginfo.dw.code,
  621. sas_loginfo.dw.subcode);
  622. }
  623. /**
  624. * _base_display_reply_info -
  625. * @ioc: per adapter object
  626. * @smid: system request message index
  627. * @msix_index: MSIX table index supplied by the OS
  628. * @reply: reply message frame(lower 32bit addr)
  629. *
  630. * Return nothing.
  631. */
  632. static void
  633. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  634. u32 reply)
  635. {
  636. MPI2DefaultReply_t *mpi_reply;
  637. u16 ioc_status;
  638. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  639. if (unlikely(!mpi_reply)) {
  640. printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",
  641. ioc->name, __FILE__, __LINE__, __func__);
  642. return;
  643. }
  644. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  645. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  646. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  647. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  648. _base_sas_ioc_info(ioc , mpi_reply,
  649. mpt2sas_base_get_msg_frame(ioc, smid));
  650. }
  651. #endif
  652. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  653. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  654. }
  655. /**
  656. * mpt2sas_base_done - base internal command completion routine
  657. * @ioc: per adapter object
  658. * @smid: system request message index
  659. * @msix_index: MSIX table index supplied by the OS
  660. * @reply: reply message frame(lower 32bit addr)
  661. *
  662. * Return 1 meaning mf should be freed from _base_interrupt
  663. * 0 means the mf is freed from this function.
  664. */
  665. u8
  666. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  667. u32 reply)
  668. {
  669. MPI2DefaultReply_t *mpi_reply;
  670. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  671. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  672. return 1;
  673. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  674. return 1;
  675. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  676. if (mpi_reply) {
  677. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  678. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  679. }
  680. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  681. complete(&ioc->base_cmds.done);
  682. return 1;
  683. }
  684. /**
  685. * _base_async_event - main callback handler for firmware asyn events
  686. * @ioc: per adapter object
  687. * @msix_index: MSIX table index supplied by the OS
  688. * @reply: reply message frame(lower 32bit addr)
  689. *
  690. * Return 1 meaning mf should be freed from _base_interrupt
  691. * 0 means the mf is freed from this function.
  692. */
  693. static u8
  694. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  695. {
  696. Mpi2EventNotificationReply_t *mpi_reply;
  697. Mpi2EventAckRequest_t *ack_request;
  698. u16 smid;
  699. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  700. if (!mpi_reply)
  701. return 1;
  702. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  703. return 1;
  704. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  705. _base_display_event_data(ioc, mpi_reply);
  706. #endif
  707. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  708. goto out;
  709. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  710. if (!smid) {
  711. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  712. ioc->name, __func__);
  713. goto out;
  714. }
  715. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  716. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  717. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  718. ack_request->Event = mpi_reply->Event;
  719. ack_request->EventContext = mpi_reply->EventContext;
  720. ack_request->VF_ID = 0; /* TODO */
  721. ack_request->VP_ID = 0;
  722. mpt2sas_base_put_smid_default(ioc, smid);
  723. out:
  724. /* scsih callback handler */
  725. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  726. /* ctl callback handler */
  727. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  728. return 1;
  729. }
  730. /**
  731. * _base_get_cb_idx - obtain the callback index
  732. * @ioc: per adapter object
  733. * @smid: system request message index
  734. *
  735. * Return callback index.
  736. */
  737. static u8
  738. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  739. {
  740. int i;
  741. u8 cb_idx;
  742. if (smid < ioc->hi_priority_smid) {
  743. i = smid - 1;
  744. cb_idx = ioc->scsi_lookup[i].cb_idx;
  745. } else if (smid < ioc->internal_smid) {
  746. i = smid - ioc->hi_priority_smid;
  747. cb_idx = ioc->hpr_lookup[i].cb_idx;
  748. } else if (smid <= ioc->hba_queue_depth) {
  749. i = smid - ioc->internal_smid;
  750. cb_idx = ioc->internal_lookup[i].cb_idx;
  751. } else
  752. cb_idx = 0xFF;
  753. return cb_idx;
  754. }
  755. /**
  756. * _base_mask_interrupts - disable interrupts
  757. * @ioc: per adapter object
  758. *
  759. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  760. *
  761. * Return nothing.
  762. */
  763. static void
  764. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  765. {
  766. u32 him_register;
  767. ioc->mask_interrupts = 1;
  768. him_register = readl(&ioc->chip->HostInterruptMask);
  769. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  770. writel(him_register, &ioc->chip->HostInterruptMask);
  771. readl(&ioc->chip->HostInterruptMask);
  772. }
  773. /**
  774. * _base_unmask_interrupts - enable interrupts
  775. * @ioc: per adapter object
  776. *
  777. * Enabling only Reply Interrupts
  778. *
  779. * Return nothing.
  780. */
  781. static void
  782. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  783. {
  784. u32 him_register;
  785. him_register = readl(&ioc->chip->HostInterruptMask);
  786. him_register &= ~MPI2_HIM_RIM;
  787. writel(him_register, &ioc->chip->HostInterruptMask);
  788. ioc->mask_interrupts = 0;
  789. }
  790. union reply_descriptor {
  791. u64 word;
  792. struct {
  793. u32 low;
  794. u32 high;
  795. } u;
  796. };
  797. /**
  798. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  799. * @irq: irq number (not used)
  800. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  801. * @r: pt_regs pointer (not used)
  802. *
  803. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  804. */
  805. static irqreturn_t
  806. _base_interrupt(int irq, void *bus_id)
  807. {
  808. struct adapter_reply_queue *reply_q = bus_id;
  809. union reply_descriptor rd;
  810. u32 completed_cmds;
  811. u8 request_desript_type;
  812. u16 smid;
  813. u8 cb_idx;
  814. u32 reply;
  815. u8 msix_index = reply_q->msix_index;
  816. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  817. Mpi2ReplyDescriptorsUnion_t *rpf;
  818. u8 rc;
  819. if (ioc->mask_interrupts)
  820. return IRQ_NONE;
  821. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  822. return IRQ_NONE;
  823. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  824. request_desript_type = rpf->Default.ReplyFlags
  825. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  826. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  827. atomic_dec(&reply_q->busy);
  828. return IRQ_NONE;
  829. }
  830. completed_cmds = 0;
  831. cb_idx = 0xFF;
  832. do {
  833. rd.word = le64_to_cpu(rpf->Words);
  834. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  835. goto out;
  836. reply = 0;
  837. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  838. if (request_desript_type ==
  839. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  840. reply = le32_to_cpu
  841. (rpf->AddressReply.ReplyFrameAddress);
  842. if (reply > ioc->reply_dma_max_address ||
  843. reply < ioc->reply_dma_min_address)
  844. reply = 0;
  845. } else if (request_desript_type ==
  846. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  847. goto next;
  848. else if (request_desript_type ==
  849. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  850. goto next;
  851. if (smid) {
  852. cb_idx = _base_get_cb_idx(ioc, smid);
  853. if ((likely(cb_idx < MPT_MAX_CALLBACKS))
  854. && (likely(mpt_callbacks[cb_idx] != NULL))) {
  855. rc = mpt_callbacks[cb_idx](ioc, smid,
  856. msix_index, reply);
  857. if (reply)
  858. _base_display_reply_info(ioc, smid,
  859. msix_index, reply);
  860. if (rc)
  861. mpt2sas_base_free_smid(ioc, smid);
  862. }
  863. }
  864. if (!smid)
  865. _base_async_event(ioc, msix_index, reply);
  866. /* reply free queue handling */
  867. if (reply) {
  868. ioc->reply_free_host_index =
  869. (ioc->reply_free_host_index ==
  870. (ioc->reply_free_queue_depth - 1)) ?
  871. 0 : ioc->reply_free_host_index + 1;
  872. ioc->reply_free[ioc->reply_free_host_index] =
  873. cpu_to_le32(reply);
  874. wmb();
  875. writel(ioc->reply_free_host_index,
  876. &ioc->chip->ReplyFreeHostIndex);
  877. }
  878. next:
  879. rpf->Words = cpu_to_le64(ULLONG_MAX);
  880. reply_q->reply_post_host_index =
  881. (reply_q->reply_post_host_index ==
  882. (ioc->reply_post_queue_depth - 1)) ? 0 :
  883. reply_q->reply_post_host_index + 1;
  884. request_desript_type =
  885. reply_q->reply_post_free[reply_q->reply_post_host_index].
  886. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  887. completed_cmds++;
  888. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  889. goto out;
  890. if (!reply_q->reply_post_host_index)
  891. rpf = reply_q->reply_post_free;
  892. else
  893. rpf++;
  894. } while (1);
  895. out:
  896. if (!completed_cmds) {
  897. atomic_dec(&reply_q->busy);
  898. return IRQ_NONE;
  899. }
  900. wmb();
  901. if (ioc->is_warpdrive) {
  902. writel(reply_q->reply_post_host_index,
  903. ioc->reply_post_host_index[msix_index]);
  904. atomic_dec(&reply_q->busy);
  905. return IRQ_HANDLED;
  906. }
  907. writel(reply_q->reply_post_host_index | (msix_index <<
  908. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  909. atomic_dec(&reply_q->busy);
  910. return IRQ_HANDLED;
  911. }
  912. /**
  913. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  914. * @ioc: per adapter object
  915. *
  916. */
  917. static inline int
  918. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  919. {
  920. return (ioc->facts.IOCCapabilities &
  921. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  922. }
  923. /**
  924. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  925. * @ioc: per adapter object
  926. * Context: ISR conext
  927. *
  928. * Called when a Task Management request has completed. We want
  929. * to flush the other reply queues so all the outstanding IO has been
  930. * completed back to OS before we process the TM completetion.
  931. *
  932. * Return nothing.
  933. */
  934. void
  935. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  936. {
  937. struct adapter_reply_queue *reply_q;
  938. /* If MSIX capability is turned off
  939. * then multi-queues are not enabled
  940. */
  941. if (!_base_is_controller_msix_enabled(ioc))
  942. return;
  943. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  944. if (ioc->shost_recovery)
  945. return;
  946. /* TMs are on msix_index == 0 */
  947. if (reply_q->msix_index == 0)
  948. continue;
  949. _base_interrupt(reply_q->vector, (void *)reply_q);
  950. }
  951. }
  952. /**
  953. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  954. * @cb_idx: callback index
  955. *
  956. * Return nothing.
  957. */
  958. void
  959. mpt2sas_base_release_callback_handler(u8 cb_idx)
  960. {
  961. mpt_callbacks[cb_idx] = NULL;
  962. }
  963. /**
  964. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  965. * @cb_func: callback function
  966. *
  967. * Returns cb_func.
  968. */
  969. u8
  970. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  971. {
  972. u8 cb_idx;
  973. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  974. if (mpt_callbacks[cb_idx] == NULL)
  975. break;
  976. mpt_callbacks[cb_idx] = cb_func;
  977. return cb_idx;
  978. }
  979. /**
  980. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  981. *
  982. * Return nothing.
  983. */
  984. void
  985. mpt2sas_base_initialize_callback_handler(void)
  986. {
  987. u8 cb_idx;
  988. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  989. mpt2sas_base_release_callback_handler(cb_idx);
  990. }
  991. /**
  992. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  993. * @ioc: per adapter object
  994. * @paddr: virtual address for SGE
  995. *
  996. * Create a zero length scatter gather entry to insure the IOCs hardware has
  997. * something to use if the target device goes brain dead and tries
  998. * to send data even when none is asked for.
  999. *
  1000. * Return nothing.
  1001. */
  1002. void
  1003. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  1004. {
  1005. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  1006. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  1007. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  1008. MPI2_SGE_FLAGS_SHIFT);
  1009. ioc->base_add_sg_single(paddr, flags_length, -1);
  1010. }
  1011. /**
  1012. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  1013. * @paddr: virtual address for SGE
  1014. * @flags_length: SGE flags and data transfer length
  1015. * @dma_addr: Physical address
  1016. *
  1017. * Return nothing.
  1018. */
  1019. static void
  1020. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1021. {
  1022. Mpi2SGESimple32_t *sgel = paddr;
  1023. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1024. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1025. sgel->FlagsLength = cpu_to_le32(flags_length);
  1026. sgel->Address = cpu_to_le32(dma_addr);
  1027. }
  1028. /**
  1029. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1030. * @paddr: virtual address for SGE
  1031. * @flags_length: SGE flags and data transfer length
  1032. * @dma_addr: Physical address
  1033. *
  1034. * Return nothing.
  1035. */
  1036. static void
  1037. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1038. {
  1039. Mpi2SGESimple64_t *sgel = paddr;
  1040. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1041. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1042. sgel->FlagsLength = cpu_to_le32(flags_length);
  1043. sgel->Address = cpu_to_le64(dma_addr);
  1044. }
  1045. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1046. /**
  1047. * _base_config_dma_addressing - set dma addressing
  1048. * @ioc: per adapter object
  1049. * @pdev: PCI device struct
  1050. *
  1051. * Returns 0 for success, non-zero for failure.
  1052. */
  1053. static int
  1054. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1055. {
  1056. struct sysinfo s;
  1057. char *desc = NULL;
  1058. if (sizeof(dma_addr_t) > 4) {
  1059. const uint64_t required_mask =
  1060. dma_get_required_mask(&pdev->dev);
  1061. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1062. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1063. DMA_BIT_MASK(64))) {
  1064. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1065. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1066. desc = "64";
  1067. goto out;
  1068. }
  1069. }
  1070. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1071. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1072. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1073. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1074. desc = "32";
  1075. } else
  1076. return -ENODEV;
  1077. out:
  1078. si_meminfo(&s);
  1079. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1080. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1081. return 0;
  1082. }
  1083. /**
  1084. * _base_check_enable_msix - checks MSIX capabable.
  1085. * @ioc: per adapter object
  1086. *
  1087. * Check to see if card is capable of MSIX, and set number
  1088. * of available msix vectors
  1089. */
  1090. static int
  1091. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1092. {
  1093. int base;
  1094. u16 message_control;
  1095. /* Check whether controller SAS2008 B0 controller,
  1096. if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
  1097. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
  1098. ioc->pdev->revision == 0x01) {
  1099. return -EINVAL;
  1100. }
  1101. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1102. if (!base) {
  1103. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1104. "supported\n", ioc->name));
  1105. return -EINVAL;
  1106. }
  1107. /* get msix vector count */
  1108. /* NUMA_IO not supported for older controllers */
  1109. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1110. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1111. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1112. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1113. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1114. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1115. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1116. ioc->msix_vector_count = 1;
  1117. else {
  1118. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1119. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1120. }
  1121. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1122. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1123. return 0;
  1124. }
  1125. /**
  1126. * _base_free_irq - free irq
  1127. * @ioc: per adapter object
  1128. *
  1129. * Freeing respective reply_queue from the list.
  1130. */
  1131. static void
  1132. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1133. {
  1134. struct adapter_reply_queue *reply_q, *next;
  1135. if (list_empty(&ioc->reply_queue_list))
  1136. return;
  1137. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1138. list_del(&reply_q->list);
  1139. synchronize_irq(reply_q->vector);
  1140. free_irq(reply_q->vector, reply_q);
  1141. kfree(reply_q);
  1142. }
  1143. }
  1144. /**
  1145. * _base_request_irq - request irq
  1146. * @ioc: per adapter object
  1147. * @index: msix index into vector table
  1148. * @vector: irq vector
  1149. *
  1150. * Inserting respective reply_queue into the list.
  1151. */
  1152. static int
  1153. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1154. {
  1155. struct adapter_reply_queue *reply_q;
  1156. int r;
  1157. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1158. if (!reply_q) {
  1159. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1160. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1161. return -ENOMEM;
  1162. }
  1163. reply_q->ioc = ioc;
  1164. reply_q->msix_index = index;
  1165. reply_q->vector = vector;
  1166. atomic_set(&reply_q->busy, 0);
  1167. if (ioc->msix_enable)
  1168. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1169. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1170. else
  1171. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1172. MPT2SAS_DRIVER_NAME, ioc->id);
  1173. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1174. reply_q);
  1175. if (r) {
  1176. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1177. reply_q->name, vector);
  1178. kfree(reply_q);
  1179. return -EBUSY;
  1180. }
  1181. INIT_LIST_HEAD(&reply_q->list);
  1182. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1183. return 0;
  1184. }
  1185. /**
  1186. * _base_assign_reply_queues - assigning msix index for each cpu
  1187. * @ioc: per adapter object
  1188. *
  1189. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1190. *
  1191. * It would nice if we could call irq_set_affinity, however it is not
  1192. * an exported symbol
  1193. */
  1194. static void
  1195. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1196. {
  1197. struct adapter_reply_queue *reply_q;
  1198. int cpu_id;
  1199. int cpu_grouping, loop, grouping, grouping_mod;
  1200. if (!_base_is_controller_msix_enabled(ioc))
  1201. return;
  1202. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1203. /* when there are more cpus than available msix vectors,
  1204. * then group cpus togeather on same irq
  1205. */
  1206. if (ioc->cpu_count > ioc->msix_vector_count) {
  1207. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1208. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1209. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1210. cpu_grouping = 2;
  1211. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1212. cpu_grouping = 4;
  1213. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1214. cpu_grouping = 8;
  1215. else
  1216. cpu_grouping = 16;
  1217. } else
  1218. cpu_grouping = 0;
  1219. loop = 0;
  1220. reply_q = list_entry(ioc->reply_queue_list.next,
  1221. struct adapter_reply_queue, list);
  1222. for_each_online_cpu(cpu_id) {
  1223. if (!cpu_grouping) {
  1224. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1225. reply_q = list_entry(reply_q->list.next,
  1226. struct adapter_reply_queue, list);
  1227. } else {
  1228. if (loop < cpu_grouping) {
  1229. ioc->cpu_msix_table[cpu_id] =
  1230. reply_q->msix_index;
  1231. loop++;
  1232. } else {
  1233. reply_q = list_entry(reply_q->list.next,
  1234. struct adapter_reply_queue, list);
  1235. ioc->cpu_msix_table[cpu_id] =
  1236. reply_q->msix_index;
  1237. loop = 1;
  1238. }
  1239. }
  1240. }
  1241. }
  1242. /**
  1243. * _base_disable_msix - disables msix
  1244. * @ioc: per adapter object
  1245. *
  1246. */
  1247. static void
  1248. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1249. {
  1250. if (ioc->msix_enable) {
  1251. pci_disable_msix(ioc->pdev);
  1252. ioc->msix_enable = 0;
  1253. }
  1254. }
  1255. /**
  1256. * _base_enable_msix - enables msix, failback to io_apic
  1257. * @ioc: per adapter object
  1258. *
  1259. */
  1260. static int
  1261. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1262. {
  1263. struct msix_entry *entries, *a;
  1264. int r;
  1265. int i;
  1266. u8 try_msix = 0;
  1267. INIT_LIST_HEAD(&ioc->reply_queue_list);
  1268. if (msix_disable == -1 || msix_disable == 0)
  1269. try_msix = 1;
  1270. if (!try_msix)
  1271. goto try_ioapic;
  1272. if (_base_check_enable_msix(ioc) != 0)
  1273. goto try_ioapic;
  1274. ioc->reply_queue_count = min_t(int, ioc->cpu_count,
  1275. ioc->msix_vector_count);
  1276. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1277. GFP_KERNEL);
  1278. if (!entries) {
  1279. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1280. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1281. __LINE__, __func__));
  1282. goto try_ioapic;
  1283. }
  1284. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1285. a->entry = i;
  1286. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1287. if (r) {
  1288. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1289. "failed (r=%d) !!!\n", ioc->name, r));
  1290. kfree(entries);
  1291. goto try_ioapic;
  1292. }
  1293. ioc->msix_enable = 1;
  1294. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1295. r = _base_request_irq(ioc, i, a->vector);
  1296. if (r) {
  1297. _base_free_irq(ioc);
  1298. _base_disable_msix(ioc);
  1299. kfree(entries);
  1300. goto try_ioapic;
  1301. }
  1302. }
  1303. kfree(entries);
  1304. return 0;
  1305. /* failback to io_apic interrupt routing */
  1306. try_ioapic:
  1307. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1308. return r;
  1309. }
  1310. /**
  1311. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1312. * @ioc: per adapter object
  1313. *
  1314. * Returns 0 for success, non-zero for failure.
  1315. */
  1316. int
  1317. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1318. {
  1319. struct pci_dev *pdev = ioc->pdev;
  1320. u32 memap_sz;
  1321. u32 pio_sz;
  1322. int i, r = 0;
  1323. u64 pio_chip = 0;
  1324. u64 chip_phys = 0;
  1325. struct adapter_reply_queue *reply_q;
  1326. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1327. ioc->name, __func__));
  1328. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1329. if (pci_enable_device_mem(pdev)) {
  1330. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1331. "failed\n", ioc->name);
  1332. return -ENODEV;
  1333. }
  1334. if (pci_request_selected_regions(pdev, ioc->bars,
  1335. MPT2SAS_DRIVER_NAME)) {
  1336. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1337. "failed\n", ioc->name);
  1338. r = -ENODEV;
  1339. goto out_fail;
  1340. }
  1341. /* AER (Advanced Error Reporting) hooks */
  1342. pci_enable_pcie_error_reporting(pdev);
  1343. pci_set_master(pdev);
  1344. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1345. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1346. ioc->name, pci_name(pdev));
  1347. r = -ENODEV;
  1348. goto out_fail;
  1349. }
  1350. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1351. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1352. if (pio_sz)
  1353. continue;
  1354. pio_chip = (u64)pci_resource_start(pdev, i);
  1355. pio_sz = pci_resource_len(pdev, i);
  1356. } else {
  1357. if (memap_sz)
  1358. continue;
  1359. /* verify memory resource is valid before using */
  1360. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1361. ioc->chip_phys = pci_resource_start(pdev, i);
  1362. chip_phys = (u64)ioc->chip_phys;
  1363. memap_sz = pci_resource_len(pdev, i);
  1364. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1365. if (ioc->chip == NULL) {
  1366. printk(MPT2SAS_ERR_FMT "unable to map "
  1367. "adapter memory!\n", ioc->name);
  1368. r = -EINVAL;
  1369. goto out_fail;
  1370. }
  1371. }
  1372. }
  1373. }
  1374. _base_mask_interrupts(ioc);
  1375. r = _base_enable_msix(ioc);
  1376. if (r)
  1377. goto out_fail;
  1378. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1379. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1380. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1381. "IO-APIC enabled"), reply_q->vector);
  1382. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1383. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1384. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1385. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1386. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1387. pci_save_state(pdev);
  1388. return 0;
  1389. out_fail:
  1390. if (ioc->chip_phys)
  1391. iounmap(ioc->chip);
  1392. ioc->chip_phys = 0;
  1393. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1394. pci_disable_pcie_error_reporting(pdev);
  1395. pci_disable_device(pdev);
  1396. return r;
  1397. }
  1398. /**
  1399. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1400. * @ioc: per adapter object
  1401. * @smid: system request message index(smid zero is invalid)
  1402. *
  1403. * Returns virt pointer to message frame.
  1404. */
  1405. void *
  1406. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1407. {
  1408. return (void *)(ioc->request + (smid * ioc->request_sz));
  1409. }
  1410. /**
  1411. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1412. * @ioc: per adapter object
  1413. * @smid: system request message index
  1414. *
  1415. * Returns virt pointer to sense buffer.
  1416. */
  1417. void *
  1418. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1419. {
  1420. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1421. }
  1422. /**
  1423. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1424. * @ioc: per adapter object
  1425. * @smid: system request message index
  1426. *
  1427. * Returns phys pointer to the low 32bit address of the sense buffer.
  1428. */
  1429. __le32
  1430. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1431. {
  1432. return cpu_to_le32(ioc->sense_dma +
  1433. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1434. }
  1435. /**
  1436. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1437. * @ioc: per adapter object
  1438. * @phys_addr: lower 32 physical addr of the reply
  1439. *
  1440. * Converts 32bit lower physical addr into a virt address.
  1441. */
  1442. void *
  1443. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1444. {
  1445. if (!phys_addr)
  1446. return NULL;
  1447. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1448. }
  1449. /**
  1450. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1451. * @ioc: per adapter object
  1452. * @cb_idx: callback index
  1453. *
  1454. * Returns smid (zero is invalid)
  1455. */
  1456. u16
  1457. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1458. {
  1459. unsigned long flags;
  1460. struct request_tracker *request;
  1461. u16 smid;
  1462. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1463. if (list_empty(&ioc->internal_free_list)) {
  1464. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1465. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1466. ioc->name, __func__);
  1467. return 0;
  1468. }
  1469. request = list_entry(ioc->internal_free_list.next,
  1470. struct request_tracker, tracker_list);
  1471. request->cb_idx = cb_idx;
  1472. smid = request->smid;
  1473. list_del(&request->tracker_list);
  1474. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1475. return smid;
  1476. }
  1477. /**
  1478. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1479. * @ioc: per adapter object
  1480. * @cb_idx: callback index
  1481. * @scmd: pointer to scsi command object
  1482. *
  1483. * Returns smid (zero is invalid)
  1484. */
  1485. u16
  1486. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1487. struct scsi_cmnd *scmd)
  1488. {
  1489. unsigned long flags;
  1490. struct scsiio_tracker *request;
  1491. u16 smid;
  1492. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1493. if (list_empty(&ioc->free_list)) {
  1494. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1495. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1496. ioc->name, __func__);
  1497. return 0;
  1498. }
  1499. request = list_entry(ioc->free_list.next,
  1500. struct scsiio_tracker, tracker_list);
  1501. request->scmd = scmd;
  1502. request->cb_idx = cb_idx;
  1503. smid = request->smid;
  1504. list_del(&request->tracker_list);
  1505. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1506. return smid;
  1507. }
  1508. /**
  1509. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1510. * @ioc: per adapter object
  1511. * @cb_idx: callback index
  1512. *
  1513. * Returns smid (zero is invalid)
  1514. */
  1515. u16
  1516. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1517. {
  1518. unsigned long flags;
  1519. struct request_tracker *request;
  1520. u16 smid;
  1521. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1522. if (list_empty(&ioc->hpr_free_list)) {
  1523. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1524. return 0;
  1525. }
  1526. request = list_entry(ioc->hpr_free_list.next,
  1527. struct request_tracker, tracker_list);
  1528. request->cb_idx = cb_idx;
  1529. smid = request->smid;
  1530. list_del(&request->tracker_list);
  1531. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1532. return smid;
  1533. }
  1534. /**
  1535. * mpt2sas_base_free_smid - put smid back on free_list
  1536. * @ioc: per adapter object
  1537. * @smid: system request message index
  1538. *
  1539. * Return nothing.
  1540. */
  1541. void
  1542. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1543. {
  1544. unsigned long flags;
  1545. int i;
  1546. struct chain_tracker *chain_req, *next;
  1547. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1548. if (smid < ioc->hi_priority_smid) {
  1549. /* scsiio queue */
  1550. i = smid - 1;
  1551. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1552. list_for_each_entry_safe(chain_req, next,
  1553. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1554. list_del_init(&chain_req->tracker_list);
  1555. list_add_tail(&chain_req->tracker_list,
  1556. &ioc->free_chain_list);
  1557. }
  1558. }
  1559. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1560. ioc->scsi_lookup[i].scmd = NULL;
  1561. ioc->scsi_lookup[i].direct_io = 0;
  1562. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1563. &ioc->free_list);
  1564. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1565. /*
  1566. * See _wait_for_commands_to_complete() call with regards
  1567. * to this code.
  1568. */
  1569. if (ioc->shost_recovery && ioc->pending_io_count) {
  1570. if (ioc->pending_io_count == 1)
  1571. wake_up(&ioc->reset_wq);
  1572. ioc->pending_io_count--;
  1573. }
  1574. return;
  1575. } else if (smid < ioc->internal_smid) {
  1576. /* hi-priority */
  1577. i = smid - ioc->hi_priority_smid;
  1578. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1579. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1580. &ioc->hpr_free_list);
  1581. } else if (smid <= ioc->hba_queue_depth) {
  1582. /* internal queue */
  1583. i = smid - ioc->internal_smid;
  1584. ioc->internal_lookup[i].cb_idx = 0xFF;
  1585. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1586. &ioc->internal_free_list);
  1587. }
  1588. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1589. }
  1590. /**
  1591. * _base_writeq - 64 bit write to MMIO
  1592. * @ioc: per adapter object
  1593. * @b: data payload
  1594. * @addr: address in MMIO space
  1595. * @writeq_lock: spin lock
  1596. *
  1597. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1598. * care of 32 bit environment where its not quarenteed to send the entire word
  1599. * in one transfer.
  1600. */
  1601. #ifndef writeq
  1602. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1603. spinlock_t *writeq_lock)
  1604. {
  1605. unsigned long flags;
  1606. __u64 data_out = cpu_to_le64(b);
  1607. spin_lock_irqsave(writeq_lock, flags);
  1608. writel((u32)(data_out), addr);
  1609. writel((u32)(data_out >> 32), (addr + 4));
  1610. spin_unlock_irqrestore(writeq_lock, flags);
  1611. }
  1612. #else
  1613. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1614. spinlock_t *writeq_lock)
  1615. {
  1616. writeq(cpu_to_le64(b), addr);
  1617. }
  1618. #endif
  1619. static inline u8
  1620. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1621. {
  1622. return ioc->cpu_msix_table[raw_smp_processor_id()];
  1623. }
  1624. /**
  1625. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1626. * @ioc: per adapter object
  1627. * @smid: system request message index
  1628. * @handle: device handle
  1629. *
  1630. * Return nothing.
  1631. */
  1632. void
  1633. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1634. {
  1635. Mpi2RequestDescriptorUnion_t descriptor;
  1636. u64 *request = (u64 *)&descriptor;
  1637. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1638. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1639. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1640. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1641. descriptor.SCSIIO.LMID = 0;
  1642. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1643. &ioc->scsi_lookup_lock);
  1644. }
  1645. /**
  1646. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1647. * @ioc: per adapter object
  1648. * @smid: system request message index
  1649. *
  1650. * Return nothing.
  1651. */
  1652. void
  1653. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1654. {
  1655. Mpi2RequestDescriptorUnion_t descriptor;
  1656. u64 *request = (u64 *)&descriptor;
  1657. descriptor.HighPriority.RequestFlags =
  1658. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1659. descriptor.HighPriority.MSIxIndex = 0;
  1660. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1661. descriptor.HighPriority.LMID = 0;
  1662. descriptor.HighPriority.Reserved1 = 0;
  1663. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1664. &ioc->scsi_lookup_lock);
  1665. }
  1666. /**
  1667. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1668. * @ioc: per adapter object
  1669. * @smid: system request message index
  1670. *
  1671. * Return nothing.
  1672. */
  1673. void
  1674. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1675. {
  1676. Mpi2RequestDescriptorUnion_t descriptor;
  1677. u64 *request = (u64 *)&descriptor;
  1678. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1679. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1680. descriptor.Default.SMID = cpu_to_le16(smid);
  1681. descriptor.Default.LMID = 0;
  1682. descriptor.Default.DescriptorTypeDependent = 0;
  1683. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1684. &ioc->scsi_lookup_lock);
  1685. }
  1686. /**
  1687. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1688. * @ioc: per adapter object
  1689. * @smid: system request message index
  1690. * @io_index: value used to track the IO
  1691. *
  1692. * Return nothing.
  1693. */
  1694. void
  1695. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1696. u16 io_index)
  1697. {
  1698. Mpi2RequestDescriptorUnion_t descriptor;
  1699. u64 *request = (u64 *)&descriptor;
  1700. descriptor.SCSITarget.RequestFlags =
  1701. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1702. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1703. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1704. descriptor.SCSITarget.LMID = 0;
  1705. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1706. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1707. &ioc->scsi_lookup_lock);
  1708. }
  1709. /**
  1710. * _base_display_dell_branding - Disply branding string
  1711. * @ioc: per adapter object
  1712. *
  1713. * Return nothing.
  1714. */
  1715. static void
  1716. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1717. {
  1718. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1719. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1720. return;
  1721. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1722. switch (ioc->pdev->subsystem_device) {
  1723. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1724. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1725. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1726. break;
  1727. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1728. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1729. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1730. break;
  1731. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1732. strncpy(dell_branding,
  1733. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1734. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1735. break;
  1736. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1737. strncpy(dell_branding,
  1738. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1739. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1740. break;
  1741. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1742. strncpy(dell_branding,
  1743. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1744. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1745. break;
  1746. case MPT2SAS_DELL_PERC_H200_SSDID:
  1747. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1748. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1749. break;
  1750. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1751. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1752. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1753. break;
  1754. default:
  1755. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1756. break;
  1757. }
  1758. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1759. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1760. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1761. ioc->pdev->subsystem_device);
  1762. }
  1763. /**
  1764. * _base_display_intel_branding - Display branding string
  1765. * @ioc: per adapter object
  1766. *
  1767. * Return nothing.
  1768. */
  1769. static void
  1770. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1771. {
  1772. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1773. return;
  1774. switch (ioc->pdev->device) {
  1775. case MPI2_MFGPAGE_DEVID_SAS2008:
  1776. switch (ioc->pdev->subsystem_device) {
  1777. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1778. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1779. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1780. break;
  1781. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1782. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1783. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1784. break;
  1785. case MPT2SAS_INTEL_SSD910_SSDID:
  1786. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1787. MPT2SAS_INTEL_SSD910_BRANDING);
  1788. break;
  1789. default:
  1790. break;
  1791. }
  1792. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1793. switch (ioc->pdev->subsystem_device) {
  1794. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1795. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1796. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1797. break;
  1798. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1799. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1800. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1801. break;
  1802. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1803. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1804. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1805. break;
  1806. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1807. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1808. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1809. break;
  1810. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1811. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1812. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1813. break;
  1814. case MPT2SAS_INTEL_RMS25LB040_SSDID:
  1815. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1816. MPT2SAS_INTEL_RMS25LB040_BRANDING);
  1817. break;
  1818. case MPT2SAS_INTEL_RMS25LB080_SSDID:
  1819. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1820. MPT2SAS_INTEL_RMS25LB080_BRANDING);
  1821. break;
  1822. default:
  1823. break;
  1824. }
  1825. default:
  1826. break;
  1827. }
  1828. }
  1829. /**
  1830. * _base_display_hp_branding - Display branding string
  1831. * @ioc: per adapter object
  1832. *
  1833. * Return nothing.
  1834. */
  1835. static void
  1836. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1837. {
  1838. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1839. return;
  1840. switch (ioc->pdev->device) {
  1841. case MPI2_MFGPAGE_DEVID_SAS2004:
  1842. switch (ioc->pdev->subsystem_device) {
  1843. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1844. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1845. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1846. break;
  1847. default:
  1848. break;
  1849. }
  1850. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1851. switch (ioc->pdev->subsystem_device) {
  1852. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1853. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1854. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1855. break;
  1856. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1857. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1858. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1859. break;
  1860. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1861. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1862. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1863. break;
  1864. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1865. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1866. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1867. break;
  1868. default:
  1869. break;
  1870. }
  1871. default:
  1872. break;
  1873. }
  1874. }
  1875. /**
  1876. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1877. * @ioc: per adapter object
  1878. *
  1879. * Return nothing.
  1880. */
  1881. static void
  1882. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1883. {
  1884. int i = 0;
  1885. char desc[16];
  1886. u32 iounit_pg1_flags;
  1887. u32 bios_version;
  1888. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1889. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1890. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1891. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1892. ioc->name, desc,
  1893. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1894. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1895. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1896. ioc->facts.FWVersion.Word & 0x000000FF,
  1897. ioc->pdev->revision,
  1898. (bios_version & 0xFF000000) >> 24,
  1899. (bios_version & 0x00FF0000) >> 16,
  1900. (bios_version & 0x0000FF00) >> 8,
  1901. bios_version & 0x000000FF);
  1902. _base_display_dell_branding(ioc);
  1903. _base_display_intel_branding(ioc);
  1904. _base_display_hp_branding(ioc);
  1905. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1906. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1907. printk("Initiator");
  1908. i++;
  1909. }
  1910. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1911. printk("%sTarget", i ? "," : "");
  1912. i++;
  1913. }
  1914. i = 0;
  1915. printk("), ");
  1916. printk("Capabilities=(");
  1917. if (!ioc->hide_ir_msg) {
  1918. if (ioc->facts.IOCCapabilities &
  1919. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1920. printk("Raid");
  1921. i++;
  1922. }
  1923. }
  1924. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1925. printk("%sTLR", i ? "," : "");
  1926. i++;
  1927. }
  1928. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1929. printk("%sMulticast", i ? "," : "");
  1930. i++;
  1931. }
  1932. if (ioc->facts.IOCCapabilities &
  1933. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1934. printk("%sBIDI Target", i ? "," : "");
  1935. i++;
  1936. }
  1937. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1938. printk("%sEEDP", i ? "," : "");
  1939. i++;
  1940. }
  1941. if (ioc->facts.IOCCapabilities &
  1942. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1943. printk("%sSnapshot Buffer", i ? "," : "");
  1944. i++;
  1945. }
  1946. if (ioc->facts.IOCCapabilities &
  1947. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1948. printk("%sDiag Trace Buffer", i ? "," : "");
  1949. i++;
  1950. }
  1951. if (ioc->facts.IOCCapabilities &
  1952. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1953. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1954. i++;
  1955. }
  1956. if (ioc->facts.IOCCapabilities &
  1957. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1958. printk("%sTask Set Full", i ? "," : "");
  1959. i++;
  1960. }
  1961. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1962. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1963. printk("%sNCQ", i ? "," : "");
  1964. i++;
  1965. }
  1966. printk(")\n");
  1967. }
  1968. /**
  1969. * mpt2sas_base_update_missing_delay - change the missing delay timers
  1970. * @ioc: per adapter object
  1971. * @device_missing_delay: amount of time till device is reported missing
  1972. * @io_missing_delay: interval IO is returned when there is a missing device
  1973. *
  1974. * Return nothing.
  1975. *
  1976. * Passed on the command line, this function will modify the device missing
  1977. * delay, as well as the io missing delay. This should be called at driver
  1978. * load time.
  1979. */
  1980. void
  1981. mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1982. u16 device_missing_delay, u8 io_missing_delay)
  1983. {
  1984. u16 dmd, dmd_new, dmd_orignal;
  1985. u8 io_missing_delay_original;
  1986. u16 sz;
  1987. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1988. Mpi2ConfigReply_t mpi_reply;
  1989. u8 num_phys = 0;
  1990. u16 ioc_status;
  1991. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1992. if (!num_phys)
  1993. return;
  1994. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1995. sizeof(Mpi2SasIOUnit1PhyData_t));
  1996. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1997. if (!sas_iounit_pg1) {
  1998. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1999. ioc->name, __FILE__, __LINE__, __func__);
  2000. goto out;
  2001. }
  2002. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  2003. sas_iounit_pg1, sz))) {
  2004. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2005. ioc->name, __FILE__, __LINE__, __func__);
  2006. goto out;
  2007. }
  2008. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  2009. MPI2_IOCSTATUS_MASK;
  2010. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  2011. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2012. ioc->name, __FILE__, __LINE__, __func__);
  2013. goto out;
  2014. }
  2015. /* device missing delay */
  2016. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  2017. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2018. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2019. else
  2020. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2021. dmd_orignal = dmd;
  2022. if (device_missing_delay > 0x7F) {
  2023. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  2024. device_missing_delay;
  2025. dmd = dmd / 16;
  2026. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  2027. } else
  2028. dmd = device_missing_delay;
  2029. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  2030. /* io missing delay */
  2031. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2032. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2033. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2034. sz)) {
  2035. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2036. dmd_new = (dmd &
  2037. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2038. else
  2039. dmd_new =
  2040. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2041. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2042. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2043. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2044. "new(%d)\n", ioc->name, io_missing_delay_original,
  2045. io_missing_delay);
  2046. ioc->device_missing_delay = dmd_new;
  2047. ioc->io_missing_delay = io_missing_delay;
  2048. }
  2049. out:
  2050. kfree(sas_iounit_pg1);
  2051. }
  2052. /**
  2053. * _base_static_config_pages - static start of day config pages
  2054. * @ioc: per adapter object
  2055. *
  2056. * Return nothing.
  2057. */
  2058. static void
  2059. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2060. {
  2061. Mpi2ConfigReply_t mpi_reply;
  2062. u32 iounit_pg1_flags;
  2063. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2064. if (ioc->ir_firmware)
  2065. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2066. &ioc->manu_pg10);
  2067. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2068. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2069. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2070. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2071. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2072. _base_display_ioc_capabilities(ioc);
  2073. /*
  2074. * Enable task_set_full handling in iounit_pg1 when the
  2075. * facts capabilities indicate that its supported.
  2076. */
  2077. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2078. if ((ioc->facts.IOCCapabilities &
  2079. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2080. iounit_pg1_flags &=
  2081. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2082. else
  2083. iounit_pg1_flags |=
  2084. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2085. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2086. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2087. }
  2088. /**
  2089. * _base_release_memory_pools - release memory
  2090. * @ioc: per adapter object
  2091. *
  2092. * Free memory allocated from _base_allocate_memory_pools.
  2093. *
  2094. * Return nothing.
  2095. */
  2096. static void
  2097. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2098. {
  2099. int i;
  2100. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2101. __func__));
  2102. if (ioc->request) {
  2103. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2104. ioc->request, ioc->request_dma);
  2105. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2106. ": free\n", ioc->name, ioc->request));
  2107. ioc->request = NULL;
  2108. }
  2109. if (ioc->sense) {
  2110. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2111. if (ioc->sense_dma_pool)
  2112. pci_pool_destroy(ioc->sense_dma_pool);
  2113. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2114. ": free\n", ioc->name, ioc->sense));
  2115. ioc->sense = NULL;
  2116. }
  2117. if (ioc->reply) {
  2118. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2119. if (ioc->reply_dma_pool)
  2120. pci_pool_destroy(ioc->reply_dma_pool);
  2121. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2122. ": free\n", ioc->name, ioc->reply));
  2123. ioc->reply = NULL;
  2124. }
  2125. if (ioc->reply_free) {
  2126. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2127. ioc->reply_free_dma);
  2128. if (ioc->reply_free_dma_pool)
  2129. pci_pool_destroy(ioc->reply_free_dma_pool);
  2130. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2131. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2132. ioc->reply_free = NULL;
  2133. }
  2134. if (ioc->reply_post_free) {
  2135. pci_pool_free(ioc->reply_post_free_dma_pool,
  2136. ioc->reply_post_free, ioc->reply_post_free_dma);
  2137. if (ioc->reply_post_free_dma_pool)
  2138. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2139. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2140. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2141. ioc->reply_post_free));
  2142. ioc->reply_post_free = NULL;
  2143. }
  2144. if (ioc->config_page) {
  2145. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2146. "config_page(0x%p): free\n", ioc->name,
  2147. ioc->config_page));
  2148. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2149. ioc->config_page, ioc->config_page_dma);
  2150. }
  2151. if (ioc->scsi_lookup) {
  2152. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2153. ioc->scsi_lookup = NULL;
  2154. }
  2155. kfree(ioc->hpr_lookup);
  2156. kfree(ioc->internal_lookup);
  2157. if (ioc->chain_lookup) {
  2158. for (i = 0; i < ioc->chain_depth; i++) {
  2159. if (ioc->chain_lookup[i].chain_buffer)
  2160. pci_pool_free(ioc->chain_dma_pool,
  2161. ioc->chain_lookup[i].chain_buffer,
  2162. ioc->chain_lookup[i].chain_buffer_dma);
  2163. }
  2164. if (ioc->chain_dma_pool)
  2165. pci_pool_destroy(ioc->chain_dma_pool);
  2166. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2167. ioc->chain_lookup = NULL;
  2168. }
  2169. }
  2170. /**
  2171. * _base_allocate_memory_pools - allocate start of day memory pools
  2172. * @ioc: per adapter object
  2173. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2174. *
  2175. * Returns 0 success, anything else error
  2176. */
  2177. static int
  2178. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2179. {
  2180. struct mpt2sas_facts *facts;
  2181. u16 max_sge_elements;
  2182. u16 chains_needed_per_io;
  2183. u32 sz, total_sz, reply_post_free_sz;
  2184. u32 retry_sz;
  2185. u16 max_request_credit;
  2186. int i;
  2187. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2188. __func__));
  2189. retry_sz = 0;
  2190. facts = &ioc->facts;
  2191. /* command line tunables for max sgl entries */
  2192. if (max_sgl_entries != -1) {
  2193. ioc->shost->sg_tablesize = (max_sgl_entries <
  2194. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2195. MPT2SAS_SG_DEPTH;
  2196. } else {
  2197. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2198. }
  2199. /* command line tunables for max controller queue depth */
  2200. if (max_queue_depth != -1 && max_queue_depth != 0) {
  2201. max_request_credit = min_t(u16, max_queue_depth +
  2202. ioc->hi_priority_depth + ioc->internal_depth,
  2203. facts->RequestCredit);
  2204. if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
  2205. max_request_credit = MAX_HBA_QUEUE_DEPTH;
  2206. } else
  2207. max_request_credit = min_t(u16, facts->RequestCredit,
  2208. MAX_HBA_QUEUE_DEPTH);
  2209. ioc->hba_queue_depth = max_request_credit;
  2210. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2211. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2212. /* request frame size */
  2213. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2214. /* reply frame size */
  2215. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2216. retry_allocation:
  2217. total_sz = 0;
  2218. /* calculate number of sg elements left over in the 1st frame */
  2219. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2220. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2221. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2222. /* now do the same for a chain buffer */
  2223. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2224. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2225. ioc->chain_offset_value_for_main_message =
  2226. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2227. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2228. /*
  2229. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2230. */
  2231. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2232. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2233. + 1;
  2234. if (chains_needed_per_io > facts->MaxChainDepth) {
  2235. chains_needed_per_io = facts->MaxChainDepth;
  2236. ioc->shost->sg_tablesize = min_t(u16,
  2237. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2238. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2239. }
  2240. ioc->chains_needed_per_io = chains_needed_per_io;
  2241. /* reply free queue sizing - taking into account for 64 FW events */
  2242. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2243. /* align the reply post queue on the next 16 count boundary */
  2244. if (!ioc->reply_free_queue_depth % 16)
  2245. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
  2246. else
  2247. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
  2248. 32 - (ioc->reply_free_queue_depth % 16);
  2249. if (ioc->reply_post_queue_depth >
  2250. facts->MaxReplyDescriptorPostQueueDepth) {
  2251. ioc->reply_post_queue_depth = min_t(u16,
  2252. (facts->MaxReplyDescriptorPostQueueDepth -
  2253. (facts->MaxReplyDescriptorPostQueueDepth % 16)),
  2254. (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
  2255. ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
  2256. ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
  2257. }
  2258. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2259. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2260. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2261. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2262. ioc->chains_needed_per_io));
  2263. ioc->scsiio_depth = ioc->hba_queue_depth -
  2264. ioc->hi_priority_depth - ioc->internal_depth;
  2265. /* set the scsi host can_queue depth
  2266. * with some internal commands that could be outstanding
  2267. */
  2268. ioc->shost->can_queue = ioc->scsiio_depth;
  2269. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2270. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2271. /* contiguous pool for request and chains, 16 byte align, one extra "
  2272. * "frame for smid=0
  2273. */
  2274. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2275. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2276. /* hi-priority queue */
  2277. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2278. /* internal queue */
  2279. sz += (ioc->internal_depth * ioc->request_sz);
  2280. ioc->request_dma_sz = sz;
  2281. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2282. if (!ioc->request) {
  2283. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2284. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2285. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2286. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2287. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2288. goto out;
  2289. retry_sz += 64;
  2290. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2291. goto retry_allocation;
  2292. }
  2293. if (retry_sz)
  2294. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2295. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2296. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2297. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2298. /* hi-priority queue */
  2299. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2300. ioc->request_sz);
  2301. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2302. ioc->request_sz);
  2303. /* internal queue */
  2304. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2305. ioc->request_sz);
  2306. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2307. ioc->request_sz);
  2308. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2309. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2310. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2311. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2312. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2313. ioc->name, (unsigned long long) ioc->request_dma));
  2314. total_sz += sz;
  2315. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2316. ioc->scsi_lookup_pages = get_order(sz);
  2317. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2318. GFP_KERNEL, ioc->scsi_lookup_pages);
  2319. if (!ioc->scsi_lookup) {
  2320. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2321. "sz(%d)\n", ioc->name, (int)sz);
  2322. goto out;
  2323. }
  2324. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2325. "depth(%d)\n", ioc->name, ioc->request,
  2326. ioc->scsiio_depth));
  2327. ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
  2328. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2329. ioc->chain_pages = get_order(sz);
  2330. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2331. GFP_KERNEL, ioc->chain_pages);
  2332. if (!ioc->chain_lookup) {
  2333. printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
  2334. "sz(%d)\n", ioc->name, (int)sz);
  2335. goto out;
  2336. }
  2337. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2338. ioc->request_sz, 16, 0);
  2339. if (!ioc->chain_dma_pool) {
  2340. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2341. "failed\n", ioc->name);
  2342. goto out;
  2343. }
  2344. for (i = 0; i < ioc->chain_depth; i++) {
  2345. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2346. ioc->chain_dma_pool , GFP_KERNEL,
  2347. &ioc->chain_lookup[i].chain_buffer_dma);
  2348. if (!ioc->chain_lookup[i].chain_buffer) {
  2349. ioc->chain_depth = i;
  2350. goto chain_done;
  2351. }
  2352. total_sz += ioc->request_sz;
  2353. }
  2354. chain_done:
  2355. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2356. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2357. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2358. ioc->request_sz))/1024));
  2359. /* initialize hi-priority queue smid's */
  2360. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2361. sizeof(struct request_tracker), GFP_KERNEL);
  2362. if (!ioc->hpr_lookup) {
  2363. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2364. ioc->name);
  2365. goto out;
  2366. }
  2367. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2368. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2369. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2370. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2371. /* initialize internal queue smid's */
  2372. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2373. sizeof(struct request_tracker), GFP_KERNEL);
  2374. if (!ioc->internal_lookup) {
  2375. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2376. ioc->name);
  2377. goto out;
  2378. }
  2379. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2380. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2381. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2382. ioc->internal_depth, ioc->internal_smid));
  2383. /* sense buffers, 4 byte align */
  2384. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2385. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2386. 0);
  2387. if (!ioc->sense_dma_pool) {
  2388. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2389. ioc->name);
  2390. goto out;
  2391. }
  2392. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2393. &ioc->sense_dma);
  2394. if (!ioc->sense) {
  2395. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2396. ioc->name);
  2397. goto out;
  2398. }
  2399. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2400. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2401. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2402. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2403. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2404. ioc->name, (unsigned long long)ioc->sense_dma));
  2405. total_sz += sz;
  2406. /* reply pool, 4 byte align */
  2407. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2408. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2409. 0);
  2410. if (!ioc->reply_dma_pool) {
  2411. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2412. ioc->name);
  2413. goto out;
  2414. }
  2415. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2416. &ioc->reply_dma);
  2417. if (!ioc->reply) {
  2418. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2419. ioc->name);
  2420. goto out;
  2421. }
  2422. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2423. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2424. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2425. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2426. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2427. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2428. ioc->name, (unsigned long long)ioc->reply_dma));
  2429. total_sz += sz;
  2430. /* reply free queue, 16 byte align */
  2431. sz = ioc->reply_free_queue_depth * 4;
  2432. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2433. ioc->pdev, sz, 16, 0);
  2434. if (!ioc->reply_free_dma_pool) {
  2435. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2436. "failed\n", ioc->name);
  2437. goto out;
  2438. }
  2439. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2440. &ioc->reply_free_dma);
  2441. if (!ioc->reply_free) {
  2442. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2443. "failed\n", ioc->name);
  2444. goto out;
  2445. }
  2446. memset(ioc->reply_free, 0, sz);
  2447. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2448. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2449. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2450. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2451. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2452. total_sz += sz;
  2453. /* reply post queue, 16 byte align */
  2454. reply_post_free_sz = ioc->reply_post_queue_depth *
  2455. sizeof(Mpi2DefaultReplyDescriptor_t);
  2456. if (_base_is_controller_msix_enabled(ioc))
  2457. sz = reply_post_free_sz * ioc->reply_queue_count;
  2458. else
  2459. sz = reply_post_free_sz;
  2460. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2461. ioc->pdev, sz, 16, 0);
  2462. if (!ioc->reply_post_free_dma_pool) {
  2463. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2464. "failed\n", ioc->name);
  2465. goto out;
  2466. }
  2467. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2468. GFP_KERNEL, &ioc->reply_post_free_dma);
  2469. if (!ioc->reply_post_free) {
  2470. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2471. "failed\n", ioc->name);
  2472. goto out;
  2473. }
  2474. memset(ioc->reply_post_free, 0, sz);
  2475. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2476. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2477. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2478. sz/1024));
  2479. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2480. "(0x%llx)\n", ioc->name, (unsigned long long)
  2481. ioc->reply_post_free_dma));
  2482. total_sz += sz;
  2483. ioc->config_page_sz = 512;
  2484. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2485. ioc->config_page_sz, &ioc->config_page_dma);
  2486. if (!ioc->config_page) {
  2487. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2488. "failed\n", ioc->name);
  2489. goto out;
  2490. }
  2491. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2492. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2493. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2494. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2495. total_sz += ioc->config_page_sz;
  2496. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2497. ioc->name, total_sz/1024);
  2498. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2499. "Max Controller Queue Depth(%d)\n",
  2500. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2501. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2502. ioc->name, ioc->shost->sg_tablesize);
  2503. return 0;
  2504. out:
  2505. return -ENOMEM;
  2506. }
  2507. /**
  2508. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2509. * @ioc: Pointer to MPT_ADAPTER structure
  2510. * @cooked: Request raw or cooked IOC state
  2511. *
  2512. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2513. * Doorbell bits in MPI_IOC_STATE_MASK.
  2514. */
  2515. u32
  2516. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2517. {
  2518. u32 s, sc;
  2519. s = readl(&ioc->chip->Doorbell);
  2520. sc = s & MPI2_IOC_STATE_MASK;
  2521. return cooked ? sc : s;
  2522. }
  2523. /**
  2524. * _base_wait_on_iocstate - waiting on a particular ioc state
  2525. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2526. * @timeout: timeout in second
  2527. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2528. *
  2529. * Returns 0 for success, non-zero for failure.
  2530. */
  2531. static int
  2532. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2533. int sleep_flag)
  2534. {
  2535. u32 count, cntdn;
  2536. u32 current_state;
  2537. count = 0;
  2538. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2539. do {
  2540. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2541. if (current_state == ioc_state)
  2542. return 0;
  2543. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2544. break;
  2545. if (sleep_flag == CAN_SLEEP)
  2546. msleep(1);
  2547. else
  2548. udelay(500);
  2549. count++;
  2550. } while (--cntdn);
  2551. return current_state;
  2552. }
  2553. /**
  2554. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2555. * a write to the doorbell)
  2556. * @ioc: per adapter object
  2557. * @timeout: timeout in second
  2558. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2559. *
  2560. * Returns 0 for success, non-zero for failure.
  2561. *
  2562. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2563. */
  2564. static int
  2565. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2566. int sleep_flag)
  2567. {
  2568. u32 cntdn, count;
  2569. u32 int_status;
  2570. count = 0;
  2571. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2572. do {
  2573. int_status = readl(&ioc->chip->HostInterruptStatus);
  2574. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2575. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2576. "successful count(%d), timeout(%d)\n", ioc->name,
  2577. __func__, count, timeout));
  2578. return 0;
  2579. }
  2580. if (sleep_flag == CAN_SLEEP)
  2581. msleep(1);
  2582. else
  2583. udelay(500);
  2584. count++;
  2585. } while (--cntdn);
  2586. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2587. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2588. return -EFAULT;
  2589. }
  2590. /**
  2591. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2592. * @ioc: per adapter object
  2593. * @timeout: timeout in second
  2594. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2595. *
  2596. * Returns 0 for success, non-zero for failure.
  2597. *
  2598. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2599. * doorbell.
  2600. */
  2601. static int
  2602. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2603. int sleep_flag)
  2604. {
  2605. u32 cntdn, count;
  2606. u32 int_status;
  2607. u32 doorbell;
  2608. count = 0;
  2609. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2610. do {
  2611. int_status = readl(&ioc->chip->HostInterruptStatus);
  2612. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2613. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2614. "successful count(%d), timeout(%d)\n", ioc->name,
  2615. __func__, count, timeout));
  2616. return 0;
  2617. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2618. doorbell = readl(&ioc->chip->Doorbell);
  2619. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2620. MPI2_IOC_STATE_FAULT) {
  2621. mpt2sas_base_fault_info(ioc , doorbell);
  2622. return -EFAULT;
  2623. }
  2624. } else if (int_status == 0xFFFFFFFF)
  2625. goto out;
  2626. if (sleep_flag == CAN_SLEEP)
  2627. msleep(1);
  2628. else
  2629. udelay(500);
  2630. count++;
  2631. } while (--cntdn);
  2632. out:
  2633. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2634. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2635. return -EFAULT;
  2636. }
  2637. /**
  2638. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2639. * @ioc: per adapter object
  2640. * @timeout: timeout in second
  2641. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2642. *
  2643. * Returns 0 for success, non-zero for failure.
  2644. *
  2645. */
  2646. static int
  2647. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2648. int sleep_flag)
  2649. {
  2650. u32 cntdn, count;
  2651. u32 doorbell_reg;
  2652. count = 0;
  2653. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2654. do {
  2655. doorbell_reg = readl(&ioc->chip->Doorbell);
  2656. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2657. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2658. "successful count(%d), timeout(%d)\n", ioc->name,
  2659. __func__, count, timeout));
  2660. return 0;
  2661. }
  2662. if (sleep_flag == CAN_SLEEP)
  2663. msleep(1);
  2664. else
  2665. udelay(500);
  2666. count++;
  2667. } while (--cntdn);
  2668. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2669. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2670. return -EFAULT;
  2671. }
  2672. /**
  2673. * _base_send_ioc_reset - send doorbell reset
  2674. * @ioc: per adapter object
  2675. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2676. * @timeout: timeout in second
  2677. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2678. *
  2679. * Returns 0 for success, non-zero for failure.
  2680. */
  2681. static int
  2682. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2683. int sleep_flag)
  2684. {
  2685. u32 ioc_state;
  2686. int r = 0;
  2687. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2688. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2689. ioc->name, __func__);
  2690. return -EFAULT;
  2691. }
  2692. if (!(ioc->facts.IOCCapabilities &
  2693. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2694. return -EFAULT;
  2695. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2696. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2697. &ioc->chip->Doorbell);
  2698. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2699. r = -EFAULT;
  2700. goto out;
  2701. }
  2702. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2703. timeout, sleep_flag);
  2704. if (ioc_state) {
  2705. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2706. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2707. r = -EFAULT;
  2708. goto out;
  2709. }
  2710. out:
  2711. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2712. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2713. return r;
  2714. }
  2715. /**
  2716. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2717. * @ioc: per adapter object
  2718. * @request_bytes: request length
  2719. * @request: pointer having request payload
  2720. * @reply_bytes: reply length
  2721. * @reply: pointer to reply payload
  2722. * @timeout: timeout in second
  2723. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2724. *
  2725. * Returns 0 for success, non-zero for failure.
  2726. */
  2727. static int
  2728. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2729. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2730. {
  2731. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2732. int i;
  2733. u8 failed;
  2734. u16 dummy;
  2735. __le32 *mfp;
  2736. /* make sure doorbell is not in use */
  2737. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2738. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2739. " (line=%d)\n", ioc->name, __LINE__);
  2740. return -EFAULT;
  2741. }
  2742. /* clear pending doorbell interrupts from previous state changes */
  2743. if (readl(&ioc->chip->HostInterruptStatus) &
  2744. MPI2_HIS_IOC2SYS_DB_STATUS)
  2745. writel(0, &ioc->chip->HostInterruptStatus);
  2746. /* send message to ioc */
  2747. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2748. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2749. &ioc->chip->Doorbell);
  2750. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2751. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2752. "int failed (line=%d)\n", ioc->name, __LINE__);
  2753. return -EFAULT;
  2754. }
  2755. writel(0, &ioc->chip->HostInterruptStatus);
  2756. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2757. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2758. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2759. return -EFAULT;
  2760. }
  2761. /* send message 32-bits at a time */
  2762. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2763. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2764. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2765. failed = 1;
  2766. }
  2767. if (failed) {
  2768. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2769. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2770. return -EFAULT;
  2771. }
  2772. /* now wait for the reply */
  2773. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2774. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2775. "int failed (line=%d)\n", ioc->name, __LINE__);
  2776. return -EFAULT;
  2777. }
  2778. /* read the first two 16-bits, it gives the total length of the reply */
  2779. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2780. & MPI2_DOORBELL_DATA_MASK);
  2781. writel(0, &ioc->chip->HostInterruptStatus);
  2782. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2783. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2784. "int failed (line=%d)\n", ioc->name, __LINE__);
  2785. return -EFAULT;
  2786. }
  2787. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2788. & MPI2_DOORBELL_DATA_MASK);
  2789. writel(0, &ioc->chip->HostInterruptStatus);
  2790. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2791. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2792. printk(MPT2SAS_ERR_FMT "doorbell "
  2793. "handshake int failed (line=%d)\n", ioc->name,
  2794. __LINE__);
  2795. return -EFAULT;
  2796. }
  2797. if (i >= reply_bytes/2) /* overflow case */
  2798. dummy = readl(&ioc->chip->Doorbell);
  2799. else
  2800. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2801. & MPI2_DOORBELL_DATA_MASK);
  2802. writel(0, &ioc->chip->HostInterruptStatus);
  2803. }
  2804. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2805. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2806. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2807. " (line=%d)\n", ioc->name, __LINE__));
  2808. }
  2809. writel(0, &ioc->chip->HostInterruptStatus);
  2810. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2811. mfp = (__le32 *)reply;
  2812. printk(KERN_INFO "\toffset:data\n");
  2813. for (i = 0; i < reply_bytes/4; i++)
  2814. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2815. le32_to_cpu(mfp[i]));
  2816. }
  2817. return 0;
  2818. }
  2819. /**
  2820. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2821. * @ioc: per adapter object
  2822. * @mpi_reply: the reply payload from FW
  2823. * @mpi_request: the request payload sent to FW
  2824. *
  2825. * The SAS IO Unit Control Request message allows the host to perform low-level
  2826. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2827. * to obtain the IOC assigned device handles for a device if it has other
  2828. * identifying information about the device, in addition allows the host to
  2829. * remove IOC resources associated with the device.
  2830. *
  2831. * Returns 0 for success, non-zero for failure.
  2832. */
  2833. int
  2834. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2835. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2836. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2837. {
  2838. u16 smid;
  2839. u32 ioc_state;
  2840. unsigned long timeleft;
  2841. u8 issue_reset;
  2842. int rc;
  2843. void *request;
  2844. u16 wait_state_count;
  2845. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2846. __func__));
  2847. mutex_lock(&ioc->base_cmds.mutex);
  2848. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2849. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2850. ioc->name, __func__);
  2851. rc = -EAGAIN;
  2852. goto out;
  2853. }
  2854. wait_state_count = 0;
  2855. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2856. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2857. if (wait_state_count++ == 10) {
  2858. printk(MPT2SAS_ERR_FMT
  2859. "%s: failed due to ioc not operational\n",
  2860. ioc->name, __func__);
  2861. rc = -EFAULT;
  2862. goto out;
  2863. }
  2864. ssleep(1);
  2865. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2866. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2867. "operational state(count=%d)\n", ioc->name,
  2868. __func__, wait_state_count);
  2869. }
  2870. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2871. if (!smid) {
  2872. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2873. ioc->name, __func__);
  2874. rc = -EAGAIN;
  2875. goto out;
  2876. }
  2877. rc = 0;
  2878. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2879. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2880. ioc->base_cmds.smid = smid;
  2881. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2882. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2883. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2884. ioc->ioc_link_reset_in_progress = 1;
  2885. init_completion(&ioc->base_cmds.done);
  2886. mpt2sas_base_put_smid_default(ioc, smid);
  2887. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2888. msecs_to_jiffies(10000));
  2889. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2890. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2891. ioc->ioc_link_reset_in_progress)
  2892. ioc->ioc_link_reset_in_progress = 0;
  2893. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2894. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2895. ioc->name, __func__);
  2896. _debug_dump_mf(mpi_request,
  2897. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2898. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2899. issue_reset = 1;
  2900. goto issue_host_reset;
  2901. }
  2902. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2903. memcpy(mpi_reply, ioc->base_cmds.reply,
  2904. sizeof(Mpi2SasIoUnitControlReply_t));
  2905. else
  2906. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2907. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2908. goto out;
  2909. issue_host_reset:
  2910. if (issue_reset)
  2911. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2912. FORCE_BIG_HAMMER);
  2913. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2914. rc = -EFAULT;
  2915. out:
  2916. mutex_unlock(&ioc->base_cmds.mutex);
  2917. return rc;
  2918. }
  2919. /**
  2920. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2921. * @ioc: per adapter object
  2922. * @mpi_reply: the reply payload from FW
  2923. * @mpi_request: the request payload sent to FW
  2924. *
  2925. * The SCSI Enclosure Processor request message causes the IOC to
  2926. * communicate with SES devices to control LED status signals.
  2927. *
  2928. * Returns 0 for success, non-zero for failure.
  2929. */
  2930. int
  2931. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2932. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2933. {
  2934. u16 smid;
  2935. u32 ioc_state;
  2936. unsigned long timeleft;
  2937. u8 issue_reset;
  2938. int rc;
  2939. void *request;
  2940. u16 wait_state_count;
  2941. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2942. __func__));
  2943. mutex_lock(&ioc->base_cmds.mutex);
  2944. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2945. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2946. ioc->name, __func__);
  2947. rc = -EAGAIN;
  2948. goto out;
  2949. }
  2950. wait_state_count = 0;
  2951. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2952. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2953. if (wait_state_count++ == 10) {
  2954. printk(MPT2SAS_ERR_FMT
  2955. "%s: failed due to ioc not operational\n",
  2956. ioc->name, __func__);
  2957. rc = -EFAULT;
  2958. goto out;
  2959. }
  2960. ssleep(1);
  2961. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2962. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2963. "operational state(count=%d)\n", ioc->name,
  2964. __func__, wait_state_count);
  2965. }
  2966. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2967. if (!smid) {
  2968. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2969. ioc->name, __func__);
  2970. rc = -EAGAIN;
  2971. goto out;
  2972. }
  2973. rc = 0;
  2974. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2975. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2976. ioc->base_cmds.smid = smid;
  2977. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2978. init_completion(&ioc->base_cmds.done);
  2979. mpt2sas_base_put_smid_default(ioc, smid);
  2980. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2981. msecs_to_jiffies(10000));
  2982. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2983. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2984. ioc->name, __func__);
  2985. _debug_dump_mf(mpi_request,
  2986. sizeof(Mpi2SepRequest_t)/4);
  2987. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2988. issue_reset = 1;
  2989. goto issue_host_reset;
  2990. }
  2991. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2992. memcpy(mpi_reply, ioc->base_cmds.reply,
  2993. sizeof(Mpi2SepReply_t));
  2994. else
  2995. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2996. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2997. goto out;
  2998. issue_host_reset:
  2999. if (issue_reset)
  3000. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  3001. FORCE_BIG_HAMMER);
  3002. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3003. rc = -EFAULT;
  3004. out:
  3005. mutex_unlock(&ioc->base_cmds.mutex);
  3006. return rc;
  3007. }
  3008. /**
  3009. * _base_get_port_facts - obtain port facts reply and save in ioc
  3010. * @ioc: per adapter object
  3011. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3012. *
  3013. * Returns 0 for success, non-zero for failure.
  3014. */
  3015. static int
  3016. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  3017. {
  3018. Mpi2PortFactsRequest_t mpi_request;
  3019. Mpi2PortFactsReply_t mpi_reply;
  3020. struct mpt2sas_port_facts *pfacts;
  3021. int mpi_reply_sz, mpi_request_sz, r;
  3022. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3023. __func__));
  3024. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  3025. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  3026. memset(&mpi_request, 0, mpi_request_sz);
  3027. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  3028. mpi_request.PortNumber = port;
  3029. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3030. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3031. if (r != 0) {
  3032. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3033. ioc->name, __func__, r);
  3034. return r;
  3035. }
  3036. pfacts = &ioc->pfacts[port];
  3037. memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
  3038. pfacts->PortNumber = mpi_reply.PortNumber;
  3039. pfacts->VP_ID = mpi_reply.VP_ID;
  3040. pfacts->VF_ID = mpi_reply.VF_ID;
  3041. pfacts->MaxPostedCmdBuffers =
  3042. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3043. return 0;
  3044. }
  3045. /**
  3046. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3047. * @ioc: per adapter object
  3048. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3049. *
  3050. * Returns 0 for success, non-zero for failure.
  3051. */
  3052. static int
  3053. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3054. {
  3055. Mpi2IOCFactsRequest_t mpi_request;
  3056. Mpi2IOCFactsReply_t mpi_reply;
  3057. struct mpt2sas_facts *facts;
  3058. int mpi_reply_sz, mpi_request_sz, r;
  3059. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3060. __func__));
  3061. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3062. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3063. memset(&mpi_request, 0, mpi_request_sz);
  3064. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3065. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3066. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3067. if (r != 0) {
  3068. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3069. ioc->name, __func__, r);
  3070. return r;
  3071. }
  3072. facts = &ioc->facts;
  3073. memset(facts, 0, sizeof(struct mpt2sas_facts));
  3074. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3075. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3076. facts->VP_ID = mpi_reply.VP_ID;
  3077. facts->VF_ID = mpi_reply.VF_ID;
  3078. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3079. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3080. facts->WhoInit = mpi_reply.WhoInit;
  3081. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3082. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3083. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3084. facts->MaxReplyDescriptorPostQueueDepth =
  3085. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3086. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3087. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3088. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3089. ioc->ir_firmware = 1;
  3090. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3091. facts->IOCRequestFrameSize =
  3092. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3093. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3094. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3095. ioc->shost->max_id = -1;
  3096. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3097. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3098. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3099. facts->HighPriorityCredit =
  3100. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3101. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3102. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3103. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3104. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3105. facts->MaxChainDepth));
  3106. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3107. "reply frame size(%d)\n", ioc->name,
  3108. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3109. return 0;
  3110. }
  3111. /**
  3112. * _base_send_ioc_init - send ioc_init to firmware
  3113. * @ioc: per adapter object
  3114. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3115. *
  3116. * Returns 0 for success, non-zero for failure.
  3117. */
  3118. static int
  3119. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3120. {
  3121. Mpi2IOCInitRequest_t mpi_request;
  3122. Mpi2IOCInitReply_t mpi_reply;
  3123. int r;
  3124. struct timeval current_time;
  3125. u16 ioc_status;
  3126. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3127. __func__));
  3128. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3129. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3130. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3131. mpi_request.VF_ID = 0; /* TODO */
  3132. mpi_request.VP_ID = 0;
  3133. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3134. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3135. if (_base_is_controller_msix_enabled(ioc))
  3136. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3137. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3138. mpi_request.ReplyDescriptorPostQueueDepth =
  3139. cpu_to_le16(ioc->reply_post_queue_depth);
  3140. mpi_request.ReplyFreeQueueDepth =
  3141. cpu_to_le16(ioc->reply_free_queue_depth);
  3142. mpi_request.SenseBufferAddressHigh =
  3143. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3144. mpi_request.SystemReplyAddressHigh =
  3145. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3146. mpi_request.SystemRequestFrameBaseAddress =
  3147. cpu_to_le64((u64)ioc->request_dma);
  3148. mpi_request.ReplyFreeQueueAddress =
  3149. cpu_to_le64((u64)ioc->reply_free_dma);
  3150. mpi_request.ReplyDescriptorPostQueueAddress =
  3151. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3152. /* This time stamp specifies number of milliseconds
  3153. * since epoch ~ midnight January 1, 1970.
  3154. */
  3155. do_gettimeofday(&current_time);
  3156. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3157. (current_time.tv_usec / 1000));
  3158. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3159. __le32 *mfp;
  3160. int i;
  3161. mfp = (__le32 *)&mpi_request;
  3162. printk(KERN_INFO "\toffset:data\n");
  3163. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3164. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3165. le32_to_cpu(mfp[i]));
  3166. }
  3167. r = _base_handshake_req_reply_wait(ioc,
  3168. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3169. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3170. sleep_flag);
  3171. if (r != 0) {
  3172. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3173. ioc->name, __func__, r);
  3174. return r;
  3175. }
  3176. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3177. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3178. mpi_reply.IOCLogInfo) {
  3179. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3180. r = -EIO;
  3181. }
  3182. return 0;
  3183. }
  3184. /**
  3185. * mpt2sas_port_enable_done - command completion routine for port enable
  3186. * @ioc: per adapter object
  3187. * @smid: system request message index
  3188. * @msix_index: MSIX table index supplied by the OS
  3189. * @reply: reply message frame(lower 32bit addr)
  3190. *
  3191. * Return 1 meaning mf should be freed from _base_interrupt
  3192. * 0 means the mf is freed from this function.
  3193. */
  3194. u8
  3195. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3196. u32 reply)
  3197. {
  3198. MPI2DefaultReply_t *mpi_reply;
  3199. u16 ioc_status;
  3200. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3201. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3202. return 1;
  3203. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3204. return 1;
  3205. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3206. if (mpi_reply) {
  3207. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3208. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3209. mpi_reply->MsgLength*4);
  3210. }
  3211. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3212. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3213. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3214. ioc->port_enable_failed = 1;
  3215. if (ioc->is_driver_loading) {
  3216. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3217. mpt2sas_port_enable_complete(ioc);
  3218. return 1;
  3219. } else {
  3220. ioc->start_scan_failed = ioc_status;
  3221. ioc->start_scan = 0;
  3222. return 1;
  3223. }
  3224. }
  3225. complete(&ioc->port_enable_cmds.done);
  3226. return 1;
  3227. }
  3228. /**
  3229. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3230. * @ioc: per adapter object
  3231. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3232. *
  3233. * Returns 0 for success, non-zero for failure.
  3234. */
  3235. static int
  3236. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3237. {
  3238. Mpi2PortEnableRequest_t *mpi_request;
  3239. Mpi2PortEnableReply_t *mpi_reply;
  3240. unsigned long timeleft;
  3241. int r = 0;
  3242. u16 smid;
  3243. u16 ioc_status;
  3244. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3245. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3246. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3247. ioc->name, __func__);
  3248. return -EAGAIN;
  3249. }
  3250. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3251. if (!smid) {
  3252. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3253. ioc->name, __func__);
  3254. return -EAGAIN;
  3255. }
  3256. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3257. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3258. ioc->port_enable_cmds.smid = smid;
  3259. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3260. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3261. init_completion(&ioc->port_enable_cmds.done);
  3262. mpt2sas_base_put_smid_default(ioc, smid);
  3263. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3264. 300*HZ);
  3265. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3266. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3267. ioc->name, __func__);
  3268. _debug_dump_mf(mpi_request,
  3269. sizeof(Mpi2PortEnableRequest_t)/4);
  3270. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3271. r = -EFAULT;
  3272. else
  3273. r = -ETIME;
  3274. goto out;
  3275. }
  3276. mpi_reply = ioc->port_enable_cmds.reply;
  3277. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3278. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3279. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3280. ioc->name, __func__, ioc_status);
  3281. r = -EFAULT;
  3282. goto out;
  3283. }
  3284. out:
  3285. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3286. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3287. "SUCCESS" : "FAILED"));
  3288. return r;
  3289. }
  3290. /**
  3291. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3292. * @ioc: per adapter object
  3293. *
  3294. * Returns 0 for success, non-zero for failure.
  3295. */
  3296. int
  3297. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3298. {
  3299. Mpi2PortEnableRequest_t *mpi_request;
  3300. u16 smid;
  3301. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3302. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3303. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3304. ioc->name, __func__);
  3305. return -EAGAIN;
  3306. }
  3307. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3308. if (!smid) {
  3309. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3310. ioc->name, __func__);
  3311. return -EAGAIN;
  3312. }
  3313. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3314. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3315. ioc->port_enable_cmds.smid = smid;
  3316. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3317. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3318. mpt2sas_base_put_smid_default(ioc, smid);
  3319. return 0;
  3320. }
  3321. /**
  3322. * _base_determine_wait_on_discovery - desposition
  3323. * @ioc: per adapter object
  3324. *
  3325. * Decide whether to wait on discovery to complete. Used to either
  3326. * locate boot device, or report volumes ahead of physical devices.
  3327. *
  3328. * Returns 1 for wait, 0 for don't wait
  3329. */
  3330. static int
  3331. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3332. {
  3333. /* We wait for discovery to complete if IR firmware is loaded.
  3334. * The sas topology events arrive before PD events, so we need time to
  3335. * turn on the bit in ioc->pd_handles to indicate PD
  3336. * Also, it maybe required to report Volumes ahead of physical
  3337. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3338. */
  3339. if (ioc->ir_firmware)
  3340. return 1;
  3341. /* if no Bios, then we don't need to wait */
  3342. if (!ioc->bios_pg3.BiosVersion)
  3343. return 0;
  3344. /* Bios is present, then we drop down here.
  3345. *
  3346. * If there any entries in the Bios Page 2, then we wait
  3347. * for discovery to complete.
  3348. */
  3349. /* Current Boot Device */
  3350. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3351. MPI2_BIOSPAGE2_FORM_MASK) ==
  3352. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3353. /* Request Boot Device */
  3354. (ioc->bios_pg2.ReqBootDeviceForm &
  3355. MPI2_BIOSPAGE2_FORM_MASK) ==
  3356. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3357. /* Alternate Request Boot Device */
  3358. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3359. MPI2_BIOSPAGE2_FORM_MASK) ==
  3360. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3361. return 0;
  3362. return 1;
  3363. }
  3364. /**
  3365. * _base_unmask_events - turn on notification for this event
  3366. * @ioc: per adapter object
  3367. * @event: firmware event
  3368. *
  3369. * The mask is stored in ioc->event_masks.
  3370. */
  3371. static void
  3372. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3373. {
  3374. u32 desired_event;
  3375. if (event >= 128)
  3376. return;
  3377. desired_event = (1 << (event % 32));
  3378. if (event < 32)
  3379. ioc->event_masks[0] &= ~desired_event;
  3380. else if (event < 64)
  3381. ioc->event_masks[1] &= ~desired_event;
  3382. else if (event < 96)
  3383. ioc->event_masks[2] &= ~desired_event;
  3384. else if (event < 128)
  3385. ioc->event_masks[3] &= ~desired_event;
  3386. }
  3387. /**
  3388. * _base_event_notification - send event notification
  3389. * @ioc: per adapter object
  3390. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3391. *
  3392. * Returns 0 for success, non-zero for failure.
  3393. */
  3394. static int
  3395. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3396. {
  3397. Mpi2EventNotificationRequest_t *mpi_request;
  3398. unsigned long timeleft;
  3399. u16 smid;
  3400. int r = 0;
  3401. int i;
  3402. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3403. __func__));
  3404. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3405. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3406. ioc->name, __func__);
  3407. return -EAGAIN;
  3408. }
  3409. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3410. if (!smid) {
  3411. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3412. ioc->name, __func__);
  3413. return -EAGAIN;
  3414. }
  3415. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3416. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3417. ioc->base_cmds.smid = smid;
  3418. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3419. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3420. mpi_request->VF_ID = 0; /* TODO */
  3421. mpi_request->VP_ID = 0;
  3422. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3423. mpi_request->EventMasks[i] =
  3424. cpu_to_le32(ioc->event_masks[i]);
  3425. init_completion(&ioc->base_cmds.done);
  3426. mpt2sas_base_put_smid_default(ioc, smid);
  3427. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3428. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3429. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3430. ioc->name, __func__);
  3431. _debug_dump_mf(mpi_request,
  3432. sizeof(Mpi2EventNotificationRequest_t)/4);
  3433. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3434. r = -EFAULT;
  3435. else
  3436. r = -ETIME;
  3437. } else
  3438. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3439. ioc->name, __func__));
  3440. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3441. return r;
  3442. }
  3443. /**
  3444. * mpt2sas_base_validate_event_type - validating event types
  3445. * @ioc: per adapter object
  3446. * @event: firmware event
  3447. *
  3448. * This will turn on firmware event notification when application
  3449. * ask for that event. We don't mask events that are already enabled.
  3450. */
  3451. void
  3452. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3453. {
  3454. int i, j;
  3455. u32 event_mask, desired_event;
  3456. u8 send_update_to_fw;
  3457. for (i = 0, send_update_to_fw = 0; i <
  3458. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3459. event_mask = ~event_type[i];
  3460. desired_event = 1;
  3461. for (j = 0; j < 32; j++) {
  3462. if (!(event_mask & desired_event) &&
  3463. (ioc->event_masks[i] & desired_event)) {
  3464. ioc->event_masks[i] &= ~desired_event;
  3465. send_update_to_fw = 1;
  3466. }
  3467. desired_event = (desired_event << 1);
  3468. }
  3469. }
  3470. if (!send_update_to_fw)
  3471. return;
  3472. mutex_lock(&ioc->base_cmds.mutex);
  3473. _base_event_notification(ioc, CAN_SLEEP);
  3474. mutex_unlock(&ioc->base_cmds.mutex);
  3475. }
  3476. /**
  3477. * _base_diag_reset - the "big hammer" start of day reset
  3478. * @ioc: per adapter object
  3479. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3480. *
  3481. * Returns 0 for success, non-zero for failure.
  3482. */
  3483. static int
  3484. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3485. {
  3486. u32 host_diagnostic;
  3487. u32 ioc_state;
  3488. u32 count;
  3489. u32 hcb_size;
  3490. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3491. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3492. ioc->name));
  3493. count = 0;
  3494. do {
  3495. /* Write magic sequence to WriteSequence register
  3496. * Loop until in diagnostic mode
  3497. */
  3498. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3499. "sequence\n", ioc->name));
  3500. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3501. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3502. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3503. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3504. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3505. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3506. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3507. /* wait 100 msec */
  3508. if (sleep_flag == CAN_SLEEP)
  3509. msleep(100);
  3510. else
  3511. mdelay(100);
  3512. if (count++ > 20)
  3513. goto out;
  3514. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3515. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3516. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3517. ioc->name, count, host_diagnostic));
  3518. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3519. hcb_size = readl(&ioc->chip->HCBSize);
  3520. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3521. ioc->name));
  3522. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3523. &ioc->chip->HostDiagnostic);
  3524. /* don't access any registers for 50 milliseconds */
  3525. msleep(50);
  3526. /* 300 second max wait */
  3527. for (count = 0; count < 3000000 ; count++) {
  3528. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3529. if (host_diagnostic == 0xFFFFFFFF)
  3530. goto out;
  3531. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3532. break;
  3533. /* wait 100 msec */
  3534. if (sleep_flag == CAN_SLEEP)
  3535. msleep(1);
  3536. else
  3537. mdelay(1);
  3538. }
  3539. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3540. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3541. "assuming the HCB Address points to good F/W\n",
  3542. ioc->name));
  3543. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3544. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3545. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3546. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3547. "re-enable the HCDW\n", ioc->name));
  3548. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3549. &ioc->chip->HCBSize);
  3550. }
  3551. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3552. ioc->name));
  3553. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3554. &ioc->chip->HostDiagnostic);
  3555. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3556. "diagnostic register\n", ioc->name));
  3557. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3558. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3559. "READY state\n", ioc->name));
  3560. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3561. sleep_flag);
  3562. if (ioc_state) {
  3563. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3564. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3565. goto out;
  3566. }
  3567. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3568. return 0;
  3569. out:
  3570. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3571. return -EFAULT;
  3572. }
  3573. /**
  3574. * _base_make_ioc_ready - put controller in READY state
  3575. * @ioc: per adapter object
  3576. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3577. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3578. *
  3579. * Returns 0 for success, non-zero for failure.
  3580. */
  3581. static int
  3582. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3583. enum reset_type type)
  3584. {
  3585. u32 ioc_state;
  3586. int rc;
  3587. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3588. __func__));
  3589. if (ioc->pci_error_recovery)
  3590. return 0;
  3591. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3592. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3593. ioc->name, __func__, ioc_state));
  3594. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3595. return 0;
  3596. if (ioc_state & MPI2_DOORBELL_USED) {
  3597. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3598. "active!\n", ioc->name));
  3599. goto issue_diag_reset;
  3600. }
  3601. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3602. mpt2sas_base_fault_info(ioc, ioc_state &
  3603. MPI2_DOORBELL_DATA_MASK);
  3604. goto issue_diag_reset;
  3605. }
  3606. if (type == FORCE_BIG_HAMMER)
  3607. goto issue_diag_reset;
  3608. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3609. if (!(_base_send_ioc_reset(ioc,
  3610. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3611. ioc->ioc_reset_count++;
  3612. return 0;
  3613. }
  3614. issue_diag_reset:
  3615. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3616. ioc->ioc_reset_count++;
  3617. return rc;
  3618. }
  3619. /**
  3620. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3621. * @ioc: per adapter object
  3622. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3623. *
  3624. * Returns 0 for success, non-zero for failure.
  3625. */
  3626. static int
  3627. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3628. {
  3629. int r, i;
  3630. unsigned long flags;
  3631. u32 reply_address;
  3632. u16 smid;
  3633. struct _tr_list *delayed_tr, *delayed_tr_next;
  3634. u8 hide_flag;
  3635. struct adapter_reply_queue *reply_q;
  3636. long reply_post_free;
  3637. u32 reply_post_free_sz;
  3638. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3639. __func__));
  3640. /* clean the delayed target reset list */
  3641. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3642. &ioc->delayed_tr_list, list) {
  3643. list_del(&delayed_tr->list);
  3644. kfree(delayed_tr);
  3645. }
  3646. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3647. &ioc->delayed_tr_volume_list, list) {
  3648. list_del(&delayed_tr->list);
  3649. kfree(delayed_tr);
  3650. }
  3651. /* initialize the scsi lookup free list */
  3652. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3653. INIT_LIST_HEAD(&ioc->free_list);
  3654. smid = 1;
  3655. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3656. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3657. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3658. ioc->scsi_lookup[i].smid = smid;
  3659. ioc->scsi_lookup[i].scmd = NULL;
  3660. ioc->scsi_lookup[i].direct_io = 0;
  3661. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3662. &ioc->free_list);
  3663. }
  3664. /* hi-priority queue */
  3665. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3666. smid = ioc->hi_priority_smid;
  3667. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3668. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3669. ioc->hpr_lookup[i].smid = smid;
  3670. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3671. &ioc->hpr_free_list);
  3672. }
  3673. /* internal queue */
  3674. INIT_LIST_HEAD(&ioc->internal_free_list);
  3675. smid = ioc->internal_smid;
  3676. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3677. ioc->internal_lookup[i].cb_idx = 0xFF;
  3678. ioc->internal_lookup[i].smid = smid;
  3679. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3680. &ioc->internal_free_list);
  3681. }
  3682. /* chain pool */
  3683. INIT_LIST_HEAD(&ioc->free_chain_list);
  3684. for (i = 0; i < ioc->chain_depth; i++)
  3685. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3686. &ioc->free_chain_list);
  3687. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3688. /* initialize Reply Free Queue */
  3689. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3690. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3691. ioc->reply_sz)
  3692. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3693. /* initialize reply queues */
  3694. if (ioc->is_driver_loading)
  3695. _base_assign_reply_queues(ioc);
  3696. /* initialize Reply Post Free Queue */
  3697. reply_post_free = (long)ioc->reply_post_free;
  3698. reply_post_free_sz = ioc->reply_post_queue_depth *
  3699. sizeof(Mpi2DefaultReplyDescriptor_t);
  3700. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3701. reply_q->reply_post_host_index = 0;
  3702. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3703. reply_post_free;
  3704. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3705. reply_q->reply_post_free[i].Words =
  3706. cpu_to_le64(ULLONG_MAX);
  3707. if (!_base_is_controller_msix_enabled(ioc))
  3708. goto skip_init_reply_post_free_queue;
  3709. reply_post_free += reply_post_free_sz;
  3710. }
  3711. skip_init_reply_post_free_queue:
  3712. r = _base_send_ioc_init(ioc, sleep_flag);
  3713. if (r)
  3714. return r;
  3715. /* initialize reply free host index */
  3716. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3717. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3718. /* initialize reply post host index */
  3719. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3720. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3721. &ioc->chip->ReplyPostHostIndex);
  3722. if (!_base_is_controller_msix_enabled(ioc))
  3723. goto skip_init_reply_post_host_index;
  3724. }
  3725. skip_init_reply_post_host_index:
  3726. _base_unmask_interrupts(ioc);
  3727. r = _base_event_notification(ioc, sleep_flag);
  3728. if (r)
  3729. return r;
  3730. if (sleep_flag == CAN_SLEEP)
  3731. _base_static_config_pages(ioc);
  3732. if (ioc->is_driver_loading) {
  3733. if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
  3734. == 0x80) {
  3735. hide_flag = (u8) (
  3736. le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
  3737. MFG_PAGE10_HIDE_SSDS_MASK);
  3738. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3739. ioc->mfg_pg10_hide_flag = hide_flag;
  3740. }
  3741. ioc->wait_for_discovery_to_complete =
  3742. _base_determine_wait_on_discovery(ioc);
  3743. return r; /* scan_start and scan_finished support */
  3744. }
  3745. r = _base_send_port_enable(ioc, sleep_flag);
  3746. if (r)
  3747. return r;
  3748. return r;
  3749. }
  3750. /**
  3751. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3752. * @ioc: per adapter object
  3753. *
  3754. * Return nothing.
  3755. */
  3756. void
  3757. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3758. {
  3759. struct pci_dev *pdev = ioc->pdev;
  3760. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3761. __func__));
  3762. _base_mask_interrupts(ioc);
  3763. ioc->shost_recovery = 1;
  3764. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3765. ioc->shost_recovery = 0;
  3766. _base_free_irq(ioc);
  3767. _base_disable_msix(ioc);
  3768. if (ioc->chip_phys)
  3769. iounmap(ioc->chip);
  3770. ioc->chip_phys = 0;
  3771. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3772. pci_disable_pcie_error_reporting(pdev);
  3773. pci_disable_device(pdev);
  3774. return;
  3775. }
  3776. /**
  3777. * mpt2sas_base_attach - attach controller instance
  3778. * @ioc: per adapter object
  3779. *
  3780. * Returns 0 for success, non-zero for failure.
  3781. */
  3782. int
  3783. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3784. {
  3785. int r, i;
  3786. int cpu_id, last_cpu_id = 0;
  3787. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3788. __func__));
  3789. /* setup cpu_msix_table */
  3790. ioc->cpu_count = num_online_cpus();
  3791. for_each_online_cpu(cpu_id)
  3792. last_cpu_id = cpu_id;
  3793. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3794. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3795. ioc->reply_queue_count = 1;
  3796. if (!ioc->cpu_msix_table) {
  3797. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3798. "cpu_msix_table failed!!!\n", ioc->name));
  3799. r = -ENOMEM;
  3800. goto out_free_resources;
  3801. }
  3802. if (ioc->is_warpdrive) {
  3803. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3804. sizeof(resource_size_t *), GFP_KERNEL);
  3805. if (!ioc->reply_post_host_index) {
  3806. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3807. "for cpu_msix_table failed!!!\n", ioc->name));
  3808. r = -ENOMEM;
  3809. goto out_free_resources;
  3810. }
  3811. }
  3812. r = mpt2sas_base_map_resources(ioc);
  3813. if (r)
  3814. goto out_free_resources;
  3815. if (ioc->is_warpdrive) {
  3816. ioc->reply_post_host_index[0] =
  3817. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3818. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3819. ioc->reply_post_host_index[i] = (resource_size_t *)
  3820. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3821. * 4)));
  3822. }
  3823. pci_set_drvdata(ioc->pdev, ioc->shost);
  3824. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3825. if (r)
  3826. goto out_free_resources;
  3827. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3828. if (r)
  3829. goto out_free_resources;
  3830. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3831. sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
  3832. if (!ioc->pfacts) {
  3833. r = -ENOMEM;
  3834. goto out_free_resources;
  3835. }
  3836. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3837. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3838. if (r)
  3839. goto out_free_resources;
  3840. }
  3841. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3842. if (r)
  3843. goto out_free_resources;
  3844. init_waitqueue_head(&ioc->reset_wq);
  3845. /* allocate memory pd handle bitmask list */
  3846. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3847. if (ioc->facts.MaxDevHandle % 8)
  3848. ioc->pd_handles_sz++;
  3849. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3850. GFP_KERNEL);
  3851. if (!ioc->pd_handles) {
  3852. r = -ENOMEM;
  3853. goto out_free_resources;
  3854. }
  3855. ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
  3856. GFP_KERNEL);
  3857. if (!ioc->blocking_handles) {
  3858. r = -ENOMEM;
  3859. goto out_free_resources;
  3860. }
  3861. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3862. /* base internal command bits */
  3863. mutex_init(&ioc->base_cmds.mutex);
  3864. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3865. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3866. /* port_enable command bits */
  3867. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3868. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3869. /* transport internal command bits */
  3870. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3871. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3872. mutex_init(&ioc->transport_cmds.mutex);
  3873. /* scsih internal command bits */
  3874. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3875. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3876. mutex_init(&ioc->scsih_cmds.mutex);
  3877. /* task management internal command bits */
  3878. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3879. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3880. mutex_init(&ioc->tm_cmds.mutex);
  3881. /* config page internal command bits */
  3882. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3883. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3884. mutex_init(&ioc->config_cmds.mutex);
  3885. /* ctl module internal command bits */
  3886. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3887. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3888. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3889. mutex_init(&ioc->ctl_cmds.mutex);
  3890. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3891. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3892. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3893. !ioc->ctl_cmds.sense) {
  3894. r = -ENOMEM;
  3895. goto out_free_resources;
  3896. }
  3897. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3898. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3899. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3900. r = -ENOMEM;
  3901. goto out_free_resources;
  3902. }
  3903. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3904. ioc->event_masks[i] = -1;
  3905. /* here we enable the events we care about */
  3906. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3907. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3908. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3909. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3910. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3911. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3912. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3913. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3914. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3915. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3916. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3917. if (r)
  3918. goto out_free_resources;
  3919. ioc->non_operational_loop = 0;
  3920. return 0;
  3921. out_free_resources:
  3922. ioc->remove_host = 1;
  3923. mpt2sas_base_free_resources(ioc);
  3924. _base_release_memory_pools(ioc);
  3925. pci_set_drvdata(ioc->pdev, NULL);
  3926. kfree(ioc->cpu_msix_table);
  3927. if (ioc->is_warpdrive)
  3928. kfree(ioc->reply_post_host_index);
  3929. kfree(ioc->pd_handles);
  3930. kfree(ioc->blocking_handles);
  3931. kfree(ioc->tm_cmds.reply);
  3932. kfree(ioc->transport_cmds.reply);
  3933. kfree(ioc->scsih_cmds.reply);
  3934. kfree(ioc->config_cmds.reply);
  3935. kfree(ioc->base_cmds.reply);
  3936. kfree(ioc->port_enable_cmds.reply);
  3937. kfree(ioc->ctl_cmds.reply);
  3938. kfree(ioc->ctl_cmds.sense);
  3939. kfree(ioc->pfacts);
  3940. ioc->ctl_cmds.reply = NULL;
  3941. ioc->base_cmds.reply = NULL;
  3942. ioc->tm_cmds.reply = NULL;
  3943. ioc->scsih_cmds.reply = NULL;
  3944. ioc->transport_cmds.reply = NULL;
  3945. ioc->config_cmds.reply = NULL;
  3946. ioc->pfacts = NULL;
  3947. return r;
  3948. }
  3949. /**
  3950. * mpt2sas_base_detach - remove controller instance
  3951. * @ioc: per adapter object
  3952. *
  3953. * Return nothing.
  3954. */
  3955. void
  3956. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3957. {
  3958. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3959. __func__));
  3960. mpt2sas_base_stop_watchdog(ioc);
  3961. mpt2sas_base_free_resources(ioc);
  3962. _base_release_memory_pools(ioc);
  3963. pci_set_drvdata(ioc->pdev, NULL);
  3964. kfree(ioc->cpu_msix_table);
  3965. if (ioc->is_warpdrive)
  3966. kfree(ioc->reply_post_host_index);
  3967. kfree(ioc->pd_handles);
  3968. kfree(ioc->blocking_handles);
  3969. kfree(ioc->pfacts);
  3970. kfree(ioc->ctl_cmds.reply);
  3971. kfree(ioc->ctl_cmds.sense);
  3972. kfree(ioc->base_cmds.reply);
  3973. kfree(ioc->port_enable_cmds.reply);
  3974. kfree(ioc->tm_cmds.reply);
  3975. kfree(ioc->transport_cmds.reply);
  3976. kfree(ioc->scsih_cmds.reply);
  3977. kfree(ioc->config_cmds.reply);
  3978. }
  3979. /**
  3980. * _base_reset_handler - reset callback handler (for base)
  3981. * @ioc: per adapter object
  3982. * @reset_phase: phase
  3983. *
  3984. * The handler for doing any required cleanup or initialization.
  3985. *
  3986. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3987. * MPT2_IOC_DONE_RESET
  3988. *
  3989. * Return nothing.
  3990. */
  3991. static void
  3992. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3993. {
  3994. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3995. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3996. switch (reset_phase) {
  3997. case MPT2_IOC_PRE_RESET:
  3998. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3999. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  4000. break;
  4001. case MPT2_IOC_AFTER_RESET:
  4002. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4003. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  4004. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  4005. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  4006. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  4007. complete(&ioc->transport_cmds.done);
  4008. }
  4009. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  4010. ioc->base_cmds.status |= MPT2_CMD_RESET;
  4011. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  4012. complete(&ioc->base_cmds.done);
  4013. }
  4014. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  4015. ioc->port_enable_failed = 1;
  4016. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  4017. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  4018. if (ioc->is_driver_loading) {
  4019. ioc->start_scan_failed =
  4020. MPI2_IOCSTATUS_INTERNAL_ERROR;
  4021. ioc->start_scan = 0;
  4022. ioc->port_enable_cmds.status =
  4023. MPT2_CMD_NOT_USED;
  4024. } else
  4025. complete(&ioc->port_enable_cmds.done);
  4026. }
  4027. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  4028. ioc->config_cmds.status |= MPT2_CMD_RESET;
  4029. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  4030. ioc->config_cmds.smid = USHRT_MAX;
  4031. complete(&ioc->config_cmds.done);
  4032. }
  4033. break;
  4034. case MPT2_IOC_DONE_RESET:
  4035. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4036. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  4037. break;
  4038. }
  4039. }
  4040. /**
  4041. * _wait_for_commands_to_complete - reset controller
  4042. * @ioc: Pointer to MPT_ADAPTER structure
  4043. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4044. *
  4045. * This function waiting(3s) for all pending commands to complete
  4046. * prior to putting controller in reset.
  4047. */
  4048. static void
  4049. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4050. {
  4051. u32 ioc_state;
  4052. unsigned long flags;
  4053. u16 i;
  4054. ioc->pending_io_count = 0;
  4055. if (sleep_flag != CAN_SLEEP)
  4056. return;
  4057. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4058. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4059. return;
  4060. /* pending command count */
  4061. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4062. for (i = 0; i < ioc->scsiio_depth; i++)
  4063. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4064. ioc->pending_io_count++;
  4065. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4066. if (!ioc->pending_io_count)
  4067. return;
  4068. /* wait for pending commands to complete */
  4069. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4070. }
  4071. /**
  4072. * mpt2sas_base_hard_reset_handler - reset controller
  4073. * @ioc: Pointer to MPT_ADAPTER structure
  4074. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4075. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4076. *
  4077. * Returns 0 for success, non-zero for failure.
  4078. */
  4079. int
  4080. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4081. enum reset_type type)
  4082. {
  4083. int r;
  4084. unsigned long flags;
  4085. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4086. __func__));
  4087. if (ioc->pci_error_recovery) {
  4088. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4089. ioc->name, __func__);
  4090. r = 0;
  4091. goto out_unlocked;
  4092. }
  4093. if (mpt2sas_fwfault_debug)
  4094. mpt2sas_halt_firmware(ioc);
  4095. /* TODO - What we really should be doing is pulling
  4096. * out all the code associated with NO_SLEEP; its never used.
  4097. * That is legacy code from mpt fusion driver, ported over.
  4098. * I will leave this BUG_ON here for now till its been resolved.
  4099. */
  4100. BUG_ON(sleep_flag == NO_SLEEP);
  4101. /* wait for an active reset in progress to complete */
  4102. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4103. do {
  4104. ssleep(1);
  4105. } while (ioc->shost_recovery == 1);
  4106. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4107. __func__));
  4108. return ioc->ioc_reset_in_progress_status;
  4109. }
  4110. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4111. ioc->shost_recovery = 1;
  4112. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4113. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4114. _wait_for_commands_to_complete(ioc, sleep_flag);
  4115. _base_mask_interrupts(ioc);
  4116. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4117. if (r)
  4118. goto out;
  4119. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4120. /* If this hard reset is called while port enable is active, then
  4121. * there is no reason to call make_ioc_operational
  4122. */
  4123. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4124. ioc->remove_host = 1;
  4125. r = -EFAULT;
  4126. goto out;
  4127. }
  4128. r = _base_make_ioc_operational(ioc, sleep_flag);
  4129. if (!r)
  4130. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4131. out:
  4132. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4133. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4134. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4135. ioc->ioc_reset_in_progress_status = r;
  4136. ioc->shost_recovery = 0;
  4137. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4138. mutex_unlock(&ioc->reset_in_progress_mutex);
  4139. out_unlocked:
  4140. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4141. __func__));
  4142. return r;
  4143. }