sh_mobile_lcdcfb.c 34 KB

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  1. /*
  2. * SuperH Mobile LCDC Framebuffer
  3. *
  4. * Copyright (c) 2008 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/mm.h>
  14. #include <linux/clk.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/vmalloc.h>
  20. #include <linux/ioctl.h>
  21. #include <linux/slab.h>
  22. #include <linux/console.h>
  23. #include <video/sh_mobile_lcdc.h>
  24. #include <asm/atomic.h>
  25. #include "sh_mobile_lcdcfb.h"
  26. #define SIDE_B_OFFSET 0x1000
  27. #define MIRROR_OFFSET 0x2000
  28. /* shared registers */
  29. #define _LDDCKR 0x410
  30. #define _LDDCKSTPR 0x414
  31. #define _LDINTR 0x468
  32. #define _LDSR 0x46c
  33. #define _LDCNT1R 0x470
  34. #define _LDCNT2R 0x474
  35. #define _LDRCNTR 0x478
  36. #define _LDDDSR 0x47c
  37. #define _LDDWD0R 0x800
  38. #define _LDDRDR 0x840
  39. #define _LDDWAR 0x900
  40. #define _LDDRAR 0x904
  41. /* shared registers and their order for context save/restore */
  42. static int lcdc_shared_regs[] = {
  43. _LDDCKR,
  44. _LDDCKSTPR,
  45. _LDINTR,
  46. _LDDDSR,
  47. _LDCNT1R,
  48. _LDCNT2R,
  49. };
  50. #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
  51. #define MAX_XRES 1920
  52. #define MAX_YRES 1080
  53. static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
  54. [LDDCKPAT1R] = 0x400,
  55. [LDDCKPAT2R] = 0x404,
  56. [LDMT1R] = 0x418,
  57. [LDMT2R] = 0x41c,
  58. [LDMT3R] = 0x420,
  59. [LDDFR] = 0x424,
  60. [LDSM1R] = 0x428,
  61. [LDSM2R] = 0x42c,
  62. [LDSA1R] = 0x430,
  63. [LDMLSR] = 0x438,
  64. [LDHCNR] = 0x448,
  65. [LDHSYNR] = 0x44c,
  66. [LDVLNR] = 0x450,
  67. [LDVSYNR] = 0x454,
  68. [LDPMR] = 0x460,
  69. [LDHAJR] = 0x4a0,
  70. };
  71. static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
  72. [LDDCKPAT1R] = 0x408,
  73. [LDDCKPAT2R] = 0x40c,
  74. [LDMT1R] = 0x600,
  75. [LDMT2R] = 0x604,
  76. [LDMT3R] = 0x608,
  77. [LDDFR] = 0x60c,
  78. [LDSM1R] = 0x610,
  79. [LDSM2R] = 0x614,
  80. [LDSA1R] = 0x618,
  81. [LDMLSR] = 0x620,
  82. [LDHCNR] = 0x624,
  83. [LDHSYNR] = 0x628,
  84. [LDVLNR] = 0x62c,
  85. [LDVSYNR] = 0x630,
  86. [LDPMR] = 0x63c,
  87. };
  88. #define START_LCDC 0x00000001
  89. #define LCDC_RESET 0x00000100
  90. #define DISPLAY_BEU 0x00000008
  91. #define LCDC_ENABLE 0x00000001
  92. #define LDINTR_FE 0x00000400
  93. #define LDINTR_VSE 0x00000200
  94. #define LDINTR_VEE 0x00000100
  95. #define LDINTR_FS 0x00000004
  96. #define LDINTR_VSS 0x00000002
  97. #define LDINTR_VES 0x00000001
  98. #define LDRCNTR_SRS 0x00020000
  99. #define LDRCNTR_SRC 0x00010000
  100. #define LDRCNTR_MRS 0x00000002
  101. #define LDRCNTR_MRC 0x00000001
  102. #define LDSR_MRS 0x00000100
  103. static const struct fb_videomode default_720p = {
  104. .name = "HDMI 720p",
  105. .xres = 1280,
  106. .yres = 720,
  107. .left_margin = 220,
  108. .right_margin = 110,
  109. .hsync_len = 40,
  110. .upper_margin = 20,
  111. .lower_margin = 5,
  112. .vsync_len = 5,
  113. .pixclock = 13468,
  114. .refresh = 60,
  115. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  116. };
  117. struct sh_mobile_lcdc_priv {
  118. void __iomem *base;
  119. int irq;
  120. atomic_t hw_usecnt;
  121. struct device *dev;
  122. struct clk *dot_clk;
  123. unsigned long lddckr;
  124. struct sh_mobile_lcdc_chan ch[2];
  125. struct notifier_block notifier;
  126. unsigned long saved_shared_regs[NR_SHARED_REGS];
  127. int started;
  128. };
  129. static bool banked(int reg_nr)
  130. {
  131. switch (reg_nr) {
  132. case LDMT1R:
  133. case LDMT2R:
  134. case LDMT3R:
  135. case LDDFR:
  136. case LDSM1R:
  137. case LDSA1R:
  138. case LDMLSR:
  139. case LDHCNR:
  140. case LDHSYNR:
  141. case LDVLNR:
  142. case LDVSYNR:
  143. return true;
  144. }
  145. return false;
  146. }
  147. static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
  148. int reg_nr, unsigned long data)
  149. {
  150. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
  151. if (banked(reg_nr))
  152. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  153. SIDE_B_OFFSET);
  154. }
  155. static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
  156. int reg_nr, unsigned long data)
  157. {
  158. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  159. MIRROR_OFFSET);
  160. }
  161. static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
  162. int reg_nr)
  163. {
  164. return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
  165. }
  166. static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
  167. unsigned long reg_offs, unsigned long data)
  168. {
  169. iowrite32(data, priv->base + reg_offs);
  170. }
  171. static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
  172. unsigned long reg_offs)
  173. {
  174. return ioread32(priv->base + reg_offs);
  175. }
  176. static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
  177. unsigned long reg_offs,
  178. unsigned long mask, unsigned long until)
  179. {
  180. while ((lcdc_read(priv, reg_offs) & mask) != until)
  181. cpu_relax();
  182. }
  183. static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
  184. {
  185. return chan->cfg.chan == LCDC_CHAN_SUBLCD;
  186. }
  187. static void lcdc_sys_write_index(void *handle, unsigned long data)
  188. {
  189. struct sh_mobile_lcdc_chan *ch = handle;
  190. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
  191. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  192. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  193. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  194. }
  195. static void lcdc_sys_write_data(void *handle, unsigned long data)
  196. {
  197. struct sh_mobile_lcdc_chan *ch = handle;
  198. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
  199. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  200. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  201. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  202. }
  203. static unsigned long lcdc_sys_read_data(void *handle)
  204. {
  205. struct sh_mobile_lcdc_chan *ch = handle;
  206. lcdc_write(ch->lcdc, _LDDRDR, 0x01000000);
  207. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  208. lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  209. udelay(1);
  210. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  211. return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
  212. }
  213. struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
  214. lcdc_sys_write_index,
  215. lcdc_sys_write_data,
  216. lcdc_sys_read_data,
  217. };
  218. static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
  219. {
  220. if (atomic_inc_and_test(&priv->hw_usecnt)) {
  221. pm_runtime_get_sync(priv->dev);
  222. if (priv->dot_clk)
  223. clk_enable(priv->dot_clk);
  224. }
  225. }
  226. static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
  227. {
  228. if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
  229. if (priv->dot_clk)
  230. clk_disable(priv->dot_clk);
  231. pm_runtime_put(priv->dev);
  232. }
  233. }
  234. static int sh_mobile_lcdc_sginit(struct fb_info *info,
  235. struct list_head *pagelist)
  236. {
  237. struct sh_mobile_lcdc_chan *ch = info->par;
  238. unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
  239. struct page *page;
  240. int nr_pages = 0;
  241. sg_init_table(ch->sglist, nr_pages_max);
  242. list_for_each_entry(page, pagelist, lru)
  243. sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
  244. return nr_pages;
  245. }
  246. static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
  247. struct list_head *pagelist)
  248. {
  249. struct sh_mobile_lcdc_chan *ch = info->par;
  250. struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
  251. /* enable clocks before accessing hardware */
  252. sh_mobile_lcdc_clk_on(ch->lcdc);
  253. /*
  254. * It's possible to get here without anything on the pagelist via
  255. * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
  256. * invocation. In the former case, the acceleration routines are
  257. * stepped in to when using the framebuffer console causing the
  258. * workqueue to be scheduled without any dirty pages on the list.
  259. *
  260. * Despite this, a panel update is still needed given that the
  261. * acceleration routines have their own methods for writing in
  262. * that still need to be updated.
  263. *
  264. * The fsync() and empty pagelist case could be optimized for,
  265. * but we don't bother, as any application exhibiting such
  266. * behaviour is fundamentally broken anyways.
  267. */
  268. if (!list_empty(pagelist)) {
  269. unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
  270. /* trigger panel update */
  271. dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  272. if (bcfg->start_transfer)
  273. bcfg->start_transfer(bcfg->board_data, ch,
  274. &sh_mobile_lcdc_sys_bus_ops);
  275. lcdc_write_chan(ch, LDSM2R, 1);
  276. dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  277. } else {
  278. if (bcfg->start_transfer)
  279. bcfg->start_transfer(bcfg->board_data, ch,
  280. &sh_mobile_lcdc_sys_bus_ops);
  281. lcdc_write_chan(ch, LDSM2R, 1);
  282. }
  283. }
  284. static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
  285. {
  286. struct fb_deferred_io *fbdefio = info->fbdefio;
  287. if (fbdefio)
  288. schedule_delayed_work(&info->deferred_work, fbdefio->delay);
  289. }
  290. static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
  291. {
  292. struct sh_mobile_lcdc_priv *priv = data;
  293. struct sh_mobile_lcdc_chan *ch;
  294. unsigned long tmp;
  295. unsigned long ldintr;
  296. int is_sub;
  297. int k;
  298. /* acknowledge interrupt */
  299. ldintr = tmp = lcdc_read(priv, _LDINTR);
  300. /*
  301. * disable further VSYNC End IRQs, preserve all other enabled IRQs,
  302. * write 0 to bits 0-6 to ack all triggered IRQs.
  303. */
  304. tmp &= 0xffffff00 & ~LDINTR_VEE;
  305. lcdc_write(priv, _LDINTR, tmp);
  306. /* figure out if this interrupt is for main or sub lcd */
  307. is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
  308. /* wake up channel and disable clocks */
  309. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  310. ch = &priv->ch[k];
  311. if (!ch->enabled)
  312. continue;
  313. /* Frame Start */
  314. if (ldintr & LDINTR_FS) {
  315. if (is_sub == lcdc_chan_is_sublcd(ch)) {
  316. ch->frame_end = 1;
  317. wake_up(&ch->frame_end_wait);
  318. sh_mobile_lcdc_clk_off(priv);
  319. }
  320. }
  321. /* VSYNC End */
  322. if (ldintr & LDINTR_VES)
  323. complete(&ch->vsync_completion);
  324. }
  325. return IRQ_HANDLED;
  326. }
  327. static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
  328. int start)
  329. {
  330. unsigned long tmp = lcdc_read(priv, _LDCNT2R);
  331. int k;
  332. /* start or stop the lcdc */
  333. if (start)
  334. lcdc_write(priv, _LDCNT2R, tmp | START_LCDC);
  335. else
  336. lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC);
  337. /* wait until power is applied/stopped on all channels */
  338. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  339. if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
  340. while (1) {
  341. tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3;
  342. if (start && tmp == 3)
  343. break;
  344. if (!start && tmp == 0)
  345. break;
  346. cpu_relax();
  347. }
  348. if (!start)
  349. lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
  350. }
  351. static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
  352. {
  353. struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var;
  354. unsigned long h_total, hsync_pos, display_h_total;
  355. u32 tmp;
  356. tmp = ch->ldmt1r_value;
  357. tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
  358. tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
  359. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
  360. tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
  361. tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
  362. tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
  363. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
  364. lcdc_write_chan(ch, LDMT1R, tmp);
  365. /* setup SYS bus */
  366. lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
  367. lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
  368. /* horizontal configuration */
  369. h_total = display_var->xres + display_var->hsync_len +
  370. display_var->left_margin + display_var->right_margin;
  371. tmp = h_total / 8; /* HTCN */
  372. tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */
  373. lcdc_write_chan(ch, LDHCNR, tmp);
  374. hsync_pos = display_var->xres + display_var->right_margin;
  375. tmp = hsync_pos / 8; /* HSYNP */
  376. tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */
  377. lcdc_write_chan(ch, LDHSYNR, tmp);
  378. /* vertical configuration */
  379. tmp = display_var->yres + display_var->vsync_len +
  380. display_var->upper_margin + display_var->lower_margin; /* VTLN */
  381. tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */
  382. lcdc_write_chan(ch, LDVLNR, tmp);
  383. tmp = display_var->yres + display_var->lower_margin; /* VSYNP */
  384. tmp |= display_var->vsync_len << 16; /* VSYNW */
  385. lcdc_write_chan(ch, LDVSYNR, tmp);
  386. /* Adjust horizontal synchronisation for HDMI */
  387. display_h_total = display_var->xres + display_var->hsync_len +
  388. display_var->left_margin + display_var->right_margin;
  389. tmp = ((display_var->xres & 7) << 24) |
  390. ((display_h_total & 7) << 16) |
  391. ((display_var->hsync_len & 7) << 8) |
  392. hsync_pos;
  393. lcdc_write_chan(ch, LDHAJR, tmp);
  394. }
  395. static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
  396. {
  397. struct sh_mobile_lcdc_chan *ch;
  398. struct sh_mobile_lcdc_board_cfg *board_cfg;
  399. unsigned long tmp;
  400. int k, m;
  401. int ret = 0;
  402. /* enable clocks before accessing the hardware */
  403. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  404. if (priv->ch[k].enabled)
  405. sh_mobile_lcdc_clk_on(priv);
  406. /* reset */
  407. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
  408. lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);
  409. /* enable LCDC channels */
  410. tmp = lcdc_read(priv, _LDCNT2R);
  411. tmp |= priv->ch[0].enabled;
  412. tmp |= priv->ch[1].enabled;
  413. lcdc_write(priv, _LDCNT2R, tmp);
  414. /* read data from external memory, avoid using the BEU for now */
  415. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU);
  416. /* stop the lcdc first */
  417. sh_mobile_lcdc_start_stop(priv, 0);
  418. /* configure clocks */
  419. tmp = priv->lddckr;
  420. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  421. ch = &priv->ch[k];
  422. if (!priv->ch[k].enabled)
  423. continue;
  424. m = ch->cfg.clock_divider;
  425. if (!m)
  426. continue;
  427. if (m == 1)
  428. m = 1 << 6;
  429. tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
  430. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider denominator */
  431. lcdc_write_chan(ch, LDDCKPAT1R, 0);
  432. lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
  433. }
  434. lcdc_write(priv, _LDDCKR, tmp);
  435. /* start dotclock again */
  436. lcdc_write(priv, _LDDCKSTPR, 0);
  437. lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
  438. /* interrupts are disabled to begin with */
  439. lcdc_write(priv, _LDINTR, 0);
  440. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  441. ch = &priv->ch[k];
  442. if (!ch->enabled)
  443. continue;
  444. sh_mobile_lcdc_geometry(ch);
  445. /* power supply */
  446. lcdc_write_chan(ch, LDPMR, 0);
  447. board_cfg = &ch->cfg.board_cfg;
  448. if (board_cfg->setup_sys)
  449. ret = board_cfg->setup_sys(board_cfg->board_data, ch,
  450. &sh_mobile_lcdc_sys_bus_ops);
  451. if (ret)
  452. return ret;
  453. }
  454. /* word and long word swap */
  455. lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
  456. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  457. ch = &priv->ch[k];
  458. if (!priv->ch[k].enabled)
  459. continue;
  460. /* set bpp format in PKF[4:0] */
  461. tmp = lcdc_read_chan(ch, LDDFR);
  462. tmp &= ~0x0001001f;
  463. tmp |= (ch->info->var.bits_per_pixel == 16) ? 3 : 0;
  464. lcdc_write_chan(ch, LDDFR, tmp);
  465. /* point out our frame buffer */
  466. lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start);
  467. /* set line size */
  468. lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length);
  469. /* setup deferred io if SYS bus */
  470. tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
  471. if (ch->ldmt1r_value & (1 << 12) && tmp) {
  472. ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
  473. ch->defio.delay = msecs_to_jiffies(tmp);
  474. ch->info->fbdefio = &ch->defio;
  475. fb_deferred_io_init(ch->info);
  476. /* one-shot mode */
  477. lcdc_write_chan(ch, LDSM1R, 1);
  478. /* enable "Frame End Interrupt Enable" bit */
  479. lcdc_write(priv, _LDINTR, LDINTR_FE);
  480. } else {
  481. /* continuous read mode */
  482. lcdc_write_chan(ch, LDSM1R, 0);
  483. }
  484. }
  485. /* display output */
  486. lcdc_write(priv, _LDCNT1R, LCDC_ENABLE);
  487. /* start the lcdc */
  488. sh_mobile_lcdc_start_stop(priv, 1);
  489. priv->started = 1;
  490. /* tell the board code to enable the panel */
  491. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  492. ch = &priv->ch[k];
  493. if (!ch->enabled)
  494. continue;
  495. board_cfg = &ch->cfg.board_cfg;
  496. if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
  497. board_cfg->display_on(board_cfg->board_data, ch->info);
  498. module_put(board_cfg->owner);
  499. }
  500. }
  501. return 0;
  502. }
  503. static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
  504. {
  505. struct sh_mobile_lcdc_chan *ch;
  506. struct sh_mobile_lcdc_board_cfg *board_cfg;
  507. int k;
  508. /* clean up deferred io and ask board code to disable panel */
  509. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  510. ch = &priv->ch[k];
  511. if (!ch->enabled)
  512. continue;
  513. /* deferred io mode:
  514. * flush frame, and wait for frame end interrupt
  515. * clean up deferred io and enable clock
  516. */
  517. if (ch->info && ch->info->fbdefio) {
  518. ch->frame_end = 0;
  519. schedule_delayed_work(&ch->info->deferred_work, 0);
  520. wait_event(ch->frame_end_wait, ch->frame_end);
  521. fb_deferred_io_cleanup(ch->info);
  522. ch->info->fbdefio = NULL;
  523. sh_mobile_lcdc_clk_on(priv);
  524. }
  525. board_cfg = &ch->cfg.board_cfg;
  526. if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
  527. board_cfg->display_off(board_cfg->board_data);
  528. module_put(board_cfg->owner);
  529. }
  530. }
  531. /* stop the lcdc */
  532. if (priv->started) {
  533. sh_mobile_lcdc_start_stop(priv, 0);
  534. priv->started = 0;
  535. }
  536. /* stop clocks */
  537. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  538. if (priv->ch[k].enabled)
  539. sh_mobile_lcdc_clk_off(priv);
  540. }
  541. static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
  542. {
  543. int ifm, miftyp;
  544. switch (ch->cfg.interface_type) {
  545. case RGB8: ifm = 0; miftyp = 0; break;
  546. case RGB9: ifm = 0; miftyp = 4; break;
  547. case RGB12A: ifm = 0; miftyp = 5; break;
  548. case RGB12B: ifm = 0; miftyp = 6; break;
  549. case RGB16: ifm = 0; miftyp = 7; break;
  550. case RGB18: ifm = 0; miftyp = 10; break;
  551. case RGB24: ifm = 0; miftyp = 11; break;
  552. case SYS8A: ifm = 1; miftyp = 0; break;
  553. case SYS8B: ifm = 1; miftyp = 1; break;
  554. case SYS8C: ifm = 1; miftyp = 2; break;
  555. case SYS8D: ifm = 1; miftyp = 3; break;
  556. case SYS9: ifm = 1; miftyp = 4; break;
  557. case SYS12: ifm = 1; miftyp = 5; break;
  558. case SYS16A: ifm = 1; miftyp = 7; break;
  559. case SYS16B: ifm = 1; miftyp = 8; break;
  560. case SYS16C: ifm = 1; miftyp = 9; break;
  561. case SYS18: ifm = 1; miftyp = 10; break;
  562. case SYS24: ifm = 1; miftyp = 11; break;
  563. default: goto bad;
  564. }
  565. /* SUBLCD only supports SYS interface */
  566. if (lcdc_chan_is_sublcd(ch)) {
  567. if (ifm == 0)
  568. goto bad;
  569. else
  570. ifm = 0;
  571. }
  572. ch->ldmt1r_value = (ifm << 12) | miftyp;
  573. return 0;
  574. bad:
  575. return -EINVAL;
  576. }
  577. static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
  578. int clock_source,
  579. struct sh_mobile_lcdc_priv *priv)
  580. {
  581. char *str;
  582. int icksel;
  583. switch (clock_source) {
  584. case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break;
  585. case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break;
  586. case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break;
  587. default:
  588. return -EINVAL;
  589. }
  590. priv->lddckr = icksel << 16;
  591. if (str) {
  592. priv->dot_clk = clk_get(&pdev->dev, str);
  593. if (IS_ERR(priv->dot_clk)) {
  594. dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
  595. return PTR_ERR(priv->dot_clk);
  596. }
  597. }
  598. /* Runtime PM support involves two step for this driver:
  599. * 1) Enable Runtime PM
  600. * 2) Force Runtime PM Resume since hardware is accessed from probe()
  601. */
  602. priv->dev = &pdev->dev;
  603. pm_runtime_enable(priv->dev);
  604. pm_runtime_resume(priv->dev);
  605. return 0;
  606. }
  607. static int sh_mobile_lcdc_setcolreg(u_int regno,
  608. u_int red, u_int green, u_int blue,
  609. u_int transp, struct fb_info *info)
  610. {
  611. u32 *palette = info->pseudo_palette;
  612. if (regno >= PALETTE_NR)
  613. return -EINVAL;
  614. /* only FB_VISUAL_TRUECOLOR supported */
  615. red >>= 16 - info->var.red.length;
  616. green >>= 16 - info->var.green.length;
  617. blue >>= 16 - info->var.blue.length;
  618. transp >>= 16 - info->var.transp.length;
  619. palette[regno] = (red << info->var.red.offset) |
  620. (green << info->var.green.offset) |
  621. (blue << info->var.blue.offset) |
  622. (transp << info->var.transp.offset);
  623. return 0;
  624. }
  625. static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
  626. .id = "SH Mobile LCDC",
  627. .type = FB_TYPE_PACKED_PIXELS,
  628. .visual = FB_VISUAL_TRUECOLOR,
  629. .accel = FB_ACCEL_NONE,
  630. .xpanstep = 0,
  631. .ypanstep = 1,
  632. .ywrapstep = 0,
  633. };
  634. static void sh_mobile_lcdc_fillrect(struct fb_info *info,
  635. const struct fb_fillrect *rect)
  636. {
  637. sys_fillrect(info, rect);
  638. sh_mobile_lcdc_deferred_io_touch(info);
  639. }
  640. static void sh_mobile_lcdc_copyarea(struct fb_info *info,
  641. const struct fb_copyarea *area)
  642. {
  643. sys_copyarea(info, area);
  644. sh_mobile_lcdc_deferred_io_touch(info);
  645. }
  646. static void sh_mobile_lcdc_imageblit(struct fb_info *info,
  647. const struct fb_image *image)
  648. {
  649. sys_imageblit(info, image);
  650. sh_mobile_lcdc_deferred_io_touch(info);
  651. }
  652. static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
  653. struct fb_info *info)
  654. {
  655. struct sh_mobile_lcdc_chan *ch = info->par;
  656. struct sh_mobile_lcdc_priv *priv = ch->lcdc;
  657. unsigned long ldrcntr;
  658. unsigned long new_pan_offset;
  659. new_pan_offset = (var->yoffset * info->fix.line_length) +
  660. (var->xoffset * (info->var.bits_per_pixel / 8));
  661. if (new_pan_offset == ch->pan_offset)
  662. return 0; /* No change, do nothing */
  663. ldrcntr = lcdc_read(priv, _LDRCNTR);
  664. /* Set the source address for the next refresh */
  665. lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle + new_pan_offset);
  666. if (lcdc_chan_is_sublcd(ch))
  667. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
  668. else
  669. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
  670. ch->pan_offset = new_pan_offset;
  671. sh_mobile_lcdc_deferred_io_touch(info);
  672. return 0;
  673. }
  674. static int sh_mobile_wait_for_vsync(struct fb_info *info)
  675. {
  676. struct sh_mobile_lcdc_chan *ch = info->par;
  677. unsigned long ldintr;
  678. int ret;
  679. /* Enable VSync End interrupt */
  680. ldintr = lcdc_read(ch->lcdc, _LDINTR);
  681. ldintr |= LDINTR_VEE;
  682. lcdc_write(ch->lcdc, _LDINTR, ldintr);
  683. ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
  684. msecs_to_jiffies(100));
  685. if (!ret)
  686. return -ETIMEDOUT;
  687. return 0;
  688. }
  689. static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
  690. unsigned long arg)
  691. {
  692. int retval;
  693. switch (cmd) {
  694. case FBIO_WAITFORVSYNC:
  695. retval = sh_mobile_wait_for_vsync(info);
  696. break;
  697. default:
  698. retval = -ENOIOCTLCMD;
  699. break;
  700. }
  701. return retval;
  702. }
  703. static void sh_mobile_fb_reconfig(struct fb_info *info)
  704. {
  705. struct sh_mobile_lcdc_chan *ch = info->par;
  706. struct fb_videomode mode1, mode2;
  707. struct fb_event event;
  708. int evnt = FB_EVENT_MODE_CHANGE_ALL;
  709. if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
  710. /* More framebuffer users are active */
  711. return;
  712. fb_var_to_videomode(&mode1, &ch->display_var);
  713. fb_var_to_videomode(&mode2, &info->var);
  714. if (fb_mode_is_equal(&mode1, &mode2))
  715. return;
  716. /* Display has been re-plugged, framebuffer is free now, reconfigure */
  717. if (fb_set_var(info, &ch->display_var) < 0)
  718. /* Couldn't reconfigure, hopefully, can continue as before */
  719. return;
  720. info->fix.line_length = mode1.xres * (ch->cfg.bpp / 8);
  721. /*
  722. * fb_set_var() calls the notifier change internally, only if
  723. * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
  724. * user event, we have to call the chain ourselves.
  725. */
  726. event.info = info;
  727. event.data = &mode1;
  728. fb_notifier_call_chain(evnt, &event);
  729. }
  730. /*
  731. * Locking: both .fb_release() and .fb_open() are called with info->lock held if
  732. * user == 1, or with console sem held, if user == 0.
  733. */
  734. static int sh_mobile_release(struct fb_info *info, int user)
  735. {
  736. struct sh_mobile_lcdc_chan *ch = info->par;
  737. mutex_lock(&ch->open_lock);
  738. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  739. ch->use_count--;
  740. /* Nothing to reconfigure, when called from fbcon */
  741. if (user) {
  742. acquire_console_sem();
  743. sh_mobile_fb_reconfig(info);
  744. release_console_sem();
  745. }
  746. mutex_unlock(&ch->open_lock);
  747. return 0;
  748. }
  749. static int sh_mobile_open(struct fb_info *info, int user)
  750. {
  751. struct sh_mobile_lcdc_chan *ch = info->par;
  752. mutex_lock(&ch->open_lock);
  753. ch->use_count++;
  754. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  755. mutex_unlock(&ch->open_lock);
  756. return 0;
  757. }
  758. static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  759. {
  760. struct sh_mobile_lcdc_chan *ch = info->par;
  761. if (var->xres > MAX_XRES || var->yres > MAX_YRES ||
  762. var->xres * var->yres * (ch->cfg.bpp / 8) * 2 > info->fix.smem_len) {
  763. dev_warn(info->dev, "Invalid info: %u-%u-%u-%u x %u-%u-%u-%u @ %ukHz!\n",
  764. var->left_margin, var->xres, var->right_margin, var->hsync_len,
  765. var->upper_margin, var->yres, var->lower_margin, var->vsync_len,
  766. PICOS2KHZ(var->pixclock));
  767. return -EINVAL;
  768. }
  769. return 0;
  770. }
  771. static struct fb_ops sh_mobile_lcdc_ops = {
  772. .owner = THIS_MODULE,
  773. .fb_setcolreg = sh_mobile_lcdc_setcolreg,
  774. .fb_read = fb_sys_read,
  775. .fb_write = fb_sys_write,
  776. .fb_fillrect = sh_mobile_lcdc_fillrect,
  777. .fb_copyarea = sh_mobile_lcdc_copyarea,
  778. .fb_imageblit = sh_mobile_lcdc_imageblit,
  779. .fb_pan_display = sh_mobile_fb_pan_display,
  780. .fb_ioctl = sh_mobile_ioctl,
  781. .fb_open = sh_mobile_open,
  782. .fb_release = sh_mobile_release,
  783. .fb_check_var = sh_mobile_check_var,
  784. };
  785. static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
  786. {
  787. switch (bpp) {
  788. case 16: /* PKF[4:0] = 00011 - RGB 565 */
  789. var->red.offset = 11;
  790. var->red.length = 5;
  791. var->green.offset = 5;
  792. var->green.length = 6;
  793. var->blue.offset = 0;
  794. var->blue.length = 5;
  795. var->transp.offset = 0;
  796. var->transp.length = 0;
  797. break;
  798. case 32: /* PKF[4:0] = 00000 - RGB 888
  799. * sh7722 pdf says 00RRGGBB but reality is GGBB00RR
  800. * this may be because LDDDSR has word swap enabled..
  801. */
  802. var->red.offset = 0;
  803. var->red.length = 8;
  804. var->green.offset = 24;
  805. var->green.length = 8;
  806. var->blue.offset = 16;
  807. var->blue.length = 8;
  808. var->transp.offset = 0;
  809. var->transp.length = 0;
  810. break;
  811. default:
  812. return -EINVAL;
  813. }
  814. var->bits_per_pixel = bpp;
  815. var->red.msb_right = 0;
  816. var->green.msb_right = 0;
  817. var->blue.msb_right = 0;
  818. var->transp.msb_right = 0;
  819. return 0;
  820. }
  821. static int sh_mobile_lcdc_suspend(struct device *dev)
  822. {
  823. struct platform_device *pdev = to_platform_device(dev);
  824. sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
  825. return 0;
  826. }
  827. static int sh_mobile_lcdc_resume(struct device *dev)
  828. {
  829. struct platform_device *pdev = to_platform_device(dev);
  830. return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
  831. }
  832. static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
  833. {
  834. struct platform_device *pdev = to_platform_device(dev);
  835. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  836. struct sh_mobile_lcdc_chan *ch;
  837. int k, n;
  838. /* save per-channel registers */
  839. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  840. ch = &p->ch[k];
  841. if (!ch->enabled)
  842. continue;
  843. for (n = 0; n < NR_CH_REGS; n++)
  844. ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
  845. }
  846. /* save shared registers */
  847. for (n = 0; n < NR_SHARED_REGS; n++)
  848. p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
  849. /* turn off LCDC hardware */
  850. lcdc_write(p, _LDCNT1R, 0);
  851. return 0;
  852. }
  853. static int sh_mobile_lcdc_runtime_resume(struct device *dev)
  854. {
  855. struct platform_device *pdev = to_platform_device(dev);
  856. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  857. struct sh_mobile_lcdc_chan *ch;
  858. int k, n;
  859. /* restore per-channel registers */
  860. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  861. ch = &p->ch[k];
  862. if (!ch->enabled)
  863. continue;
  864. for (n = 0; n < NR_CH_REGS; n++)
  865. lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
  866. }
  867. /* restore shared registers */
  868. for (n = 0; n < NR_SHARED_REGS; n++)
  869. lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
  870. return 0;
  871. }
  872. static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
  873. .suspend = sh_mobile_lcdc_suspend,
  874. .resume = sh_mobile_lcdc_resume,
  875. .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
  876. .runtime_resume = sh_mobile_lcdc_runtime_resume,
  877. };
  878. /* locking: called with info->lock held */
  879. static int sh_mobile_lcdc_notify(struct notifier_block *nb,
  880. unsigned long action, void *data)
  881. {
  882. struct fb_event *event = data;
  883. struct fb_info *info = event->info;
  884. struct sh_mobile_lcdc_chan *ch = info->par;
  885. struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
  886. int ret;
  887. if (&ch->lcdc->notifier != nb)
  888. return NOTIFY_DONE;
  889. dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
  890. __func__, action, event->data);
  891. switch(action) {
  892. case FB_EVENT_SUSPEND:
  893. if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
  894. board_cfg->display_off(board_cfg->board_data);
  895. module_put(board_cfg->owner);
  896. }
  897. pm_runtime_put(info->device);
  898. sh_mobile_lcdc_stop(ch->lcdc);
  899. break;
  900. case FB_EVENT_RESUME:
  901. mutex_lock(&ch->open_lock);
  902. sh_mobile_fb_reconfig(info);
  903. mutex_unlock(&ch->open_lock);
  904. /* HDMI must be enabled before LCDC configuration */
  905. if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
  906. board_cfg->display_on(board_cfg->board_data, info);
  907. module_put(board_cfg->owner);
  908. }
  909. ret = sh_mobile_lcdc_start(ch->lcdc);
  910. if (!ret)
  911. pm_runtime_get_sync(info->device);
  912. }
  913. return NOTIFY_OK;
  914. }
  915. static int sh_mobile_lcdc_remove(struct platform_device *pdev);
  916. static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
  917. {
  918. struct fb_info *info;
  919. struct sh_mobile_lcdc_priv *priv;
  920. struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
  921. struct resource *res;
  922. int error;
  923. void *buf;
  924. int i, j;
  925. if (!pdata) {
  926. dev_err(&pdev->dev, "no platform data defined\n");
  927. return -EINVAL;
  928. }
  929. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  930. i = platform_get_irq(pdev, 0);
  931. if (!res || i < 0) {
  932. dev_err(&pdev->dev, "cannot get platform resources\n");
  933. return -ENOENT;
  934. }
  935. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  936. if (!priv) {
  937. dev_err(&pdev->dev, "cannot allocate device data\n");
  938. return -ENOMEM;
  939. }
  940. platform_set_drvdata(pdev, priv);
  941. error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
  942. dev_name(&pdev->dev), priv);
  943. if (error) {
  944. dev_err(&pdev->dev, "unable to request irq\n");
  945. goto err1;
  946. }
  947. priv->irq = i;
  948. atomic_set(&priv->hw_usecnt, -1);
  949. j = 0;
  950. for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
  951. struct sh_mobile_lcdc_chan *ch = priv->ch + j;
  952. ch->lcdc = priv;
  953. memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
  954. error = sh_mobile_lcdc_check_interface(ch);
  955. if (error) {
  956. dev_err(&pdev->dev, "unsupported interface type\n");
  957. goto err1;
  958. }
  959. init_waitqueue_head(&ch->frame_end_wait);
  960. init_completion(&ch->vsync_completion);
  961. ch->pan_offset = 0;
  962. switch (pdata->ch[i].chan) {
  963. case LCDC_CHAN_MAINLCD:
  964. ch->enabled = 1 << 1;
  965. ch->reg_offs = lcdc_offs_mainlcd;
  966. j++;
  967. break;
  968. case LCDC_CHAN_SUBLCD:
  969. ch->enabled = 1 << 2;
  970. ch->reg_offs = lcdc_offs_sublcd;
  971. j++;
  972. break;
  973. }
  974. }
  975. if (!j) {
  976. dev_err(&pdev->dev, "no channels defined\n");
  977. error = -EINVAL;
  978. goto err1;
  979. }
  980. priv->base = ioremap_nocache(res->start, resource_size(res));
  981. if (!priv->base)
  982. goto err1;
  983. error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
  984. if (error) {
  985. dev_err(&pdev->dev, "unable to setup clocks\n");
  986. goto err1;
  987. }
  988. for (i = 0; i < j; i++) {
  989. struct fb_var_screeninfo *var;
  990. const struct fb_videomode *lcd_cfg, *max_cfg = NULL;
  991. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  992. struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
  993. const struct fb_videomode *mode = cfg->lcd_cfg;
  994. unsigned long max_size = 0;
  995. int k;
  996. int num_cfg;
  997. ch->info = framebuffer_alloc(0, &pdev->dev);
  998. if (!ch->info) {
  999. dev_err(&pdev->dev, "unable to allocate fb_info\n");
  1000. error = -ENOMEM;
  1001. break;
  1002. }
  1003. info = ch->info;
  1004. var = &info->var;
  1005. info->fbops = &sh_mobile_lcdc_ops;
  1006. info->par = ch;
  1007. mutex_init(&ch->open_lock);
  1008. for (k = 0, lcd_cfg = mode;
  1009. k < cfg->num_cfg && lcd_cfg;
  1010. k++, lcd_cfg++) {
  1011. unsigned long size = lcd_cfg->yres * lcd_cfg->xres;
  1012. if (size > max_size) {
  1013. max_cfg = lcd_cfg;
  1014. max_size = size;
  1015. }
  1016. }
  1017. if (!mode)
  1018. max_size = MAX_XRES * MAX_YRES;
  1019. else if (max_cfg)
  1020. dev_dbg(&pdev->dev, "Found largest videomode %ux%u\n",
  1021. max_cfg->xres, max_cfg->yres);
  1022. info->fix = sh_mobile_lcdc_fix;
  1023. info->fix.smem_len = max_size * (cfg->bpp / 8) * 2;
  1024. if (!mode) {
  1025. mode = &default_720p;
  1026. num_cfg = 1;
  1027. } else {
  1028. num_cfg = cfg->num_cfg;
  1029. }
  1030. fb_videomode_to_modelist(mode, num_cfg, &info->modelist);
  1031. fb_videomode_to_var(var, mode);
  1032. var->width = cfg->lcd_size_cfg.width;
  1033. var->height = cfg->lcd_size_cfg.height;
  1034. /* Default Y virtual resolution is 2x panel size */
  1035. var->yres_virtual = var->yres * 2;
  1036. var->activate = FB_ACTIVATE_NOW;
  1037. error = sh_mobile_lcdc_set_bpp(var, cfg->bpp);
  1038. if (error)
  1039. break;
  1040. buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
  1041. &ch->dma_handle, GFP_KERNEL);
  1042. if (!buf) {
  1043. dev_err(&pdev->dev, "unable to allocate buffer\n");
  1044. error = -ENOMEM;
  1045. break;
  1046. }
  1047. info->pseudo_palette = &ch->pseudo_palette;
  1048. info->flags = FBINFO_FLAG_DEFAULT;
  1049. error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
  1050. if (error < 0) {
  1051. dev_err(&pdev->dev, "unable to allocate cmap\n");
  1052. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1053. buf, ch->dma_handle);
  1054. break;
  1055. }
  1056. info->fix.smem_start = ch->dma_handle;
  1057. info->fix.line_length = var->xres * (cfg->bpp / 8);
  1058. info->screen_base = buf;
  1059. info->device = &pdev->dev;
  1060. ch->display_var = *var;
  1061. }
  1062. if (error)
  1063. goto err1;
  1064. error = sh_mobile_lcdc_start(priv);
  1065. if (error) {
  1066. dev_err(&pdev->dev, "unable to start hardware\n");
  1067. goto err1;
  1068. }
  1069. for (i = 0; i < j; i++) {
  1070. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1071. info = ch->info;
  1072. if (info->fbdefio) {
  1073. ch->sglist = vmalloc(sizeof(struct scatterlist) *
  1074. info->fix.smem_len >> PAGE_SHIFT);
  1075. if (!ch->sglist) {
  1076. dev_err(&pdev->dev, "cannot allocate sglist\n");
  1077. goto err1;
  1078. }
  1079. }
  1080. error = register_framebuffer(info);
  1081. if (error < 0)
  1082. goto err1;
  1083. dev_info(info->dev,
  1084. "registered %s/%s as %dx%d %dbpp.\n",
  1085. pdev->name,
  1086. (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
  1087. "mainlcd" : "sublcd",
  1088. info->var.xres, info->var.yres,
  1089. ch->cfg.bpp);
  1090. /* deferred io mode: disable clock to save power */
  1091. if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
  1092. sh_mobile_lcdc_clk_off(priv);
  1093. }
  1094. /* Failure ignored */
  1095. priv->notifier.notifier_call = sh_mobile_lcdc_notify;
  1096. fb_register_client(&priv->notifier);
  1097. return 0;
  1098. err1:
  1099. sh_mobile_lcdc_remove(pdev);
  1100. return error;
  1101. }
  1102. static int sh_mobile_lcdc_remove(struct platform_device *pdev)
  1103. {
  1104. struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
  1105. struct fb_info *info;
  1106. int i;
  1107. fb_unregister_client(&priv->notifier);
  1108. for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
  1109. if (priv->ch[i].info && priv->ch[i].info->dev)
  1110. unregister_framebuffer(priv->ch[i].info);
  1111. sh_mobile_lcdc_stop(priv);
  1112. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1113. info = priv->ch[i].info;
  1114. if (!info || !info->device)
  1115. continue;
  1116. if (priv->ch[i].sglist)
  1117. vfree(priv->ch[i].sglist);
  1118. if (info->screen_base)
  1119. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1120. info->screen_base,
  1121. priv->ch[i].dma_handle);
  1122. fb_dealloc_cmap(&info->cmap);
  1123. framebuffer_release(info);
  1124. }
  1125. if (priv->dot_clk)
  1126. clk_put(priv->dot_clk);
  1127. if (priv->dev)
  1128. pm_runtime_disable(priv->dev);
  1129. if (priv->base)
  1130. iounmap(priv->base);
  1131. if (priv->irq)
  1132. free_irq(priv->irq, priv);
  1133. kfree(priv);
  1134. return 0;
  1135. }
  1136. static struct platform_driver sh_mobile_lcdc_driver = {
  1137. .driver = {
  1138. .name = "sh_mobile_lcdc_fb",
  1139. .owner = THIS_MODULE,
  1140. .pm = &sh_mobile_lcdc_dev_pm_ops,
  1141. },
  1142. .probe = sh_mobile_lcdc_probe,
  1143. .remove = sh_mobile_lcdc_remove,
  1144. };
  1145. static int __init sh_mobile_lcdc_init(void)
  1146. {
  1147. return platform_driver_register(&sh_mobile_lcdc_driver);
  1148. }
  1149. static void __exit sh_mobile_lcdc_exit(void)
  1150. {
  1151. platform_driver_unregister(&sh_mobile_lcdc_driver);
  1152. }
  1153. module_init(sh_mobile_lcdc_init);
  1154. module_exit(sh_mobile_lcdc_exit);
  1155. MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
  1156. MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
  1157. MODULE_LICENSE("GPL v2");