ioport.c 19 KB

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  1. /*
  2. * ioport.c: Simple io mapping allocator.
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
  6. *
  7. * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev.
  8. *
  9. * 2000/01/29
  10. * <rth> zait: as long as pci_alloc_consistent produces something addressable,
  11. * things are ok.
  12. * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a
  13. * pointer into the big page mapping
  14. * <rth> zait: so what?
  15. * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page()))
  16. * <zaitcev> Hmm
  17. * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())).
  18. * So far so good.
  19. * <zaitcev> Now, driver calls pci_free_consistent(with result of
  20. * remap_it_my_way()).
  21. * <zaitcev> How do you find the address to pass to free_pages()?
  22. * <rth> zait: walk the page tables? It's only two or three level after all.
  23. * <rth> zait: you have to walk them anyway to remove the mapping.
  24. * <zaitcev> Hmm
  25. * <zaitcev> Sounds reasonable
  26. */
  27. #include <linux/module.h>
  28. #include <linux/sched.h>
  29. #include <linux/kernel.h>
  30. #include <linux/errno.h>
  31. #include <linux/types.h>
  32. #include <linux/ioport.h>
  33. #include <linux/mm.h>
  34. #include <linux/slab.h>
  35. #include <linux/pci.h> /* struct pci_dev */
  36. #include <linux/proc_fs.h>
  37. #include <linux/seq_file.h>
  38. #include <linux/scatterlist.h>
  39. #include <linux/of_device.h>
  40. #include <asm/io.h>
  41. #include <asm/vaddrs.h>
  42. #include <asm/oplib.h>
  43. #include <asm/prom.h>
  44. #include <asm/page.h>
  45. #include <asm/pgalloc.h>
  46. #include <asm/dma.h>
  47. #include <asm/iommu.h>
  48. #include <asm/io-unit.h>
  49. #include <asm/leon.h>
  50. const struct sparc32_dma_ops *sparc32_dma_ops;
  51. /* This function must make sure that caches and memory are coherent after DMA
  52. * On LEON systems without cache snooping it flushes the entire D-CACHE.
  53. */
  54. #ifndef CONFIG_SPARC_LEON
  55. static inline void dma_make_coherent(unsigned long pa, unsigned long len)
  56. {
  57. }
  58. #else
  59. static inline void dma_make_coherent(unsigned long pa, unsigned long len)
  60. {
  61. if (!sparc_leon3_snooping_enabled())
  62. leon_flush_dcache_all();
  63. }
  64. #endif
  65. static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
  66. static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
  67. unsigned long size, char *name);
  68. static void _sparc_free_io(struct resource *res);
  69. static void register_proc_sparc_ioport(void);
  70. /* This points to the next to use virtual memory for DVMA mappings */
  71. static struct resource _sparc_dvma = {
  72. .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1
  73. };
  74. /* This points to the start of I/O mappings, cluable from outside. */
  75. /*ext*/ struct resource sparc_iomap = {
  76. .name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1
  77. };
  78. /*
  79. * Our mini-allocator...
  80. * Boy this is gross! We need it because we must map I/O for
  81. * timers and interrupt controller before the kmalloc is available.
  82. */
  83. #define XNMLN 15
  84. #define XNRES 10 /* SS-10 uses 8 */
  85. struct xresource {
  86. struct resource xres; /* Must be first */
  87. int xflag; /* 1 == used */
  88. char xname[XNMLN+1];
  89. };
  90. static struct xresource xresv[XNRES];
  91. static struct xresource *xres_alloc(void) {
  92. struct xresource *xrp;
  93. int n;
  94. xrp = xresv;
  95. for (n = 0; n < XNRES; n++) {
  96. if (xrp->xflag == 0) {
  97. xrp->xflag = 1;
  98. return xrp;
  99. }
  100. xrp++;
  101. }
  102. return NULL;
  103. }
  104. static void xres_free(struct xresource *xrp) {
  105. xrp->xflag = 0;
  106. }
  107. /*
  108. * These are typically used in PCI drivers
  109. * which are trying to be cross-platform.
  110. *
  111. * Bus type is always zero on IIep.
  112. */
  113. void __iomem *ioremap(unsigned long offset, unsigned long size)
  114. {
  115. char name[14];
  116. sprintf(name, "phys_%08x", (u32)offset);
  117. return _sparc_alloc_io(0, offset, size, name);
  118. }
  119. EXPORT_SYMBOL(ioremap);
  120. /*
  121. * Comlimentary to ioremap().
  122. */
  123. void iounmap(volatile void __iomem *virtual)
  124. {
  125. unsigned long vaddr = (unsigned long) virtual & PAGE_MASK;
  126. struct resource *res;
  127. /*
  128. * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
  129. * This probably warrants some sort of hashing.
  130. */
  131. if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) {
  132. printk("free_io/iounmap: cannot free %lx\n", vaddr);
  133. return;
  134. }
  135. _sparc_free_io(res);
  136. if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) {
  137. xres_free((struct xresource *)res);
  138. } else {
  139. kfree(res);
  140. }
  141. }
  142. EXPORT_SYMBOL(iounmap);
  143. void __iomem *of_ioremap(struct resource *res, unsigned long offset,
  144. unsigned long size, char *name)
  145. {
  146. return _sparc_alloc_io(res->flags & 0xF,
  147. res->start + offset,
  148. size, name);
  149. }
  150. EXPORT_SYMBOL(of_ioremap);
  151. void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
  152. {
  153. iounmap(base);
  154. }
  155. EXPORT_SYMBOL(of_iounmap);
  156. /*
  157. * Meat of mapping
  158. */
  159. static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
  160. unsigned long size, char *name)
  161. {
  162. static int printed_full;
  163. struct xresource *xres;
  164. struct resource *res;
  165. char *tack;
  166. int tlen;
  167. void __iomem *va; /* P3 diag */
  168. if (name == NULL) name = "???";
  169. if ((xres = xres_alloc()) != 0) {
  170. tack = xres->xname;
  171. res = &xres->xres;
  172. } else {
  173. if (!printed_full) {
  174. printk("ioremap: done with statics, switching to malloc\n");
  175. printed_full = 1;
  176. }
  177. tlen = strlen(name);
  178. tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL);
  179. if (tack == NULL) return NULL;
  180. memset(tack, 0, sizeof(struct resource));
  181. res = (struct resource *) tack;
  182. tack += sizeof (struct resource);
  183. }
  184. strlcpy(tack, name, XNMLN+1);
  185. res->name = tack;
  186. va = _sparc_ioremap(res, busno, phys, size);
  187. /* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */
  188. return va;
  189. }
  190. /*
  191. */
  192. static void __iomem *
  193. _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz)
  194. {
  195. unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
  196. if (allocate_resource(&sparc_iomap, res,
  197. (offset + sz + PAGE_SIZE-1) & PAGE_MASK,
  198. sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) {
  199. /* Usually we cannot see printks in this case. */
  200. prom_printf("alloc_io_res(%s): cannot occupy\n",
  201. (res->name != NULL)? res->name: "???");
  202. prom_halt();
  203. }
  204. pa &= PAGE_MASK;
  205. srmmu_mapiorange(bus, pa, res->start, resource_size(res));
  206. return (void __iomem *)(unsigned long)(res->start + offset);
  207. }
  208. /*
  209. * Comlimentary to _sparc_ioremap().
  210. */
  211. static void _sparc_free_io(struct resource *res)
  212. {
  213. unsigned long plen;
  214. plen = resource_size(res);
  215. BUG_ON((plen & (PAGE_SIZE-1)) != 0);
  216. srmmu_unmapiorange(res->start, plen);
  217. release_resource(res);
  218. }
  219. #ifdef CONFIG_SBUS
  220. void sbus_set_sbus64(struct device *dev, int x)
  221. {
  222. printk("sbus_set_sbus64: unsupported\n");
  223. }
  224. EXPORT_SYMBOL(sbus_set_sbus64);
  225. /*
  226. * Allocate a chunk of memory suitable for DMA.
  227. * Typically devices use them for control blocks.
  228. * CPU may access them without any explicit flushing.
  229. */
  230. static void *sbus_alloc_coherent(struct device *dev, size_t len,
  231. dma_addr_t *dma_addrp, gfp_t gfp,
  232. struct dma_attrs *attrs)
  233. {
  234. struct platform_device *op = to_platform_device(dev);
  235. unsigned long len_total = PAGE_ALIGN(len);
  236. unsigned long va;
  237. struct resource *res;
  238. int order;
  239. /* XXX why are some lengths signed, others unsigned? */
  240. if (len <= 0) {
  241. return NULL;
  242. }
  243. /* XXX So what is maxphys for us and how do drivers know it? */
  244. if (len > 256*1024) { /* __get_free_pages() limit */
  245. return NULL;
  246. }
  247. order = get_order(len_total);
  248. if ((va = __get_free_pages(GFP_KERNEL|__GFP_COMP, order)) == 0)
  249. goto err_nopages;
  250. if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL)
  251. goto err_nomem;
  252. if (allocate_resource(&_sparc_dvma, res, len_total,
  253. _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
  254. printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total);
  255. goto err_nova;
  256. }
  257. // XXX The sbus_map_dma_area does this for us below, see comments.
  258. // srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
  259. /*
  260. * XXX That's where sdev would be used. Currently we load
  261. * all iommu tables with the same translations.
  262. */
  263. if (sbus_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0)
  264. goto err_noiommu;
  265. res->name = op->dev.of_node->name;
  266. return (void *)(unsigned long)res->start;
  267. err_noiommu:
  268. release_resource(res);
  269. err_nova:
  270. kfree(res);
  271. err_nomem:
  272. free_pages(va, order);
  273. err_nopages:
  274. return NULL;
  275. }
  276. static void sbus_free_coherent(struct device *dev, size_t n, void *p,
  277. dma_addr_t ba, struct dma_attrs *attrs)
  278. {
  279. struct resource *res;
  280. struct page *pgv;
  281. if ((res = lookup_resource(&_sparc_dvma,
  282. (unsigned long)p)) == NULL) {
  283. printk("sbus_free_consistent: cannot free %p\n", p);
  284. return;
  285. }
  286. if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
  287. printk("sbus_free_consistent: unaligned va %p\n", p);
  288. return;
  289. }
  290. n = PAGE_ALIGN(n);
  291. if (resource_size(res) != n) {
  292. printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
  293. (long)resource_size(res), n);
  294. return;
  295. }
  296. release_resource(res);
  297. kfree(res);
  298. pgv = virt_to_page(p);
  299. sbus_unmap_dma_area(dev, ba, n);
  300. __free_pages(pgv, get_order(n));
  301. }
  302. /*
  303. * Map a chunk of memory so that devices can see it.
  304. * CPU view of this memory may be inconsistent with
  305. * a device view and explicit flushing is necessary.
  306. */
  307. static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
  308. unsigned long offset, size_t len,
  309. enum dma_data_direction dir,
  310. struct dma_attrs *attrs)
  311. {
  312. void *va = page_address(page) + offset;
  313. /* XXX why are some lengths signed, others unsigned? */
  314. if (len <= 0) {
  315. return 0;
  316. }
  317. /* XXX So what is maxphys for us and how do drivers know it? */
  318. if (len > 256*1024) { /* __get_free_pages() limit */
  319. return 0;
  320. }
  321. return mmu_get_scsi_one(dev, va, len);
  322. }
  323. static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
  324. enum dma_data_direction dir, struct dma_attrs *attrs)
  325. {
  326. mmu_release_scsi_one(dev, ba, n);
  327. }
  328. static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
  329. enum dma_data_direction dir, struct dma_attrs *attrs)
  330. {
  331. mmu_get_scsi_sgl(dev, sg, n);
  332. return n;
  333. }
  334. static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
  335. enum dma_data_direction dir, struct dma_attrs *attrs)
  336. {
  337. mmu_release_scsi_sgl(dev, sg, n);
  338. }
  339. static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
  340. int n, enum dma_data_direction dir)
  341. {
  342. BUG();
  343. }
  344. static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
  345. int n, enum dma_data_direction dir)
  346. {
  347. BUG();
  348. }
  349. struct dma_map_ops sbus_dma_ops = {
  350. .alloc = sbus_alloc_coherent,
  351. .free = sbus_free_coherent,
  352. .map_page = sbus_map_page,
  353. .unmap_page = sbus_unmap_page,
  354. .map_sg = sbus_map_sg,
  355. .unmap_sg = sbus_unmap_sg,
  356. .sync_sg_for_cpu = sbus_sync_sg_for_cpu,
  357. .sync_sg_for_device = sbus_sync_sg_for_device,
  358. };
  359. static int __init sparc_register_ioport(void)
  360. {
  361. register_proc_sparc_ioport();
  362. return 0;
  363. }
  364. arch_initcall(sparc_register_ioport);
  365. #endif /* CONFIG_SBUS */
  366. /* LEON reuses PCI DMA ops */
  367. #if defined(CONFIG_PCI) || defined(CONFIG_SPARC_LEON)
  368. /* Allocate and map kernel buffer using consistent mode DMA for a device.
  369. * hwdev should be valid struct pci_dev pointer for PCI devices.
  370. */
  371. static void *pci32_alloc_coherent(struct device *dev, size_t len,
  372. dma_addr_t *pba, gfp_t gfp,
  373. struct dma_attrs *attrs)
  374. {
  375. unsigned long len_total = PAGE_ALIGN(len);
  376. void *va;
  377. struct resource *res;
  378. int order;
  379. if (len == 0) {
  380. return NULL;
  381. }
  382. if (len > 256*1024) { /* __get_free_pages() limit */
  383. return NULL;
  384. }
  385. order = get_order(len_total);
  386. va = (void *) __get_free_pages(GFP_KERNEL, order);
  387. if (va == NULL) {
  388. printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT);
  389. goto err_nopages;
  390. }
  391. if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
  392. printk("pci_alloc_consistent: no core\n");
  393. goto err_nomem;
  394. }
  395. if (allocate_resource(&_sparc_dvma, res, len_total,
  396. _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
  397. printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);
  398. goto err_nova;
  399. }
  400. srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
  401. *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
  402. return (void *) res->start;
  403. err_nova:
  404. kfree(res);
  405. err_nomem:
  406. free_pages((unsigned long)va, order);
  407. err_nopages:
  408. return NULL;
  409. }
  410. /* Free and unmap a consistent DMA buffer.
  411. * cpu_addr is what was returned from pci_alloc_consistent,
  412. * size must be the same as what as passed into pci_alloc_consistent,
  413. * and likewise dma_addr must be the same as what *dma_addrp was set to.
  414. *
  415. * References to the memory and mappings associated with cpu_addr/dma_addr
  416. * past this call are illegal.
  417. */
  418. static void pci32_free_coherent(struct device *dev, size_t n, void *p,
  419. dma_addr_t ba, struct dma_attrs *attrs)
  420. {
  421. struct resource *res;
  422. if ((res = lookup_resource(&_sparc_dvma,
  423. (unsigned long)p)) == NULL) {
  424. printk("pci_free_consistent: cannot free %p\n", p);
  425. return;
  426. }
  427. if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
  428. printk("pci_free_consistent: unaligned va %p\n", p);
  429. return;
  430. }
  431. n = PAGE_ALIGN(n);
  432. if (resource_size(res) != n) {
  433. printk("pci_free_consistent: region 0x%lx asked 0x%lx\n",
  434. (long)resource_size(res), (long)n);
  435. return;
  436. }
  437. dma_make_coherent(ba, n);
  438. srmmu_unmapiorange((unsigned long)p, n);
  439. release_resource(res);
  440. kfree(res);
  441. free_pages((unsigned long)phys_to_virt(ba), get_order(n));
  442. }
  443. /*
  444. * Same as pci_map_single, but with pages.
  445. */
  446. static dma_addr_t pci32_map_page(struct device *dev, struct page *page,
  447. unsigned long offset, size_t size,
  448. enum dma_data_direction dir,
  449. struct dma_attrs *attrs)
  450. {
  451. /* IIep is write-through, not flushing. */
  452. return page_to_phys(page) + offset;
  453. }
  454. static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size,
  455. enum dma_data_direction dir, struct dma_attrs *attrs)
  456. {
  457. if (dir != PCI_DMA_TODEVICE)
  458. dma_make_coherent(ba, PAGE_ALIGN(size));
  459. }
  460. /* Map a set of buffers described by scatterlist in streaming
  461. * mode for DMA. This is the scather-gather version of the
  462. * above pci_map_single interface. Here the scatter gather list
  463. * elements are each tagged with the appropriate dma address
  464. * and length. They are obtained via sg_dma_{address,length}(SG).
  465. *
  466. * NOTE: An implementation may be able to use a smaller number of
  467. * DMA address/length pairs than there are SG table elements.
  468. * (for example via virtual mapping capabilities)
  469. * The routine returns the number of addr/length pairs actually
  470. * used, at most nents.
  471. *
  472. * Device ownership issues as mentioned above for pci_map_single are
  473. * the same here.
  474. */
  475. static int pci32_map_sg(struct device *device, struct scatterlist *sgl,
  476. int nents, enum dma_data_direction dir,
  477. struct dma_attrs *attrs)
  478. {
  479. struct scatterlist *sg;
  480. int n;
  481. /* IIep is write-through, not flushing. */
  482. for_each_sg(sgl, sg, nents, n) {
  483. sg->dma_address = sg_phys(sg);
  484. sg->dma_length = sg->length;
  485. }
  486. return nents;
  487. }
  488. /* Unmap a set of streaming mode DMA translations.
  489. * Again, cpu read rules concerning calls here are the same as for
  490. * pci_unmap_single() above.
  491. */
  492. static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl,
  493. int nents, enum dma_data_direction dir,
  494. struct dma_attrs *attrs)
  495. {
  496. struct scatterlist *sg;
  497. int n;
  498. if (dir != PCI_DMA_TODEVICE) {
  499. for_each_sg(sgl, sg, nents, n) {
  500. dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
  501. }
  502. }
  503. }
  504. /* Make physical memory consistent for a single
  505. * streaming mode DMA translation before or after a transfer.
  506. *
  507. * If you perform a pci_map_single() but wish to interrogate the
  508. * buffer using the cpu, yet do not wish to teardown the PCI dma
  509. * mapping, you must call this function before doing so. At the
  510. * next point you give the PCI dma address back to the card, you
  511. * must first perform a pci_dma_sync_for_device, and then the
  512. * device again owns the buffer.
  513. */
  514. static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
  515. size_t size, enum dma_data_direction dir)
  516. {
  517. if (dir != PCI_DMA_TODEVICE) {
  518. dma_make_coherent(ba, PAGE_ALIGN(size));
  519. }
  520. }
  521. static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba,
  522. size_t size, enum dma_data_direction dir)
  523. {
  524. if (dir != PCI_DMA_TODEVICE) {
  525. dma_make_coherent(ba, PAGE_ALIGN(size));
  526. }
  527. }
  528. /* Make physical memory consistent for a set of streaming
  529. * mode DMA translations after a transfer.
  530. *
  531. * The same as pci_dma_sync_single_* but for a scatter-gather list,
  532. * same rules and usage.
  533. */
  534. static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
  535. int nents, enum dma_data_direction dir)
  536. {
  537. struct scatterlist *sg;
  538. int n;
  539. if (dir != PCI_DMA_TODEVICE) {
  540. for_each_sg(sgl, sg, nents, n) {
  541. dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
  542. }
  543. }
  544. }
  545. static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl,
  546. int nents, enum dma_data_direction dir)
  547. {
  548. struct scatterlist *sg;
  549. int n;
  550. if (dir != PCI_DMA_TODEVICE) {
  551. for_each_sg(sgl, sg, nents, n) {
  552. dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
  553. }
  554. }
  555. }
  556. struct dma_map_ops pci32_dma_ops = {
  557. .alloc = pci32_alloc_coherent,
  558. .free = pci32_free_coherent,
  559. .map_page = pci32_map_page,
  560. .unmap_page = pci32_unmap_page,
  561. .map_sg = pci32_map_sg,
  562. .unmap_sg = pci32_unmap_sg,
  563. .sync_single_for_cpu = pci32_sync_single_for_cpu,
  564. .sync_single_for_device = pci32_sync_single_for_device,
  565. .sync_sg_for_cpu = pci32_sync_sg_for_cpu,
  566. .sync_sg_for_device = pci32_sync_sg_for_device,
  567. };
  568. EXPORT_SYMBOL(pci32_dma_ops);
  569. #endif /* CONFIG_PCI || CONFIG_SPARC_LEON */
  570. #ifdef CONFIG_SPARC_LEON
  571. struct dma_map_ops *dma_ops = &pci32_dma_ops;
  572. #elif defined(CONFIG_SBUS)
  573. struct dma_map_ops *dma_ops = &sbus_dma_ops;
  574. #endif
  575. EXPORT_SYMBOL(dma_ops);
  576. /*
  577. * Return whether the given PCI device DMA address mask can be
  578. * supported properly. For example, if your device can only drive the
  579. * low 24-bits during PCI bus mastering, then you would pass
  580. * 0x00ffffff as the mask to this function.
  581. */
  582. int dma_supported(struct device *dev, u64 mask)
  583. {
  584. #ifdef CONFIG_PCI
  585. if (dev->bus == &pci_bus_type)
  586. return 1;
  587. #endif
  588. return 0;
  589. }
  590. EXPORT_SYMBOL(dma_supported);
  591. #ifdef CONFIG_PROC_FS
  592. static int sparc_io_proc_show(struct seq_file *m, void *v)
  593. {
  594. struct resource *root = m->private, *r;
  595. const char *nm;
  596. for (r = root->child; r != NULL; r = r->sibling) {
  597. if ((nm = r->name) == 0) nm = "???";
  598. seq_printf(m, "%016llx-%016llx: %s\n",
  599. (unsigned long long)r->start,
  600. (unsigned long long)r->end, nm);
  601. }
  602. return 0;
  603. }
  604. static int sparc_io_proc_open(struct inode *inode, struct file *file)
  605. {
  606. return single_open(file, sparc_io_proc_show, PDE(inode)->data);
  607. }
  608. static const struct file_operations sparc_io_proc_fops = {
  609. .owner = THIS_MODULE,
  610. .open = sparc_io_proc_open,
  611. .read = seq_read,
  612. .llseek = seq_lseek,
  613. .release = single_release,
  614. };
  615. #endif /* CONFIG_PROC_FS */
  616. static void register_proc_sparc_ioport(void)
  617. {
  618. #ifdef CONFIG_PROC_FS
  619. proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap);
  620. proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma);
  621. #endif
  622. }