budget-ci.c 32 KB

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  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include "budget.h"
  32. #include <linux/module.h>
  33. #include <linux/errno.h>
  34. #include <linux/slab.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/input.h>
  37. #include <linux/spinlock.h>
  38. #include "dvb_ca_en50221.h"
  39. #include "stv0299.h"
  40. #include "stv0297.h"
  41. #include "tda1004x.h"
  42. #include "lnbp21.h"
  43. #include "bsbe1.h"
  44. #include "bsru6.h"
  45. /*
  46. * Regarding DEBIADDR_IR:
  47. * Some CI modules hang if random addresses are read.
  48. * Using address 0x4000 for the IR read means that we
  49. * use the same address as for CI version, which should
  50. * be a safe default.
  51. */
  52. #define DEBIADDR_IR 0x4000
  53. #define DEBIADDR_CICONTROL 0x0000
  54. #define DEBIADDR_CIVERSION 0x4000
  55. #define DEBIADDR_IO 0x1000
  56. #define DEBIADDR_ATTR 0x3000
  57. #define CICONTROL_RESET 0x01
  58. #define CICONTROL_ENABLETS 0x02
  59. #define CICONTROL_CAMDETECT 0x08
  60. #define DEBICICTL 0x00420000
  61. #define DEBICICAM 0x02420000
  62. #define SLOTSTATUS_NONE 1
  63. #define SLOTSTATUS_PRESENT 2
  64. #define SLOTSTATUS_RESET 4
  65. #define SLOTSTATUS_READY 8
  66. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  67. struct budget_ci {
  68. struct budget budget;
  69. struct input_dev *input_dev;
  70. struct tasklet_struct msp430_irq_tasklet;
  71. struct tasklet_struct ciintf_irq_tasklet;
  72. int slot_status;
  73. int ci_irq;
  74. struct dvb_ca_en50221 ca;
  75. char ir_dev_name[50];
  76. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  77. };
  78. /* from reading the following remotes:
  79. Zenith Universal 7 / TV Mode 807 / VCR Mode 837
  80. Hauppauge (from NOVA-CI-s box product)
  81. i've taken a "middle of the road" approach and note the differences
  82. */
  83. static u16 key_map[64] = {
  84. /* 0x0X */
  85. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6, KEY_7, KEY_8,
  86. KEY_9,
  87. KEY_ENTER,
  88. KEY_RED,
  89. KEY_POWER, /* RADIO on Hauppauge */
  90. KEY_MUTE,
  91. 0,
  92. KEY_A, /* TV on Hauppauge */
  93. /* 0x1X */
  94. KEY_VOLUMEUP, KEY_VOLUMEDOWN,
  95. 0, 0,
  96. KEY_B,
  97. 0, 0, 0, 0, 0, 0, 0,
  98. KEY_UP, KEY_DOWN,
  99. KEY_OPTION, /* RESERVED on Hauppauge */
  100. KEY_BREAK,
  101. /* 0x2X */
  102. KEY_CHANNELUP, KEY_CHANNELDOWN,
  103. KEY_PREVIOUS, /* Prev. Ch on Zenith, SOURCE on Hauppauge */
  104. 0, KEY_RESTART, KEY_OK,
  105. KEY_CYCLEWINDOWS, /* MINIMIZE on Hauppauge */
  106. 0,
  107. KEY_ENTER, /* VCR mode on Zenith */
  108. KEY_PAUSE,
  109. 0,
  110. KEY_RIGHT, KEY_LEFT,
  111. 0,
  112. KEY_MENU, /* FULL SCREEN on Hauppauge */
  113. 0,
  114. /* 0x3X */
  115. KEY_SLOW,
  116. KEY_PREVIOUS, /* VCR mode on Zenith */
  117. KEY_REWIND,
  118. 0,
  119. KEY_FASTFORWARD,
  120. KEY_PLAY, KEY_STOP,
  121. KEY_RECORD,
  122. KEY_TUNER, /* TV/VCR on Zenith */
  123. 0,
  124. KEY_C,
  125. 0,
  126. KEY_EXIT,
  127. KEY_POWER2,
  128. KEY_TUNER, /* VCR mode on Zenith */
  129. 0,
  130. };
  131. static void msp430_ir_debounce(unsigned long data)
  132. {
  133. struct input_dev *dev = (struct input_dev *) data;
  134. if (dev->rep[0] == 0 || dev->rep[0] == ~0) {
  135. input_event(dev, EV_KEY, key_map[dev->repeat_key], 0);
  136. } else {
  137. dev->rep[0] = 0;
  138. dev->timer.expires = jiffies + HZ * 350 / 1000;
  139. add_timer(&dev->timer);
  140. input_event(dev, EV_KEY, key_map[dev->repeat_key], 2); /* REPEAT */
  141. }
  142. input_sync(dev);
  143. }
  144. static void msp430_ir_interrupt(unsigned long data)
  145. {
  146. struct budget_ci *budget_ci = (struct budget_ci *) data;
  147. struct input_dev *dev = budget_ci->input_dev;
  148. unsigned int code =
  149. ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  150. if (code & 0x40) {
  151. code &= 0x3f;
  152. if (timer_pending(&dev->timer)) {
  153. if (code == dev->repeat_key) {
  154. ++dev->rep[0];
  155. return;
  156. }
  157. del_timer(&dev->timer);
  158. input_event(dev, EV_KEY, key_map[dev->repeat_key], 0);
  159. }
  160. if (!key_map[code]) {
  161. printk("DVB (%s): no key for %02x!\n", __FUNCTION__, code);
  162. return;
  163. }
  164. input_event(dev, EV_KEY, key_map[code], 1);
  165. input_sync(dev);
  166. /* initialize debounce and repeat */
  167. dev->repeat_key = code;
  168. /* Zenith remote _always_ sends 2 sequences */
  169. dev->rep[0] = ~0;
  170. mod_timer(&dev->timer, jiffies + msecs_to_jiffies(350));
  171. }
  172. }
  173. static int msp430_ir_init(struct budget_ci *budget_ci)
  174. {
  175. struct saa7146_dev *saa = budget_ci->budget.dev;
  176. struct input_dev *input_dev;
  177. int i;
  178. int err;
  179. input_dev = input_allocate_device();
  180. if (!input_dev)
  181. return -ENOMEM;
  182. sprintf(budget_ci->ir_dev_name, "Budget-CI dvb ir receiver %s", saa->name);
  183. input_dev->name = budget_ci->ir_dev_name;
  184. set_bit(EV_KEY, input_dev->evbit);
  185. for (i = 0; i < ARRAY_SIZE(key_map); i++)
  186. if (key_map[i])
  187. set_bit(key_map[i], input_dev->keybit);
  188. err = input_register_device(input_dev);
  189. if (err) {
  190. input_free_device(input_dev);
  191. return err;
  192. }
  193. input_dev->timer.function = msp430_ir_debounce;
  194. budget_ci->input_dev = input_dev;
  195. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_06);
  196. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  197. return 0;
  198. }
  199. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  200. {
  201. struct saa7146_dev *saa = budget_ci->budget.dev;
  202. struct input_dev *dev = budget_ci->input_dev;
  203. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_06);
  204. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  205. if (del_timer(&dev->timer)) {
  206. input_event(dev, EV_KEY, key_map[dev->repeat_key], 0);
  207. input_sync(dev);
  208. }
  209. input_unregister_device(dev);
  210. }
  211. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  212. {
  213. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  214. if (slot != 0)
  215. return -EINVAL;
  216. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  217. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  218. }
  219. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  220. {
  221. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  222. if (slot != 0)
  223. return -EINVAL;
  224. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  225. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  226. }
  227. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  228. {
  229. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  230. if (slot != 0)
  231. return -EINVAL;
  232. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  233. DEBIADDR_IO | (address & 3), 1, 1, 0);
  234. }
  235. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  236. {
  237. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  238. if (slot != 0)
  239. return -EINVAL;
  240. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  241. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  242. }
  243. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  244. {
  245. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  246. struct saa7146_dev *saa = budget_ci->budget.dev;
  247. if (slot != 0)
  248. return -EINVAL;
  249. if (budget_ci->ci_irq) {
  250. // trigger on RISING edge during reset so we know when READY is re-asserted
  251. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  252. }
  253. budget_ci->slot_status = SLOTSTATUS_RESET;
  254. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  255. msleep(1);
  256. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  257. CICONTROL_RESET, 1, 0);
  258. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  259. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  260. return 0;
  261. }
  262. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  263. {
  264. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  265. struct saa7146_dev *saa = budget_ci->budget.dev;
  266. if (slot != 0)
  267. return -EINVAL;
  268. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  269. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  270. return 0;
  271. }
  272. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  273. {
  274. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  275. struct saa7146_dev *saa = budget_ci->budget.dev;
  276. int tmp;
  277. if (slot != 0)
  278. return -EINVAL;
  279. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  280. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  281. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  282. tmp | CICONTROL_ENABLETS, 1, 0);
  283. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  284. return 0;
  285. }
  286. static void ciintf_interrupt(unsigned long data)
  287. {
  288. struct budget_ci *budget_ci = (struct budget_ci *) data;
  289. struct saa7146_dev *saa = budget_ci->budget.dev;
  290. unsigned int flags;
  291. // ensure we don't get spurious IRQs during initialisation
  292. if (!budget_ci->budget.ci_present)
  293. return;
  294. // read the CAM status
  295. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  296. if (flags & CICONTROL_CAMDETECT) {
  297. // GPIO should be set to trigger on falling edge if a CAM is present
  298. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  299. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  300. // CAM insertion IRQ
  301. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  302. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  303. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  304. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  305. // CAM ready (reset completed)
  306. budget_ci->slot_status = SLOTSTATUS_READY;
  307. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  308. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  309. // FR/DA IRQ
  310. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  311. }
  312. } else {
  313. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  314. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  315. // the CAM might not actually be ready yet.
  316. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  317. // generate a CAM removal IRQ if we haven't already
  318. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  319. // CAM removal IRQ
  320. budget_ci->slot_status = SLOTSTATUS_NONE;
  321. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  322. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  323. }
  324. }
  325. }
  326. static int ciintf_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
  327. {
  328. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  329. unsigned int flags;
  330. // ensure we don't get spurious IRQs during initialisation
  331. if (!budget_ci->budget.ci_present)
  332. return -EINVAL;
  333. // read the CAM status
  334. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  335. if (flags & CICONTROL_CAMDETECT) {
  336. // mark it as present if it wasn't before
  337. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  338. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  339. }
  340. // during a RESET, we check if we can read from IO memory to see when CAM is ready
  341. if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  342. if (ciintf_read_attribute_mem(ca, slot, 0) == 0x1d) {
  343. budget_ci->slot_status = SLOTSTATUS_READY;
  344. }
  345. }
  346. } else {
  347. budget_ci->slot_status = SLOTSTATUS_NONE;
  348. }
  349. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  350. if (budget_ci->slot_status & SLOTSTATUS_READY) {
  351. return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
  352. }
  353. return DVB_CA_EN50221_POLL_CAM_PRESENT;
  354. }
  355. return 0;
  356. }
  357. static int ciintf_init(struct budget_ci *budget_ci)
  358. {
  359. struct saa7146_dev *saa = budget_ci->budget.dev;
  360. int flags;
  361. int result;
  362. int ci_version;
  363. int ca_flags;
  364. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  365. // enable DEBI pins
  366. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16) | 0x800);
  367. // test if it is there
  368. ci_version = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0);
  369. if ((ci_version & 0xa0) != 0xa0) {
  370. result = -ENODEV;
  371. goto error;
  372. }
  373. // determine whether a CAM is present or not
  374. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  375. budget_ci->slot_status = SLOTSTATUS_NONE;
  376. if (flags & CICONTROL_CAMDETECT)
  377. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  378. // version 0xa2 of the CI firmware doesn't generate interrupts
  379. if (ci_version == 0xa2) {
  380. ca_flags = 0;
  381. budget_ci->ci_irq = 0;
  382. } else {
  383. ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  384. DVB_CA_EN50221_FLAG_IRQ_FR |
  385. DVB_CA_EN50221_FLAG_IRQ_DA;
  386. budget_ci->ci_irq = 1;
  387. }
  388. // register CI interface
  389. budget_ci->ca.owner = THIS_MODULE;
  390. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  391. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  392. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  393. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  394. budget_ci->ca.slot_reset = ciintf_slot_reset;
  395. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  396. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  397. budget_ci->ca.poll_slot_status = ciintf_poll_slot_status;
  398. budget_ci->ca.data = budget_ci;
  399. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  400. &budget_ci->ca,
  401. ca_flags, 1)) != 0) {
  402. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  403. goto error;
  404. }
  405. // Setup CI slot IRQ
  406. if (budget_ci->ci_irq) {
  407. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  408. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  409. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  410. } else {
  411. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  412. }
  413. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_03);
  414. }
  415. // enable interface
  416. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  417. CICONTROL_RESET, 1, 0);
  418. // success!
  419. printk("budget_ci: CI interface initialised\n");
  420. budget_ci->budget.ci_present = 1;
  421. // forge a fake CI IRQ so the CAM state is setup correctly
  422. if (budget_ci->ci_irq) {
  423. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  424. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  425. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  426. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  427. }
  428. return 0;
  429. error:
  430. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  431. return result;
  432. }
  433. static void ciintf_deinit(struct budget_ci *budget_ci)
  434. {
  435. struct saa7146_dev *saa = budget_ci->budget.dev;
  436. // disable CI interrupts
  437. if (budget_ci->ci_irq) {
  438. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_03);
  439. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  440. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  441. }
  442. // reset interface
  443. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  444. msleep(1);
  445. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  446. CICONTROL_RESET, 1, 0);
  447. // disable TS data stream to CI interface
  448. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  449. // release the CA device
  450. dvb_ca_en50221_release(&budget_ci->ca);
  451. // disable DEBI pins
  452. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  453. }
  454. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  455. {
  456. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  457. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  458. if (*isr & MASK_06)
  459. tasklet_schedule(&budget_ci->msp430_irq_tasklet);
  460. if (*isr & MASK_10)
  461. ttpci_budget_irq10_handler(dev, isr);
  462. if ((*isr & MASK_03) && (budget_ci->budget.ci_present) && (budget_ci->ci_irq))
  463. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  464. }
  465. static u8 philips_su1278_tt_inittab[] = {
  466. 0x01, 0x0f,
  467. 0x02, 0x30,
  468. 0x03, 0x00,
  469. 0x04, 0x5b,
  470. 0x05, 0x85,
  471. 0x06, 0x02,
  472. 0x07, 0x00,
  473. 0x08, 0x02,
  474. 0x09, 0x00,
  475. 0x0C, 0x01,
  476. 0x0D, 0x81,
  477. 0x0E, 0x44,
  478. 0x0f, 0x14,
  479. 0x10, 0x3c,
  480. 0x11, 0x84,
  481. 0x12, 0xda,
  482. 0x13, 0x97,
  483. 0x14, 0x95,
  484. 0x15, 0xc9,
  485. 0x16, 0x19,
  486. 0x17, 0x8c,
  487. 0x18, 0x59,
  488. 0x19, 0xf8,
  489. 0x1a, 0xfe,
  490. 0x1c, 0x7f,
  491. 0x1d, 0x00,
  492. 0x1e, 0x00,
  493. 0x1f, 0x50,
  494. 0x20, 0x00,
  495. 0x21, 0x00,
  496. 0x22, 0x00,
  497. 0x23, 0x00,
  498. 0x28, 0x00,
  499. 0x29, 0x28,
  500. 0x2a, 0x14,
  501. 0x2b, 0x0f,
  502. 0x2c, 0x09,
  503. 0x2d, 0x09,
  504. 0x31, 0x1f,
  505. 0x32, 0x19,
  506. 0x33, 0xfc,
  507. 0x34, 0x93,
  508. 0xff, 0xff
  509. };
  510. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  511. {
  512. stv0299_writereg(fe, 0x0e, 0x44);
  513. if (srate >= 10000000) {
  514. stv0299_writereg(fe, 0x13, 0x97);
  515. stv0299_writereg(fe, 0x14, 0x95);
  516. stv0299_writereg(fe, 0x15, 0xc9);
  517. stv0299_writereg(fe, 0x17, 0x8c);
  518. stv0299_writereg(fe, 0x1a, 0xfe);
  519. stv0299_writereg(fe, 0x1c, 0x7f);
  520. stv0299_writereg(fe, 0x2d, 0x09);
  521. } else {
  522. stv0299_writereg(fe, 0x13, 0x99);
  523. stv0299_writereg(fe, 0x14, 0x8d);
  524. stv0299_writereg(fe, 0x15, 0xce);
  525. stv0299_writereg(fe, 0x17, 0x43);
  526. stv0299_writereg(fe, 0x1a, 0x1d);
  527. stv0299_writereg(fe, 0x1c, 0x12);
  528. stv0299_writereg(fe, 0x2d, 0x05);
  529. }
  530. stv0299_writereg(fe, 0x0e, 0x23);
  531. stv0299_writereg(fe, 0x0f, 0x94);
  532. stv0299_writereg(fe, 0x10, 0x39);
  533. stv0299_writereg(fe, 0x15, 0xc9);
  534. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  535. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  536. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  537. return 0;
  538. }
  539. static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe,
  540. struct dvb_frontend_parameters *params)
  541. {
  542. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  543. u32 div;
  544. u8 buf[4];
  545. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  546. if ((params->frequency < 950000) || (params->frequency > 2150000))
  547. return -EINVAL;
  548. div = (params->frequency + (500 - 1)) / 500; // round correctly
  549. buf[0] = (div >> 8) & 0x7f;
  550. buf[1] = div & 0xff;
  551. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  552. buf[3] = 0x20;
  553. if (params->u.qpsk.symbol_rate < 4000000)
  554. buf[3] |= 1;
  555. if (params->frequency < 1250000)
  556. buf[3] |= 0;
  557. else if (params->frequency < 1550000)
  558. buf[3] |= 0x40;
  559. else if (params->frequency < 2050000)
  560. buf[3] |= 0x80;
  561. else if (params->frequency < 2150000)
  562. buf[3] |= 0xC0;
  563. if (fe->ops.i2c_gate_ctrl)
  564. fe->ops.i2c_gate_ctrl(fe, 1);
  565. if (i2c_transfer(&budget_ci->budget.i2c_adap, &msg, 1) != 1)
  566. return -EIO;
  567. return 0;
  568. }
  569. static struct stv0299_config philips_su1278_tt_config = {
  570. .demod_address = 0x68,
  571. .inittab = philips_su1278_tt_inittab,
  572. .mclk = 64000000UL,
  573. .invert = 0,
  574. .skip_reinit = 1,
  575. .lock_output = STV0229_LOCKOUTPUT_1,
  576. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  577. .min_delay_ms = 50,
  578. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  579. };
  580. static int philips_tdm1316l_tuner_init(struct dvb_frontend *fe)
  581. {
  582. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  583. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  584. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  585. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  586. sizeof(td1316_init) };
  587. // setup PLL configuration
  588. if (fe->ops.i2c_gate_ctrl)
  589. fe->ops.i2c_gate_ctrl(fe, 1);
  590. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  591. return -EIO;
  592. msleep(1);
  593. // disable the mc44BC374c (do not check for errors)
  594. tuner_msg.addr = 0x65;
  595. tuner_msg.buf = disable_mc44BC374c;
  596. tuner_msg.len = sizeof(disable_mc44BC374c);
  597. if (fe->ops.i2c_gate_ctrl)
  598. fe->ops.i2c_gate_ctrl(fe, 1);
  599. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  600. if (fe->ops.i2c_gate_ctrl)
  601. fe->ops.i2c_gate_ctrl(fe, 1);
  602. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  603. }
  604. return 0;
  605. }
  606. static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  607. {
  608. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  609. u8 tuner_buf[4];
  610. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  611. int tuner_frequency = 0;
  612. u8 band, cp, filter;
  613. // determine charge pump
  614. tuner_frequency = params->frequency + 36130000;
  615. if (tuner_frequency < 87000000)
  616. return -EINVAL;
  617. else if (tuner_frequency < 130000000)
  618. cp = 3;
  619. else if (tuner_frequency < 160000000)
  620. cp = 5;
  621. else if (tuner_frequency < 200000000)
  622. cp = 6;
  623. else if (tuner_frequency < 290000000)
  624. cp = 3;
  625. else if (tuner_frequency < 420000000)
  626. cp = 5;
  627. else if (tuner_frequency < 480000000)
  628. cp = 6;
  629. else if (tuner_frequency < 620000000)
  630. cp = 3;
  631. else if (tuner_frequency < 830000000)
  632. cp = 5;
  633. else if (tuner_frequency < 895000000)
  634. cp = 7;
  635. else
  636. return -EINVAL;
  637. // determine band
  638. if (params->frequency < 49000000)
  639. return -EINVAL;
  640. else if (params->frequency < 159000000)
  641. band = 1;
  642. else if (params->frequency < 444000000)
  643. band = 2;
  644. else if (params->frequency < 861000000)
  645. band = 4;
  646. else
  647. return -EINVAL;
  648. // setup PLL filter and TDA9889
  649. switch (params->u.ofdm.bandwidth) {
  650. case BANDWIDTH_6_MHZ:
  651. tda1004x_writereg(fe, 0x0C, 0x14);
  652. filter = 0;
  653. break;
  654. case BANDWIDTH_7_MHZ:
  655. tda1004x_writereg(fe, 0x0C, 0x80);
  656. filter = 0;
  657. break;
  658. case BANDWIDTH_8_MHZ:
  659. tda1004x_writereg(fe, 0x0C, 0x14);
  660. filter = 1;
  661. break;
  662. default:
  663. return -EINVAL;
  664. }
  665. // calculate divisor
  666. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  667. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  668. // setup tuner buffer
  669. tuner_buf[0] = tuner_frequency >> 8;
  670. tuner_buf[1] = tuner_frequency & 0xff;
  671. tuner_buf[2] = 0xca;
  672. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  673. if (fe->ops.i2c_gate_ctrl)
  674. fe->ops.i2c_gate_ctrl(fe, 1);
  675. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  676. return -EIO;
  677. msleep(1);
  678. return 0;
  679. }
  680. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  681. const struct firmware **fw, char *name)
  682. {
  683. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  684. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  685. }
  686. static struct tda1004x_config philips_tdm1316l_config = {
  687. .demod_address = 0x8,
  688. .invert = 0,
  689. .invert_oclk = 0,
  690. .xtal_freq = TDA10046_XTAL_4M,
  691. .agc_config = TDA10046_AGC_DEFAULT,
  692. .if_freq = TDA10046_FREQ_3617,
  693. .request_firmware = philips_tdm1316l_request_firmware,
  694. };
  695. static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  696. {
  697. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  698. u8 tuner_buf[5];
  699. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  700. .flags = 0,
  701. .buf = tuner_buf,
  702. .len = sizeof(tuner_buf) };
  703. int tuner_frequency = 0;
  704. u8 band, cp, filter;
  705. // determine charge pump
  706. tuner_frequency = params->frequency + 36125000;
  707. if (tuner_frequency < 87000000)
  708. return -EINVAL;
  709. else if (tuner_frequency < 130000000) {
  710. cp = 3;
  711. band = 1;
  712. } else if (tuner_frequency < 160000000) {
  713. cp = 5;
  714. band = 1;
  715. } else if (tuner_frequency < 200000000) {
  716. cp = 6;
  717. band = 1;
  718. } else if (tuner_frequency < 290000000) {
  719. cp = 3;
  720. band = 2;
  721. } else if (tuner_frequency < 420000000) {
  722. cp = 5;
  723. band = 2;
  724. } else if (tuner_frequency < 480000000) {
  725. cp = 6;
  726. band = 2;
  727. } else if (tuner_frequency < 620000000) {
  728. cp = 3;
  729. band = 4;
  730. } else if (tuner_frequency < 830000000) {
  731. cp = 5;
  732. band = 4;
  733. } else if (tuner_frequency < 895000000) {
  734. cp = 7;
  735. band = 4;
  736. } else
  737. return -EINVAL;
  738. // assume PLL filter should always be 8MHz for the moment.
  739. filter = 1;
  740. // calculate divisor
  741. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  742. // setup tuner buffer
  743. tuner_buf[0] = tuner_frequency >> 8;
  744. tuner_buf[1] = tuner_frequency & 0xff;
  745. tuner_buf[2] = 0xc8;
  746. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  747. tuner_buf[4] = 0x80;
  748. if (fe->ops.i2c_gate_ctrl)
  749. fe->ops.i2c_gate_ctrl(fe, 1);
  750. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  751. return -EIO;
  752. msleep(50);
  753. if (fe->ops.i2c_gate_ctrl)
  754. fe->ops.i2c_gate_ctrl(fe, 1);
  755. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  756. return -EIO;
  757. msleep(1);
  758. return 0;
  759. }
  760. static u8 dvbc_philips_tdm1316l_inittab[] = {
  761. 0x80, 0x01,
  762. 0x80, 0x00,
  763. 0x81, 0x01,
  764. 0x81, 0x00,
  765. 0x00, 0x09,
  766. 0x01, 0x69,
  767. 0x03, 0x00,
  768. 0x04, 0x00,
  769. 0x07, 0x00,
  770. 0x08, 0x00,
  771. 0x20, 0x00,
  772. 0x21, 0x40,
  773. 0x22, 0x00,
  774. 0x23, 0x00,
  775. 0x24, 0x40,
  776. 0x25, 0x88,
  777. 0x30, 0xff,
  778. 0x31, 0x00,
  779. 0x32, 0xff,
  780. 0x33, 0x00,
  781. 0x34, 0x50,
  782. 0x35, 0x7f,
  783. 0x36, 0x00,
  784. 0x37, 0x20,
  785. 0x38, 0x00,
  786. 0x40, 0x1c,
  787. 0x41, 0xff,
  788. 0x42, 0x29,
  789. 0x43, 0x20,
  790. 0x44, 0xff,
  791. 0x45, 0x00,
  792. 0x46, 0x00,
  793. 0x49, 0x04,
  794. 0x4a, 0x00,
  795. 0x4b, 0x7b,
  796. 0x52, 0x30,
  797. 0x55, 0xae,
  798. 0x56, 0x47,
  799. 0x57, 0xe1,
  800. 0x58, 0x3a,
  801. 0x5a, 0x1e,
  802. 0x5b, 0x34,
  803. 0x60, 0x00,
  804. 0x63, 0x00,
  805. 0x64, 0x00,
  806. 0x65, 0x00,
  807. 0x66, 0x00,
  808. 0x67, 0x00,
  809. 0x68, 0x00,
  810. 0x69, 0x00,
  811. 0x6a, 0x02,
  812. 0x6b, 0x00,
  813. 0x70, 0xff,
  814. 0x71, 0x00,
  815. 0x72, 0x00,
  816. 0x73, 0x00,
  817. 0x74, 0x0c,
  818. 0x80, 0x00,
  819. 0x81, 0x00,
  820. 0x82, 0x00,
  821. 0x83, 0x00,
  822. 0x84, 0x04,
  823. 0x85, 0x80,
  824. 0x86, 0x24,
  825. 0x87, 0x78,
  826. 0x88, 0x10,
  827. 0x89, 0x00,
  828. 0x90, 0x01,
  829. 0x91, 0x01,
  830. 0xa0, 0x04,
  831. 0xa1, 0x00,
  832. 0xa2, 0x00,
  833. 0xb0, 0x91,
  834. 0xb1, 0x0b,
  835. 0xc0, 0x53,
  836. 0xc1, 0x70,
  837. 0xc2, 0x12,
  838. 0xd0, 0x00,
  839. 0xd1, 0x00,
  840. 0xd2, 0x00,
  841. 0xd3, 0x00,
  842. 0xd4, 0x00,
  843. 0xd5, 0x00,
  844. 0xde, 0x00,
  845. 0xdf, 0x00,
  846. 0x61, 0x38,
  847. 0x62, 0x0a,
  848. 0x53, 0x13,
  849. 0x59, 0x08,
  850. 0xff, 0xff,
  851. };
  852. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  853. .demod_address = 0x1c,
  854. .inittab = dvbc_philips_tdm1316l_inittab,
  855. .invert = 0,
  856. .stop_during_read = 1,
  857. };
  858. static void frontend_init(struct budget_ci *budget_ci)
  859. {
  860. switch (budget_ci->budget.dev->pci->subsystem_device) {
  861. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  862. budget_ci->budget.dvb_frontend =
  863. dvb_attach(stv0299_attach, &alps_bsru6_config, &budget_ci->budget.i2c_adap);
  864. if (budget_ci->budget.dvb_frontend) {
  865. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  866. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  867. break;
  868. }
  869. break;
  870. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  871. budget_ci->budget.dvb_frontend =
  872. dvb_attach(stv0299_attach, &philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  873. if (budget_ci->budget.dvb_frontend) {
  874. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_su1278_tt_tuner_set_params;
  875. break;
  876. }
  877. break;
  878. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  879. budget_ci->tuner_pll_address = 0x61;
  880. budget_ci->budget.dvb_frontend =
  881. dvb_attach(stv0297_attach, &dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  882. if (budget_ci->budget.dvb_frontend) {
  883. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = dvbc_philips_tdm1316l_tuner_set_params;
  884. break;
  885. }
  886. break;
  887. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  888. budget_ci->tuner_pll_address = 0x63;
  889. budget_ci->budget.dvb_frontend =
  890. dvb_attach(tda10045_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  891. if (budget_ci->budget.dvb_frontend) {
  892. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  893. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  894. break;
  895. }
  896. break;
  897. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  898. budget_ci->tuner_pll_address = 0x60;
  899. philips_tdm1316l_config.invert = 1;
  900. budget_ci->budget.dvb_frontend =
  901. dvb_attach(tda10046_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  902. if (budget_ci->budget.dvb_frontend) {
  903. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  904. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  905. break;
  906. }
  907. break;
  908. case 0x1017: // TT S-1500 PCI
  909. budget_ci->budget.dvb_frontend = dvb_attach(stv0299_attach, &alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  910. if (budget_ci->budget.dvb_frontend) {
  911. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  912. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  913. budget_ci->budget.dvb_frontend->ops.dishnetwork_send_legacy_command = NULL;
  914. if (dvb_attach(lnbp21_attach, budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0) == NULL) {
  915. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  916. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  917. budget_ci->budget.dvb_frontend = NULL;
  918. }
  919. }
  920. break;
  921. }
  922. if (budget_ci->budget.dvb_frontend == NULL) {
  923. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  924. budget_ci->budget.dev->pci->vendor,
  925. budget_ci->budget.dev->pci->device,
  926. budget_ci->budget.dev->pci->subsystem_vendor,
  927. budget_ci->budget.dev->pci->subsystem_device);
  928. } else {
  929. if (dvb_register_frontend
  930. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  931. printk("budget-ci: Frontend registration failed!\n");
  932. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  933. budget_ci->budget.dvb_frontend = NULL;
  934. }
  935. }
  936. }
  937. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  938. {
  939. struct budget_ci *budget_ci;
  940. int err;
  941. if (!(budget_ci = kmalloc(sizeof(struct budget_ci), GFP_KERNEL)))
  942. return -ENOMEM;
  943. dprintk(2, "budget_ci: %p\n", budget_ci);
  944. budget_ci->budget.ci_present = 0;
  945. dev->ext_priv = budget_ci;
  946. if ((err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE))) {
  947. kfree(budget_ci);
  948. return err;
  949. }
  950. tasklet_init(&budget_ci->msp430_irq_tasklet, msp430_ir_interrupt,
  951. (unsigned long) budget_ci);
  952. msp430_ir_init(budget_ci);
  953. ciintf_init(budget_ci);
  954. budget_ci->budget.dvb_adapter.priv = budget_ci;
  955. frontend_init(budget_ci);
  956. ttpci_budget_init_hooks(&budget_ci->budget);
  957. return 0;
  958. }
  959. static int budget_ci_detach(struct saa7146_dev *dev)
  960. {
  961. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  962. struct saa7146_dev *saa = budget_ci->budget.dev;
  963. int err;
  964. if (budget_ci->budget.ci_present)
  965. ciintf_deinit(budget_ci);
  966. if (budget_ci->budget.dvb_frontend) {
  967. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  968. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  969. }
  970. err = ttpci_budget_deinit(&budget_ci->budget);
  971. tasklet_kill(&budget_ci->msp430_irq_tasklet);
  972. msp430_ir_deinit(budget_ci);
  973. // disable frontend and CI interface
  974. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  975. kfree(budget_ci);
  976. return err;
  977. }
  978. static struct saa7146_extension budget_extension;
  979. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  980. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  981. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  982. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  983. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  984. static struct pci_device_id pci_tbl[] = {
  985. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  986. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  987. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  988. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  989. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  990. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  991. {
  992. .vendor = 0,
  993. }
  994. };
  995. MODULE_DEVICE_TABLE(pci, pci_tbl);
  996. static struct saa7146_extension budget_extension = {
  997. .name = "budget_ci dvb",
  998. .flags = SAA7146_I2C_SHORT_DELAY,
  999. .module = THIS_MODULE,
  1000. .pci_tbl = &pci_tbl[0],
  1001. .attach = budget_ci_attach,
  1002. .detach = budget_ci_detach,
  1003. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  1004. .irq_func = budget_ci_irq,
  1005. };
  1006. static int __init budget_ci_init(void)
  1007. {
  1008. return saa7146_register_extension(&budget_extension);
  1009. }
  1010. static void __exit budget_ci_exit(void)
  1011. {
  1012. saa7146_unregister_extension(&budget_extension);
  1013. }
  1014. module_init(budget_ci_init);
  1015. module_exit(budget_ci_exit);
  1016. MODULE_LICENSE("GPL");
  1017. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  1018. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  1019. "budget PCI DVB cards w/ CI-module produced by "
  1020. "Siemens, Technotrend, Hauppauge");