saa7134-dvb.c 32 KB

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  1. /*
  2. *
  3. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  4. *
  5. * Extended 3 / 2005 by Hartmut Hackmann to support various
  6. * cards with the tda10046 DVB-T channel decoder
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/kthread.h>
  29. #include <linux/suspend.h>
  30. #include "saa7134-reg.h"
  31. #include "saa7134.h"
  32. #include <media/v4l2-common.h>
  33. #include "dvb-pll.h"
  34. #ifdef HAVE_MT352
  35. # include "mt352.h"
  36. # include "mt352_priv.h" /* FIXME */
  37. #endif
  38. #ifdef HAVE_TDA1004X
  39. # include "tda1004x.h"
  40. #endif
  41. #ifdef HAVE_NXT200X
  42. # include "nxt200x.h"
  43. #endif
  44. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  45. MODULE_LICENSE("GPL");
  46. static unsigned int antenna_pwr = 0;
  47. module_param(antenna_pwr, int, 0444);
  48. MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
  49. /* ------------------------------------------------------------------ */
  50. #ifdef HAVE_MT352
  51. static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
  52. {
  53. u32 ok;
  54. if (!on) {
  55. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  56. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  57. return 0;
  58. }
  59. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  60. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  61. udelay(10);
  62. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
  63. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  64. udelay(10);
  65. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  66. udelay(10);
  67. ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
  68. printk("%s: %s %s\n", dev->name, __FUNCTION__,
  69. ok ? "on" : "off");
  70. if (!ok)
  71. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  72. return ok;
  73. }
  74. static int mt352_pinnacle_init(struct dvb_frontend* fe)
  75. {
  76. static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
  77. static u8 reset [] = { RESET, 0x80 };
  78. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  79. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
  80. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
  81. static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
  82. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
  83. static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
  84. static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
  85. struct saa7134_dev *dev= fe->dvb->priv;
  86. printk("%s: %s called\n",dev->name,__FUNCTION__);
  87. mt352_write(fe, clock_config, sizeof(clock_config));
  88. udelay(200);
  89. mt352_write(fe, reset, sizeof(reset));
  90. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  91. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  92. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  93. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  94. mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
  95. mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
  96. mt352_write(fe, irq_cfg, sizeof(irq_cfg));
  97. return 0;
  98. }
  99. static int mt352_aver777_init(struct dvb_frontend* fe)
  100. {
  101. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
  102. static u8 reset [] = { RESET, 0x80 };
  103. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  104. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
  105. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
  106. mt352_write(fe, clock_config, sizeof(clock_config));
  107. udelay(200);
  108. mt352_write(fe, reset, sizeof(reset));
  109. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  110. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  111. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  112. return 0;
  113. }
  114. static int mt352_pinnacle_pll_set(struct dvb_frontend* fe,
  115. struct dvb_frontend_parameters* params,
  116. u8* pllbuf)
  117. {
  118. u8 off[] = { 0x00, 0xf1};
  119. u8 on[] = { 0x00, 0x71};
  120. struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
  121. struct saa7134_dev *dev = fe->dvb->priv;
  122. struct v4l2_frequency f;
  123. /* set frequency (mt2050) */
  124. f.tuner = 0;
  125. f.type = V4L2_TUNER_DIGITAL_TV;
  126. f.frequency = params->frequency / 1000 * 16 / 1000;
  127. i2c_transfer(&dev->i2c_adap, &msg, 1);
  128. saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
  129. msg.buf = on;
  130. i2c_transfer(&dev->i2c_adap, &msg, 1);
  131. pinnacle_antenna_pwr(dev, antenna_pwr);
  132. /* mt352 setup */
  133. mt352_pinnacle_init(fe);
  134. pllbuf[0] = 0xc2;
  135. pllbuf[1] = 0x00;
  136. pllbuf[2] = 0x00;
  137. pllbuf[3] = 0x80;
  138. pllbuf[4] = 0x00;
  139. return 0;
  140. }
  141. static int mt352_aver777_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, u8* pllbuf)
  142. {
  143. pllbuf[0] = 0xc2;
  144. dvb_pll_configure(&dvb_pll_philips_td1316, pllbuf+1,
  145. params->frequency,
  146. params->u.ofdm.bandwidth);
  147. return 0;
  148. }
  149. static struct mt352_config pinnacle_300i = {
  150. .demod_address = 0x3c >> 1,
  151. .adc_clock = 20333,
  152. .if2 = 36150,
  153. .no_tuner = 1,
  154. .demod_init = mt352_pinnacle_init,
  155. .pll_set = mt352_pinnacle_pll_set,
  156. };
  157. static struct mt352_config avermedia_777 = {
  158. .demod_address = 0xf,
  159. .demod_init = mt352_aver777_init,
  160. .pll_set = mt352_aver777_pll_set,
  161. };
  162. #endif
  163. /* ------------------------------------------------------------------ */
  164. #ifdef HAVE_TDA1004X
  165. static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  166. {
  167. struct saa7134_dev *dev = fe->dvb->priv;
  168. u8 tuner_buf[4];
  169. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
  170. sizeof(tuner_buf) };
  171. int tuner_frequency = 0;
  172. u8 band, cp, filter;
  173. /* determine charge pump */
  174. tuner_frequency = params->frequency + 36166000;
  175. if (tuner_frequency < 87000000)
  176. return -EINVAL;
  177. else if (tuner_frequency < 130000000)
  178. cp = 3;
  179. else if (tuner_frequency < 160000000)
  180. cp = 5;
  181. else if (tuner_frequency < 200000000)
  182. cp = 6;
  183. else if (tuner_frequency < 290000000)
  184. cp = 3;
  185. else if (tuner_frequency < 420000000)
  186. cp = 5;
  187. else if (tuner_frequency < 480000000)
  188. cp = 6;
  189. else if (tuner_frequency < 620000000)
  190. cp = 3;
  191. else if (tuner_frequency < 830000000)
  192. cp = 5;
  193. else if (tuner_frequency < 895000000)
  194. cp = 7;
  195. else
  196. return -EINVAL;
  197. /* determine band */
  198. if (params->frequency < 49000000)
  199. return -EINVAL;
  200. else if (params->frequency < 161000000)
  201. band = 1;
  202. else if (params->frequency < 444000000)
  203. band = 2;
  204. else if (params->frequency < 861000000)
  205. band = 4;
  206. else
  207. return -EINVAL;
  208. /* setup PLL filter */
  209. switch (params->u.ofdm.bandwidth) {
  210. case BANDWIDTH_6_MHZ:
  211. filter = 0;
  212. break;
  213. case BANDWIDTH_7_MHZ:
  214. filter = 0;
  215. break;
  216. case BANDWIDTH_8_MHZ:
  217. filter = 1;
  218. break;
  219. default:
  220. return -EINVAL;
  221. }
  222. /* calculate divisor
  223. * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
  224. */
  225. tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
  226. /* setup tuner buffer */
  227. tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
  228. tuner_buf[1] = tuner_frequency & 0xff;
  229. tuner_buf[2] = 0xca;
  230. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  231. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  232. return -EIO;
  233. msleep(1);
  234. return 0;
  235. }
  236. static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
  237. {
  238. struct saa7134_dev *dev = fe->dvb->priv;
  239. static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  240. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
  241. /* setup PLL configuration */
  242. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  243. return -EIO;
  244. msleep(1);
  245. return 0;
  246. }
  247. /* ------------------------------------------------------------------ */
  248. static int philips_tu1216_pll_60_init(struct dvb_frontend *fe)
  249. {
  250. return philips_tda6651_pll_init(0x60, fe);
  251. }
  252. static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  253. {
  254. return philips_tda6651_pll_set(0x60, fe, params);
  255. }
  256. static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
  257. const struct firmware **fw, char *name)
  258. {
  259. struct saa7134_dev *dev = fe->dvb->priv;
  260. return request_firmware(fw, name, &dev->pci->dev);
  261. }
  262. static struct tda1004x_config philips_tu1216_60_config = {
  263. .demod_address = 0x8,
  264. .invert = 1,
  265. .invert_oclk = 0,
  266. .xtal_freq = TDA10046_XTAL_4M,
  267. .agc_config = TDA10046_AGC_DEFAULT,
  268. .if_freq = TDA10046_FREQ_3617,
  269. .pll_init = philips_tu1216_pll_60_init,
  270. .pll_set = philips_tu1216_pll_60_set,
  271. .pll_sleep = NULL,
  272. .request_firmware = philips_tu1216_request_firmware,
  273. };
  274. /* ------------------------------------------------------------------ */
  275. static int philips_tu1216_pll_61_init(struct dvb_frontend *fe)
  276. {
  277. return philips_tda6651_pll_init(0x61, fe);
  278. }
  279. static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  280. {
  281. return philips_tda6651_pll_set(0x61, fe, params);
  282. }
  283. static struct tda1004x_config philips_tu1216_61_config = {
  284. .demod_address = 0x8,
  285. .invert = 1,
  286. .invert_oclk = 0,
  287. .xtal_freq = TDA10046_XTAL_4M,
  288. .agc_config = TDA10046_AGC_DEFAULT,
  289. .if_freq = TDA10046_FREQ_3617,
  290. .pll_init = philips_tu1216_pll_61_init,
  291. .pll_set = philips_tu1216_pll_61_set,
  292. .pll_sleep = NULL,
  293. .request_firmware = philips_tu1216_request_firmware,
  294. };
  295. /* ------------------------------------------------------------------ */
  296. static int philips_europa_pll_init(struct dvb_frontend *fe)
  297. {
  298. struct saa7134_dev *dev = fe->dvb->priv;
  299. static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
  300. struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  301. /* setup PLL configuration */
  302. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  303. return -EIO;
  304. msleep(1);
  305. /* switch the board to dvb mode */
  306. init_msg.addr = 0x43;
  307. init_msg.len = 0x02;
  308. msg[0] = 0x00;
  309. msg[1] = 0x40;
  310. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  311. return -EIO;
  312. return 0;
  313. }
  314. static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  315. {
  316. return philips_tda6651_pll_set(0x61, fe, params);
  317. }
  318. static void philips_europa_analog(struct dvb_frontend *fe)
  319. {
  320. struct saa7134_dev *dev = fe->dvb->priv;
  321. /* this message actually turns the tuner back to analog mode */
  322. static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
  323. struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  324. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  325. msleep(1);
  326. /* switch the board to analog mode */
  327. analog_msg.addr = 0x43;
  328. analog_msg.len = 0x02;
  329. msg[0] = 0x00;
  330. msg[1] = 0x14;
  331. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  332. }
  333. static struct tda1004x_config philips_europa_config = {
  334. .demod_address = 0x8,
  335. .invert = 0,
  336. .invert_oclk = 0,
  337. .xtal_freq = TDA10046_XTAL_4M,
  338. .agc_config = TDA10046_AGC_IFO_AUTO_POS,
  339. .if_freq = TDA10046_FREQ_052,
  340. .pll_init = philips_europa_pll_init,
  341. .pll_set = philips_td1316_pll_set,
  342. .pll_sleep = philips_europa_analog,
  343. .request_firmware = NULL,
  344. };
  345. /* ------------------------------------------------------------------ */
  346. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  347. {
  348. struct saa7134_dev *dev = fe->dvb->priv;
  349. /* this message is to set up ATC and ALC */
  350. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  351. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  352. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  353. return -EIO;
  354. msleep(1);
  355. return 0;
  356. }
  357. static void philips_fmd1216_analog(struct dvb_frontend *fe)
  358. {
  359. struct saa7134_dev *dev = fe->dvb->priv;
  360. /* this message actually turns the tuner back to analog mode */
  361. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
  362. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  363. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  364. msleep(1);
  365. fmd1216_init[2] = 0x86;
  366. fmd1216_init[3] = 0x54;
  367. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  368. msleep(1);
  369. }
  370. static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  371. {
  372. struct saa7134_dev *dev = fe->dvb->priv;
  373. u8 tuner_buf[4];
  374. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
  375. sizeof(tuner_buf) };
  376. int tuner_frequency = 0;
  377. int divider = 0;
  378. u8 band, mode, cp;
  379. /* determine charge pump */
  380. tuner_frequency = params->frequency + 36130000;
  381. if (tuner_frequency < 87000000)
  382. return -EINVAL;
  383. /* low band */
  384. else if (tuner_frequency < 180000000) {
  385. band = 1;
  386. mode = 7;
  387. cp = 0;
  388. } else if (tuner_frequency < 195000000) {
  389. band = 1;
  390. mode = 6;
  391. cp = 1;
  392. /* mid band */
  393. } else if (tuner_frequency < 366000000) {
  394. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  395. band = 10;
  396. } else {
  397. band = 2;
  398. }
  399. mode = 7;
  400. cp = 0;
  401. } else if (tuner_frequency < 478000000) {
  402. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  403. band = 10;
  404. } else {
  405. band = 2;
  406. }
  407. mode = 6;
  408. cp = 1;
  409. /* high band */
  410. } else if (tuner_frequency < 662000000) {
  411. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  412. band = 12;
  413. } else {
  414. band = 4;
  415. }
  416. mode = 7;
  417. cp = 0;
  418. } else if (tuner_frequency < 840000000) {
  419. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  420. band = 12;
  421. } else {
  422. band = 4;
  423. }
  424. mode = 6;
  425. cp = 1;
  426. } else {
  427. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  428. band = 12;
  429. } else {
  430. band = 4;
  431. }
  432. mode = 7;
  433. cp = 1;
  434. }
  435. /* calculate divisor */
  436. /* ((36166000 + Finput) / 166666) rounded! */
  437. divider = (tuner_frequency + 83333) / 166667;
  438. /* setup tuner buffer */
  439. tuner_buf[0] = (divider >> 8) & 0x7f;
  440. tuner_buf[1] = divider & 0xff;
  441. tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
  442. tuner_buf[3] = 0x40 | band;
  443. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  444. return -EIO;
  445. return 0;
  446. }
  447. static struct tda1004x_config medion_cardbus = {
  448. .demod_address = 0x08,
  449. .invert = 1,
  450. .invert_oclk = 0,
  451. .xtal_freq = TDA10046_XTAL_16M,
  452. .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
  453. .if_freq = TDA10046_FREQ_3613,
  454. .pll_init = philips_fmd1216_pll_init,
  455. .pll_set = philips_fmd1216_pll_set,
  456. .pll_sleep = philips_fmd1216_analog,
  457. .request_firmware = NULL,
  458. };
  459. /* ------------------------------------------------------------------ */
  460. struct tda827x_data {
  461. u32 lomax;
  462. u8 spd;
  463. u8 bs;
  464. u8 bp;
  465. u8 cp;
  466. u8 gc3;
  467. u8 div1p5;
  468. };
  469. static struct tda827x_data tda827x_dvbt[] = {
  470. { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  471. { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  472. { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  473. { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  474. { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  475. { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  476. { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  477. { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  478. { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  479. { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  480. { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  481. { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
  482. { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  483. { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  484. { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  485. { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  486. { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  487. { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  488. { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  489. { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  490. { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  491. { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  492. { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  493. { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  494. { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  495. { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  496. { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  497. { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  498. { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
  499. };
  500. static int philips_tda827x_pll_init(struct dvb_frontend *fe)
  501. {
  502. return 0;
  503. }
  504. static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  505. {
  506. struct saa7134_dev *dev = fe->dvb->priv;
  507. u8 tuner_buf[14];
  508. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
  509. .len = sizeof(tuner_buf) };
  510. int i, tuner_freq, if_freq;
  511. u32 N;
  512. switch (params->u.ofdm.bandwidth) {
  513. case BANDWIDTH_6_MHZ:
  514. if_freq = 4000000;
  515. break;
  516. case BANDWIDTH_7_MHZ:
  517. if_freq = 4500000;
  518. break;
  519. default: /* 8 MHz or Auto */
  520. if_freq = 5000000;
  521. break;
  522. }
  523. tuner_freq = params->frequency + if_freq;
  524. i = 0;
  525. while (tda827x_dvbt[i].lomax < tuner_freq) {
  526. if(tda827x_dvbt[i + 1].lomax == 0)
  527. break;
  528. i++;
  529. }
  530. N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
  531. tuner_buf[0] = 0;
  532. tuner_buf[1] = (N>>8) | 0x40;
  533. tuner_buf[2] = N & 0xff;
  534. tuner_buf[3] = 0;
  535. tuner_buf[4] = 0x52;
  536. tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
  537. (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
  538. tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
  539. tuner_buf[7] = 0xbf;
  540. tuner_buf[8] = 0x2a;
  541. tuner_buf[9] = 0x05;
  542. tuner_buf[10] = 0xff;
  543. tuner_buf[11] = 0x00;
  544. tuner_buf[12] = 0x00;
  545. tuner_buf[13] = 0x40;
  546. tuner_msg.len = 14;
  547. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  548. return -EIO;
  549. msleep(500);
  550. /* correct CP value */
  551. tuner_buf[0] = 0x30;
  552. tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
  553. tuner_msg.len = 2;
  554. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  555. return 0;
  556. }
  557. static void philips_tda827x_pll_sleep(struct dvb_frontend *fe)
  558. {
  559. struct saa7134_dev *dev = fe->dvb->priv;
  560. static u8 tda827x_sleep[] = { 0x30, 0xd0};
  561. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
  562. .len = sizeof(tda827x_sleep) };
  563. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  564. }
  565. static struct tda1004x_config tda827x_lifeview_config = {
  566. .demod_address = 0x08,
  567. .invert = 1,
  568. .invert_oclk = 0,
  569. .xtal_freq = TDA10046_XTAL_16M,
  570. .agc_config = TDA10046_AGC_TDA827X,
  571. .if_freq = TDA10046_FREQ_045,
  572. .pll_init = philips_tda827x_pll_init,
  573. .pll_set = philips_tda827x_pll_set,
  574. .pll_sleep = philips_tda827x_pll_sleep,
  575. .request_firmware = NULL,
  576. };
  577. /* ------------------------------------------------------------------ */
  578. struct tda827xa_data {
  579. u32 lomax;
  580. u8 svco;
  581. u8 spd;
  582. u8 scr;
  583. u8 sbs;
  584. u8 gc3;
  585. };
  586. static struct tda827xa_data tda827xa_dvbt[] = {
  587. { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
  588. { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  589. { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  590. { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  591. { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
  592. { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  593. { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  594. { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  595. { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  596. { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  597. { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  598. { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  599. { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  600. { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  601. { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  602. { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  603. { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  604. { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
  605. { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  606. { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  607. { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  608. { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  609. { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  610. { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  611. { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  612. { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
  613. { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
  614. static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  615. {
  616. struct saa7134_dev *dev = fe->dvb->priv;
  617. u8 tuner_buf[14];
  618. unsigned char reg2[2];
  619. struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
  620. int i, tuner_freq, if_freq;
  621. u32 N;
  622. switch (params->u.ofdm.bandwidth) {
  623. case BANDWIDTH_6_MHZ:
  624. if_freq = 4000000;
  625. break;
  626. case BANDWIDTH_7_MHZ:
  627. if_freq = 4500000;
  628. break;
  629. default: /* 8 MHz or Auto */
  630. if_freq = 5000000;
  631. break;
  632. }
  633. tuner_freq = params->frequency + if_freq;
  634. i = 0;
  635. while (tda827xa_dvbt[i].lomax < tuner_freq) {
  636. if(tda827xa_dvbt[i + 1].lomax == 0)
  637. break;
  638. i++;
  639. }
  640. N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
  641. tuner_buf[0] = 0; // subaddress
  642. tuner_buf[1] = N >> 8;
  643. tuner_buf[2] = N & 0xff;
  644. tuner_buf[3] = 0;
  645. tuner_buf[4] = 0x16;
  646. tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
  647. tda827xa_dvbt[i].sbs;
  648. tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
  649. tuner_buf[7] = 0x0c;
  650. tuner_buf[8] = 0x06;
  651. tuner_buf[9] = 0x24;
  652. tuner_buf[10] = 0xff;
  653. tuner_buf[11] = 0x60;
  654. tuner_buf[12] = 0x00;
  655. tuner_buf[13] = 0x39; // lpsel
  656. msg.len = 14;
  657. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  658. return -EIO;
  659. msg.buf= reg2;
  660. msg.len = 2;
  661. reg2[0] = 0x60;
  662. reg2[1] = 0x3c;
  663. i2c_transfer(&dev->i2c_adap, &msg, 1);
  664. reg2[0] = 0xa0;
  665. reg2[1] = 0x40;
  666. i2c_transfer(&dev->i2c_adap, &msg, 1);
  667. msleep(2);
  668. /* correct CP value */
  669. reg2[0] = 0x30;
  670. reg2[1] = 0x10 + tda827xa_dvbt[i].scr;
  671. msg.len = 2;
  672. i2c_transfer(&dev->i2c_adap, &msg, 1);
  673. msleep(550);
  674. reg2[0] = 0x50;
  675. reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
  676. i2c_transfer(&dev->i2c_adap, &msg, 1);
  677. return 0;
  678. }
  679. static void philips_tda827xa_pll_sleep(u8 addr, struct dvb_frontend *fe)
  680. {
  681. struct saa7134_dev *dev = fe->dvb->priv;
  682. static u8 tda827xa_sleep[] = { 0x30, 0x90};
  683. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
  684. .len = sizeof(tda827xa_sleep) };
  685. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  686. }
  687. /* ------------------------------------------------------------------ */
  688. static int philips_tiger_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  689. {
  690. int ret;
  691. struct saa7134_dev *dev = fe->dvb->priv;
  692. static u8 tda8290_close[] = { 0x21, 0xc0};
  693. static u8 tda8290_open[] = { 0x21, 0x80};
  694. struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
  695. /* close tda8290 i2c bridge */
  696. tda8290_msg.buf = tda8290_close;
  697. ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  698. if (ret != 1)
  699. return -EIO;
  700. msleep(20);
  701. ret = philips_tda827xa_pll_set(0x61, fe, params);
  702. if (ret != 0)
  703. return ret;
  704. /* open tda8290 i2c bridge */
  705. tda8290_msg.buf = tda8290_open;
  706. i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  707. return ret;
  708. }
  709. static int philips_tiger_dvb_mode(struct dvb_frontend *fe)
  710. {
  711. struct saa7134_dev *dev = fe->dvb->priv;
  712. static u8 data[] = { 0x3c, 0x33, 0x6a};
  713. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  714. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  715. return -EIO;
  716. return 0;
  717. }
  718. static void philips_tiger_analog_mode(struct dvb_frontend *fe)
  719. {
  720. struct saa7134_dev *dev = fe->dvb->priv;
  721. static u8 data[] = { 0x3c, 0x33, 0x68};
  722. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  723. i2c_transfer(&dev->i2c_adap, &msg, 1);
  724. philips_tda827xa_pll_sleep( 0x61, fe);
  725. }
  726. static struct tda1004x_config philips_tiger_config = {
  727. .demod_address = 0x08,
  728. .invert = 1,
  729. .invert_oclk = 0,
  730. .xtal_freq = TDA10046_XTAL_16M,
  731. .agc_config = TDA10046_AGC_TDA827X,
  732. .if_freq = TDA10046_FREQ_045,
  733. .pll_init = philips_tiger_dvb_mode,
  734. .pll_set = philips_tiger_pll_set,
  735. .pll_sleep = philips_tiger_analog_mode,
  736. .request_firmware = NULL,
  737. };
  738. /* ------------------------------------------------------------------ */
  739. static int lifeview_trio_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  740. {
  741. int ret;
  742. ret = philips_tda827xa_pll_set(0x60, fe, params);
  743. return ret;
  744. }
  745. static int lifeview_trio_dvb_mode(struct dvb_frontend *fe)
  746. {
  747. return 0;
  748. }
  749. static void lifeview_trio_analog_mode(struct dvb_frontend *fe)
  750. {
  751. philips_tda827xa_pll_sleep(0x60, fe);
  752. }
  753. static struct tda1004x_config lifeview_trio_config = {
  754. .demod_address = 0x09,
  755. .invert = 1,
  756. .invert_oclk = 0,
  757. .xtal_freq = TDA10046_XTAL_16M,
  758. .agc_config = TDA10046_AGC_TDA827X_GPL,
  759. .if_freq = TDA10046_FREQ_045,
  760. .pll_init = lifeview_trio_dvb_mode,
  761. .pll_set = lifeview_trio_pll_set,
  762. .pll_sleep = lifeview_trio_analog_mode,
  763. .request_firmware = NULL,
  764. };
  765. /* ------------------------------------------------------------------ */
  766. static int ads_duo_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  767. {
  768. int ret;
  769. ret = philips_tda827xa_pll_set(0x61, fe, params);
  770. return ret;
  771. }
  772. static int ads_duo_dvb_mode(struct dvb_frontend *fe)
  773. {
  774. struct saa7134_dev *dev = fe->dvb->priv;
  775. /* route TDA8275a AGC input to the channel decoder */
  776. saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x60);
  777. return 0;
  778. }
  779. static void ads_duo_analog_mode(struct dvb_frontend *fe)
  780. {
  781. struct saa7134_dev *dev = fe->dvb->priv;
  782. /* route TDA8275a AGC input to the analog IF chip*/
  783. saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x20);
  784. philips_tda827xa_pll_sleep( 0x61, fe);
  785. }
  786. static struct tda1004x_config ads_tech_duo_config = {
  787. .demod_address = 0x08,
  788. .invert = 1,
  789. .invert_oclk = 0,
  790. .xtal_freq = TDA10046_XTAL_16M,
  791. .agc_config = TDA10046_AGC_TDA827X_GPL,
  792. .if_freq = TDA10046_FREQ_045,
  793. .pll_init = ads_duo_dvb_mode,
  794. .pll_set = ads_duo_pll_set,
  795. .pll_sleep = ads_duo_analog_mode,
  796. .request_firmware = NULL,
  797. };
  798. /* ------------------------------------------------------------------ */
  799. static int tevion_dvb220rf_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  800. {
  801. int ret;
  802. ret = philips_tda827xa_pll_set(0x60, fe, params);
  803. return ret;
  804. }
  805. static int tevion_dvb220rf_pll_init(struct dvb_frontend *fe)
  806. {
  807. return 0;
  808. }
  809. static void tevion_dvb220rf_pll_sleep(struct dvb_frontend *fe)
  810. {
  811. philips_tda827xa_pll_sleep( 0x61, fe);
  812. }
  813. static struct tda1004x_config tevion_dvbt220rf_config = {
  814. .demod_address = 0x08,
  815. .invert = 1,
  816. .invert_oclk = 0,
  817. .xtal_freq = TDA10046_XTAL_16M,
  818. .agc_config = TDA10046_AGC_TDA827X,
  819. .if_freq = TDA10046_FREQ_045,
  820. .pll_init = tevion_dvb220rf_pll_init,
  821. .pll_set = tevion_dvb220rf_pll_set,
  822. .pll_sleep = tevion_dvb220rf_pll_sleep,
  823. .request_firmware = NULL,
  824. };
  825. #endif
  826. /* ------------------------------------------------------------------ */
  827. #ifdef HAVE_NXT200X
  828. static struct nxt200x_config avertvhda180 = {
  829. .demod_address = 0x0a,
  830. .pll_address = 0x61,
  831. .pll_desc = &dvb_pll_tdhu2,
  832. };
  833. static int nxt200x_set_pll_input(u8 *buf, int input)
  834. {
  835. if (input)
  836. buf[3] |= 0x08;
  837. else
  838. buf[3] &= ~0x08;
  839. return 0;
  840. }
  841. static struct nxt200x_config kworldatsc110 = {
  842. .demod_address = 0x0a,
  843. .pll_address = 0x61,
  844. .pll_desc = &dvb_pll_tuv1236d,
  845. .set_pll_input = nxt200x_set_pll_input,
  846. };
  847. #endif
  848. /* ------------------------------------------------------------------ */
  849. static int dvb_init(struct saa7134_dev *dev)
  850. {
  851. /* init struct videobuf_dvb */
  852. dev->ts.nr_bufs = 32;
  853. dev->ts.nr_packets = 32*4;
  854. dev->dvb.name = dev->name;
  855. videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
  856. dev->pci, &dev->slock,
  857. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  858. V4L2_FIELD_ALTERNATE,
  859. sizeof(struct saa7134_buf),
  860. dev);
  861. switch (dev->board) {
  862. #ifdef HAVE_MT352
  863. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  864. printk("%s: pinnacle 300i dvb setup\n",dev->name);
  865. dev->dvb.frontend = mt352_attach(&pinnacle_300i,
  866. &dev->i2c_adap);
  867. break;
  868. case SAA7134_BOARD_AVERMEDIA_777:
  869. printk("%s: avertv 777 dvb setup\n",dev->name);
  870. dev->dvb.frontend = mt352_attach(&avermedia_777,
  871. &dev->i2c_adap);
  872. break;
  873. #endif
  874. #ifdef HAVE_TDA1004X
  875. case SAA7134_BOARD_MD7134:
  876. dev->dvb.frontend = tda10046_attach(&medion_cardbus,
  877. &dev->i2c_adap);
  878. break;
  879. case SAA7134_BOARD_PHILIPS_TOUGH:
  880. dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config,
  881. &dev->i2c_adap);
  882. break;
  883. case SAA7134_BOARD_FLYDVBTDUO:
  884. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  885. &dev->i2c_adap);
  886. break;
  887. case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
  888. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  889. &dev->i2c_adap);
  890. break;
  891. case SAA7134_BOARD_PHILIPS_EUROPA:
  892. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  893. &dev->i2c_adap);
  894. break;
  895. case SAA7134_BOARD_VIDEOMATE_DVBT_300:
  896. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  897. &dev->i2c_adap);
  898. break;
  899. case SAA7134_BOARD_VIDEOMATE_DVBT_200:
  900. dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config,
  901. &dev->i2c_adap);
  902. break;
  903. case SAA7134_BOARD_PHILIPS_TIGER:
  904. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  905. &dev->i2c_adap);
  906. break;
  907. case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
  908. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  909. &dev->i2c_adap);
  910. break;
  911. case SAA7134_BOARD_FLYDVBT_LR301:
  912. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  913. &dev->i2c_adap);
  914. break;
  915. case SAA7134_BOARD_FLYDVB_TRIO:
  916. dev->dvb.frontend = tda10046_attach(&lifeview_trio_config,
  917. &dev->i2c_adap);
  918. break;
  919. case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
  920. dev->dvb.frontend = tda10046_attach(&ads_tech_duo_config,
  921. &dev->i2c_adap);
  922. break;
  923. case SAA7134_BOARD_TEVION_DVBT_220RF:
  924. dev->dvb.frontend = tda10046_attach(&tevion_dvbt220rf_config,
  925. &dev->i2c_adap);
  926. break;
  927. case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
  928. dev->dvb.frontend = tda10046_attach(&ads_tech_duo_config,
  929. &dev->i2c_adap);
  930. break;
  931. #endif
  932. #ifdef HAVE_NXT200X
  933. case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
  934. dev->dvb.frontend = nxt200x_attach(&avertvhda180, &dev->i2c_adap);
  935. break;
  936. case SAA7134_BOARD_KWORLD_ATSC110:
  937. dev->dvb.frontend = nxt200x_attach(&kworldatsc110, &dev->i2c_adap);
  938. break;
  939. #endif
  940. default:
  941. printk("%s: Huh? unknown DVB card?\n",dev->name);
  942. break;
  943. }
  944. if (NULL == dev->dvb.frontend) {
  945. printk("%s: frontend initialization failed\n",dev->name);
  946. return -1;
  947. }
  948. /* register everything else */
  949. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
  950. }
  951. static int dvb_fini(struct saa7134_dev *dev)
  952. {
  953. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  954. switch (dev->board) {
  955. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  956. /* otherwise we don't detect the tuner on next insmod */
  957. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  958. break;
  959. };
  960. videobuf_dvb_unregister(&dev->dvb);
  961. return 0;
  962. }
  963. static struct saa7134_mpeg_ops dvb_ops = {
  964. .type = SAA7134_MPEG_DVB,
  965. .init = dvb_init,
  966. .fini = dvb_fini,
  967. };
  968. static int __init dvb_register(void)
  969. {
  970. return saa7134_ts_register(&dvb_ops);
  971. }
  972. static void __exit dvb_unregister(void)
  973. {
  974. saa7134_ts_unregister(&dvb_ops);
  975. }
  976. module_init(dvb_register);
  977. module_exit(dvb_unregister);
  978. /* ------------------------------------------------------------------ */
  979. /*
  980. * Local variables:
  981. * c-basic-offset: 8
  982. * End:
  983. */