pwm-pxa.c 4.5 KB

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  1. /*
  2. * drivers/pwm/pwm-pxa.c
  3. *
  4. * simple driver for PWM (Pulse Width Modulator) controller
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * 2008-02-13 initial version
  11. * eric miao <eric.miao@marvell.com>
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/slab.h>
  17. #include <linux/err.h>
  18. #include <linux/clk.h>
  19. #include <linux/io.h>
  20. #include <linux/pwm.h>
  21. #include <asm/div64.h>
  22. #define HAS_SECONDARY_PWM 0x10
  23. #define PWM_ID_BASE(d) ((d) & 0xf)
  24. static const struct platform_device_id pwm_id_table[] = {
  25. /* PWM has_secondary_pwm? */
  26. { "pxa25x-pwm", 0 },
  27. { "pxa27x-pwm", 0 | HAS_SECONDARY_PWM },
  28. { "pxa168-pwm", 1 },
  29. { "pxa910-pwm", 1 },
  30. { },
  31. };
  32. MODULE_DEVICE_TABLE(platform, pwm_id_table);
  33. /* PWM registers and bits definitions */
  34. #define PWMCR (0x00)
  35. #define PWMDCR (0x04)
  36. #define PWMPCR (0x08)
  37. #define PWMCR_SD (1 << 6)
  38. #define PWMDCR_FD (1 << 10)
  39. struct pxa_pwm_chip {
  40. struct pwm_chip chip;
  41. struct device *dev;
  42. struct clk *clk;
  43. void __iomem *mmio_base;
  44. };
  45. static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
  46. {
  47. return container_of(chip, struct pxa_pwm_chip, chip);
  48. }
  49. /*
  50. * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
  51. * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
  52. */
  53. static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  54. int duty_ns, int period_ns)
  55. {
  56. struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
  57. unsigned long long c;
  58. unsigned long period_cycles, prescale, pv, dc;
  59. unsigned long offset;
  60. int rc;
  61. offset = pwm->hwpwm ? 0x10 : 0;
  62. c = clk_get_rate(pc->clk);
  63. c = c * period_ns;
  64. do_div(c, 1000000000);
  65. period_cycles = c;
  66. if (period_cycles < 1)
  67. period_cycles = 1;
  68. prescale = (period_cycles - 1) / 1024;
  69. pv = period_cycles / (prescale + 1) - 1;
  70. if (prescale > 63)
  71. return -EINVAL;
  72. if (duty_ns == period_ns)
  73. dc = PWMDCR_FD;
  74. else
  75. dc = (pv + 1) * duty_ns / period_ns;
  76. /* NOTE: the clock to PWM has to be enabled first
  77. * before writing to the registers
  78. */
  79. rc = clk_prepare_enable(pc->clk);
  80. if (rc < 0)
  81. return rc;
  82. writel(prescale, pc->mmio_base + offset + PWMCR);
  83. writel(dc, pc->mmio_base + offset + PWMDCR);
  84. writel(pv, pc->mmio_base + offset + PWMPCR);
  85. clk_disable_unprepare(pc->clk);
  86. return 0;
  87. }
  88. static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  89. {
  90. struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
  91. return clk_prepare_enable(pc->clk);
  92. }
  93. static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  94. {
  95. struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
  96. clk_disable_unprepare(pc->clk);
  97. }
  98. static struct pwm_ops pxa_pwm_ops = {
  99. .config = pxa_pwm_config,
  100. .enable = pxa_pwm_enable,
  101. .disable = pxa_pwm_disable,
  102. .owner = THIS_MODULE,
  103. };
  104. static int pwm_probe(struct platform_device *pdev)
  105. {
  106. const struct platform_device_id *id = platform_get_device_id(pdev);
  107. struct pxa_pwm_chip *pwm;
  108. struct resource *r;
  109. int ret = 0;
  110. pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
  111. if (pwm == NULL) {
  112. dev_err(&pdev->dev, "failed to allocate memory\n");
  113. return -ENOMEM;
  114. }
  115. pwm->clk = devm_clk_get(&pdev->dev, NULL);
  116. if (IS_ERR(pwm->clk))
  117. return PTR_ERR(pwm->clk);
  118. pwm->chip.dev = &pdev->dev;
  119. pwm->chip.ops = &pxa_pwm_ops;
  120. pwm->chip.base = -1;
  121. pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
  122. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  123. if (r == NULL) {
  124. dev_err(&pdev->dev, "no memory resource defined\n");
  125. return -ENODEV;
  126. }
  127. pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r);
  128. if (IS_ERR(pwm->mmio_base))
  129. return PTR_ERR(pwm->mmio_base);
  130. ret = pwmchip_add(&pwm->chip);
  131. if (ret < 0) {
  132. dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
  133. return ret;
  134. }
  135. platform_set_drvdata(pdev, pwm);
  136. return 0;
  137. }
  138. static int pwm_remove(struct platform_device *pdev)
  139. {
  140. struct pxa_pwm_chip *chip;
  141. chip = platform_get_drvdata(pdev);
  142. if (chip == NULL)
  143. return -ENODEV;
  144. return pwmchip_remove(&chip->chip);
  145. }
  146. static struct platform_driver pwm_driver = {
  147. .driver = {
  148. .name = "pxa25x-pwm",
  149. .owner = THIS_MODULE,
  150. },
  151. .probe = pwm_probe,
  152. .remove = pwm_remove,
  153. .id_table = pwm_id_table,
  154. };
  155. static int __init pwm_init(void)
  156. {
  157. return platform_driver_register(&pwm_driver);
  158. }
  159. arch_initcall(pwm_init);
  160. static void __exit pwm_exit(void)
  161. {
  162. platform_driver_unregister(&pwm_driver);
  163. }
  164. module_exit(pwm_exit);
  165. MODULE_LICENSE("GPL v2");