soc-cache.c 4.4 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <sound/soc.h>
  15. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  16. unsigned int reg)
  17. {
  18. u16 *cache = codec->reg_cache;
  19. if (reg >= codec->reg_cache_size)
  20. return -1;
  21. return cache[reg];
  22. }
  23. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  24. unsigned int value)
  25. {
  26. u16 *cache = codec->reg_cache;
  27. u8 data[2];
  28. int ret;
  29. BUG_ON(codec->volatile_register);
  30. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  31. data[1] = value & 0x00ff;
  32. if (reg < codec->reg_cache_size)
  33. cache[reg] = value;
  34. ret = codec->hw_write(codec->control_data, data, 2);
  35. if (ret == 2)
  36. return 0;
  37. if (ret < 0)
  38. return ret;
  39. else
  40. return -EIO;
  41. }
  42. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  43. unsigned int value)
  44. {
  45. u16 *reg_cache = codec->reg_cache;
  46. u8 data[3];
  47. data[0] = reg;
  48. data[1] = (value >> 8) & 0xff;
  49. data[2] = value & 0xff;
  50. if (!snd_soc_codec_volatile_register(codec, reg))
  51. reg_cache[reg] = value;
  52. if (codec->hw_write(codec->control_data, data, 3) == 3)
  53. return 0;
  54. else
  55. return -EIO;
  56. }
  57. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  58. unsigned int reg)
  59. {
  60. u16 *cache = codec->reg_cache;
  61. if (reg >= codec->reg_cache_size ||
  62. snd_soc_codec_volatile_register(codec, reg))
  63. return codec->hw_read(codec, reg);
  64. else
  65. return cache[reg];
  66. }
  67. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  68. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  69. unsigned int r)
  70. {
  71. struct i2c_msg xfer[2];
  72. u8 reg = r;
  73. u16 data;
  74. int ret;
  75. struct i2c_client *client = codec->control_data;
  76. /* Write register */
  77. xfer[0].addr = client->addr;
  78. xfer[0].flags = 0;
  79. xfer[0].len = 1;
  80. xfer[0].buf = &reg;
  81. /* Read data */
  82. xfer[1].addr = client->addr;
  83. xfer[1].flags = I2C_M_RD;
  84. xfer[1].len = 2;
  85. xfer[1].buf = (u8 *)&data;
  86. ret = i2c_transfer(client->adapter, xfer, 2);
  87. if (ret != 2) {
  88. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  89. return 0;
  90. }
  91. return (data >> 8) | ((data & 0xff) << 8);
  92. }
  93. #else
  94. #define snd_soc_8_16_read_i2c NULL
  95. #endif
  96. static struct {
  97. int addr_bits;
  98. int data_bits;
  99. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  100. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  101. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  102. } io_types[] = {
  103. { 7, 9, snd_soc_7_9_write, snd_soc_7_9_read },
  104. { 8, 16,
  105. snd_soc_8_16_write, snd_soc_8_16_read,
  106. snd_soc_8_16_read_i2c },
  107. };
  108. /**
  109. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  110. *
  111. * @codec: CODEC to configure.
  112. * @type: Type of cache.
  113. * @addr_bits: Number of bits of register address data.
  114. * @data_bits: Number of bits of data per register.
  115. * @control: Control bus used.
  116. *
  117. * Register formats are frequently shared between many I2C and SPI
  118. * devices. In order to promote code reuse the ASoC core provides
  119. * some standard implementations of CODEC read and write operations
  120. * which can be set up using this function.
  121. *
  122. * The caller is responsible for allocating and initialising the
  123. * actual cache.
  124. *
  125. * Note that at present this code cannot be used by CODECs with
  126. * volatile registers.
  127. */
  128. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  129. int addr_bits, int data_bits,
  130. enum snd_soc_control_type control)
  131. {
  132. int i;
  133. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  134. if (io_types[i].addr_bits == addr_bits &&
  135. io_types[i].data_bits == data_bits)
  136. break;
  137. if (i == ARRAY_SIZE(io_types)) {
  138. printk(KERN_ERR
  139. "No I/O functions for %d bit address %d bit data\n",
  140. addr_bits, data_bits);
  141. return -EINVAL;
  142. }
  143. codec->write = io_types[i].write;
  144. codec->read = io_types[i].read;
  145. switch (control) {
  146. case SND_SOC_CUSTOM:
  147. break;
  148. case SND_SOC_I2C:
  149. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  150. codec->hw_write = (hw_write_t)i2c_master_send;
  151. #endif
  152. if (io_types[i].i2c_read)
  153. codec->hw_read = io_types[i].i2c_read;
  154. break;
  155. case SND_SOC_SPI:
  156. break;
  157. }
  158. return 0;
  159. }
  160. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);