mscan.c 18 KB

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  1. /*
  2. * CAN bus driver for the alone generic (as possible as) MSCAN controller.
  3. *
  4. * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>,
  5. * Varma Electronics Oy
  6. * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
  7. * Copytight (C) 2008-2009 Pengutronix <kernel@pengutronix.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the version 2 of the GNU General Public License
  11. * as published by the Free Software Foundation
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/delay.h>
  26. #include <linux/netdevice.h>
  27. #include <linux/if_arp.h>
  28. #include <linux/if_ether.h>
  29. #include <linux/list.h>
  30. #include <linux/can.h>
  31. #include <linux/can/dev.h>
  32. #include <linux/can/error.h>
  33. #include <linux/io.h>
  34. #include "mscan.h"
  35. #define MSCAN_NORMAL_MODE 0
  36. #define MSCAN_SLEEP_MODE MSCAN_SLPRQ
  37. #define MSCAN_INIT_MODE (MSCAN_INITRQ | MSCAN_SLPRQ)
  38. #define MSCAN_POWEROFF_MODE (MSCAN_CSWAI | MSCAN_SLPRQ)
  39. #define MSCAN_SET_MODE_RETRIES 255
  40. #define MSCAN_ECHO_SKB_MAX 3
  41. #define BTR0_BRP_MASK 0x3f
  42. #define BTR0_SJW_SHIFT 6
  43. #define BTR0_SJW_MASK (0x3 << BTR0_SJW_SHIFT)
  44. #define BTR1_TSEG1_MASK 0xf
  45. #define BTR1_TSEG2_SHIFT 4
  46. #define BTR1_TSEG2_MASK (0x7 << BTR1_TSEG2_SHIFT)
  47. #define BTR1_SAM_SHIFT 7
  48. #define BTR0_SET_BRP(brp) (((brp) - 1) & BTR0_BRP_MASK)
  49. #define BTR0_SET_SJW(sjw) ((((sjw) - 1) << BTR0_SJW_SHIFT) & \
  50. BTR0_SJW_MASK)
  51. #define BTR1_SET_TSEG1(tseg1) (((tseg1) - 1) & BTR1_TSEG1_MASK)
  52. #define BTR1_SET_TSEG2(tseg2) ((((tseg2) - 1) << BTR1_TSEG2_SHIFT) & \
  53. BTR1_TSEG2_MASK)
  54. #define BTR1_SET_SAM(sam) ((sam) ? 1 << BTR1_SAM_SHIFT : 0)
  55. static struct can_bittiming_const mscan_bittiming_const = {
  56. .name = "mscan",
  57. .tseg1_min = 4,
  58. .tseg1_max = 16,
  59. .tseg2_min = 2,
  60. .tseg2_max = 8,
  61. .sjw_max = 4,
  62. .brp_min = 1,
  63. .brp_max = 64,
  64. .brp_inc = 1,
  65. };
  66. struct mscan_state {
  67. u8 mode;
  68. u8 canrier;
  69. u8 cantier;
  70. };
  71. #define F_RX_PROGRESS 0
  72. #define F_TX_PROGRESS 1
  73. #define F_TX_WAIT_ALL 2
  74. static enum can_state state_map[] = {
  75. CAN_STATE_ERROR_ACTIVE,
  76. CAN_STATE_ERROR_WARNING,
  77. CAN_STATE_ERROR_PASSIVE,
  78. CAN_STATE_BUS_OFF
  79. };
  80. static int mscan_set_mode(struct net_device *dev, u8 mode)
  81. {
  82. struct mscan_priv *priv = netdev_priv(dev);
  83. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  84. int ret = 0;
  85. int i;
  86. u8 canctl1;
  87. if (mode != MSCAN_NORMAL_MODE) {
  88. if (priv->tx_active) {
  89. /* Abort transfers before going to sleep */#
  90. out_8(&regs->cantarq, priv->tx_active);
  91. /* Suppress TX done interrupts */
  92. out_8(&regs->cantier, 0);
  93. }
  94. canctl1 = in_8(&regs->canctl1);
  95. if ((mode & MSCAN_SLPRQ) && (canctl1 & MSCAN_SLPAK) == 0) {
  96. out_8(&regs->canctl0,
  97. in_8(&regs->canctl0) | MSCAN_SLPRQ);
  98. for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
  99. if (in_8(&regs->canctl1) & MSCAN_SLPAK)
  100. break;
  101. udelay(100);
  102. }
  103. /*
  104. * The mscan controller will fail to enter sleep mode,
  105. * while there are irregular activities on bus, like
  106. * somebody keeps retransmitting. This behavior is
  107. * undocumented and seems to differ between mscan built
  108. * in mpc5200b and mpc5200. We proceed in that case,
  109. * since otherwise the slprq will be kept set and the
  110. * controller will get stuck. NOTE: INITRQ or CSWAI
  111. * will abort all active transmit actions, if still
  112. * any, at once.
  113. */
  114. if (i >= MSCAN_SET_MODE_RETRIES)
  115. dev_dbg(dev->dev.parent,
  116. "device failed to enter sleep mode. "
  117. "We proceed anyhow.\n");
  118. else
  119. priv->can.state = CAN_STATE_SLEEPING;
  120. }
  121. if ((mode & MSCAN_INITRQ) && (canctl1 & MSCAN_INITAK) == 0) {
  122. out_8(&regs->canctl0,
  123. in_8(&regs->canctl0) | MSCAN_INITRQ);
  124. for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
  125. if (in_8(&regs->canctl1) & MSCAN_INITAK)
  126. break;
  127. }
  128. if (i >= MSCAN_SET_MODE_RETRIES)
  129. ret = -ENODEV;
  130. }
  131. if (!ret)
  132. priv->can.state = CAN_STATE_STOPPED;
  133. if (mode & MSCAN_CSWAI)
  134. out_8(&regs->canctl0,
  135. in_8(&regs->canctl0) | MSCAN_CSWAI);
  136. } else {
  137. canctl1 = in_8(&regs->canctl1);
  138. if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) {
  139. out_8(&regs->canctl0, in_8(&regs->canctl0) &
  140. ~(MSCAN_SLPRQ | MSCAN_INITRQ));
  141. for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
  142. canctl1 = in_8(&regs->canctl1);
  143. if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK)))
  144. break;
  145. }
  146. if (i >= MSCAN_SET_MODE_RETRIES)
  147. ret = -ENODEV;
  148. else
  149. priv->can.state = CAN_STATE_ERROR_ACTIVE;
  150. }
  151. }
  152. return ret;
  153. }
  154. static int mscan_start(struct net_device *dev)
  155. {
  156. struct mscan_priv *priv = netdev_priv(dev);
  157. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  158. u8 canrflg;
  159. int err;
  160. out_8(&regs->canrier, 0);
  161. INIT_LIST_HEAD(&priv->tx_head);
  162. priv->prev_buf_id = 0;
  163. priv->cur_pri = 0;
  164. priv->tx_active = 0;
  165. priv->shadow_canrier = 0;
  166. priv->flags = 0;
  167. err = mscan_set_mode(dev, MSCAN_NORMAL_MODE);
  168. if (err)
  169. return err;
  170. canrflg = in_8(&regs->canrflg);
  171. priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
  172. priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg),
  173. MSCAN_STATE_TX(canrflg))];
  174. out_8(&regs->cantier, 0);
  175. /* Enable receive interrupts. */
  176. out_8(&regs->canrier, MSCAN_OVRIE | MSCAN_RXFIE | MSCAN_CSCIE |
  177. MSCAN_RSTATE1 | MSCAN_RSTATE0 | MSCAN_TSTATE1 | MSCAN_TSTATE0);
  178. return 0;
  179. }
  180. static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)
  181. {
  182. struct can_frame *frame = (struct can_frame *)skb->data;
  183. struct mscan_priv *priv = netdev_priv(dev);
  184. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  185. int i, rtr, buf_id;
  186. u32 can_id;
  187. if (frame->can_dlc > 8)
  188. return -EINVAL;
  189. out_8(&regs->cantier, 0);
  190. i = ~priv->tx_active & MSCAN_TXE;
  191. buf_id = ffs(i) - 1;
  192. switch (hweight8(i)) {
  193. case 0:
  194. netif_stop_queue(dev);
  195. dev_err(dev->dev.parent, "Tx Ring full when queue awake!\n");
  196. return NETDEV_TX_BUSY;
  197. case 1:
  198. /*
  199. * if buf_id < 3, then current frame will be send out of order,
  200. * since buffer with lower id have higher priority (hell..)
  201. */
  202. netif_stop_queue(dev);
  203. case 2:
  204. if (buf_id < priv->prev_buf_id) {
  205. priv->cur_pri++;
  206. if (priv->cur_pri == 0xff) {
  207. set_bit(F_TX_WAIT_ALL, &priv->flags);
  208. netif_stop_queue(dev);
  209. }
  210. }
  211. set_bit(F_TX_PROGRESS, &priv->flags);
  212. break;
  213. }
  214. priv->prev_buf_id = buf_id;
  215. out_8(&regs->cantbsel, i);
  216. rtr = frame->can_id & CAN_RTR_FLAG;
  217. if (frame->can_id & CAN_EFF_FLAG) {
  218. can_id = (frame->can_id & CAN_EFF_MASK) << 1;
  219. if (rtr)
  220. can_id |= 1;
  221. out_be16(&regs->tx.idr3_2, can_id);
  222. can_id >>= 16;
  223. can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0) | (3 << 3);
  224. } else {
  225. can_id = (frame->can_id & CAN_SFF_MASK) << 5;
  226. if (rtr)
  227. can_id |= 1 << 4;
  228. }
  229. out_be16(&regs->tx.idr1_0, can_id);
  230. if (!rtr) {
  231. void __iomem *data = &regs->tx.dsr1_0;
  232. u16 *payload = (u16 *) frame->data;
  233. /* It is safe to write into dsr[dlc+1] */
  234. for (i = 0; i < (frame->can_dlc + 1) / 2; i++) {
  235. out_be16(data, *payload++);
  236. data += 2 + _MSCAN_RESERVED_DSR_SIZE;
  237. }
  238. }
  239. out_8(&regs->tx.dlr, frame->can_dlc);
  240. out_8(&regs->tx.tbpr, priv->cur_pri);
  241. /* Start transmission. */
  242. out_8(&regs->cantflg, 1 << buf_id);
  243. if (!test_bit(F_TX_PROGRESS, &priv->flags))
  244. dev->trans_start = jiffies;
  245. list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head);
  246. can_put_echo_skb(skb, dev, buf_id);
  247. /* Enable interrupt. */
  248. priv->tx_active |= 1 << buf_id;
  249. out_8(&regs->cantier, priv->tx_active);
  250. return NETDEV_TX_OK;
  251. }
  252. /* This function returns the old state to see where we came from */
  253. static enum can_state check_set_state(struct net_device *dev, u8 canrflg)
  254. {
  255. struct mscan_priv *priv = netdev_priv(dev);
  256. enum can_state state, old_state = priv->can.state;
  257. if (canrflg & MSCAN_CSCIF && old_state <= CAN_STATE_BUS_OFF) {
  258. state = state_map[max(MSCAN_STATE_RX(canrflg),
  259. MSCAN_STATE_TX(canrflg))];
  260. priv->can.state = state;
  261. }
  262. return old_state;
  263. }
  264. static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)
  265. {
  266. struct mscan_priv *priv = netdev_priv(dev);
  267. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  268. u32 can_id;
  269. int i;
  270. can_id = in_be16(&regs->rx.idr1_0);
  271. if (can_id & (1 << 3)) {
  272. frame->can_id = CAN_EFF_FLAG;
  273. can_id = ((can_id << 16) | in_be16(&regs->rx.idr3_2));
  274. can_id = ((can_id & 0xffe00000) |
  275. ((can_id & 0x7ffff) << 2)) >> 2;
  276. } else {
  277. can_id >>= 4;
  278. frame->can_id = 0;
  279. }
  280. frame->can_id |= can_id >> 1;
  281. if (can_id & 1)
  282. frame->can_id |= CAN_RTR_FLAG;
  283. frame->can_dlc = in_8(&regs->rx.dlr) & 0xf;
  284. if (!(frame->can_id & CAN_RTR_FLAG)) {
  285. void __iomem *data = &regs->rx.dsr1_0;
  286. u16 *payload = (u16 *) frame->data;
  287. for (i = 0; i < (frame->can_dlc + 1) / 2; i++) {
  288. *payload++ = in_be16(data);
  289. data += 2 + _MSCAN_RESERVED_DSR_SIZE;
  290. }
  291. }
  292. out_8(&regs->canrflg, MSCAN_RXF);
  293. }
  294. static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame,
  295. u8 canrflg)
  296. {
  297. struct mscan_priv *priv = netdev_priv(dev);
  298. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  299. struct net_device_stats *stats = &dev->stats;
  300. enum can_state old_state;
  301. dev_dbg(dev->dev.parent, "error interrupt (canrflg=%#x)\n", canrflg);
  302. frame->can_id = CAN_ERR_FLAG;
  303. if (canrflg & MSCAN_OVRIF) {
  304. frame->can_id |= CAN_ERR_CRTL;
  305. frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
  306. stats->rx_over_errors++;
  307. stats->rx_errors++;
  308. } else
  309. frame->data[1] = 0;
  310. old_state = check_set_state(dev, canrflg);
  311. /* State changed */
  312. if (old_state != priv->can.state) {
  313. switch (priv->can.state) {
  314. case CAN_STATE_ERROR_WARNING:
  315. frame->can_id |= CAN_ERR_CRTL;
  316. priv->can.can_stats.error_warning++;
  317. if ((priv->shadow_statflg & MSCAN_RSTAT_MSK) <
  318. (canrflg & MSCAN_RSTAT_MSK))
  319. frame->data[1] |= CAN_ERR_CRTL_RX_WARNING;
  320. if ((priv->shadow_statflg & MSCAN_TSTAT_MSK) <
  321. (canrflg & MSCAN_TSTAT_MSK))
  322. frame->data[1] |= CAN_ERR_CRTL_TX_WARNING;
  323. break;
  324. case CAN_STATE_ERROR_PASSIVE:
  325. frame->can_id |= CAN_ERR_CRTL;
  326. priv->can.can_stats.error_passive++;
  327. frame->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
  328. break;
  329. case CAN_STATE_BUS_OFF:
  330. frame->can_id |= CAN_ERR_BUSOFF;
  331. /*
  332. * The MSCAN on the MPC5200 does recover from bus-off
  333. * automatically. To avoid that we stop the chip doing
  334. * a light-weight stop (we are in irq-context).
  335. */
  336. out_8(&regs->cantier, 0);
  337. out_8(&regs->canrier, 0);
  338. out_8(&regs->canctl0, in_8(&regs->canctl0) |
  339. MSCAN_SLPRQ | MSCAN_INITRQ);
  340. can_bus_off(dev);
  341. break;
  342. default:
  343. break;
  344. }
  345. }
  346. priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
  347. frame->can_dlc = CAN_ERR_DLC;
  348. out_8(&regs->canrflg, MSCAN_ERR_IF);
  349. }
  350. static int mscan_rx_poll(struct napi_struct *napi, int quota)
  351. {
  352. struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi);
  353. struct net_device *dev = napi->dev;
  354. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  355. struct net_device_stats *stats = &dev->stats;
  356. int npackets = 0;
  357. int ret = 1;
  358. struct sk_buff *skb;
  359. struct can_frame *frame;
  360. u8 canrflg;
  361. while (npackets < quota && ((canrflg = in_8(&regs->canrflg)) &
  362. (MSCAN_RXF | MSCAN_ERR_IF))) {
  363. skb = alloc_can_skb(dev, &frame);
  364. if (!skb) {
  365. if (printk_ratelimit())
  366. dev_notice(dev->dev.parent, "packet dropped\n");
  367. stats->rx_dropped++;
  368. out_8(&regs->canrflg, canrflg);
  369. continue;
  370. }
  371. if (canrflg & MSCAN_RXF)
  372. mscan_get_rx_frame(dev, frame);
  373. else if (canrflg & MSCAN_ERR_IF)
  374. mscan_get_err_frame(dev, frame, canrflg);
  375. stats->rx_packets++;
  376. stats->rx_bytes += frame->can_dlc;
  377. npackets++;
  378. netif_receive_skb(skb);
  379. }
  380. if (!(in_8(&regs->canrflg) & (MSCAN_RXF | MSCAN_ERR_IF))) {
  381. napi_complete(&priv->napi);
  382. clear_bit(F_RX_PROGRESS, &priv->flags);
  383. if (priv->can.state < CAN_STATE_BUS_OFF)
  384. out_8(&regs->canrier, priv->shadow_canrier);
  385. ret = 0;
  386. }
  387. return ret;
  388. }
  389. static irqreturn_t mscan_isr(int irq, void *dev_id)
  390. {
  391. struct net_device *dev = (struct net_device *)dev_id;
  392. struct mscan_priv *priv = netdev_priv(dev);
  393. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  394. struct net_device_stats *stats = &dev->stats;
  395. u8 cantier, cantflg, canrflg;
  396. irqreturn_t ret = IRQ_NONE;
  397. cantier = in_8(&regs->cantier) & MSCAN_TXE;
  398. cantflg = in_8(&regs->cantflg) & cantier;
  399. if (cantier && cantflg) {
  400. struct list_head *tmp, *pos;
  401. list_for_each_safe(pos, tmp, &priv->tx_head) {
  402. struct tx_queue_entry *entry =
  403. list_entry(pos, struct tx_queue_entry, list);
  404. u8 mask = entry->mask;
  405. if (!(cantflg & mask))
  406. continue;
  407. out_8(&regs->cantbsel, mask);
  408. stats->tx_bytes += in_8(&regs->tx.dlr);
  409. stats->tx_packets++;
  410. can_get_echo_skb(dev, entry->id);
  411. priv->tx_active &= ~mask;
  412. list_del(pos);
  413. }
  414. if (list_empty(&priv->tx_head)) {
  415. clear_bit(F_TX_WAIT_ALL, &priv->flags);
  416. clear_bit(F_TX_PROGRESS, &priv->flags);
  417. priv->cur_pri = 0;
  418. } else
  419. dev->trans_start = jiffies;
  420. if (!test_bit(F_TX_WAIT_ALL, &priv->flags))
  421. netif_wake_queue(dev);
  422. out_8(&regs->cantier, priv->tx_active);
  423. ret = IRQ_HANDLED;
  424. }
  425. canrflg = in_8(&regs->canrflg);
  426. if ((canrflg & ~MSCAN_STAT_MSK) &&
  427. !test_and_set_bit(F_RX_PROGRESS, &priv->flags)) {
  428. if (canrflg & ~MSCAN_STAT_MSK) {
  429. priv->shadow_canrier = in_8(&regs->canrier);
  430. out_8(&regs->canrier, 0);
  431. napi_schedule(&priv->napi);
  432. ret = IRQ_HANDLED;
  433. } else
  434. clear_bit(F_RX_PROGRESS, &priv->flags);
  435. }
  436. return ret;
  437. }
  438. static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode)
  439. {
  440. struct mscan_priv *priv = netdev_priv(dev);
  441. int ret = 0;
  442. if (!priv->open_time)
  443. return -EINVAL;
  444. switch (mode) {
  445. case CAN_MODE_SLEEP:
  446. case CAN_MODE_STOP:
  447. netif_stop_queue(dev);
  448. mscan_set_mode(dev,
  449. (mode ==
  450. CAN_MODE_STOP) ? MSCAN_INIT_MODE :
  451. MSCAN_SLEEP_MODE);
  452. break;
  453. case CAN_MODE_START:
  454. if (priv->can.state <= CAN_STATE_BUS_OFF)
  455. mscan_set_mode(dev, MSCAN_INIT_MODE);
  456. ret = mscan_start(dev);
  457. if (ret)
  458. break;
  459. if (netif_queue_stopped(dev))
  460. netif_wake_queue(dev);
  461. break;
  462. default:
  463. ret = -EOPNOTSUPP;
  464. break;
  465. }
  466. return ret;
  467. }
  468. static int mscan_do_set_bittiming(struct net_device *dev)
  469. {
  470. struct mscan_priv *priv = netdev_priv(dev);
  471. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  472. struct can_bittiming *bt = &priv->can.bittiming;
  473. u8 btr0, btr1;
  474. btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw);
  475. btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) |
  476. BTR1_SET_TSEG2(bt->phase_seg2) |
  477. BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES));
  478. dev_info(dev->dev.parent, "setting BTR0=0x%02x BTR1=0x%02x\n",
  479. btr0, btr1);
  480. out_8(&regs->canbtr0, btr0);
  481. out_8(&regs->canbtr1, btr1);
  482. return 0;
  483. }
  484. static int mscan_open(struct net_device *dev)
  485. {
  486. int ret;
  487. struct mscan_priv *priv = netdev_priv(dev);
  488. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  489. /* common open */
  490. ret = open_candev(dev);
  491. if (ret)
  492. return ret;
  493. napi_enable(&priv->napi);
  494. ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev);
  495. if (ret < 0) {
  496. napi_disable(&priv->napi);
  497. printk(KERN_ERR "%s - failed to attach interrupt\n",
  498. dev->name);
  499. return ret;
  500. }
  501. priv->open_time = jiffies;
  502. out_8(&regs->canctl1, in_8(&regs->canctl1) & ~MSCAN_LISTEN);
  503. ret = mscan_start(dev);
  504. if (ret)
  505. return ret;
  506. netif_start_queue(dev);
  507. return 0;
  508. }
  509. static int mscan_close(struct net_device *dev)
  510. {
  511. struct mscan_priv *priv = netdev_priv(dev);
  512. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  513. netif_stop_queue(dev);
  514. napi_disable(&priv->napi);
  515. out_8(&regs->cantier, 0);
  516. out_8(&regs->canrier, 0);
  517. mscan_set_mode(dev, MSCAN_INIT_MODE);
  518. close_candev(dev);
  519. free_irq(dev->irq, dev);
  520. priv->open_time = 0;
  521. return 0;
  522. }
  523. static const struct net_device_ops mscan_netdev_ops = {
  524. .ndo_open = mscan_open,
  525. .ndo_stop = mscan_close,
  526. .ndo_start_xmit = mscan_start_xmit,
  527. };
  528. int register_mscandev(struct net_device *dev, int clock_src)
  529. {
  530. struct mscan_priv *priv = netdev_priv(dev);
  531. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  532. u8 ctl1;
  533. ctl1 = in_8(&regs->canctl1);
  534. if (clock_src)
  535. ctl1 |= MSCAN_CLKSRC;
  536. else
  537. ctl1 &= ~MSCAN_CLKSRC;
  538. ctl1 |= MSCAN_CANE;
  539. out_8(&regs->canctl1, ctl1);
  540. udelay(100);
  541. /* acceptance mask/acceptance code (accept everything) */
  542. out_be16(&regs->canidar1_0, 0);
  543. out_be16(&regs->canidar3_2, 0);
  544. out_be16(&regs->canidar5_4, 0);
  545. out_be16(&regs->canidar7_6, 0);
  546. out_be16(&regs->canidmr1_0, 0xffff);
  547. out_be16(&regs->canidmr3_2, 0xffff);
  548. out_be16(&regs->canidmr5_4, 0xffff);
  549. out_be16(&regs->canidmr7_6, 0xffff);
  550. /* Two 32 bit Acceptance Filters */
  551. out_8(&regs->canidac, MSCAN_AF_32BIT);
  552. mscan_set_mode(dev, MSCAN_INIT_MODE);
  553. return register_candev(dev);
  554. }
  555. EXPORT_SYMBOL_GPL(register_mscandev);
  556. void unregister_mscandev(struct net_device *dev)
  557. {
  558. struct mscan_priv *priv = netdev_priv(dev);
  559. struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
  560. mscan_set_mode(dev, MSCAN_INIT_MODE);
  561. out_8(&regs->canctl1, in_8(&regs->canctl1) & ~MSCAN_CANE);
  562. unregister_candev(dev);
  563. }
  564. EXPORT_SYMBOL_GPL(unregister_mscandev);
  565. struct net_device *alloc_mscandev(void)
  566. {
  567. struct net_device *dev;
  568. struct mscan_priv *priv;
  569. int i;
  570. dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX);
  571. if (!dev)
  572. return NULL;
  573. priv = netdev_priv(dev);
  574. dev->netdev_ops = &mscan_netdev_ops;
  575. dev->flags |= IFF_ECHO; /* we support local echo */
  576. netif_napi_add(dev, &priv->napi, mscan_rx_poll, 8);
  577. priv->can.bittiming_const = &mscan_bittiming_const;
  578. priv->can.do_set_bittiming = mscan_do_set_bittiming;
  579. priv->can.do_set_mode = mscan_do_set_mode;
  580. for (i = 0; i < TX_QUEUE_SIZE; i++) {
  581. priv->tx_queue[i].id = i;
  582. priv->tx_queue[i].mask = 1 << i;
  583. }
  584. return dev;
  585. }
  586. EXPORT_SYMBOL_GPL(alloc_mscandev);
  587. MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
  588. MODULE_LICENSE("GPL v2");
  589. MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips");