pmac_cpufreq.c 19 KB

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  1. /*
  2. * arch/ppc/platforms/pmac_cpufreq.c
  3. *
  4. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  5. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * TODO: Need a big cleanup here. Basically, we need to have different
  12. * cpufreq_driver structures for the different type of HW instead of the
  13. * current mess. We also need to better deal with the detection of the
  14. * type of machine.
  15. *
  16. */
  17. #include <linux/config.h>
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/errno.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/sched.h>
  24. #include <linux/adb.h>
  25. #include <linux/pmu.h>
  26. #include <linux/slab.h>
  27. #include <linux/cpufreq.h>
  28. #include <linux/init.h>
  29. #include <linux/sysdev.h>
  30. #include <linux/i2c.h>
  31. #include <linux/hardirq.h>
  32. #include <asm/prom.h>
  33. #include <asm/machdep.h>
  34. #include <asm/irq.h>
  35. #include <asm/pmac_feature.h>
  36. #include <asm/mmu_context.h>
  37. #include <asm/sections.h>
  38. #include <asm/cputable.h>
  39. #include <asm/time.h>
  40. #include <asm/system.h>
  41. #include <asm/open_pic.h>
  42. #include <asm/keylargo.h>
  43. /* WARNING !!! This will cause calibrate_delay() to be called,
  44. * but this is an __init function ! So you MUST go edit
  45. * init/main.c to make it non-init before enabling DEBUG_FREQ
  46. */
  47. #undef DEBUG_FREQ
  48. /*
  49. * There is a problem with the core cpufreq code on SMP kernels,
  50. * it won't recalculate the Bogomips properly
  51. */
  52. #ifdef CONFIG_SMP
  53. #warning "WARNING, CPUFREQ not recommended on SMP kernels"
  54. #endif
  55. extern void low_choose_7447a_dfs(int dfs);
  56. extern void low_choose_750fx_pll(int pll);
  57. extern void low_sleep_handler(void);
  58. /*
  59. * Currently, PowerMac cpufreq supports only high & low frequencies
  60. * that are set by the firmware
  61. */
  62. static unsigned int low_freq;
  63. static unsigned int hi_freq;
  64. static unsigned int cur_freq;
  65. static unsigned int sleep_freq;
  66. /*
  67. * Different models uses different mecanisms to switch the frequency
  68. */
  69. static int (*set_speed_proc)(int low_speed);
  70. static unsigned int (*get_speed_proc)(void);
  71. /*
  72. * Some definitions used by the various speedprocs
  73. */
  74. static u32 voltage_gpio;
  75. static u32 frequency_gpio;
  76. static u32 slew_done_gpio;
  77. static int no_schedule;
  78. static int has_cpu_l2lve;
  79. /* There are only two frequency states for each processor. Values
  80. * are in kHz for the time being.
  81. */
  82. #define CPUFREQ_HIGH 0
  83. #define CPUFREQ_LOW 1
  84. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  85. {CPUFREQ_HIGH, 0},
  86. {CPUFREQ_LOW, 0},
  87. {0, CPUFREQ_TABLE_END},
  88. };
  89. static struct freq_attr* pmac_cpu_freqs_attr[] = {
  90. &cpufreq_freq_attr_scaling_available_freqs,
  91. NULL,
  92. };
  93. static inline void local_delay(unsigned long ms)
  94. {
  95. if (no_schedule)
  96. mdelay(ms);
  97. else
  98. msleep(ms);
  99. }
  100. static inline void wakeup_decrementer(void)
  101. {
  102. set_dec(tb_ticks_per_jiffy);
  103. /* No currently-supported powerbook has a 601,
  104. * so use get_tbl, not native
  105. */
  106. last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
  107. }
  108. #ifdef DEBUG_FREQ
  109. static inline void debug_calc_bogomips(void)
  110. {
  111. /* This will cause a recalc of bogomips and display the
  112. * result. We backup/restore the value to avoid affecting the
  113. * core cpufreq framework's own calculation.
  114. */
  115. extern void calibrate_delay(void);
  116. unsigned long save_lpj = loops_per_jiffy;
  117. calibrate_delay();
  118. loops_per_jiffy = save_lpj;
  119. }
  120. #endif /* DEBUG_FREQ */
  121. /* Switch CPU speed under 750FX CPU control
  122. */
  123. static int __pmac cpu_750fx_cpu_speed(int low_speed)
  124. {
  125. u32 hid2;
  126. if (low_speed == 0) {
  127. /* ramping up, set voltage first */
  128. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  129. /* Make sure we sleep for at least 1ms */
  130. local_delay(10);
  131. /* tweak L2 for high voltage */
  132. if (has_cpu_l2lve) {
  133. hid2 = mfspr(SPRN_HID2);
  134. hid2 &= ~0x2000;
  135. mtspr(SPRN_HID2, hid2);
  136. }
  137. }
  138. #ifdef CONFIG_6xx
  139. low_choose_750fx_pll(low_speed);
  140. #endif
  141. if (low_speed == 1) {
  142. /* tweak L2 for low voltage */
  143. if (has_cpu_l2lve) {
  144. hid2 = mfspr(SPRN_HID2);
  145. hid2 |= 0x2000;
  146. mtspr(SPRN_HID2, hid2);
  147. }
  148. /* ramping down, set voltage last */
  149. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  150. local_delay(10);
  151. }
  152. return 0;
  153. }
  154. static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
  155. {
  156. if (mfspr(SPRN_HID1) & HID1_PS)
  157. return low_freq;
  158. else
  159. return hi_freq;
  160. }
  161. /* Switch CPU speed using DFS */
  162. static int __pmac dfs_set_cpu_speed(int low_speed)
  163. {
  164. if (low_speed == 0) {
  165. /* ramping up, set voltage first */
  166. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  167. /* Make sure we sleep for at least 1ms */
  168. local_delay(1);
  169. }
  170. /* set frequency */
  171. #ifdef CONFIG_6xx
  172. low_choose_7447a_dfs(low_speed);
  173. #endif
  174. udelay(100);
  175. if (low_speed == 1) {
  176. /* ramping down, set voltage last */
  177. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  178. local_delay(1);
  179. }
  180. return 0;
  181. }
  182. static unsigned int __pmac dfs_get_cpu_speed(void)
  183. {
  184. if (mfspr(SPRN_HID1) & HID1_DFS)
  185. return low_freq;
  186. else
  187. return hi_freq;
  188. }
  189. /* Switch CPU speed using slewing GPIOs
  190. */
  191. static int __pmac gpios_set_cpu_speed(int low_speed)
  192. {
  193. int gpio, timeout = 0;
  194. /* If ramping up, set voltage first */
  195. if (low_speed == 0) {
  196. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  197. /* Delay is way too big but it's ok, we schedule */
  198. local_delay(10);
  199. }
  200. /* Set frequency */
  201. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  202. if (low_speed == ((gpio & 0x01) == 0))
  203. goto skip;
  204. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  205. low_speed ? 0x04 : 0x05);
  206. udelay(200);
  207. do {
  208. if (++timeout > 100)
  209. break;
  210. local_delay(1);
  211. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  212. } while((gpio & 0x02) == 0);
  213. skip:
  214. /* If ramping down, set voltage last */
  215. if (low_speed == 1) {
  216. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  217. /* Delay is way too big but it's ok, we schedule */
  218. local_delay(10);
  219. }
  220. #ifdef DEBUG_FREQ
  221. debug_calc_bogomips();
  222. #endif
  223. return 0;
  224. }
  225. /* Switch CPU speed under PMU control
  226. */
  227. static int __pmac pmu_set_cpu_speed(int low_speed)
  228. {
  229. struct adb_request req;
  230. unsigned long save_l2cr;
  231. unsigned long save_l3cr;
  232. unsigned int pic_prio;
  233. unsigned long flags;
  234. preempt_disable();
  235. #ifdef DEBUG_FREQ
  236. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  237. #endif
  238. pmu_suspend();
  239. /* Disable all interrupt sources on openpic */
  240. pic_prio = openpic_get_priority();
  241. openpic_set_priority(0xf);
  242. /* Make sure the decrementer won't interrupt us */
  243. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  244. /* Make sure any pending DEC interrupt occuring while we did
  245. * the above didn't re-enable the DEC */
  246. mb();
  247. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  248. /* We can now disable MSR_EE */
  249. local_irq_save(flags);
  250. /* Giveup the FPU & vec */
  251. enable_kernel_fp();
  252. #ifdef CONFIG_ALTIVEC
  253. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  254. enable_kernel_altivec();
  255. #endif /* CONFIG_ALTIVEC */
  256. /* Save & disable L2 and L3 caches */
  257. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  258. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  259. /* Send the new speed command. My assumption is that this command
  260. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  261. */
  262. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  263. while (!req.complete)
  264. pmu_poll();
  265. /* Prepare the northbridge for the speed transition */
  266. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  267. /* Call low level code to backup CPU state and recover from
  268. * hardware reset
  269. */
  270. low_sleep_handler();
  271. /* Restore the northbridge */
  272. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  273. /* Restore L2 cache */
  274. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  275. _set_L2CR(save_l2cr);
  276. /* Restore L3 cache */
  277. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  278. _set_L3CR(save_l3cr);
  279. /* Restore userland MMU context */
  280. set_context(current->active_mm->context, current->active_mm->pgd);
  281. #ifdef DEBUG_FREQ
  282. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  283. #endif
  284. /* Restore low level PMU operations */
  285. pmu_unlock();
  286. /* Restore decrementer */
  287. wakeup_decrementer();
  288. /* Restore interrupts */
  289. openpic_set_priority(pic_prio);
  290. /* Let interrupts flow again ... */
  291. local_irq_restore(flags);
  292. #ifdef DEBUG_FREQ
  293. debug_calc_bogomips();
  294. #endif
  295. pmu_resume();
  296. preempt_enable();
  297. return 0;
  298. }
  299. static int __pmac do_set_cpu_speed(int speed_mode, int notify)
  300. {
  301. struct cpufreq_freqs freqs;
  302. unsigned long l3cr;
  303. static unsigned long prev_l3cr;
  304. freqs.old = cur_freq;
  305. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  306. freqs.cpu = smp_processor_id();
  307. if (freqs.old == freqs.new)
  308. return 0;
  309. if (notify)
  310. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  311. if (speed_mode == CPUFREQ_LOW &&
  312. cpu_has_feature(CPU_FTR_L3CR)) {
  313. l3cr = _get_L3CR();
  314. if (l3cr & L3CR_L3E) {
  315. prev_l3cr = l3cr;
  316. _set_L3CR(0);
  317. }
  318. }
  319. set_speed_proc(speed_mode == CPUFREQ_LOW);
  320. if (speed_mode == CPUFREQ_HIGH &&
  321. cpu_has_feature(CPU_FTR_L3CR)) {
  322. l3cr = _get_L3CR();
  323. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  324. _set_L3CR(prev_l3cr);
  325. }
  326. if (notify)
  327. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  328. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  329. return 0;
  330. }
  331. static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu)
  332. {
  333. return cur_freq;
  334. }
  335. static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy)
  336. {
  337. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  338. }
  339. static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy,
  340. unsigned int target_freq,
  341. unsigned int relation)
  342. {
  343. unsigned int newstate = 0;
  344. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  345. target_freq, relation, &newstate))
  346. return -EINVAL;
  347. return do_set_cpu_speed(newstate, 1);
  348. }
  349. unsigned int __pmac pmac_get_one_cpufreq(int i)
  350. {
  351. /* Supports only one CPU for now */
  352. return (i == 0) ? cur_freq : 0;
  353. }
  354. static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  355. {
  356. if (policy->cpu != 0)
  357. return -ENODEV;
  358. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  359. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  360. policy->cur = cur_freq;
  361. cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
  362. return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
  363. }
  364. static u32 __pmac read_gpio(struct device_node *np)
  365. {
  366. u32 *reg = (u32 *)get_property(np, "reg", NULL);
  367. u32 offset;
  368. if (reg == NULL)
  369. return 0;
  370. /* That works for all keylargos but shall be fixed properly
  371. * some day... The problem is that it seems we can't rely
  372. * on the "reg" property of the GPIO nodes, they are either
  373. * relative to the base of KeyLargo or to the base of the
  374. * GPIO space, and the device-tree doesn't help.
  375. */
  376. offset = *reg;
  377. if (offset < KEYLARGO_GPIO_LEVELS0)
  378. offset += KEYLARGO_GPIO_LEVELS0;
  379. return offset;
  380. }
  381. static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, u32 state)
  382. {
  383. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  384. * always force a speed change to high speed before sleep, to make sure
  385. * we have appropriate voltage and/or bus speed for the wakeup process,
  386. * and to make sure our loops_per_jiffies are "good enough", that is will
  387. * not cause too short delays if we sleep in low speed and wake in high
  388. * speed..
  389. */
  390. no_schedule = 1;
  391. sleep_freq = cur_freq;
  392. if (cur_freq == low_freq)
  393. do_set_cpu_speed(CPUFREQ_HIGH, 0);
  394. return 0;
  395. }
  396. static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy)
  397. {
  398. /* If we resume, first check if we have a get() function */
  399. if (get_speed_proc)
  400. cur_freq = get_speed_proc();
  401. else
  402. cur_freq = 0;
  403. /* We don't, hrm... we don't really know our speed here, best
  404. * is that we force a switch to whatever it was, which is
  405. * probably high speed due to our suspend() routine
  406. */
  407. do_set_cpu_speed(sleep_freq == low_freq ?
  408. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  409. no_schedule = 0;
  410. return 0;
  411. }
  412. static struct cpufreq_driver pmac_cpufreq_driver = {
  413. .verify = pmac_cpufreq_verify,
  414. .target = pmac_cpufreq_target,
  415. .get = pmac_cpufreq_get_speed,
  416. .init = pmac_cpufreq_cpu_init,
  417. .suspend = pmac_cpufreq_suspend,
  418. .resume = pmac_cpufreq_resume,
  419. .flags = CPUFREQ_PM_NO_WARN,
  420. .attr = pmac_cpu_freqs_attr,
  421. .name = "powermac",
  422. .owner = THIS_MODULE,
  423. };
  424. static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  425. {
  426. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  427. "voltage-gpio");
  428. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  429. "frequency-gpio");
  430. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  431. "slewing-done");
  432. u32 *value;
  433. /*
  434. * Check to see if it's GPIO driven or PMU only
  435. *
  436. * The way we extract the GPIO address is slightly hackish, but it
  437. * works well enough for now. We need to abstract the whole GPIO
  438. * stuff sooner or later anyway
  439. */
  440. if (volt_gpio_np)
  441. voltage_gpio = read_gpio(volt_gpio_np);
  442. if (freq_gpio_np)
  443. frequency_gpio = read_gpio(freq_gpio_np);
  444. if (slew_done_gpio_np)
  445. slew_done_gpio = read_gpio(slew_done_gpio_np);
  446. /* If we use the frequency GPIOs, calculate the min/max speeds based
  447. * on the bus frequencies
  448. */
  449. if (frequency_gpio && slew_done_gpio) {
  450. int lenp, rc;
  451. u32 *freqs, *ratio;
  452. freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
  453. lenp /= sizeof(u32);
  454. if (freqs == NULL || lenp != 2) {
  455. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  456. return 1;
  457. }
  458. ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
  459. if (ratio == NULL) {
  460. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  461. return 1;
  462. }
  463. /* Get the min/max bus frequencies */
  464. low_freq = min(freqs[0], freqs[1]);
  465. hi_freq = max(freqs[0], freqs[1]);
  466. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  467. * frequency, it claims it to be around 84Mhz on some models while
  468. * it appears to be approx. 101Mhz on all. Let's hack around here...
  469. * fortunately, we don't need to be too precise
  470. */
  471. if (low_freq < 98000000)
  472. low_freq = 101000000;
  473. /* Convert those to CPU core clocks */
  474. low_freq = (low_freq * (*ratio)) / 2000;
  475. hi_freq = (hi_freq * (*ratio)) / 2000;
  476. /* Now we get the frequencies, we read the GPIO to see what is out current
  477. * speed
  478. */
  479. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  480. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  481. set_speed_proc = gpios_set_cpu_speed;
  482. return 1;
  483. }
  484. /* If we use the PMU, look for the min & max frequencies in the
  485. * device-tree
  486. */
  487. value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
  488. if (!value)
  489. return 1;
  490. low_freq = (*value) / 1000;
  491. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  492. * here */
  493. if (low_freq < 100000)
  494. low_freq *= 10;
  495. value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
  496. if (!value)
  497. return 1;
  498. hi_freq = (*value) / 1000;
  499. set_speed_proc = pmu_set_cpu_speed;
  500. return 0;
  501. }
  502. static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
  503. {
  504. struct device_node *volt_gpio_np;
  505. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  506. return 1;
  507. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  508. if (volt_gpio_np)
  509. voltage_gpio = read_gpio(volt_gpio_np);
  510. if (!voltage_gpio){
  511. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  512. return 1;
  513. }
  514. /* OF only reports the high frequency */
  515. hi_freq = cur_freq;
  516. low_freq = cur_freq/2;
  517. /* Read actual frequency from CPU */
  518. cur_freq = dfs_get_cpu_speed();
  519. set_speed_proc = dfs_set_cpu_speed;
  520. get_speed_proc = dfs_get_cpu_speed;
  521. return 0;
  522. }
  523. static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode)
  524. {
  525. struct device_node *volt_gpio_np;
  526. u32 pvr, *value;
  527. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  528. return 1;
  529. hi_freq = cur_freq;
  530. value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
  531. if (!value)
  532. return 1;
  533. low_freq = (*value) / 1000;
  534. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  535. if (volt_gpio_np)
  536. voltage_gpio = read_gpio(volt_gpio_np);
  537. pvr = mfspr(SPRN_PVR);
  538. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  539. set_speed_proc = cpu_750fx_cpu_speed;
  540. get_speed_proc = cpu_750fx_get_cpu_speed;
  541. cur_freq = cpu_750fx_get_cpu_speed();
  542. return 0;
  543. }
  544. /* Currently, we support the following machines:
  545. *
  546. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  547. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  548. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  549. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  550. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  551. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  552. * - Recent MacRISC3 laptops
  553. * - All new machines with 7447A CPUs
  554. */
  555. static int __init pmac_cpufreq_setup(void)
  556. {
  557. struct device_node *cpunode;
  558. u32 *value;
  559. if (strstr(cmd_line, "nocpufreq"))
  560. return 0;
  561. /* Assume only one CPU */
  562. cpunode = find_type_devices("cpu");
  563. if (!cpunode)
  564. goto out;
  565. /* Get current cpu clock freq */
  566. value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
  567. if (!value)
  568. goto out;
  569. cur_freq = (*value) / 1000;
  570. /* Check for 7447A based MacRISC3 */
  571. if (machine_is_compatible("MacRISC3") &&
  572. get_property(cpunode, "dynamic-power-step", NULL) &&
  573. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  574. pmac_cpufreq_init_7447A(cpunode);
  575. /* Check for other MacRISC3 machines */
  576. } else if (machine_is_compatible("PowerBook3,4") ||
  577. machine_is_compatible("PowerBook3,5") ||
  578. machine_is_compatible("MacRISC3")) {
  579. pmac_cpufreq_init_MacRISC3(cpunode);
  580. /* Else check for iBook2 500/600 */
  581. } else if (machine_is_compatible("PowerBook4,1")) {
  582. hi_freq = cur_freq;
  583. low_freq = 400000;
  584. set_speed_proc = pmu_set_cpu_speed;
  585. }
  586. /* Else check for TiPb 400 & 500 */
  587. else if (machine_is_compatible("PowerBook3,2")) {
  588. /* We only know about the 400 MHz and the 500Mhz model
  589. * they both have 300 MHz as low frequency
  590. */
  591. if (cur_freq < 350000 || cur_freq > 550000)
  592. goto out;
  593. hi_freq = cur_freq;
  594. low_freq = 300000;
  595. set_speed_proc = pmu_set_cpu_speed;
  596. }
  597. /* Else check for 750FX */
  598. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  599. pmac_cpufreq_init_750FX(cpunode);
  600. out:
  601. if (set_speed_proc == NULL)
  602. return -ENODEV;
  603. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  604. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  605. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  606. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  607. low_freq/1000, hi_freq/1000, cur_freq/1000);
  608. return cpufreq_register_driver(&pmac_cpufreq_driver);
  609. }
  610. module_init(pmac_cpufreq_setup);