smp.h 4.2 KB

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  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #ifndef __ASM_ARC_SMP_H
  9. #define __ASM_ARC_SMP_H
  10. #ifdef CONFIG_SMP
  11. #include <linux/types.h>
  12. #include <linux/init.h>
  13. #include <linux/threads.h>
  14. #define raw_smp_processor_id() (current_thread_info()->cpu)
  15. /* including cpumask.h leads to cyclic deps hence this Forward declaration */
  16. struct cpumask;
  17. /*
  18. * APIs provided by arch SMP code to generic code
  19. */
  20. extern void arch_send_call_function_single_ipi(int cpu);
  21. extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
  22. /*
  23. * APIs provided by arch SMP code to rest of arch code
  24. */
  25. extern void __init smp_init_cpus(void);
  26. extern void __init first_lines_of_secondary(void);
  27. /*
  28. * API expected BY platform smp code (FROM arch smp code)
  29. *
  30. * smp_ipi_irq_setup:
  31. * Takes @cpu and @irq to which the arch-common ISR is hooked up
  32. */
  33. extern int smp_ipi_irq_setup(int cpu, int irq);
  34. /*
  35. * APIs expected FROM platform smp code
  36. *
  37. * arc_platform_smp_cpuinfo:
  38. * returns a string containing info for /proc/cpuinfo
  39. *
  40. * arc_platform_smp_init_cpu:
  41. * Called from start_kernel_secondary to do any CPU local setup
  42. * such as starting a timer, setting up IPI etc
  43. *
  44. * arc_platform_smp_wait_to_boot:
  45. * Called from early bootup code for non-Master CPUs to "park" them
  46. *
  47. * arc_platform_smp_wakeup_cpu:
  48. * Called from __cpu_up (Master CPU) to kick start another one
  49. *
  50. * arc_platform_ipi_send:
  51. * Takes @cpumask to which IPI(s) would be sent.
  52. * The actual msg-id/buffer is manager in arch-common code
  53. *
  54. * arc_platform_ipi_clear:
  55. * Takes @cpu which got IPI at @irq to do any IPI clearing
  56. */
  57. extern const char *arc_platform_smp_cpuinfo(void);
  58. extern void arc_platform_smp_init_cpu(void);
  59. extern void arc_platform_smp_wait_to_boot(int cpu);
  60. extern void arc_platform_smp_wakeup_cpu(int cpu, unsigned long pc);
  61. extern void arc_platform_ipi_send(const struct cpumask *callmap);
  62. extern void arc_platform_ipi_clear(int cpu, int irq);
  63. #endif /* CONFIG_SMP */
  64. /*
  65. * ARC700 doesn't support atomic Read-Modify-Write ops.
  66. * Originally Interrupts had to be disabled around code to gaurantee atomicity.
  67. * The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops
  68. * based on retry-if-irq-in-atomic (with hardware assist).
  69. * However despite these, we provide the IRQ disabling variant
  70. *
  71. * (1) These insn were introduced only in 4.10 release. So for older released
  72. * support needed.
  73. *
  74. * (2) In a SMP setup, the LLOCK/SCOND atomiticity across CPUs needs to be
  75. * gaurantted by the platform (not something which core handles).
  76. * Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ
  77. * disabling for atomicity.
  78. *
  79. * However exported spinlock API is not usable due to cyclic hdr deps
  80. * (even after system.h disintegration upstream)
  81. * asm/bitops.h -> linux/spinlock.h -> linux/preempt.h
  82. * -> linux/thread_info.h -> linux/bitops.h -> asm/bitops.h
  83. *
  84. * So the workaround is to use the lowest level arch spinlock API.
  85. * The exported spinlock API is smart enough to be NOP for !CONFIG_SMP,
  86. * but same is not true for ARCH backend, hence the need for 2 variants
  87. */
  88. #ifndef CONFIG_ARC_HAS_LLSC
  89. #include <linux/irqflags.h>
  90. #ifdef CONFIG_SMP
  91. #include <asm/spinlock.h>
  92. extern arch_spinlock_t smp_atomic_ops_lock;
  93. extern arch_spinlock_t smp_bitops_lock;
  94. #define atomic_ops_lock(flags) do { \
  95. local_irq_save(flags); \
  96. arch_spin_lock(&smp_atomic_ops_lock); \
  97. } while (0)
  98. #define atomic_ops_unlock(flags) do { \
  99. arch_spin_unlock(&smp_atomic_ops_lock); \
  100. local_irq_restore(flags); \
  101. } while (0)
  102. #define bitops_lock(flags) do { \
  103. local_irq_save(flags); \
  104. arch_spin_lock(&smp_bitops_lock); \
  105. } while (0)
  106. #define bitops_unlock(flags) do { \
  107. arch_spin_unlock(&smp_bitops_lock); \
  108. local_irq_restore(flags); \
  109. } while (0)
  110. #else /* !CONFIG_SMP */
  111. #define atomic_ops_lock(flags) local_irq_save(flags)
  112. #define atomic_ops_unlock(flags) local_irq_restore(flags)
  113. #define bitops_lock(flags) local_irq_save(flags)
  114. #define bitops_unlock(flags) local_irq_restore(flags)
  115. #endif /* !CONFIG_SMP */
  116. #endif /* !CONFIG_ARC_HAS_LLSC */
  117. #endif