iwl3945-base.c 180 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  79. .sw_crypto = 1,
  80. .restart_fw = 1,
  81. /* the rest are 0 by default */
  82. };
  83. /*************** STATION TABLE MANAGEMENT ****
  84. * mac80211 should be examined to determine if sta_info is duplicating
  85. * the functionality provided here
  86. */
  87. /**************************************************************/
  88. #if 0 /* temporary disable till we add real remove station */
  89. /**
  90. * iwl3945_remove_station - Remove driver's knowledge of station.
  91. *
  92. * NOTE: This does not remove station from device's station table.
  93. */
  94. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  95. {
  96. int index = IWL_INVALID_STATION;
  97. int i;
  98. unsigned long flags;
  99. spin_lock_irqsave(&priv->sta_lock, flags);
  100. if (is_ap)
  101. index = IWL_AP_ID;
  102. else if (is_broadcast_ether_addr(addr))
  103. index = priv->hw_params.bcast_sta_id;
  104. else
  105. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  106. if (priv->stations_39[i].used &&
  107. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  108. addr)) {
  109. index = i;
  110. break;
  111. }
  112. if (unlikely(index == IWL_INVALID_STATION))
  113. goto out;
  114. if (priv->stations_39[index].used) {
  115. priv->stations_39[index].used = 0;
  116. priv->num_stations--;
  117. }
  118. BUG_ON(priv->num_stations < 0);
  119. out:
  120. spin_unlock_irqrestore(&priv->sta_lock, flags);
  121. return 0;
  122. }
  123. #endif
  124. /**
  125. * iwl3945_clear_stations_table - Clear the driver's station table
  126. *
  127. * NOTE: This does not clear or otherwise alter the device's station table.
  128. */
  129. static void iwl3945_clear_stations_table(struct iwl_priv *priv)
  130. {
  131. unsigned long flags;
  132. spin_lock_irqsave(&priv->sta_lock, flags);
  133. priv->num_stations = 0;
  134. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  135. spin_unlock_irqrestore(&priv->sta_lock, flags);
  136. }
  137. /**
  138. * iwl3945_add_station - Add station to station tables in driver and device
  139. */
  140. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  141. {
  142. int i;
  143. int index = IWL_INVALID_STATION;
  144. struct iwl3945_station_entry *station;
  145. unsigned long flags_spin;
  146. u8 rate;
  147. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  148. if (is_ap)
  149. index = IWL_AP_ID;
  150. else if (is_broadcast_ether_addr(addr))
  151. index = priv->hw_params.bcast_sta_id;
  152. else
  153. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  154. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  155. addr)) {
  156. index = i;
  157. break;
  158. }
  159. if (!priv->stations_39[i].used &&
  160. index == IWL_INVALID_STATION)
  161. index = i;
  162. }
  163. /* These two conditions has the same outcome but keep them separate
  164. since they have different meaning */
  165. if (unlikely(index == IWL_INVALID_STATION)) {
  166. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  167. return index;
  168. }
  169. if (priv->stations_39[index].used &&
  170. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  171. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  172. return index;
  173. }
  174. IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
  175. station = &priv->stations_39[index];
  176. station->used = 1;
  177. priv->num_stations++;
  178. /* Set up the REPLY_ADD_STA command to send to device */
  179. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  180. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  181. station->sta.mode = 0;
  182. station->sta.sta.sta_id = index;
  183. station->sta.station_flags = 0;
  184. if (priv->band == IEEE80211_BAND_5GHZ)
  185. rate = IWL_RATE_6M_PLCP;
  186. else
  187. rate = IWL_RATE_1M_PLCP;
  188. /* Turn on both antennas for the station... */
  189. station->sta.rate_n_flags =
  190. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  191. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  192. /* Add station to device's station table */
  193. iwl3945_send_add_station(priv, &station->sta, flags);
  194. return index;
  195. }
  196. int iwl3945_send_statistics_request(struct iwl_priv *priv)
  197. {
  198. u32 val = 0;
  199. struct iwl_host_cmd cmd = {
  200. .id = REPLY_STATISTICS_CMD,
  201. .len = sizeof(val),
  202. .data = &val,
  203. };
  204. return iwl_send_cmd_sync(priv, &cmd);
  205. }
  206. /**
  207. * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
  208. * @band: 2.4 or 5 GHz band
  209. * @channel: Any channel valid for the requested band
  210. * In addition to setting the staging RXON, priv->band is also set.
  211. *
  212. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  213. * in the staging RXON flag structure based on the band
  214. */
  215. static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
  216. enum ieee80211_band band,
  217. u16 channel)
  218. {
  219. if (!iwl_get_channel_info(priv, band, channel)) {
  220. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  221. channel, band);
  222. return -EINVAL;
  223. }
  224. if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
  225. (priv->band == band))
  226. return 0;
  227. priv->staging39_rxon.channel = cpu_to_le16(channel);
  228. if (band == IEEE80211_BAND_5GHZ)
  229. priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  230. else
  231. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  232. priv->band = band;
  233. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  234. return 0;
  235. }
  236. /**
  237. * iwl3945_check_rxon_cmd - validate RXON structure is valid
  238. *
  239. * NOTE: This is really only useful during development and can eventually
  240. * be #ifdef'd out once the driver is stable and folks aren't actively
  241. * making changes
  242. */
  243. static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
  244. {
  245. int error = 0;
  246. int counter = 1;
  247. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  248. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  249. error |= le32_to_cpu(rxon->flags &
  250. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  251. RXON_FLG_RADAR_DETECT_MSK));
  252. if (error)
  253. IWL_WARN(priv, "check 24G fields %d | %d\n",
  254. counter++, error);
  255. } else {
  256. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  257. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  258. if (error)
  259. IWL_WARN(priv, "check 52 fields %d | %d\n",
  260. counter++, error);
  261. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  262. if (error)
  263. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  264. counter++, error);
  265. }
  266. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  267. if (error)
  268. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  269. /* make sure basic rates 6Mbps and 1Mbps are supported */
  270. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  271. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  272. if (error)
  273. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  274. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  275. if (error)
  276. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  277. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  278. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  279. if (error)
  280. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  281. counter++, error);
  282. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  283. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  284. if (error)
  285. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  286. counter++, error);
  287. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  288. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  289. if (error)
  290. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  291. counter++, error);
  292. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  293. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  294. RXON_FLG_ANT_A_MSK)) == 0);
  295. if (error)
  296. IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
  297. if (error)
  298. IWL_WARN(priv, "Tuning to channel %d\n",
  299. le16_to_cpu(rxon->channel));
  300. if (error) {
  301. IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
  302. return -1;
  303. }
  304. return 0;
  305. }
  306. /**
  307. * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  308. * @priv: staging_rxon is compared to active_rxon
  309. *
  310. * If the RXON structure is changing enough to require a new tune,
  311. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  312. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  313. */
  314. static int iwl3945_full_rxon_required(struct iwl_priv *priv)
  315. {
  316. /* These items are only settable from the full RXON command */
  317. if (!(iwl3945_is_associated(priv)) ||
  318. compare_ether_addr(priv->staging39_rxon.bssid_addr,
  319. priv->active39_rxon.bssid_addr) ||
  320. compare_ether_addr(priv->staging39_rxon.node_addr,
  321. priv->active39_rxon.node_addr) ||
  322. compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
  323. priv->active39_rxon.wlap_bssid_addr) ||
  324. (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
  325. (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
  326. (priv->staging39_rxon.air_propagation !=
  327. priv->active39_rxon.air_propagation) ||
  328. (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
  329. return 1;
  330. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  331. * be updated with the RXON_ASSOC command -- however only some
  332. * flag transitions are allowed using RXON_ASSOC */
  333. /* Check if we are not switching bands */
  334. if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  335. (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
  336. return 1;
  337. /* Check if we are switching association toggle */
  338. if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  339. (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  340. return 1;
  341. return 0;
  342. }
  343. static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
  344. {
  345. int rc = 0;
  346. struct iwl_rx_packet *res = NULL;
  347. struct iwl3945_rxon_assoc_cmd rxon_assoc;
  348. struct iwl_host_cmd cmd = {
  349. .id = REPLY_RXON_ASSOC,
  350. .len = sizeof(rxon_assoc),
  351. .meta.flags = CMD_WANT_SKB,
  352. .data = &rxon_assoc,
  353. };
  354. const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
  355. const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
  356. if ((rxon1->flags == rxon2->flags) &&
  357. (rxon1->filter_flags == rxon2->filter_flags) &&
  358. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  359. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  360. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  361. return 0;
  362. }
  363. rxon_assoc.flags = priv->staging39_rxon.flags;
  364. rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
  365. rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
  366. rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
  367. rxon_assoc.reserved = 0;
  368. rc = iwl_send_cmd_sync(priv, &cmd);
  369. if (rc)
  370. return rc;
  371. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  372. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  373. IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
  374. rc = -EIO;
  375. }
  376. priv->alloc_rxb_skb--;
  377. dev_kfree_skb_any(cmd.meta.u.skb);
  378. return rc;
  379. }
  380. /**
  381. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  382. * @priv: eeprom and antenna fields are used to determine antenna flags
  383. *
  384. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  385. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  386. *
  387. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  388. * IWL_ANTENNA_MAIN - Force MAIN antenna
  389. * IWL_ANTENNA_AUX - Force AUX antenna
  390. */
  391. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  392. {
  393. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  394. switch (iwl3945_mod_params.antenna) {
  395. case IWL_ANTENNA_DIVERSITY:
  396. return 0;
  397. case IWL_ANTENNA_MAIN:
  398. if (eeprom->antenna_switch_type)
  399. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  400. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  401. case IWL_ANTENNA_AUX:
  402. if (eeprom->antenna_switch_type)
  403. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  404. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  405. }
  406. /* bad antenna selector value */
  407. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  408. iwl3945_mod_params.antenna);
  409. return 0; /* "diversity" is default if error */
  410. }
  411. /**
  412. * iwl3945_commit_rxon - commit staging_rxon to hardware
  413. *
  414. * The RXON command in staging_rxon is committed to the hardware and
  415. * the active_rxon structure is updated with the new data. This
  416. * function correctly transitions out of the RXON_ASSOC_MSK state if
  417. * a HW tune is required based on the RXON structure changes.
  418. */
  419. static int iwl3945_commit_rxon(struct iwl_priv *priv)
  420. {
  421. /* cast away the const for active_rxon in this function */
  422. struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
  423. int rc = 0;
  424. if (!iwl_is_alive(priv))
  425. return -1;
  426. /* always get timestamp with Rx frame */
  427. priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  428. /* select antenna */
  429. priv->staging39_rxon.flags &=
  430. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  431. priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
  432. rc = iwl3945_check_rxon_cmd(priv);
  433. if (rc) {
  434. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  435. return -EINVAL;
  436. }
  437. /* If we don't need to send a full RXON, we can use
  438. * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
  439. * and other flags for the current radio configuration. */
  440. if (!iwl3945_full_rxon_required(priv)) {
  441. rc = iwl3945_send_rxon_assoc(priv);
  442. if (rc) {
  443. IWL_ERR(priv, "Error setting RXON_ASSOC "
  444. "configuration (%d).\n", rc);
  445. return rc;
  446. }
  447. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  448. return 0;
  449. }
  450. /* If we are currently associated and the new config requires
  451. * an RXON_ASSOC and the new config wants the associated mask enabled,
  452. * we must clear the associated from the active configuration
  453. * before we apply the new config */
  454. if (iwl3945_is_associated(priv) &&
  455. (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  456. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  457. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  458. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  459. sizeof(struct iwl3945_rxon_cmd),
  460. &priv->active39_rxon);
  461. /* If the mask clearing failed then we set
  462. * active_rxon back to what it was previously */
  463. if (rc) {
  464. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  465. IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
  466. "configuration (%d).\n", rc);
  467. return rc;
  468. }
  469. }
  470. IWL_DEBUG_INFO("Sending RXON\n"
  471. "* with%s RXON_FILTER_ASSOC_MSK\n"
  472. "* channel = %d\n"
  473. "* bssid = %pM\n",
  474. ((priv->staging39_rxon.filter_flags &
  475. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  476. le16_to_cpu(priv->staging39_rxon.channel),
  477. priv->staging_rxon.bssid_addr);
  478. /* Apply the new configuration */
  479. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  480. sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
  481. if (rc) {
  482. IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
  483. return rc;
  484. }
  485. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  486. iwl3945_clear_stations_table(priv);
  487. /* If we issue a new RXON command which required a tune then we must
  488. * send a new TXPOWER command or we won't be able to Tx any frames */
  489. rc = priv->cfg->ops->lib->send_tx_power(priv);
  490. if (rc) {
  491. IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
  492. return rc;
  493. }
  494. /* Add the broadcast address so we can send broadcast frames */
  495. if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
  496. IWL_INVALID_STATION) {
  497. IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
  498. return -EIO;
  499. }
  500. /* If we have set the ASSOC_MSK and we are in BSS mode then
  501. * add the IWL_AP_ID to the station rate table */
  502. if (iwl3945_is_associated(priv) &&
  503. (priv->iw_mode == NL80211_IFTYPE_STATION))
  504. if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
  505. == IWL_INVALID_STATION) {
  506. IWL_ERR(priv, "Error adding AP address for transmit\n");
  507. return -EIO;
  508. }
  509. /* Init the hardware's rate fallback order based on the band */
  510. rc = iwl3945_init_hw_rate_table(priv);
  511. if (rc) {
  512. IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
  513. return -EIO;
  514. }
  515. return 0;
  516. }
  517. static int iwl3945_send_bt_config(struct iwl_priv *priv)
  518. {
  519. struct iwl_bt_cmd bt_cmd = {
  520. .flags = 3,
  521. .lead_time = 0xAA,
  522. .max_kill = 1,
  523. .kill_ack_mask = 0,
  524. .kill_cts_mask = 0,
  525. };
  526. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  527. sizeof(bt_cmd), &bt_cmd);
  528. }
  529. static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
  530. struct iwl_cmd *cmd, struct sk_buff *skb)
  531. {
  532. struct iwl_rx_packet *res = NULL;
  533. if (!skb) {
  534. IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
  535. return 1;
  536. }
  537. res = (struct iwl_rx_packet *)skb->data;
  538. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  539. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  540. res->hdr.flags);
  541. return 1;
  542. }
  543. switch (res->u.add_sta.status) {
  544. case ADD_STA_SUCCESS_MSK:
  545. break;
  546. default:
  547. break;
  548. }
  549. /* We didn't cache the SKB; let the caller free it */
  550. return 1;
  551. }
  552. int iwl3945_send_add_station(struct iwl_priv *priv,
  553. struct iwl3945_addsta_cmd *sta, u8 flags)
  554. {
  555. struct iwl_rx_packet *res = NULL;
  556. int rc = 0;
  557. struct iwl_host_cmd cmd = {
  558. .id = REPLY_ADD_STA,
  559. .len = sizeof(struct iwl3945_addsta_cmd),
  560. .meta.flags = flags,
  561. .data = sta,
  562. };
  563. if (flags & CMD_ASYNC)
  564. cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
  565. else
  566. cmd.meta.flags |= CMD_WANT_SKB;
  567. rc = iwl_send_cmd(priv, &cmd);
  568. if (rc || (flags & CMD_ASYNC))
  569. return rc;
  570. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  571. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  572. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  573. res->hdr.flags);
  574. rc = -EIO;
  575. }
  576. if (rc == 0) {
  577. switch (res->u.add_sta.status) {
  578. case ADD_STA_SUCCESS_MSK:
  579. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  580. break;
  581. default:
  582. rc = -EIO;
  583. IWL_WARN(priv, "REPLY_ADD_STA failed\n");
  584. break;
  585. }
  586. }
  587. priv->alloc_rxb_skb--;
  588. dev_kfree_skb_any(cmd.meta.u.skb);
  589. return rc;
  590. }
  591. static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
  592. struct ieee80211_key_conf *keyconf,
  593. u8 sta_id)
  594. {
  595. unsigned long flags;
  596. __le16 key_flags = 0;
  597. switch (keyconf->alg) {
  598. case ALG_CCMP:
  599. key_flags |= STA_KEY_FLG_CCMP;
  600. key_flags |= cpu_to_le16(
  601. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  602. key_flags &= ~STA_KEY_FLG_INVALID;
  603. break;
  604. case ALG_TKIP:
  605. case ALG_WEP:
  606. default:
  607. return -EINVAL;
  608. }
  609. spin_lock_irqsave(&priv->sta_lock, flags);
  610. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  611. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  612. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  613. keyconf->keylen);
  614. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  615. keyconf->keylen);
  616. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  617. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  618. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  619. spin_unlock_irqrestore(&priv->sta_lock, flags);
  620. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  621. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  622. return 0;
  623. }
  624. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  625. {
  626. unsigned long flags;
  627. spin_lock_irqsave(&priv->sta_lock, flags);
  628. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  629. memset(&priv->stations_39[sta_id].sta.key, 0,
  630. sizeof(struct iwl4965_keyinfo));
  631. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  632. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  633. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  634. spin_unlock_irqrestore(&priv->sta_lock, flags);
  635. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  636. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  637. return 0;
  638. }
  639. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  640. {
  641. struct list_head *element;
  642. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  643. priv->frames_count);
  644. while (!list_empty(&priv->free_frames)) {
  645. element = priv->free_frames.next;
  646. list_del(element);
  647. kfree(list_entry(element, struct iwl3945_frame, list));
  648. priv->frames_count--;
  649. }
  650. if (priv->frames_count) {
  651. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  652. priv->frames_count);
  653. priv->frames_count = 0;
  654. }
  655. }
  656. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  657. {
  658. struct iwl3945_frame *frame;
  659. struct list_head *element;
  660. if (list_empty(&priv->free_frames)) {
  661. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  662. if (!frame) {
  663. IWL_ERR(priv, "Could not allocate frame!\n");
  664. return NULL;
  665. }
  666. priv->frames_count++;
  667. return frame;
  668. }
  669. element = priv->free_frames.next;
  670. list_del(element);
  671. return list_entry(element, struct iwl3945_frame, list);
  672. }
  673. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  674. {
  675. memset(frame, 0, sizeof(*frame));
  676. list_add(&frame->list, &priv->free_frames);
  677. }
  678. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  679. struct ieee80211_hdr *hdr,
  680. int left)
  681. {
  682. if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
  683. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  684. (priv->iw_mode != NL80211_IFTYPE_AP)))
  685. return 0;
  686. if (priv->ibss_beacon->len > left)
  687. return 0;
  688. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  689. return priv->ibss_beacon->len;
  690. }
  691. static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
  692. {
  693. u8 i;
  694. int rate_mask;
  695. /* Set rate mask*/
  696. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  697. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  698. else
  699. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  700. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  701. i = iwl3945_rates[i].next_ieee) {
  702. if (rate_mask & (1 << i))
  703. return iwl3945_rates[i].plcp;
  704. }
  705. /* No valid rate was found. Assign the lowest one */
  706. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  707. return IWL_RATE_1M_PLCP;
  708. else
  709. return IWL_RATE_6M_PLCP;
  710. }
  711. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  712. {
  713. struct iwl3945_frame *frame;
  714. unsigned int frame_size;
  715. int rc;
  716. u8 rate;
  717. frame = iwl3945_get_free_frame(priv);
  718. if (!frame) {
  719. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  720. "command.\n");
  721. return -ENOMEM;
  722. }
  723. rate = iwl3945_rate_get_lowest_plcp(priv);
  724. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  725. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  726. &frame->u.cmd[0]);
  727. iwl3945_free_frame(priv, frame);
  728. return rc;
  729. }
  730. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  731. {
  732. if (priv->shared_virt)
  733. pci_free_consistent(priv->pci_dev,
  734. sizeof(struct iwl3945_shared),
  735. priv->shared_virt,
  736. priv->shared_phys);
  737. }
  738. /*
  739. * QoS support
  740. */
  741. static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
  742. struct iwl_qosparam_cmd *qos)
  743. {
  744. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  745. sizeof(struct iwl_qosparam_cmd), qos);
  746. }
  747. static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
  748. {
  749. unsigned long flags;
  750. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  751. return;
  752. spin_lock_irqsave(&priv->lock, flags);
  753. priv->qos_data.def_qos_parm.qos_flags = 0;
  754. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  755. !priv->qos_data.qos_cap.q_AP.txop_request)
  756. priv->qos_data.def_qos_parm.qos_flags |=
  757. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  758. if (priv->qos_data.qos_active)
  759. priv->qos_data.def_qos_parm.qos_flags |=
  760. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  761. spin_unlock_irqrestore(&priv->lock, flags);
  762. if (force || iwl3945_is_associated(priv)) {
  763. IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
  764. priv->qos_data.qos_active);
  765. iwl3945_send_qos_params_command(priv,
  766. &(priv->qos_data.def_qos_parm));
  767. }
  768. }
  769. /*
  770. * Power management (not Tx power!) functions
  771. */
  772. #define MSEC_TO_USEC 1024
  773. /* default power management (not Tx power) table values */
  774. /* for TIM 0-10 */
  775. static struct iwl_power_vec_entry range_0[IWL_POWER_MAX] = {
  776. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  777. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  778. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  779. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  780. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  781. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  782. };
  783. /* for TIM > 10 */
  784. static struct iwl_power_vec_entry range_1[IWL_POWER_MAX] = {
  785. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  786. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  787. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  788. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  789. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  790. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  791. };
  792. int iwl3945_power_init_handle(struct iwl_priv *priv)
  793. {
  794. int rc = 0, i;
  795. struct iwl_power_mgr *pow_data;
  796. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX;
  797. u16 pci_pm;
  798. IWL_DEBUG_POWER("Initialize power \n");
  799. pow_data = &priv->power_data;
  800. memset(pow_data, 0, sizeof(*pow_data));
  801. pow_data->dtim_period = 1;
  802. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  803. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  804. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  805. if (rc != 0)
  806. return 0;
  807. else {
  808. struct iwl_powertable_cmd *cmd;
  809. IWL_DEBUG_POWER("adjust power command flags\n");
  810. for (i = 0; i < IWL_POWER_MAX; i++) {
  811. cmd = &pow_data->pwr_range_0[i].cmd;
  812. if (pci_pm & 0x1)
  813. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  814. else
  815. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  816. }
  817. }
  818. return rc;
  819. }
  820. static int iwl3945_update_power_cmd(struct iwl_priv *priv,
  821. struct iwl_powertable_cmd *cmd, u32 mode)
  822. {
  823. struct iwl_power_mgr *pow_data;
  824. struct iwl_power_vec_entry *range;
  825. u32 max_sleep = 0;
  826. int i;
  827. u8 period = 0;
  828. bool skip;
  829. if (mode > IWL_POWER_INDEX_5) {
  830. IWL_DEBUG_POWER("Error invalid power mode \n");
  831. return -EINVAL;
  832. }
  833. pow_data = &priv->power_data;
  834. if (pow_data->dtim_period < 10)
  835. range = &pow_data->pwr_range_0[0];
  836. else
  837. range = &pow_data->pwr_range_1[1];
  838. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
  839. if (period == 0) {
  840. period = 1;
  841. skip = false;
  842. } else {
  843. skip = !!range[mode].no_dtim;
  844. }
  845. if (skip) {
  846. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  847. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  848. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  849. } else {
  850. max_sleep = period;
  851. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  852. }
  853. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  854. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  855. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  856. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  857. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  858. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  859. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  860. le32_to_cpu(cmd->sleep_interval[0]),
  861. le32_to_cpu(cmd->sleep_interval[1]),
  862. le32_to_cpu(cmd->sleep_interval[2]),
  863. le32_to_cpu(cmd->sleep_interval[3]),
  864. le32_to_cpu(cmd->sleep_interval[4]));
  865. return 0;
  866. }
  867. static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
  868. {
  869. u32 uninitialized_var(final_mode);
  870. int rc;
  871. struct iwl_powertable_cmd cmd;
  872. /* If on battery, set to 3,
  873. * if plugged into AC power, set to CAM ("continuously aware mode"),
  874. * else user level */
  875. switch (mode) {
  876. case IWL39_POWER_BATTERY:
  877. final_mode = IWL_POWER_INDEX_3;
  878. break;
  879. case IWL39_POWER_AC:
  880. final_mode = IWL_POWER_MODE_CAM;
  881. break;
  882. default:
  883. final_mode = mode;
  884. break;
  885. }
  886. iwl3945_update_power_cmd(priv, &cmd, final_mode);
  887. /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
  888. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
  889. sizeof(struct iwl3945_powertable_cmd), &cmd);
  890. if (final_mode == IWL_POWER_MODE_CAM)
  891. clear_bit(STATUS_POWER_PMI, &priv->status);
  892. else
  893. set_bit(STATUS_POWER_PMI, &priv->status);
  894. return rc;
  895. }
  896. #define MAX_UCODE_BEACON_INTERVAL 1024
  897. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  898. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  899. {
  900. u16 new_val = 0;
  901. u16 beacon_factor = 0;
  902. beacon_factor =
  903. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  904. / MAX_UCODE_BEACON_INTERVAL;
  905. new_val = beacon_val / beacon_factor;
  906. return cpu_to_le16(new_val);
  907. }
  908. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  909. {
  910. u64 interval_tm_unit;
  911. u64 tsf, result;
  912. unsigned long flags;
  913. struct ieee80211_conf *conf = NULL;
  914. u16 beacon_int = 0;
  915. conf = ieee80211_get_hw_conf(priv->hw);
  916. spin_lock_irqsave(&priv->lock, flags);
  917. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  918. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  919. tsf = priv->timestamp;
  920. beacon_int = priv->beacon_int;
  921. spin_unlock_irqrestore(&priv->lock, flags);
  922. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  923. if (beacon_int == 0) {
  924. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  925. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  926. } else {
  927. priv->rxon_timing.beacon_interval =
  928. cpu_to_le16(beacon_int);
  929. priv->rxon_timing.beacon_interval =
  930. iwl3945_adjust_beacon_interval(
  931. le16_to_cpu(priv->rxon_timing.beacon_interval));
  932. }
  933. priv->rxon_timing.atim_window = 0;
  934. } else {
  935. priv->rxon_timing.beacon_interval =
  936. iwl3945_adjust_beacon_interval(conf->beacon_int);
  937. /* TODO: we need to get atim_window from upper stack
  938. * for now we set to 0 */
  939. priv->rxon_timing.atim_window = 0;
  940. }
  941. interval_tm_unit =
  942. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  943. result = do_div(tsf, interval_tm_unit);
  944. priv->rxon_timing.beacon_init_val =
  945. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  946. IWL_DEBUG_ASSOC
  947. ("beacon interval %d beacon timer %d beacon tim %d\n",
  948. le16_to_cpu(priv->rxon_timing.beacon_interval),
  949. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  950. le16_to_cpu(priv->rxon_timing.atim_window));
  951. }
  952. static int iwl3945_scan_initiate(struct iwl_priv *priv)
  953. {
  954. if (!iwl_is_ready_rf(priv)) {
  955. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  956. return -EIO;
  957. }
  958. if (test_bit(STATUS_SCANNING, &priv->status)) {
  959. IWL_DEBUG_SCAN("Scan already in progress.\n");
  960. return -EAGAIN;
  961. }
  962. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  963. IWL_DEBUG_SCAN("Scan request while abort pending. "
  964. "Queuing.\n");
  965. return -EAGAIN;
  966. }
  967. IWL_DEBUG_INFO("Starting scan...\n");
  968. if (priv->cfg->sku & IWL_SKU_G)
  969. priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
  970. if (priv->cfg->sku & IWL_SKU_A)
  971. priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
  972. set_bit(STATUS_SCANNING, &priv->status);
  973. priv->scan_start = jiffies;
  974. priv->scan_pass_start = priv->scan_start;
  975. queue_work(priv->workqueue, &priv->request_scan);
  976. return 0;
  977. }
  978. static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  979. {
  980. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  981. if (hw_decrypt)
  982. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  983. else
  984. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  985. return 0;
  986. }
  987. static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
  988. enum ieee80211_band band)
  989. {
  990. if (band == IEEE80211_BAND_5GHZ) {
  991. priv->staging39_rxon.flags &=
  992. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  993. | RXON_FLG_CCK_MSK);
  994. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  995. } else {
  996. /* Copied from iwl3945_bg_post_associate() */
  997. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  998. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  999. else
  1000. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1001. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1002. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1003. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1004. priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1005. priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1006. }
  1007. }
  1008. /*
  1009. * initialize rxon structure with default values from eeprom
  1010. */
  1011. static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
  1012. int mode)
  1013. {
  1014. const struct iwl_channel_info *ch_info;
  1015. memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
  1016. switch (mode) {
  1017. case NL80211_IFTYPE_AP:
  1018. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
  1019. break;
  1020. case NL80211_IFTYPE_STATION:
  1021. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1022. priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1023. break;
  1024. case NL80211_IFTYPE_ADHOC:
  1025. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1026. priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1027. priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1028. RXON_FILTER_ACCEPT_GRP_MSK;
  1029. break;
  1030. case NL80211_IFTYPE_MONITOR:
  1031. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1032. priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1033. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1034. break;
  1035. default:
  1036. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  1037. break;
  1038. }
  1039. #if 0
  1040. /* TODO: Figure out when short_preamble would be set and cache from
  1041. * that */
  1042. if (!hw_to_local(priv->hw)->short_preamble)
  1043. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1044. else
  1045. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1046. #endif
  1047. ch_info = iwl_get_channel_info(priv, priv->band,
  1048. le16_to_cpu(priv->active39_rxon.channel));
  1049. if (!ch_info)
  1050. ch_info = &priv->channel_info[0];
  1051. /*
  1052. * in some case A channels are all non IBSS
  1053. * in this case force B/G channel
  1054. */
  1055. if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
  1056. ch_info = &priv->channel_info[0];
  1057. priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
  1058. if (is_channel_a_band(ch_info))
  1059. priv->band = IEEE80211_BAND_5GHZ;
  1060. else
  1061. priv->band = IEEE80211_BAND_2GHZ;
  1062. iwl3945_set_flags_for_phymode(priv, priv->band);
  1063. priv->staging39_rxon.ofdm_basic_rates =
  1064. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1065. priv->staging39_rxon.cck_basic_rates =
  1066. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1067. }
  1068. static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
  1069. {
  1070. if (mode == NL80211_IFTYPE_ADHOC) {
  1071. const struct iwl_channel_info *ch_info;
  1072. ch_info = iwl_get_channel_info(priv,
  1073. priv->band,
  1074. le16_to_cpu(priv->staging39_rxon.channel));
  1075. if (!ch_info || !is_channel_ibss(ch_info)) {
  1076. IWL_ERR(priv, "channel %d not IBSS channel\n",
  1077. le16_to_cpu(priv->staging39_rxon.channel));
  1078. return -EINVAL;
  1079. }
  1080. }
  1081. iwl3945_connection_init_rx_config(priv, mode);
  1082. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1083. iwl3945_clear_stations_table(priv);
  1084. /* don't commit rxon if rf-kill is on*/
  1085. if (!iwl_is_ready_rf(priv))
  1086. return -EAGAIN;
  1087. cancel_delayed_work(&priv->scan_check);
  1088. if (iwl_scan_cancel_timeout(priv, 100)) {
  1089. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1090. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1091. return -EAGAIN;
  1092. }
  1093. iwl3945_commit_rxon(priv);
  1094. return 0;
  1095. }
  1096. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1097. struct ieee80211_tx_info *info,
  1098. struct iwl_cmd *cmd,
  1099. struct sk_buff *skb_frag,
  1100. int last_frag)
  1101. {
  1102. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1103. struct iwl3945_hw_key *keyinfo =
  1104. &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
  1105. switch (keyinfo->alg) {
  1106. case ALG_CCMP:
  1107. tx->sec_ctl = TX_CMD_SEC_CCM;
  1108. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  1109. IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
  1110. break;
  1111. case ALG_TKIP:
  1112. #if 0
  1113. tx->sec_ctl = TX_CMD_SEC_TKIP;
  1114. if (last_frag)
  1115. memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
  1116. 8);
  1117. else
  1118. memset(tx->tkip_mic.byte, 0, 8);
  1119. #endif
  1120. break;
  1121. case ALG_WEP:
  1122. tx->sec_ctl = TX_CMD_SEC_WEP |
  1123. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1124. if (keyinfo->keylen == 13)
  1125. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  1126. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  1127. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1128. "with key %d\n", info->control.hw_key->hw_key_idx);
  1129. break;
  1130. default:
  1131. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  1132. break;
  1133. }
  1134. }
  1135. /*
  1136. * handle build REPLY_TX command notification.
  1137. */
  1138. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  1139. struct iwl_cmd *cmd,
  1140. struct ieee80211_tx_info *info,
  1141. struct ieee80211_hdr *hdr, u8 std_id)
  1142. {
  1143. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1144. __le32 tx_flags = tx->tx_flags;
  1145. __le16 fc = hdr->frame_control;
  1146. u8 rc_flags = info->control.rates[0].flags;
  1147. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1148. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  1149. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1150. if (ieee80211_is_mgmt(fc))
  1151. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1152. if (ieee80211_is_probe_resp(fc) &&
  1153. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1154. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1155. } else {
  1156. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1157. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1158. }
  1159. tx->sta_id = std_id;
  1160. if (ieee80211_has_morefrags(fc))
  1161. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1162. if (ieee80211_is_data_qos(fc)) {
  1163. u8 *qc = ieee80211_get_qos_ctl(hdr);
  1164. tx->tid_tspec = qc[0] & 0xf;
  1165. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1166. } else {
  1167. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1168. }
  1169. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  1170. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1171. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1172. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  1173. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1174. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1175. }
  1176. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1177. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1178. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1179. if (ieee80211_is_mgmt(fc)) {
  1180. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  1181. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  1182. else
  1183. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  1184. } else {
  1185. tx->timeout.pm_frame_timeout = 0;
  1186. #ifdef CONFIG_IWL3945_LEDS
  1187. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  1188. #endif
  1189. }
  1190. tx->driver_txop = 0;
  1191. tx->tx_flags = tx_flags;
  1192. tx->next_frame_len = 0;
  1193. }
  1194. /**
  1195. * iwl3945_get_sta_id - Find station's index within station table
  1196. */
  1197. static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  1198. {
  1199. int sta_id;
  1200. u16 fc = le16_to_cpu(hdr->frame_control);
  1201. /* If this frame is broadcast or management, use broadcast station id */
  1202. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1203. is_multicast_ether_addr(hdr->addr1))
  1204. return priv->hw_params.bcast_sta_id;
  1205. switch (priv->iw_mode) {
  1206. /* If we are a client station in a BSS network, use the special
  1207. * AP station entry (that's the only station we communicate with) */
  1208. case NL80211_IFTYPE_STATION:
  1209. return IWL_AP_ID;
  1210. /* If we are an AP, then find the station, or use BCAST */
  1211. case NL80211_IFTYPE_AP:
  1212. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1213. if (sta_id != IWL_INVALID_STATION)
  1214. return sta_id;
  1215. return priv->hw_params.bcast_sta_id;
  1216. /* If this frame is going out to an IBSS network, find the station,
  1217. * or create a new station table entry */
  1218. case NL80211_IFTYPE_ADHOC: {
  1219. /* Create new station table entry */
  1220. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1221. if (sta_id != IWL_INVALID_STATION)
  1222. return sta_id;
  1223. sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  1224. if (sta_id != IWL_INVALID_STATION)
  1225. return sta_id;
  1226. IWL_DEBUG_DROP("Station %pM not in station map. "
  1227. "Defaulting to broadcast...\n",
  1228. hdr->addr1);
  1229. iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1230. return priv->hw_params.bcast_sta_id;
  1231. }
  1232. /* If we are in monitor mode, use BCAST. This is required for
  1233. * packet injection. */
  1234. case NL80211_IFTYPE_MONITOR:
  1235. return priv->hw_params.bcast_sta_id;
  1236. default:
  1237. IWL_WARN(priv, "Unknown mode of operation: %d\n",
  1238. priv->iw_mode);
  1239. return priv->hw_params.bcast_sta_id;
  1240. }
  1241. }
  1242. /*
  1243. * start REPLY_TX command process
  1244. */
  1245. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  1246. {
  1247. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1248. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1249. struct iwl3945_tx_cmd *tx;
  1250. struct iwl_tx_queue *txq = NULL;
  1251. struct iwl_queue *q = NULL;
  1252. struct iwl_cmd *out_cmd = NULL;
  1253. dma_addr_t phys_addr;
  1254. dma_addr_t txcmd_phys;
  1255. int txq_id = skb_get_queue_mapping(skb);
  1256. u16 len, idx, len_org, hdr_len;
  1257. u8 id;
  1258. u8 unicast;
  1259. u8 sta_id;
  1260. u8 tid = 0;
  1261. u16 seq_number = 0;
  1262. __le16 fc;
  1263. u8 wait_write_ptr = 0;
  1264. u8 *qc = NULL;
  1265. unsigned long flags;
  1266. int rc;
  1267. spin_lock_irqsave(&priv->lock, flags);
  1268. if (iwl_is_rfkill(priv)) {
  1269. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1270. goto drop_unlock;
  1271. }
  1272. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1273. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  1274. goto drop_unlock;
  1275. }
  1276. unicast = !is_multicast_ether_addr(hdr->addr1);
  1277. id = 0;
  1278. fc = hdr->frame_control;
  1279. #ifdef CONFIG_IWLWIFI_DEBUG
  1280. if (ieee80211_is_auth(fc))
  1281. IWL_DEBUG_TX("Sending AUTH frame\n");
  1282. else if (ieee80211_is_assoc_req(fc))
  1283. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1284. else if (ieee80211_is_reassoc_req(fc))
  1285. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1286. #endif
  1287. /* drop all data frame if we are not associated */
  1288. if (ieee80211_is_data(fc) &&
  1289. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  1290. (!iwl3945_is_associated(priv) ||
  1291. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  1292. IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
  1293. goto drop_unlock;
  1294. }
  1295. spin_unlock_irqrestore(&priv->lock, flags);
  1296. hdr_len = ieee80211_hdrlen(fc);
  1297. /* Find (or create) index into station table for destination station */
  1298. sta_id = iwl3945_get_sta_id(priv, hdr);
  1299. if (sta_id == IWL_INVALID_STATION) {
  1300. IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
  1301. hdr->addr1);
  1302. goto drop;
  1303. }
  1304. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1305. if (ieee80211_is_data_qos(fc)) {
  1306. qc = ieee80211_get_qos_ctl(hdr);
  1307. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  1308. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  1309. IEEE80211_SCTL_SEQ;
  1310. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1311. (hdr->seq_ctrl &
  1312. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1313. seq_number += 0x10;
  1314. }
  1315. /* Descriptor for chosen Tx queue */
  1316. txq = &priv->txq[txq_id];
  1317. q = &txq->q;
  1318. spin_lock_irqsave(&priv->lock, flags);
  1319. idx = get_cmd_index(q, q->write_ptr, 0);
  1320. /* Set up driver data for this TFD */
  1321. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  1322. txq->txb[q->write_ptr].skb[0] = skb;
  1323. /* Init first empty entry in queue's array of Tx/cmd buffers */
  1324. out_cmd = txq->cmd[idx];
  1325. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  1326. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1327. memset(tx, 0, sizeof(*tx));
  1328. /*
  1329. * Set up the Tx-command (not MAC!) header.
  1330. * Store the chosen Tx queue and TFD index within the sequence field;
  1331. * after Tx, uCode's Tx response will return this value so driver can
  1332. * locate the frame within the tx queue and do post-tx processing.
  1333. */
  1334. out_cmd->hdr.cmd = REPLY_TX;
  1335. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  1336. INDEX_TO_SEQ(q->write_ptr)));
  1337. /* Copy MAC header from skb into command buffer */
  1338. memcpy(tx->hdr, hdr, hdr_len);
  1339. /*
  1340. * Use the first empty entry in this queue's command buffer array
  1341. * to contain the Tx command and MAC header concatenated together
  1342. * (payload data will be in another buffer).
  1343. * Size of this varies, due to varying MAC header length.
  1344. * If end is not dword aligned, we'll have 2 extra bytes at the end
  1345. * of the MAC header (device reads on dword boundaries).
  1346. * We'll tell device about this padding later.
  1347. */
  1348. len = sizeof(struct iwl3945_tx_cmd) +
  1349. sizeof(struct iwl_cmd_header) + hdr_len;
  1350. len_org = len;
  1351. len = (len + 3) & ~3;
  1352. if (len_org != len)
  1353. len_org = 1;
  1354. else
  1355. len_org = 0;
  1356. /* Physical address of this Tx command's header (not MAC header!),
  1357. * within command buffer array. */
  1358. txcmd_phys = pci_map_single(priv->pci_dev,
  1359. out_cmd, sizeof(struct iwl_cmd),
  1360. PCI_DMA_TODEVICE);
  1361. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  1362. pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
  1363. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1364. * first entry */
  1365. txcmd_phys += offsetof(struct iwl_cmd, hdr);
  1366. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1367. * first entry */
  1368. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1369. txcmd_phys, len, 1, 0);
  1370. if (info->control.hw_key)
  1371. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
  1372. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  1373. * if any (802.11 null frames have no payload). */
  1374. len = skb->len - hdr_len;
  1375. if (len) {
  1376. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  1377. len, PCI_DMA_TODEVICE);
  1378. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1379. phys_addr, len,
  1380. 0, U32_PAD(len));
  1381. }
  1382. /* Total # bytes to be transmitted */
  1383. len = (u16)skb->len;
  1384. tx->len = cpu_to_le16(len);
  1385. /* TODO need this for burst mode later on */
  1386. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  1387. /* set is_hcca to 0; it probably will never be implemented */
  1388. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  1389. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  1390. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  1391. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  1392. txq->need_update = 1;
  1393. if (qc)
  1394. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  1395. } else {
  1396. wait_write_ptr = 1;
  1397. txq->need_update = 0;
  1398. }
  1399. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  1400. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  1401. ieee80211_hdrlen(fc));
  1402. /* Tell device the write index *just past* this latest filled TFD */
  1403. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  1404. rc = iwl_txq_update_write_ptr(priv, txq);
  1405. spin_unlock_irqrestore(&priv->lock, flags);
  1406. if (rc)
  1407. return rc;
  1408. if ((iwl_queue_space(q) < q->high_mark)
  1409. && priv->mac80211_registered) {
  1410. if (wait_write_ptr) {
  1411. spin_lock_irqsave(&priv->lock, flags);
  1412. txq->need_update = 1;
  1413. iwl_txq_update_write_ptr(priv, txq);
  1414. spin_unlock_irqrestore(&priv->lock, flags);
  1415. }
  1416. ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
  1417. }
  1418. return 0;
  1419. drop_unlock:
  1420. spin_unlock_irqrestore(&priv->lock, flags);
  1421. drop:
  1422. return -1;
  1423. }
  1424. static void iwl3945_set_rate(struct iwl_priv *priv)
  1425. {
  1426. const struct ieee80211_supported_band *sband = NULL;
  1427. struct ieee80211_rate *rate;
  1428. int i;
  1429. sband = iwl_get_hw_mode(priv, priv->band);
  1430. if (!sband) {
  1431. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1432. return;
  1433. }
  1434. priv->active_rate = 0;
  1435. priv->active_rate_basic = 0;
  1436. IWL_DEBUG_RATE("Setting rates for %s GHz\n",
  1437. sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
  1438. for (i = 0; i < sband->n_bitrates; i++) {
  1439. rate = &sband->bitrates[i];
  1440. if ((rate->hw_value < IWL_RATE_COUNT) &&
  1441. !(rate->flags & IEEE80211_CHAN_DISABLED)) {
  1442. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
  1443. rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
  1444. priv->active_rate |= (1 << rate->hw_value);
  1445. }
  1446. }
  1447. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  1448. priv->active_rate, priv->active_rate_basic);
  1449. /*
  1450. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1451. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1452. * OFDM
  1453. */
  1454. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1455. priv->staging39_rxon.cck_basic_rates =
  1456. ((priv->active_rate_basic &
  1457. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1458. else
  1459. priv->staging39_rxon.cck_basic_rates =
  1460. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1461. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1462. priv->staging39_rxon.ofdm_basic_rates =
  1463. ((priv->active_rate_basic &
  1464. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1465. IWL_FIRST_OFDM_RATE) & 0xFF;
  1466. else
  1467. priv->staging39_rxon.ofdm_basic_rates =
  1468. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1469. }
  1470. static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  1471. {
  1472. unsigned long flags;
  1473. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  1474. return;
  1475. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  1476. disable_radio ? "OFF" : "ON");
  1477. if (disable_radio) {
  1478. iwl_scan_cancel(priv);
  1479. /* FIXME: This is a workaround for AP */
  1480. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  1481. spin_lock_irqsave(&priv->lock, flags);
  1482. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1483. CSR_UCODE_SW_BIT_RFKILL);
  1484. spin_unlock_irqrestore(&priv->lock, flags);
  1485. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  1486. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1487. }
  1488. return;
  1489. }
  1490. spin_lock_irqsave(&priv->lock, flags);
  1491. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1492. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1493. spin_unlock_irqrestore(&priv->lock, flags);
  1494. /* wake up ucode */
  1495. msleep(10);
  1496. spin_lock_irqsave(&priv->lock, flags);
  1497. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  1498. if (!iwl_grab_nic_access(priv))
  1499. iwl_release_nic_access(priv);
  1500. spin_unlock_irqrestore(&priv->lock, flags);
  1501. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  1502. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  1503. "disabled by HW switch\n");
  1504. return;
  1505. }
  1506. if (priv->is_open)
  1507. queue_work(priv->workqueue, &priv->restart);
  1508. return;
  1509. }
  1510. void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  1511. u32 decrypt_res, struct ieee80211_rx_status *stats)
  1512. {
  1513. u16 fc =
  1514. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  1515. if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  1516. return;
  1517. if (!(fc & IEEE80211_FCTL_PROTECTED))
  1518. return;
  1519. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  1520. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  1521. case RX_RES_STATUS_SEC_TYPE_TKIP:
  1522. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1523. RX_RES_STATUS_BAD_ICV_MIC)
  1524. stats->flag |= RX_FLAG_MMIC_ERROR;
  1525. case RX_RES_STATUS_SEC_TYPE_WEP:
  1526. case RX_RES_STATUS_SEC_TYPE_CCMP:
  1527. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1528. RX_RES_STATUS_DECRYPT_OK) {
  1529. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  1530. stats->flag |= RX_FLAG_DECRYPTED;
  1531. }
  1532. break;
  1533. default:
  1534. break;
  1535. }
  1536. }
  1537. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  1538. #include "iwl-spectrum.h"
  1539. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  1540. #define BEACON_TIME_MASK_HIGH 0xFF000000
  1541. #define TIME_UNIT 1024
  1542. /*
  1543. * extended beacon time format
  1544. * time in usec will be changed into a 32-bit value in 8:24 format
  1545. * the high 1 byte is the beacon counts
  1546. * the lower 3 bytes is the time in usec within one beacon interval
  1547. */
  1548. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  1549. {
  1550. u32 quot;
  1551. u32 rem;
  1552. u32 interval = beacon_interval * 1024;
  1553. if (!interval || !usec)
  1554. return 0;
  1555. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  1556. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  1557. return (quot << 24) + rem;
  1558. }
  1559. /* base is usually what we get from ucode with each received frame,
  1560. * the same as HW timer counter counting down
  1561. */
  1562. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  1563. {
  1564. u32 base_low = base & BEACON_TIME_MASK_LOW;
  1565. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  1566. u32 interval = beacon_interval * TIME_UNIT;
  1567. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  1568. (addon & BEACON_TIME_MASK_HIGH);
  1569. if (base_low > addon_low)
  1570. res += base_low - addon_low;
  1571. else if (base_low < addon_low) {
  1572. res += interval + base_low - addon_low;
  1573. res += (1 << 24);
  1574. } else
  1575. res += (1 << 24);
  1576. return cpu_to_le32(res);
  1577. }
  1578. static int iwl3945_get_measurement(struct iwl_priv *priv,
  1579. struct ieee80211_measurement_params *params,
  1580. u8 type)
  1581. {
  1582. struct iwl_spectrum_cmd spectrum;
  1583. struct iwl_rx_packet *res;
  1584. struct iwl_host_cmd cmd = {
  1585. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  1586. .data = (void *)&spectrum,
  1587. .meta.flags = CMD_WANT_SKB,
  1588. };
  1589. u32 add_time = le64_to_cpu(params->start_time);
  1590. int rc;
  1591. int spectrum_resp_status;
  1592. int duration = le16_to_cpu(params->duration);
  1593. if (iwl3945_is_associated(priv))
  1594. add_time =
  1595. iwl3945_usecs_to_beacons(
  1596. le64_to_cpu(params->start_time) - priv->last_tsf,
  1597. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1598. memset(&spectrum, 0, sizeof(spectrum));
  1599. spectrum.channel_count = cpu_to_le16(1);
  1600. spectrum.flags =
  1601. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  1602. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  1603. cmd.len = sizeof(spectrum);
  1604. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  1605. if (iwl3945_is_associated(priv))
  1606. spectrum.start_time =
  1607. iwl3945_add_beacon_time(priv->last_beacon_time,
  1608. add_time,
  1609. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1610. else
  1611. spectrum.start_time = 0;
  1612. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  1613. spectrum.channels[0].channel = params->channel;
  1614. spectrum.channels[0].type = type;
  1615. if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1616. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  1617. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  1618. rc = iwl_send_cmd_sync(priv, &cmd);
  1619. if (rc)
  1620. return rc;
  1621. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1622. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1623. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  1624. rc = -EIO;
  1625. }
  1626. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  1627. switch (spectrum_resp_status) {
  1628. case 0: /* Command will be handled */
  1629. if (res->u.spectrum.id != 0xff) {
  1630. IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
  1631. res->u.spectrum.id);
  1632. priv->measurement_status &= ~MEASUREMENT_READY;
  1633. }
  1634. priv->measurement_status |= MEASUREMENT_ACTIVE;
  1635. rc = 0;
  1636. break;
  1637. case 1: /* Command will not be handled */
  1638. rc = -EAGAIN;
  1639. break;
  1640. }
  1641. dev_kfree_skb_any(cmd.meta.u.skb);
  1642. return rc;
  1643. }
  1644. #endif
  1645. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  1646. struct iwl_rx_mem_buffer *rxb)
  1647. {
  1648. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1649. struct iwl_alive_resp *palive;
  1650. struct delayed_work *pwork;
  1651. palive = &pkt->u.alive_frame;
  1652. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  1653. "0x%01X 0x%01X\n",
  1654. palive->is_valid, palive->ver_type,
  1655. palive->ver_subtype);
  1656. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  1657. IWL_DEBUG_INFO("Initialization Alive received.\n");
  1658. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  1659. sizeof(struct iwl_alive_resp));
  1660. pwork = &priv->init_alive_start;
  1661. } else {
  1662. IWL_DEBUG_INFO("Runtime Alive received.\n");
  1663. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  1664. sizeof(struct iwl_alive_resp));
  1665. pwork = &priv->alive_start;
  1666. iwl3945_disable_events(priv);
  1667. }
  1668. /* We delay the ALIVE response by 5ms to
  1669. * give the HW RF Kill time to activate... */
  1670. if (palive->is_valid == UCODE_VALID_OK)
  1671. queue_delayed_work(priv->workqueue, pwork,
  1672. msecs_to_jiffies(5));
  1673. else
  1674. IWL_WARN(priv, "uCode did not respond OK.\n");
  1675. }
  1676. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  1677. struct iwl_rx_mem_buffer *rxb)
  1678. {
  1679. #ifdef CONFIG_IWLWIFI_DEBUG
  1680. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1681. #endif
  1682. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  1683. return;
  1684. }
  1685. static void iwl3945_rx_reply_error(struct iwl_priv *priv,
  1686. struct iwl_rx_mem_buffer *rxb)
  1687. {
  1688. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1689. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1690. "seq 0x%04X ser 0x%08X\n",
  1691. le32_to_cpu(pkt->u.err_resp.error_type),
  1692. get_cmd_string(pkt->u.err_resp.cmd_id),
  1693. pkt->u.err_resp.cmd_id,
  1694. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1695. le32_to_cpu(pkt->u.err_resp.error_info));
  1696. }
  1697. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1698. static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  1699. {
  1700. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1701. struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
  1702. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  1703. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  1704. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  1705. rxon->channel = csa->channel;
  1706. priv->staging39_rxon.channel = csa->channel;
  1707. }
  1708. static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
  1709. struct iwl_rx_mem_buffer *rxb)
  1710. {
  1711. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  1712. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1713. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  1714. if (!report->state) {
  1715. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  1716. "Spectrum Measure Notification: Start\n");
  1717. return;
  1718. }
  1719. memcpy(&priv->measure_report, report, sizeof(*report));
  1720. priv->measurement_status |= MEASUREMENT_READY;
  1721. #endif
  1722. }
  1723. static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
  1724. struct iwl_rx_mem_buffer *rxb)
  1725. {
  1726. #ifdef CONFIG_IWLWIFI_DEBUG
  1727. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1728. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1729. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  1730. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1731. #endif
  1732. }
  1733. static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1734. struct iwl_rx_mem_buffer *rxb)
  1735. {
  1736. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1737. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  1738. "notification for %s:\n",
  1739. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  1740. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
  1741. le32_to_cpu(pkt->len));
  1742. }
  1743. static void iwl3945_bg_beacon_update(struct work_struct *work)
  1744. {
  1745. struct iwl_priv *priv =
  1746. container_of(work, struct iwl_priv, beacon_update);
  1747. struct sk_buff *beacon;
  1748. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  1749. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  1750. if (!beacon) {
  1751. IWL_ERR(priv, "update beacon failed\n");
  1752. return;
  1753. }
  1754. mutex_lock(&priv->mutex);
  1755. /* new beacon skb is allocated every time; dispose previous.*/
  1756. if (priv->ibss_beacon)
  1757. dev_kfree_skb(priv->ibss_beacon);
  1758. priv->ibss_beacon = beacon;
  1759. mutex_unlock(&priv->mutex);
  1760. iwl3945_send_beacon_cmd(priv);
  1761. }
  1762. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  1763. struct iwl_rx_mem_buffer *rxb)
  1764. {
  1765. #ifdef CONFIG_IWLWIFI_DEBUG
  1766. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1767. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  1768. u8 rate = beacon->beacon_notify_hdr.rate;
  1769. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  1770. "tsf %d %d rate %d\n",
  1771. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  1772. beacon->beacon_notify_hdr.failure_frame,
  1773. le32_to_cpu(beacon->ibss_mgr_status),
  1774. le32_to_cpu(beacon->high_tsf),
  1775. le32_to_cpu(beacon->low_tsf), rate);
  1776. #endif
  1777. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  1778. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  1779. queue_work(priv->workqueue, &priv->beacon_update);
  1780. }
  1781. /* Service response to REPLY_SCAN_CMD (0x80) */
  1782. static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
  1783. struct iwl_rx_mem_buffer *rxb)
  1784. {
  1785. #ifdef CONFIG_IWLWIFI_DEBUG
  1786. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1787. struct iwl_scanreq_notification *notif =
  1788. (struct iwl_scanreq_notification *)pkt->u.raw;
  1789. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  1790. #endif
  1791. }
  1792. /* Service SCAN_START_NOTIFICATION (0x82) */
  1793. static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
  1794. struct iwl_rx_mem_buffer *rxb)
  1795. {
  1796. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1797. struct iwl_scanstart_notification *notif =
  1798. (struct iwl_scanstart_notification *)pkt->u.raw;
  1799. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1800. IWL_DEBUG_SCAN("Scan start: "
  1801. "%d [802.11%s] "
  1802. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  1803. notif->channel,
  1804. notif->band ? "bg" : "a",
  1805. notif->tsf_high,
  1806. notif->tsf_low, notif->status, notif->beacon_timer);
  1807. }
  1808. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  1809. static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
  1810. struct iwl_rx_mem_buffer *rxb)
  1811. {
  1812. #ifdef CONFIG_IWLWIFI_DEBUG
  1813. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1814. struct iwl_scanresults_notification *notif =
  1815. (struct iwl_scanresults_notification *)pkt->u.raw;
  1816. #endif
  1817. IWL_DEBUG_SCAN("Scan ch.res: "
  1818. "%d [802.11%s] "
  1819. "(TSF: 0x%08X:%08X) - %d "
  1820. "elapsed=%lu usec (%dms since last)\n",
  1821. notif->channel,
  1822. notif->band ? "bg" : "a",
  1823. le32_to_cpu(notif->tsf_high),
  1824. le32_to_cpu(notif->tsf_low),
  1825. le32_to_cpu(notif->statistics[0]),
  1826. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  1827. jiffies_to_msecs(elapsed_jiffies
  1828. (priv->last_scan_jiffies, jiffies)));
  1829. priv->last_scan_jiffies = jiffies;
  1830. priv->next_scan_jiffies = 0;
  1831. }
  1832. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  1833. static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
  1834. struct iwl_rx_mem_buffer *rxb)
  1835. {
  1836. #ifdef CONFIG_IWLWIFI_DEBUG
  1837. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1838. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1839. #endif
  1840. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1841. scan_notif->scanned_channels,
  1842. scan_notif->tsf_low,
  1843. scan_notif->tsf_high, scan_notif->status);
  1844. /* The HW is no longer scanning */
  1845. clear_bit(STATUS_SCAN_HW, &priv->status);
  1846. /* The scan completion notification came in, so kill that timer... */
  1847. cancel_delayed_work(&priv->scan_check);
  1848. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  1849. (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
  1850. "2.4" : "5.2",
  1851. jiffies_to_msecs(elapsed_jiffies
  1852. (priv->scan_pass_start, jiffies)));
  1853. /* Remove this scanned band from the list of pending
  1854. * bands to scan, band G precedes A in order of scanning
  1855. * as seen in iwl3945_bg_request_scan */
  1856. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
  1857. priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
  1858. else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
  1859. priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
  1860. /* If a request to abort was given, or the scan did not succeed
  1861. * then we reset the scan state machine and terminate,
  1862. * re-queuing another scan if one has been requested */
  1863. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1864. IWL_DEBUG_INFO("Aborted scan completed.\n");
  1865. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1866. } else {
  1867. /* If there are more bands on this scan pass reschedule */
  1868. if (priv->scan_bands > 0)
  1869. goto reschedule;
  1870. }
  1871. priv->last_scan_jiffies = jiffies;
  1872. priv->next_scan_jiffies = 0;
  1873. IWL_DEBUG_INFO("Setting scan to off\n");
  1874. clear_bit(STATUS_SCANNING, &priv->status);
  1875. IWL_DEBUG_INFO("Scan took %dms\n",
  1876. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  1877. queue_work(priv->workqueue, &priv->scan_completed);
  1878. return;
  1879. reschedule:
  1880. priv->scan_pass_start = jiffies;
  1881. queue_work(priv->workqueue, &priv->request_scan);
  1882. }
  1883. /* Handle notification from uCode that card's power state is changing
  1884. * due to software, hardware, or critical temperature RFKILL */
  1885. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  1886. struct iwl_rx_mem_buffer *rxb)
  1887. {
  1888. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1889. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  1890. unsigned long status = priv->status;
  1891. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  1892. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  1893. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  1894. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1895. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  1896. if (flags & HW_CARD_DISABLED)
  1897. set_bit(STATUS_RF_KILL_HW, &priv->status);
  1898. else
  1899. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  1900. if (flags & SW_CARD_DISABLED)
  1901. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1902. else
  1903. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1904. iwl_scan_cancel(priv);
  1905. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  1906. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  1907. (test_bit(STATUS_RF_KILL_SW, &status) !=
  1908. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  1909. queue_work(priv->workqueue, &priv->rf_kill);
  1910. else
  1911. wake_up_interruptible(&priv->wait_command_queue);
  1912. }
  1913. /**
  1914. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  1915. *
  1916. * Setup the RX handlers for each of the reply types sent from the uCode
  1917. * to the host.
  1918. *
  1919. * This function chains into the hardware specific files for them to setup
  1920. * any hardware specific handlers as well.
  1921. */
  1922. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  1923. {
  1924. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  1925. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  1926. priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
  1927. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
  1928. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  1929. iwl3945_rx_spectrum_measure_notif;
  1930. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
  1931. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  1932. iwl3945_rx_pm_debug_statistics_notif;
  1933. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  1934. /*
  1935. * The same handler is used for both the REPLY to a discrete
  1936. * statistics request from the host as well as for the periodic
  1937. * statistics notifications (after received beacons) from the uCode.
  1938. */
  1939. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  1940. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  1941. priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
  1942. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
  1943. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  1944. iwl3945_rx_scan_results_notif;
  1945. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  1946. iwl3945_rx_scan_complete_notif;
  1947. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  1948. /* Set up hardware specific Rx handlers */
  1949. iwl3945_hw_rx_handler_setup(priv);
  1950. }
  1951. /**
  1952. * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
  1953. * When FW advances 'R' index, all entries between old and new 'R' index
  1954. * need to be reclaimed.
  1955. */
  1956. static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
  1957. int txq_id, int index)
  1958. {
  1959. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  1960. struct iwl_queue *q = &txq->q;
  1961. int nfreed = 0;
  1962. if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
  1963. IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
  1964. "is out of range [0-%d] %d %d.\n", txq_id,
  1965. index, q->n_bd, q->write_ptr, q->read_ptr);
  1966. return;
  1967. }
  1968. for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
  1969. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  1970. if (nfreed > 1) {
  1971. IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
  1972. q->write_ptr, q->read_ptr);
  1973. queue_work(priv->workqueue, &priv->restart);
  1974. break;
  1975. }
  1976. nfreed++;
  1977. }
  1978. }
  1979. /**
  1980. * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  1981. * @rxb: Rx buffer to reclaim
  1982. *
  1983. * If an Rx buffer has an async callback associated with it the callback
  1984. * will be executed. The attached skb (if present) will only be freed
  1985. * if the callback returns 1
  1986. */
  1987. static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
  1988. struct iwl_rx_mem_buffer *rxb)
  1989. {
  1990. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1991. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  1992. int txq_id = SEQ_TO_QUEUE(sequence);
  1993. int index = SEQ_TO_INDEX(sequence);
  1994. int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  1995. int cmd_index;
  1996. struct iwl_cmd *cmd;
  1997. if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
  1998. "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
  1999. txq_id, sequence,
  2000. priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
  2001. priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
  2002. iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
  2003. return;
  2004. }
  2005. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  2006. cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  2007. /* Input error checking is done when commands are added to queue. */
  2008. if (cmd->meta.flags & CMD_WANT_SKB) {
  2009. cmd->meta.source->u.skb = rxb->skb;
  2010. rxb->skb = NULL;
  2011. } else if (cmd->meta.u.callback &&
  2012. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  2013. rxb->skb = NULL;
  2014. iwl3945_cmd_queue_reclaim(priv, txq_id, index);
  2015. if (!(cmd->meta.flags & CMD_ASYNC)) {
  2016. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2017. wake_up_interruptible(&priv->wait_command_queue);
  2018. }
  2019. }
  2020. /************************** RX-FUNCTIONS ****************************/
  2021. /*
  2022. * Rx theory of operation
  2023. *
  2024. * The host allocates 32 DMA target addresses and passes the host address
  2025. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  2026. * 0 to 31
  2027. *
  2028. * Rx Queue Indexes
  2029. * The host/firmware share two index registers for managing the Rx buffers.
  2030. *
  2031. * The READ index maps to the first position that the firmware may be writing
  2032. * to -- the driver can read up to (but not including) this position and get
  2033. * good data.
  2034. * The READ index is managed by the firmware once the card is enabled.
  2035. *
  2036. * The WRITE index maps to the last position the driver has read from -- the
  2037. * position preceding WRITE is the last slot the firmware can place a packet.
  2038. *
  2039. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2040. * WRITE = READ.
  2041. *
  2042. * During initialization, the host sets up the READ queue position to the first
  2043. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  2044. *
  2045. * When the firmware places a packet in a buffer, it will advance the READ index
  2046. * and fire the RX interrupt. The driver can then query the READ index and
  2047. * process as many packets as possible, moving the WRITE index forward as it
  2048. * resets the Rx queue buffers with new memory.
  2049. *
  2050. * The management in the driver is as follows:
  2051. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2052. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2053. * to replenish the iwl->rxq->rx_free.
  2054. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  2055. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  2056. * 'processed' and 'read' driver indexes as well)
  2057. * + A received packet is processed and handed to the kernel network stack,
  2058. * detached from the iwl->rxq. The driver 'processed' index is updated.
  2059. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2060. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2061. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  2062. * were enough free buffers and RX_STALLED is set it is cleared.
  2063. *
  2064. *
  2065. * Driver sequence:
  2066. *
  2067. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2068. * iwl3945_rx_queue_restock
  2069. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  2070. * queue, updates firmware pointers, and updates
  2071. * the WRITE index. If insufficient rx_free buffers
  2072. * are available, schedules iwl3945_rx_replenish
  2073. *
  2074. * -- enable interrupts --
  2075. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  2076. * READ INDEX, detaching the SKB from the pool.
  2077. * Moves the packet buffer from queue to rx_used.
  2078. * Calls iwl3945_rx_queue_restock to refill any empty
  2079. * slots.
  2080. * ...
  2081. *
  2082. */
  2083. /**
  2084. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  2085. */
  2086. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  2087. dma_addr_t dma_addr)
  2088. {
  2089. return cpu_to_le32((u32)dma_addr);
  2090. }
  2091. /**
  2092. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  2093. *
  2094. * If there are slots in the RX queue that need to be restocked,
  2095. * and we have free pre-allocated buffers, fill the ranks as much
  2096. * as we can, pulling from rx_free.
  2097. *
  2098. * This moves the 'write' index forward to catch up with 'processed', and
  2099. * also updates the memory address in the firmware to reference the new
  2100. * target buffer.
  2101. */
  2102. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  2103. {
  2104. struct iwl_rx_queue *rxq = &priv->rxq;
  2105. struct list_head *element;
  2106. struct iwl_rx_mem_buffer *rxb;
  2107. unsigned long flags;
  2108. int write, rc;
  2109. spin_lock_irqsave(&rxq->lock, flags);
  2110. write = rxq->write & ~0x7;
  2111. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  2112. /* Get next free Rx buffer, remove from free list */
  2113. element = rxq->rx_free.next;
  2114. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2115. list_del(element);
  2116. /* Point to Rx buffer via next RBD in circular buffer */
  2117. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  2118. rxq->queue[rxq->write] = rxb;
  2119. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  2120. rxq->free_count--;
  2121. }
  2122. spin_unlock_irqrestore(&rxq->lock, flags);
  2123. /* If the pre-allocated buffer pool is dropping low, schedule to
  2124. * refill it */
  2125. if (rxq->free_count <= RX_LOW_WATERMARK)
  2126. queue_work(priv->workqueue, &priv->rx_replenish);
  2127. /* If we've added more space for the firmware to place data, tell it.
  2128. * Increment device's write pointer in multiples of 8. */
  2129. if ((write != (rxq->write & ~0x7))
  2130. || (abs(rxq->write - rxq->read) > 7)) {
  2131. spin_lock_irqsave(&rxq->lock, flags);
  2132. rxq->need_update = 1;
  2133. spin_unlock_irqrestore(&rxq->lock, flags);
  2134. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  2135. if (rc)
  2136. return rc;
  2137. }
  2138. return 0;
  2139. }
  2140. /**
  2141. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  2142. *
  2143. * When moving to rx_free an SKB is allocated for the slot.
  2144. *
  2145. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  2146. * This is called as a scheduled work item (except for during initialization)
  2147. */
  2148. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  2149. {
  2150. struct iwl_rx_queue *rxq = &priv->rxq;
  2151. struct list_head *element;
  2152. struct iwl_rx_mem_buffer *rxb;
  2153. unsigned long flags;
  2154. spin_lock_irqsave(&rxq->lock, flags);
  2155. while (!list_empty(&rxq->rx_used)) {
  2156. element = rxq->rx_used.next;
  2157. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2158. /* Alloc a new receive buffer */
  2159. rxb->skb =
  2160. alloc_skb(priv->hw_params.rx_buf_size,
  2161. __GFP_NOWARN | GFP_ATOMIC);
  2162. if (!rxb->skb) {
  2163. if (net_ratelimit())
  2164. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  2165. /* We don't reschedule replenish work here -- we will
  2166. * call the restock method and if it still needs
  2167. * more buffers it will schedule replenish */
  2168. break;
  2169. }
  2170. /* If radiotap head is required, reserve some headroom here.
  2171. * The physical head count is a variable rx_stats->phy_count.
  2172. * We reserve 4 bytes here. Plus these extra bytes, the
  2173. * headroom of the physical head should be enough for the
  2174. * radiotap head that iwl3945 supported. See iwl3945_rt.
  2175. */
  2176. skb_reserve(rxb->skb, 4);
  2177. priv->alloc_rxb_skb++;
  2178. list_del(element);
  2179. /* Get physical address of RB/SKB */
  2180. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  2181. rxb->skb->data,
  2182. priv->hw_params.rx_buf_size,
  2183. PCI_DMA_FROMDEVICE);
  2184. list_add_tail(&rxb->list, &rxq->rx_free);
  2185. rxq->free_count++;
  2186. }
  2187. spin_unlock_irqrestore(&rxq->lock, flags);
  2188. }
  2189. /*
  2190. * this should be called while priv->lock is locked
  2191. */
  2192. static void __iwl3945_rx_replenish(void *data)
  2193. {
  2194. struct iwl_priv *priv = data;
  2195. iwl3945_rx_allocate(priv);
  2196. iwl3945_rx_queue_restock(priv);
  2197. }
  2198. void iwl3945_rx_replenish(void *data)
  2199. {
  2200. struct iwl_priv *priv = data;
  2201. unsigned long flags;
  2202. iwl3945_rx_allocate(priv);
  2203. spin_lock_irqsave(&priv->lock, flags);
  2204. iwl3945_rx_queue_restock(priv);
  2205. spin_unlock_irqrestore(&priv->lock, flags);
  2206. }
  2207. /* Convert linear signal-to-noise ratio into dB */
  2208. static u8 ratio2dB[100] = {
  2209. /* 0 1 2 3 4 5 6 7 8 9 */
  2210. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  2211. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  2212. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  2213. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  2214. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  2215. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  2216. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  2217. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  2218. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  2219. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  2220. };
  2221. /* Calculates a relative dB value from a ratio of linear
  2222. * (i.e. not dB) signal levels.
  2223. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  2224. int iwl3945_calc_db_from_ratio(int sig_ratio)
  2225. {
  2226. /* 1000:1 or higher just report as 60 dB */
  2227. if (sig_ratio >= 1000)
  2228. return 60;
  2229. /* 100:1 or higher, divide by 10 and use table,
  2230. * add 20 dB to make up for divide by 10 */
  2231. if (sig_ratio >= 100)
  2232. return 20 + (int)ratio2dB[sig_ratio/10];
  2233. /* We shouldn't see this */
  2234. if (sig_ratio < 1)
  2235. return 0;
  2236. /* Use table for ratios 1:1 - 99:1 */
  2237. return (int)ratio2dB[sig_ratio];
  2238. }
  2239. #define PERFECT_RSSI (-20) /* dBm */
  2240. #define WORST_RSSI (-95) /* dBm */
  2241. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  2242. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  2243. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  2244. * about formulas used below. */
  2245. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  2246. {
  2247. int sig_qual;
  2248. int degradation = PERFECT_RSSI - rssi_dbm;
  2249. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  2250. * as indicator; formula is (signal dbm - noise dbm).
  2251. * SNR at or above 40 is a great signal (100%).
  2252. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  2253. * Weakest usable signal is usually 10 - 15 dB SNR. */
  2254. if (noise_dbm) {
  2255. if (rssi_dbm - noise_dbm >= 40)
  2256. return 100;
  2257. else if (rssi_dbm < noise_dbm)
  2258. return 0;
  2259. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  2260. /* Else use just the signal level.
  2261. * This formula is a least squares fit of data points collected and
  2262. * compared with a reference system that had a percentage (%) display
  2263. * for signal quality. */
  2264. } else
  2265. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  2266. (15 * RSSI_RANGE + 62 * degradation)) /
  2267. (RSSI_RANGE * RSSI_RANGE);
  2268. if (sig_qual > 100)
  2269. sig_qual = 100;
  2270. else if (sig_qual < 1)
  2271. sig_qual = 0;
  2272. return sig_qual;
  2273. }
  2274. /**
  2275. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  2276. *
  2277. * Uses the priv->rx_handlers callback function array to invoke
  2278. * the appropriate handlers, including command responses,
  2279. * frame-received notifications, and other notifications.
  2280. */
  2281. static void iwl3945_rx_handle(struct iwl_priv *priv)
  2282. {
  2283. struct iwl_rx_mem_buffer *rxb;
  2284. struct iwl_rx_packet *pkt;
  2285. struct iwl_rx_queue *rxq = &priv->rxq;
  2286. u32 r, i;
  2287. int reclaim;
  2288. unsigned long flags;
  2289. u8 fill_rx = 0;
  2290. u32 count = 8;
  2291. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  2292. * buffer that the driver may process (last buffer filled by ucode). */
  2293. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  2294. i = rxq->read;
  2295. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  2296. fill_rx = 1;
  2297. /* Rx interrupt, but nothing sent from uCode */
  2298. if (i == r)
  2299. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  2300. while (i != r) {
  2301. rxb = rxq->queue[i];
  2302. /* If an RXB doesn't have a Rx queue slot associated with it,
  2303. * then a bug has been introduced in the queue refilling
  2304. * routines -- catch it here */
  2305. BUG_ON(rxb == NULL);
  2306. rxq->queue[i] = NULL;
  2307. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
  2308. priv->hw_params.rx_buf_size,
  2309. PCI_DMA_FROMDEVICE);
  2310. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2311. /* Reclaim a command buffer only if this packet is a response
  2312. * to a (driver-originated) command.
  2313. * If the packet (e.g. Rx frame) originated from uCode,
  2314. * there is no command buffer to reclaim.
  2315. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  2316. * but apparently a few don't get set; catch them here. */
  2317. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  2318. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  2319. (pkt->hdr.cmd != REPLY_TX);
  2320. /* Based on type of command response or notification,
  2321. * handle those that need handling via function in
  2322. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  2323. if (priv->rx_handlers[pkt->hdr.cmd]) {
  2324. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2325. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  2326. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  2327. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  2328. } else {
  2329. /* No handling needed */
  2330. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2331. "r %d i %d No handler needed for %s, 0x%02x\n",
  2332. r, i, get_cmd_string(pkt->hdr.cmd),
  2333. pkt->hdr.cmd);
  2334. }
  2335. if (reclaim) {
  2336. /* Invoke any callbacks, transfer the skb to caller, and
  2337. * fire off the (possibly) blocking iwl_send_cmd()
  2338. * as we reclaim the driver command queue */
  2339. if (rxb && rxb->skb)
  2340. iwl3945_tx_cmd_complete(priv, rxb);
  2341. else
  2342. IWL_WARN(priv, "Claim null rxb?\n");
  2343. }
  2344. /* For now we just don't re-use anything. We can tweak this
  2345. * later to try and re-use notification packets and SKBs that
  2346. * fail to Rx correctly */
  2347. if (rxb->skb != NULL) {
  2348. priv->alloc_rxb_skb--;
  2349. dev_kfree_skb_any(rxb->skb);
  2350. rxb->skb = NULL;
  2351. }
  2352. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  2353. priv->hw_params.rx_buf_size,
  2354. PCI_DMA_FROMDEVICE);
  2355. spin_lock_irqsave(&rxq->lock, flags);
  2356. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  2357. spin_unlock_irqrestore(&rxq->lock, flags);
  2358. i = (i + 1) & RX_QUEUE_MASK;
  2359. /* If there are a lot of unused frames,
  2360. * restock the Rx queue so ucode won't assert. */
  2361. if (fill_rx) {
  2362. count++;
  2363. if (count >= 8) {
  2364. priv->rxq.read = i;
  2365. __iwl3945_rx_replenish(priv);
  2366. count = 0;
  2367. }
  2368. }
  2369. }
  2370. /* Backtrack one entry */
  2371. priv->rxq.read = i;
  2372. iwl3945_rx_queue_restock(priv);
  2373. }
  2374. #ifdef CONFIG_IWLWIFI_DEBUG
  2375. static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
  2376. struct iwl3945_rxon_cmd *rxon)
  2377. {
  2378. IWL_DEBUG_RADIO("RX CONFIG:\n");
  2379. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  2380. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  2381. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  2382. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  2383. le32_to_cpu(rxon->filter_flags));
  2384. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  2385. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  2386. rxon->ofdm_basic_rates);
  2387. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  2388. IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  2389. IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  2390. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  2391. }
  2392. #endif
  2393. static void iwl3945_enable_interrupts(struct iwl_priv *priv)
  2394. {
  2395. IWL_DEBUG_ISR("Enabling interrupts\n");
  2396. set_bit(STATUS_INT_ENABLED, &priv->status);
  2397. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  2398. }
  2399. /* call this function to flush any scheduled tasklet */
  2400. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  2401. {
  2402. /* wait to make sure we flush pending tasklet*/
  2403. synchronize_irq(priv->pci_dev->irq);
  2404. tasklet_kill(&priv->irq_tasklet);
  2405. }
  2406. static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
  2407. {
  2408. clear_bit(STATUS_INT_ENABLED, &priv->status);
  2409. /* disable interrupts from uCode/NIC to host */
  2410. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2411. /* acknowledge/clear/reset any interrupts still pending
  2412. * from uCode or flow handler (Rx/Tx DMA) */
  2413. iwl_write32(priv, CSR_INT, 0xffffffff);
  2414. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  2415. IWL_DEBUG_ISR("Disabled interrupts\n");
  2416. }
  2417. static const char *desc_lookup(int i)
  2418. {
  2419. switch (i) {
  2420. case 1:
  2421. return "FAIL";
  2422. case 2:
  2423. return "BAD_PARAM";
  2424. case 3:
  2425. return "BAD_CHECKSUM";
  2426. case 4:
  2427. return "NMI_INTERRUPT";
  2428. case 5:
  2429. return "SYSASSERT";
  2430. case 6:
  2431. return "FATAL_ERROR";
  2432. }
  2433. return "UNKNOWN";
  2434. }
  2435. #define ERROR_START_OFFSET (1 * sizeof(u32))
  2436. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  2437. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  2438. {
  2439. u32 i;
  2440. u32 desc, time, count, base, data1;
  2441. u32 blink1, blink2, ilink1, ilink2;
  2442. int rc;
  2443. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  2444. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2445. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  2446. return;
  2447. }
  2448. rc = iwl_grab_nic_access(priv);
  2449. if (rc) {
  2450. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2451. return;
  2452. }
  2453. count = iwl_read_targ_mem(priv, base);
  2454. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  2455. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  2456. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  2457. priv->status, count);
  2458. }
  2459. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  2460. "ilink1 nmiPC Line\n");
  2461. for (i = ERROR_START_OFFSET;
  2462. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  2463. i += ERROR_ELEM_SIZE) {
  2464. desc = iwl_read_targ_mem(priv, base + i);
  2465. time =
  2466. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  2467. blink1 =
  2468. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  2469. blink2 =
  2470. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  2471. ilink1 =
  2472. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  2473. ilink2 =
  2474. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  2475. data1 =
  2476. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  2477. IWL_ERR(priv,
  2478. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  2479. desc_lookup(desc), desc, time, blink1, blink2,
  2480. ilink1, ilink2, data1);
  2481. }
  2482. iwl_release_nic_access(priv);
  2483. }
  2484. #define EVENT_START_OFFSET (6 * sizeof(u32))
  2485. /**
  2486. * iwl3945_print_event_log - Dump error event log to syslog
  2487. *
  2488. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  2489. */
  2490. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  2491. u32 num_events, u32 mode)
  2492. {
  2493. u32 i;
  2494. u32 base; /* SRAM byte address of event log header */
  2495. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  2496. u32 ptr; /* SRAM byte address of log data */
  2497. u32 ev, time, data; /* event log data */
  2498. if (num_events == 0)
  2499. return;
  2500. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2501. if (mode == 0)
  2502. event_size = 2 * sizeof(u32);
  2503. else
  2504. event_size = 3 * sizeof(u32);
  2505. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  2506. /* "time" is actually "data" for mode 0 (no timestamp).
  2507. * place event id # at far right for easier visual parsing. */
  2508. for (i = 0; i < num_events; i++) {
  2509. ev = iwl_read_targ_mem(priv, ptr);
  2510. ptr += sizeof(u32);
  2511. time = iwl_read_targ_mem(priv, ptr);
  2512. ptr += sizeof(u32);
  2513. if (mode == 0) {
  2514. /* data, ev */
  2515. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  2516. } else {
  2517. data = iwl_read_targ_mem(priv, ptr);
  2518. ptr += sizeof(u32);
  2519. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  2520. }
  2521. }
  2522. }
  2523. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  2524. {
  2525. int rc;
  2526. u32 base; /* SRAM byte address of event log header */
  2527. u32 capacity; /* event log capacity in # entries */
  2528. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  2529. u32 num_wraps; /* # times uCode wrapped to top of log */
  2530. u32 next_entry; /* index of next entry to be written by uCode */
  2531. u32 size; /* # entries that we'll print */
  2532. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2533. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2534. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  2535. return;
  2536. }
  2537. rc = iwl_grab_nic_access(priv);
  2538. if (rc) {
  2539. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2540. return;
  2541. }
  2542. /* event log header */
  2543. capacity = iwl_read_targ_mem(priv, base);
  2544. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  2545. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  2546. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  2547. size = num_wraps ? capacity : next_entry;
  2548. /* bail out if nothing in log */
  2549. if (size == 0) {
  2550. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  2551. iwl_release_nic_access(priv);
  2552. return;
  2553. }
  2554. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  2555. size, num_wraps);
  2556. /* if uCode has wrapped back to top of log, start at the oldest entry,
  2557. * i.e the next one that uCode would fill. */
  2558. if (num_wraps)
  2559. iwl3945_print_event_log(priv, next_entry,
  2560. capacity - next_entry, mode);
  2561. /* (then/else) start at top of log */
  2562. iwl3945_print_event_log(priv, 0, next_entry, mode);
  2563. iwl_release_nic_access(priv);
  2564. }
  2565. /**
  2566. * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
  2567. */
  2568. static void iwl3945_irq_handle_error(struct iwl_priv *priv)
  2569. {
  2570. /* Set the FW error flag -- cleared on iwl3945_down */
  2571. set_bit(STATUS_FW_ERROR, &priv->status);
  2572. /* Cancel currently queued command. */
  2573. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2574. #ifdef CONFIG_IWLWIFI_DEBUG
  2575. if (priv->debug_level & IWL_DL_FW_ERRORS) {
  2576. iwl3945_dump_nic_error_log(priv);
  2577. iwl3945_dump_nic_event_log(priv);
  2578. iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
  2579. }
  2580. #endif
  2581. wake_up_interruptible(&priv->wait_command_queue);
  2582. /* Keep the restart process from trying to send host
  2583. * commands by clearing the INIT status bit */
  2584. clear_bit(STATUS_READY, &priv->status);
  2585. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2586. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  2587. "Restarting adapter due to uCode error.\n");
  2588. if (iwl3945_is_associated(priv)) {
  2589. memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
  2590. sizeof(priv->recovery39_rxon));
  2591. priv->error_recovering = 1;
  2592. }
  2593. if (priv->cfg->mod_params->restart_fw)
  2594. queue_work(priv->workqueue, &priv->restart);
  2595. }
  2596. }
  2597. static void iwl3945_error_recovery(struct iwl_priv *priv)
  2598. {
  2599. unsigned long flags;
  2600. memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
  2601. sizeof(priv->staging39_rxon));
  2602. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2603. iwl3945_commit_rxon(priv);
  2604. iwl3945_add_station(priv, priv->bssid, 1, 0);
  2605. spin_lock_irqsave(&priv->lock, flags);
  2606. priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
  2607. priv->error_recovering = 0;
  2608. spin_unlock_irqrestore(&priv->lock, flags);
  2609. }
  2610. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  2611. {
  2612. u32 inta, handled = 0;
  2613. u32 inta_fh;
  2614. unsigned long flags;
  2615. #ifdef CONFIG_IWLWIFI_DEBUG
  2616. u32 inta_mask;
  2617. #endif
  2618. spin_lock_irqsave(&priv->lock, flags);
  2619. /* Ack/clear/reset pending uCode interrupts.
  2620. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  2621. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  2622. inta = iwl_read32(priv, CSR_INT);
  2623. iwl_write32(priv, CSR_INT, inta);
  2624. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  2625. * Any new interrupts that happen after this, either while we're
  2626. * in this tasklet, or later, will show up in next ISR/tasklet. */
  2627. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2628. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  2629. #ifdef CONFIG_IWLWIFI_DEBUG
  2630. if (priv->debug_level & IWL_DL_ISR) {
  2631. /* just for debug */
  2632. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  2633. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2634. inta, inta_mask, inta_fh);
  2635. }
  2636. #endif
  2637. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  2638. * atomic, make sure that inta covers all the interrupts that
  2639. * we've discovered, even if FH interrupt came in just after
  2640. * reading CSR_INT. */
  2641. if (inta_fh & CSR39_FH_INT_RX_MASK)
  2642. inta |= CSR_INT_BIT_FH_RX;
  2643. if (inta_fh & CSR39_FH_INT_TX_MASK)
  2644. inta |= CSR_INT_BIT_FH_TX;
  2645. /* Now service all interrupt bits discovered above. */
  2646. if (inta & CSR_INT_BIT_HW_ERR) {
  2647. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  2648. /* Tell the device to stop sending interrupts */
  2649. iwl3945_disable_interrupts(priv);
  2650. iwl3945_irq_handle_error(priv);
  2651. handled |= CSR_INT_BIT_HW_ERR;
  2652. spin_unlock_irqrestore(&priv->lock, flags);
  2653. return;
  2654. }
  2655. #ifdef CONFIG_IWLWIFI_DEBUG
  2656. if (priv->debug_level & (IWL_DL_ISR)) {
  2657. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  2658. if (inta & CSR_INT_BIT_SCD)
  2659. IWL_DEBUG_ISR("Scheduler finished to transmit "
  2660. "the frame/frames.\n");
  2661. /* Alive notification via Rx interrupt will do the real work */
  2662. if (inta & CSR_INT_BIT_ALIVE)
  2663. IWL_DEBUG_ISR("Alive interrupt\n");
  2664. }
  2665. #endif
  2666. /* Safely ignore these bits for debug checks below */
  2667. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  2668. /* Error detected by uCode */
  2669. if (inta & CSR_INT_BIT_SW_ERR) {
  2670. IWL_ERR(priv, "Microcode SW error detected. "
  2671. "Restarting 0x%X.\n", inta);
  2672. iwl3945_irq_handle_error(priv);
  2673. handled |= CSR_INT_BIT_SW_ERR;
  2674. }
  2675. /* uCode wakes up after power-down sleep */
  2676. if (inta & CSR_INT_BIT_WAKEUP) {
  2677. IWL_DEBUG_ISR("Wakeup interrupt\n");
  2678. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  2679. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  2680. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  2681. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  2682. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  2683. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  2684. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  2685. handled |= CSR_INT_BIT_WAKEUP;
  2686. }
  2687. /* All uCode command responses, including Tx command responses,
  2688. * Rx "responses" (frame-received notification), and other
  2689. * notifications from uCode come through here*/
  2690. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  2691. iwl3945_rx_handle(priv);
  2692. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  2693. }
  2694. if (inta & CSR_INT_BIT_FH_TX) {
  2695. IWL_DEBUG_ISR("Tx interrupt\n");
  2696. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  2697. if (!iwl_grab_nic_access(priv)) {
  2698. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  2699. (FH39_SRVC_CHNL), 0x0);
  2700. iwl_release_nic_access(priv);
  2701. }
  2702. handled |= CSR_INT_BIT_FH_TX;
  2703. }
  2704. if (inta & ~handled)
  2705. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  2706. if (inta & ~CSR_INI_SET_MASK) {
  2707. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  2708. inta & ~CSR_INI_SET_MASK);
  2709. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  2710. }
  2711. /* Re-enable all interrupts */
  2712. /* only Re-enable if disabled by irq */
  2713. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  2714. iwl3945_enable_interrupts(priv);
  2715. #ifdef CONFIG_IWLWIFI_DEBUG
  2716. if (priv->debug_level & (IWL_DL_ISR)) {
  2717. inta = iwl_read32(priv, CSR_INT);
  2718. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  2719. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2720. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  2721. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  2722. }
  2723. #endif
  2724. spin_unlock_irqrestore(&priv->lock, flags);
  2725. }
  2726. static irqreturn_t iwl3945_isr(int irq, void *data)
  2727. {
  2728. struct iwl_priv *priv = data;
  2729. u32 inta, inta_mask;
  2730. u32 inta_fh;
  2731. if (!priv)
  2732. return IRQ_NONE;
  2733. spin_lock(&priv->lock);
  2734. /* Disable (but don't clear!) interrupts here to avoid
  2735. * back-to-back ISRs and sporadic interrupts from our NIC.
  2736. * If we have something to service, the tasklet will re-enable ints.
  2737. * If we *don't* have something, we'll re-enable before leaving here. */
  2738. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  2739. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2740. /* Discover which interrupts are active/pending */
  2741. inta = iwl_read32(priv, CSR_INT);
  2742. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2743. /* Ignore interrupt if there's nothing in NIC to service.
  2744. * This may be due to IRQ shared with another device,
  2745. * or due to sporadic interrupts thrown from our NIC. */
  2746. if (!inta && !inta_fh) {
  2747. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  2748. goto none;
  2749. }
  2750. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  2751. /* Hardware disappeared */
  2752. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  2753. goto unplugged;
  2754. }
  2755. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2756. inta, inta_mask, inta_fh);
  2757. inta &= ~CSR_INT_BIT_SCD;
  2758. /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
  2759. if (likely(inta || inta_fh))
  2760. tasklet_schedule(&priv->irq_tasklet);
  2761. unplugged:
  2762. spin_unlock(&priv->lock);
  2763. return IRQ_HANDLED;
  2764. none:
  2765. /* re-enable interrupts here since we don't have anything to service. */
  2766. /* only Re-enable if disabled by irq */
  2767. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  2768. iwl3945_enable_interrupts(priv);
  2769. spin_unlock(&priv->lock);
  2770. return IRQ_NONE;
  2771. }
  2772. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  2773. enum ieee80211_band band,
  2774. u8 is_active, u8 n_probes,
  2775. struct iwl3945_scan_channel *scan_ch)
  2776. {
  2777. const struct ieee80211_channel *channels = NULL;
  2778. const struct ieee80211_supported_band *sband;
  2779. const struct iwl_channel_info *ch_info;
  2780. u16 passive_dwell = 0;
  2781. u16 active_dwell = 0;
  2782. int added, i;
  2783. sband = iwl_get_hw_mode(priv, band);
  2784. if (!sband)
  2785. return 0;
  2786. channels = sband->channels;
  2787. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  2788. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  2789. if (passive_dwell <= active_dwell)
  2790. passive_dwell = active_dwell + 1;
  2791. for (i = 0, added = 0; i < sband->n_channels; i++) {
  2792. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  2793. continue;
  2794. scan_ch->channel = channels[i].hw_value;
  2795. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  2796. if (!is_channel_valid(ch_info)) {
  2797. IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
  2798. scan_ch->channel);
  2799. continue;
  2800. }
  2801. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  2802. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  2803. /* If passive , set up for auto-switch
  2804. * and use long active_dwell time.
  2805. */
  2806. if (!is_active || is_channel_passive(ch_info) ||
  2807. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  2808. scan_ch->type = 0; /* passive */
  2809. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  2810. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  2811. } else {
  2812. scan_ch->type = 1; /* active */
  2813. }
  2814. /* Set direct probe bits. These may be used both for active
  2815. * scan channels (probes gets sent right away),
  2816. * or for passive channels (probes get se sent only after
  2817. * hearing clear Rx packet).*/
  2818. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  2819. if (n_probes)
  2820. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  2821. } else {
  2822. /* uCode v1 does not allow setting direct probe bits on
  2823. * passive channel. */
  2824. if ((scan_ch->type & 1) && n_probes)
  2825. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  2826. }
  2827. /* Set txpower levels to defaults */
  2828. scan_ch->tpc.dsp_atten = 110;
  2829. /* scan_pwr_info->tpc.dsp_atten; */
  2830. /*scan_pwr_info->tpc.tx_gain; */
  2831. if (band == IEEE80211_BAND_5GHZ)
  2832. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  2833. else {
  2834. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  2835. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  2836. * power level:
  2837. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  2838. */
  2839. }
  2840. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  2841. scan_ch->channel,
  2842. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  2843. (scan_ch->type & 1) ?
  2844. active_dwell : passive_dwell);
  2845. scan_ch++;
  2846. added++;
  2847. }
  2848. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  2849. return added;
  2850. }
  2851. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  2852. struct ieee80211_rate *rates)
  2853. {
  2854. int i;
  2855. for (i = 0; i < IWL_RATE_COUNT; i++) {
  2856. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  2857. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  2858. rates[i].hw_value_short = i;
  2859. rates[i].flags = 0;
  2860. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  2861. /*
  2862. * If CCK != 1M then set short preamble rate flag.
  2863. */
  2864. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  2865. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  2866. }
  2867. }
  2868. }
  2869. /******************************************************************************
  2870. *
  2871. * uCode download functions
  2872. *
  2873. ******************************************************************************/
  2874. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  2875. {
  2876. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  2877. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  2878. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  2879. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  2880. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  2881. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  2882. }
  2883. /**
  2884. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  2885. * looking at all data.
  2886. */
  2887. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  2888. {
  2889. u32 val;
  2890. u32 save_len = len;
  2891. int rc = 0;
  2892. u32 errcnt;
  2893. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  2894. rc = iwl_grab_nic_access(priv);
  2895. if (rc)
  2896. return rc;
  2897. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  2898. IWL39_RTC_INST_LOWER_BOUND);
  2899. errcnt = 0;
  2900. for (; len > 0; len -= sizeof(u32), image++) {
  2901. /* read data comes through single port, auto-incr addr */
  2902. /* NOTE: Use the debugless read so we don't flood kernel log
  2903. * if IWL_DL_IO is set */
  2904. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  2905. if (val != le32_to_cpu(*image)) {
  2906. IWL_ERR(priv, "uCode INST section is invalid at "
  2907. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  2908. save_len - len, val, le32_to_cpu(*image));
  2909. rc = -EIO;
  2910. errcnt++;
  2911. if (errcnt >= 20)
  2912. break;
  2913. }
  2914. }
  2915. iwl_release_nic_access(priv);
  2916. if (!errcnt)
  2917. IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
  2918. return rc;
  2919. }
  2920. /**
  2921. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  2922. * using sample data 100 bytes apart. If these sample points are good,
  2923. * it's a pretty good bet that everything between them is good, too.
  2924. */
  2925. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  2926. {
  2927. u32 val;
  2928. int rc = 0;
  2929. u32 errcnt = 0;
  2930. u32 i;
  2931. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  2932. rc = iwl_grab_nic_access(priv);
  2933. if (rc)
  2934. return rc;
  2935. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  2936. /* read data comes through single port, auto-incr addr */
  2937. /* NOTE: Use the debugless read so we don't flood kernel log
  2938. * if IWL_DL_IO is set */
  2939. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  2940. i + IWL39_RTC_INST_LOWER_BOUND);
  2941. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  2942. if (val != le32_to_cpu(*image)) {
  2943. #if 0 /* Enable this if you want to see details */
  2944. IWL_ERR(priv, "uCode INST section is invalid at "
  2945. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  2946. i, val, *image);
  2947. #endif
  2948. rc = -EIO;
  2949. errcnt++;
  2950. if (errcnt >= 3)
  2951. break;
  2952. }
  2953. }
  2954. iwl_release_nic_access(priv);
  2955. return rc;
  2956. }
  2957. /**
  2958. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  2959. * and verify its contents
  2960. */
  2961. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  2962. {
  2963. __le32 *image;
  2964. u32 len;
  2965. int rc = 0;
  2966. /* Try bootstrap */
  2967. image = (__le32 *)priv->ucode_boot.v_addr;
  2968. len = priv->ucode_boot.len;
  2969. rc = iwl3945_verify_inst_sparse(priv, image, len);
  2970. if (rc == 0) {
  2971. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  2972. return 0;
  2973. }
  2974. /* Try initialize */
  2975. image = (__le32 *)priv->ucode_init.v_addr;
  2976. len = priv->ucode_init.len;
  2977. rc = iwl3945_verify_inst_sparse(priv, image, len);
  2978. if (rc == 0) {
  2979. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  2980. return 0;
  2981. }
  2982. /* Try runtime/protocol */
  2983. image = (__le32 *)priv->ucode_code.v_addr;
  2984. len = priv->ucode_code.len;
  2985. rc = iwl3945_verify_inst_sparse(priv, image, len);
  2986. if (rc == 0) {
  2987. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  2988. return 0;
  2989. }
  2990. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  2991. /* Since nothing seems to match, show first several data entries in
  2992. * instruction SRAM, so maybe visual inspection will give a clue.
  2993. * Selection of bootstrap image (vs. other images) is arbitrary. */
  2994. image = (__le32 *)priv->ucode_boot.v_addr;
  2995. len = priv->ucode_boot.len;
  2996. rc = iwl3945_verify_inst_full(priv, image, len);
  2997. return rc;
  2998. }
  2999. static void iwl3945_nic_start(struct iwl_priv *priv)
  3000. {
  3001. /* Remove all resets to allow NIC to operate */
  3002. iwl_write32(priv, CSR_RESET, 0);
  3003. }
  3004. /**
  3005. * iwl3945_read_ucode - Read uCode images from disk file.
  3006. *
  3007. * Copy into buffers for card to fetch via bus-mastering
  3008. */
  3009. static int iwl3945_read_ucode(struct iwl_priv *priv)
  3010. {
  3011. struct iwl_ucode *ucode;
  3012. int ret = -EINVAL, index;
  3013. const struct firmware *ucode_raw;
  3014. /* firmware file name contains uCode/driver compatibility version */
  3015. const char *name_pre = priv->cfg->fw_name_pre;
  3016. const unsigned int api_max = priv->cfg->ucode_api_max;
  3017. const unsigned int api_min = priv->cfg->ucode_api_min;
  3018. char buf[25];
  3019. u8 *src;
  3020. size_t len;
  3021. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  3022. /* Ask kernel firmware_class module to get the boot firmware off disk.
  3023. * request_firmware() is synchronous, file is in memory on return. */
  3024. for (index = api_max; index >= api_min; index--) {
  3025. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  3026. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  3027. if (ret < 0) {
  3028. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  3029. buf, ret);
  3030. if (ret == -ENOENT)
  3031. continue;
  3032. else
  3033. goto error;
  3034. } else {
  3035. if (index < api_max)
  3036. IWL_ERR(priv, "Loaded firmware %s, "
  3037. "which is deprecated. "
  3038. " Please use API v%u instead.\n",
  3039. buf, api_max);
  3040. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  3041. buf, ucode_raw->size);
  3042. break;
  3043. }
  3044. }
  3045. if (ret < 0)
  3046. goto error;
  3047. /* Make sure that we got at least our header! */
  3048. if (ucode_raw->size < sizeof(*ucode)) {
  3049. IWL_ERR(priv, "File size way too small!\n");
  3050. ret = -EINVAL;
  3051. goto err_release;
  3052. }
  3053. /* Data from ucode file: header followed by uCode images */
  3054. ucode = (void *)ucode_raw->data;
  3055. priv->ucode_ver = le32_to_cpu(ucode->ver);
  3056. api_ver = IWL_UCODE_API(priv->ucode_ver);
  3057. inst_size = le32_to_cpu(ucode->inst_size);
  3058. data_size = le32_to_cpu(ucode->data_size);
  3059. init_size = le32_to_cpu(ucode->init_size);
  3060. init_data_size = le32_to_cpu(ucode->init_data_size);
  3061. boot_size = le32_to_cpu(ucode->boot_size);
  3062. /* api_ver should match the api version forming part of the
  3063. * firmware filename ... but we don't check for that and only rely
  3064. * on the API version read from firware header from here on forward */
  3065. if (api_ver < api_min || api_ver > api_max) {
  3066. IWL_ERR(priv, "Driver unable to support your firmware API. "
  3067. "Driver supports v%u, firmware is v%u.\n",
  3068. api_max, api_ver);
  3069. priv->ucode_ver = 0;
  3070. ret = -EINVAL;
  3071. goto err_release;
  3072. }
  3073. if (api_ver != api_max)
  3074. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  3075. "got %u. New firmware can be obtained "
  3076. "from http://www.intellinuxwireless.org.\n",
  3077. api_max, api_ver);
  3078. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  3079. IWL_UCODE_MAJOR(priv->ucode_ver),
  3080. IWL_UCODE_MINOR(priv->ucode_ver),
  3081. IWL_UCODE_API(priv->ucode_ver),
  3082. IWL_UCODE_SERIAL(priv->ucode_ver));
  3083. IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
  3084. priv->ucode_ver);
  3085. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  3086. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
  3087. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
  3088. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
  3089. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  3090. /* Verify size of file vs. image size info in file's header */
  3091. if (ucode_raw->size < sizeof(*ucode) +
  3092. inst_size + data_size + init_size +
  3093. init_data_size + boot_size) {
  3094. IWL_DEBUG_INFO("uCode file size %d too small\n",
  3095. (int)ucode_raw->size);
  3096. ret = -EINVAL;
  3097. goto err_release;
  3098. }
  3099. /* Verify that uCode images will fit in card's SRAM */
  3100. if (inst_size > IWL39_MAX_INST_SIZE) {
  3101. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  3102. inst_size);
  3103. ret = -EINVAL;
  3104. goto err_release;
  3105. }
  3106. if (data_size > IWL39_MAX_DATA_SIZE) {
  3107. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  3108. data_size);
  3109. ret = -EINVAL;
  3110. goto err_release;
  3111. }
  3112. if (init_size > IWL39_MAX_INST_SIZE) {
  3113. IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
  3114. init_size);
  3115. ret = -EINVAL;
  3116. goto err_release;
  3117. }
  3118. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  3119. IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
  3120. init_data_size);
  3121. ret = -EINVAL;
  3122. goto err_release;
  3123. }
  3124. if (boot_size > IWL39_MAX_BSM_SIZE) {
  3125. IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
  3126. boot_size);
  3127. ret = -EINVAL;
  3128. goto err_release;
  3129. }
  3130. /* Allocate ucode buffers for card's bus-master loading ... */
  3131. /* Runtime instructions and 2 copies of data:
  3132. * 1) unmodified from disk
  3133. * 2) backup cache for save/restore during power-downs */
  3134. priv->ucode_code.len = inst_size;
  3135. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  3136. priv->ucode_data.len = data_size;
  3137. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  3138. priv->ucode_data_backup.len = data_size;
  3139. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3140. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  3141. !priv->ucode_data_backup.v_addr)
  3142. goto err_pci_alloc;
  3143. /* Initialization instructions and data */
  3144. if (init_size && init_data_size) {
  3145. priv->ucode_init.len = init_size;
  3146. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  3147. priv->ucode_init_data.len = init_data_size;
  3148. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3149. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  3150. goto err_pci_alloc;
  3151. }
  3152. /* Bootstrap (instructions only, no data) */
  3153. if (boot_size) {
  3154. priv->ucode_boot.len = boot_size;
  3155. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3156. if (!priv->ucode_boot.v_addr)
  3157. goto err_pci_alloc;
  3158. }
  3159. /* Copy images into buffers for card's bus-master reads ... */
  3160. /* Runtime instructions (first block of data in file) */
  3161. src = &ucode->data[0];
  3162. len = priv->ucode_code.len;
  3163. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  3164. memcpy(priv->ucode_code.v_addr, src, len);
  3165. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  3166. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  3167. /* Runtime data (2nd block)
  3168. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  3169. src = &ucode->data[inst_size];
  3170. len = priv->ucode_data.len;
  3171. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  3172. memcpy(priv->ucode_data.v_addr, src, len);
  3173. memcpy(priv->ucode_data_backup.v_addr, src, len);
  3174. /* Initialization instructions (3rd block) */
  3175. if (init_size) {
  3176. src = &ucode->data[inst_size + data_size];
  3177. len = priv->ucode_init.len;
  3178. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  3179. len);
  3180. memcpy(priv->ucode_init.v_addr, src, len);
  3181. }
  3182. /* Initialization data (4th block) */
  3183. if (init_data_size) {
  3184. src = &ucode->data[inst_size + data_size + init_size];
  3185. len = priv->ucode_init_data.len;
  3186. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  3187. (int)len);
  3188. memcpy(priv->ucode_init_data.v_addr, src, len);
  3189. }
  3190. /* Bootstrap instructions (5th block) */
  3191. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  3192. len = priv->ucode_boot.len;
  3193. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  3194. (int)len);
  3195. memcpy(priv->ucode_boot.v_addr, src, len);
  3196. /* We have our copies now, allow OS release its copies */
  3197. release_firmware(ucode_raw);
  3198. return 0;
  3199. err_pci_alloc:
  3200. IWL_ERR(priv, "failed to allocate pci memory\n");
  3201. ret = -ENOMEM;
  3202. iwl3945_dealloc_ucode_pci(priv);
  3203. err_release:
  3204. release_firmware(ucode_raw);
  3205. error:
  3206. return ret;
  3207. }
  3208. /**
  3209. * iwl3945_set_ucode_ptrs - Set uCode address location
  3210. *
  3211. * Tell initialization uCode where to find runtime uCode.
  3212. *
  3213. * BSM registers initially contain pointers to initialization uCode.
  3214. * We need to replace them to load runtime uCode inst and data,
  3215. * and to save runtime data when powering down.
  3216. */
  3217. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  3218. {
  3219. dma_addr_t pinst;
  3220. dma_addr_t pdata;
  3221. int rc = 0;
  3222. unsigned long flags;
  3223. /* bits 31:0 for 3945 */
  3224. pinst = priv->ucode_code.p_addr;
  3225. pdata = priv->ucode_data_backup.p_addr;
  3226. spin_lock_irqsave(&priv->lock, flags);
  3227. rc = iwl_grab_nic_access(priv);
  3228. if (rc) {
  3229. spin_unlock_irqrestore(&priv->lock, flags);
  3230. return rc;
  3231. }
  3232. /* Tell bootstrap uCode where to find image to load */
  3233. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  3234. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  3235. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  3236. priv->ucode_data.len);
  3237. /* Inst byte count must be last to set up, bit 31 signals uCode
  3238. * that all new ptr/size info is in place */
  3239. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  3240. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  3241. iwl_release_nic_access(priv);
  3242. spin_unlock_irqrestore(&priv->lock, flags);
  3243. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  3244. return rc;
  3245. }
  3246. /**
  3247. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  3248. *
  3249. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  3250. *
  3251. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  3252. */
  3253. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  3254. {
  3255. /* Check alive response for "valid" sign from uCode */
  3256. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  3257. /* We had an error bringing up the hardware, so take it
  3258. * all the way back down so we can try again */
  3259. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  3260. goto restart;
  3261. }
  3262. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  3263. * This is a paranoid check, because we would not have gotten the
  3264. * "initialize" alive if code weren't properly loaded. */
  3265. if (iwl3945_verify_ucode(priv)) {
  3266. /* Runtime instruction load was bad;
  3267. * take it all the way back down so we can try again */
  3268. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  3269. goto restart;
  3270. }
  3271. /* Send pointers to protocol/runtime uCode image ... init code will
  3272. * load and launch runtime uCode, which will send us another "Alive"
  3273. * notification. */
  3274. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3275. if (iwl3945_set_ucode_ptrs(priv)) {
  3276. /* Runtime instruction load won't happen;
  3277. * take it all the way back down so we can try again */
  3278. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  3279. goto restart;
  3280. }
  3281. return;
  3282. restart:
  3283. queue_work(priv->workqueue, &priv->restart);
  3284. }
  3285. /* temporary */
  3286. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
  3287. struct sk_buff *skb);
  3288. /**
  3289. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  3290. * from protocol/runtime uCode (initialization uCode's
  3291. * Alive gets handled by iwl3945_init_alive_start()).
  3292. */
  3293. static void iwl3945_alive_start(struct iwl_priv *priv)
  3294. {
  3295. int rc = 0;
  3296. int thermal_spin = 0;
  3297. u32 rfkill;
  3298. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3299. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  3300. /* We had an error bringing up the hardware, so take it
  3301. * all the way back down so we can try again */
  3302. IWL_DEBUG_INFO("Alive failed.\n");
  3303. goto restart;
  3304. }
  3305. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  3306. * This is a paranoid check, because we would not have gotten the
  3307. * "runtime" alive if code weren't properly loaded. */
  3308. if (iwl3945_verify_ucode(priv)) {
  3309. /* Runtime instruction load was bad;
  3310. * take it all the way back down so we can try again */
  3311. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  3312. goto restart;
  3313. }
  3314. iwl3945_clear_stations_table(priv);
  3315. rc = iwl_grab_nic_access(priv);
  3316. if (rc) {
  3317. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  3318. return;
  3319. }
  3320. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  3321. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  3322. iwl_release_nic_access(priv);
  3323. if (rfkill & 0x1) {
  3324. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3325. /* if RFKILL is not on, then wait for thermal
  3326. * sensor in adapter to kick in */
  3327. while (iwl3945_hw_get_temperature(priv) == 0) {
  3328. thermal_spin++;
  3329. udelay(10);
  3330. }
  3331. if (thermal_spin)
  3332. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  3333. thermal_spin * 10);
  3334. } else
  3335. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3336. /* After the ALIVE response, we can send commands to 3945 uCode */
  3337. set_bit(STATUS_ALIVE, &priv->status);
  3338. /* Clear out the uCode error bit if it is set */
  3339. clear_bit(STATUS_FW_ERROR, &priv->status);
  3340. if (iwl_is_rfkill(priv))
  3341. return;
  3342. ieee80211_wake_queues(priv->hw);
  3343. priv->active_rate = priv->rates_mask;
  3344. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  3345. iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  3346. if (iwl3945_is_associated(priv)) {
  3347. struct iwl3945_rxon_cmd *active_rxon =
  3348. (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
  3349. memcpy(&priv->staging39_rxon, &priv->active39_rxon,
  3350. sizeof(priv->staging39_rxon));
  3351. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3352. } else {
  3353. /* Initialize our rx_config data */
  3354. iwl3945_connection_init_rx_config(priv, priv->iw_mode);
  3355. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  3356. }
  3357. /* Configure Bluetooth device coexistence support */
  3358. iwl3945_send_bt_config(priv);
  3359. /* Configure the adapter for unassociated operation */
  3360. iwl3945_commit_rxon(priv);
  3361. iwl3945_reg_txpower_periodic(priv);
  3362. iwl3945_led_register(priv);
  3363. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  3364. set_bit(STATUS_READY, &priv->status);
  3365. wake_up_interruptible(&priv->wait_command_queue);
  3366. if (priv->error_recovering)
  3367. iwl3945_error_recovery(priv);
  3368. /* reassociate for ADHOC mode */
  3369. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  3370. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  3371. priv->vif);
  3372. if (beacon)
  3373. iwl3945_mac_beacon_update(priv->hw, beacon);
  3374. }
  3375. return;
  3376. restart:
  3377. queue_work(priv->workqueue, &priv->restart);
  3378. }
  3379. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  3380. static void __iwl3945_down(struct iwl_priv *priv)
  3381. {
  3382. unsigned long flags;
  3383. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  3384. struct ieee80211_conf *conf = NULL;
  3385. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  3386. conf = ieee80211_get_hw_conf(priv->hw);
  3387. if (!exit_pending)
  3388. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3389. iwl3945_led_unregister(priv);
  3390. iwl3945_clear_stations_table(priv);
  3391. /* Unblock any waiting calls */
  3392. wake_up_interruptible_all(&priv->wait_command_queue);
  3393. /* Wipe out the EXIT_PENDING status bit if we are not actually
  3394. * exiting the module */
  3395. if (!exit_pending)
  3396. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  3397. /* stop and reset the on-board processor */
  3398. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3399. /* tell the device to stop sending interrupts */
  3400. spin_lock_irqsave(&priv->lock, flags);
  3401. iwl3945_disable_interrupts(priv);
  3402. spin_unlock_irqrestore(&priv->lock, flags);
  3403. iwl_synchronize_irq(priv);
  3404. if (priv->mac80211_registered)
  3405. ieee80211_stop_queues(priv->hw);
  3406. /* If we have not previously called iwl3945_init() then
  3407. * clear all bits but the RF Kill and SUSPEND bits and return */
  3408. if (!iwl_is_init(priv)) {
  3409. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  3410. STATUS_RF_KILL_HW |
  3411. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  3412. STATUS_RF_KILL_SW |
  3413. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  3414. STATUS_GEO_CONFIGURED |
  3415. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  3416. STATUS_IN_SUSPEND |
  3417. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  3418. STATUS_EXIT_PENDING;
  3419. goto exit;
  3420. }
  3421. /* ...otherwise clear out all the status bits but the RF Kill and
  3422. * SUSPEND bits and continue taking the NIC down. */
  3423. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  3424. STATUS_RF_KILL_HW |
  3425. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  3426. STATUS_RF_KILL_SW |
  3427. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  3428. STATUS_GEO_CONFIGURED |
  3429. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  3430. STATUS_IN_SUSPEND |
  3431. test_bit(STATUS_FW_ERROR, &priv->status) <<
  3432. STATUS_FW_ERROR |
  3433. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  3434. STATUS_EXIT_PENDING;
  3435. priv->cfg->ops->lib->apm_ops.reset(priv);
  3436. spin_lock_irqsave(&priv->lock, flags);
  3437. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3438. spin_unlock_irqrestore(&priv->lock, flags);
  3439. iwl3945_hw_txq_ctx_stop(priv);
  3440. iwl3945_hw_rxq_stop(priv);
  3441. spin_lock_irqsave(&priv->lock, flags);
  3442. if (!iwl_grab_nic_access(priv)) {
  3443. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  3444. APMG_CLK_VAL_DMA_CLK_RQT);
  3445. iwl_release_nic_access(priv);
  3446. }
  3447. spin_unlock_irqrestore(&priv->lock, flags);
  3448. udelay(5);
  3449. if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
  3450. priv->cfg->ops->lib->apm_ops.stop(priv);
  3451. else
  3452. priv->cfg->ops->lib->apm_ops.reset(priv);
  3453. exit:
  3454. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  3455. if (priv->ibss_beacon)
  3456. dev_kfree_skb(priv->ibss_beacon);
  3457. priv->ibss_beacon = NULL;
  3458. /* clear out any free frames */
  3459. iwl3945_clear_free_frames(priv);
  3460. }
  3461. static void iwl3945_down(struct iwl_priv *priv)
  3462. {
  3463. mutex_lock(&priv->mutex);
  3464. __iwl3945_down(priv);
  3465. mutex_unlock(&priv->mutex);
  3466. iwl3945_cancel_deferred_work(priv);
  3467. }
  3468. #define MAX_HW_RESTARTS 5
  3469. static int __iwl3945_up(struct iwl_priv *priv)
  3470. {
  3471. int rc, i;
  3472. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3473. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  3474. return -EIO;
  3475. }
  3476. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  3477. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  3478. "parameter)\n");
  3479. return -ENODEV;
  3480. }
  3481. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  3482. IWL_ERR(priv, "ucode not available for device bring up\n");
  3483. return -EIO;
  3484. }
  3485. /* If platform's RF_KILL switch is NOT set to KILL */
  3486. if (iwl_read32(priv, CSR_GP_CNTRL) &
  3487. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  3488. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3489. else {
  3490. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3491. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  3492. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  3493. return -ENODEV;
  3494. }
  3495. }
  3496. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  3497. rc = iwl3945_hw_nic_init(priv);
  3498. if (rc) {
  3499. IWL_ERR(priv, "Unable to int nic\n");
  3500. return rc;
  3501. }
  3502. /* make sure rfkill handshake bits are cleared */
  3503. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  3504. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3505. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3506. /* clear (again), then enable host interrupts */
  3507. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  3508. iwl3945_enable_interrupts(priv);
  3509. /* really make sure rfkill handshake bits are cleared */
  3510. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  3511. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  3512. /* Copy original ucode data image from disk into backup cache.
  3513. * This will be used to initialize the on-board processor's
  3514. * data SRAM for a clean start when the runtime program first loads. */
  3515. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  3516. priv->ucode_data.len);
  3517. /* We return success when we resume from suspend and rf_kill is on. */
  3518. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  3519. return 0;
  3520. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  3521. iwl3945_clear_stations_table(priv);
  3522. /* load bootstrap state machine,
  3523. * load bootstrap program into processor's memory,
  3524. * prepare to load the "initialize" uCode */
  3525. priv->cfg->ops->lib->load_ucode(priv);
  3526. if (rc) {
  3527. IWL_ERR(priv,
  3528. "Unable to set up bootstrap uCode: %d\n", rc);
  3529. continue;
  3530. }
  3531. /* start card; "initialize" will load runtime ucode */
  3532. iwl3945_nic_start(priv);
  3533. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  3534. return 0;
  3535. }
  3536. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3537. __iwl3945_down(priv);
  3538. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  3539. /* tried to restart and config the device for as long as our
  3540. * patience could withstand */
  3541. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  3542. return -EIO;
  3543. }
  3544. /*****************************************************************************
  3545. *
  3546. * Workqueue callbacks
  3547. *
  3548. *****************************************************************************/
  3549. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  3550. {
  3551. struct iwl_priv *priv =
  3552. container_of(data, struct iwl_priv, init_alive_start.work);
  3553. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3554. return;
  3555. mutex_lock(&priv->mutex);
  3556. iwl3945_init_alive_start(priv);
  3557. mutex_unlock(&priv->mutex);
  3558. }
  3559. static void iwl3945_bg_alive_start(struct work_struct *data)
  3560. {
  3561. struct iwl_priv *priv =
  3562. container_of(data, struct iwl_priv, alive_start.work);
  3563. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3564. return;
  3565. mutex_lock(&priv->mutex);
  3566. iwl3945_alive_start(priv);
  3567. mutex_unlock(&priv->mutex);
  3568. }
  3569. static void iwl3945_rfkill_poll(struct work_struct *data)
  3570. {
  3571. struct iwl_priv *priv =
  3572. container_of(data, struct iwl_priv, rfkill_poll.work);
  3573. unsigned long status = priv->status;
  3574. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  3575. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3576. else
  3577. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3578. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  3579. queue_work(priv->workqueue, &priv->rf_kill);
  3580. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3581. round_jiffies_relative(2 * HZ));
  3582. }
  3583. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  3584. static void iwl3945_bg_request_scan(struct work_struct *data)
  3585. {
  3586. struct iwl_priv *priv =
  3587. container_of(data, struct iwl_priv, request_scan);
  3588. struct iwl_host_cmd cmd = {
  3589. .id = REPLY_SCAN_CMD,
  3590. .len = sizeof(struct iwl3945_scan_cmd),
  3591. .meta.flags = CMD_SIZE_HUGE,
  3592. };
  3593. int rc = 0;
  3594. struct iwl3945_scan_cmd *scan;
  3595. struct ieee80211_conf *conf = NULL;
  3596. u8 n_probes = 2;
  3597. enum ieee80211_band band;
  3598. DECLARE_SSID_BUF(ssid);
  3599. conf = ieee80211_get_hw_conf(priv->hw);
  3600. mutex_lock(&priv->mutex);
  3601. if (!iwl_is_ready(priv)) {
  3602. IWL_WARN(priv, "request scan called when driver not ready.\n");
  3603. goto done;
  3604. }
  3605. /* Make sure the scan wasn't canceled before this queued work
  3606. * was given the chance to run... */
  3607. if (!test_bit(STATUS_SCANNING, &priv->status))
  3608. goto done;
  3609. /* This should never be called or scheduled if there is currently
  3610. * a scan active in the hardware. */
  3611. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  3612. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  3613. "Ignoring second request.\n");
  3614. rc = -EIO;
  3615. goto done;
  3616. }
  3617. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3618. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  3619. goto done;
  3620. }
  3621. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3622. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  3623. goto done;
  3624. }
  3625. if (iwl_is_rfkill(priv)) {
  3626. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  3627. goto done;
  3628. }
  3629. if (!test_bit(STATUS_READY, &priv->status)) {
  3630. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  3631. goto done;
  3632. }
  3633. if (!priv->scan_bands) {
  3634. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  3635. goto done;
  3636. }
  3637. if (!priv->scan) {
  3638. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  3639. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  3640. if (!priv->scan) {
  3641. rc = -ENOMEM;
  3642. goto done;
  3643. }
  3644. }
  3645. scan = priv->scan;
  3646. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  3647. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  3648. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  3649. if (iwl3945_is_associated(priv)) {
  3650. u16 interval = 0;
  3651. u32 extra;
  3652. u32 suspend_time = 100;
  3653. u32 scan_suspend_time = 100;
  3654. unsigned long flags;
  3655. IWL_DEBUG_INFO("Scanning while associated...\n");
  3656. spin_lock_irqsave(&priv->lock, flags);
  3657. interval = priv->beacon_int;
  3658. spin_unlock_irqrestore(&priv->lock, flags);
  3659. scan->suspend_time = 0;
  3660. scan->max_out_time = cpu_to_le32(200 * 1024);
  3661. if (!interval)
  3662. interval = suspend_time;
  3663. /*
  3664. * suspend time format:
  3665. * 0-19: beacon interval in usec (time before exec.)
  3666. * 20-23: 0
  3667. * 24-31: number of beacons (suspend between channels)
  3668. */
  3669. extra = (suspend_time / interval) << 24;
  3670. scan_suspend_time = 0xFF0FFFFF &
  3671. (extra | ((suspend_time % interval) * 1024));
  3672. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  3673. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  3674. scan_suspend_time, interval);
  3675. }
  3676. /* We should add the ability for user to lock to PASSIVE ONLY */
  3677. if (priv->one_direct_scan) {
  3678. IWL_DEBUG_SCAN
  3679. ("Kicking off one direct scan for '%s'\n",
  3680. print_ssid(ssid, priv->direct_ssid,
  3681. priv->direct_ssid_len));
  3682. scan->direct_scan[0].id = WLAN_EID_SSID;
  3683. scan->direct_scan[0].len = priv->direct_ssid_len;
  3684. memcpy(scan->direct_scan[0].ssid,
  3685. priv->direct_ssid, priv->direct_ssid_len);
  3686. n_probes++;
  3687. } else
  3688. IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
  3689. /* We don't build a direct scan probe request; the uCode will do
  3690. * that based on the direct_mask added to each channel entry */
  3691. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  3692. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  3693. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  3694. /* flags + rate selection */
  3695. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  3696. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  3697. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  3698. scan->good_CRC_th = 0;
  3699. band = IEEE80211_BAND_2GHZ;
  3700. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  3701. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  3702. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  3703. band = IEEE80211_BAND_5GHZ;
  3704. } else {
  3705. IWL_WARN(priv, "Invalid scan band count\n");
  3706. goto done;
  3707. }
  3708. scan->tx_cmd.len = cpu_to_le16(
  3709. iwl_fill_probe_req(priv, band,
  3710. (struct ieee80211_mgmt *)scan->data,
  3711. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  3712. /* select Rx antennas */
  3713. scan->flags |= iwl3945_get_antenna_flags(priv);
  3714. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  3715. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  3716. scan->channel_count =
  3717. iwl3945_get_channels_for_scan(priv, band, 1, /* active */
  3718. n_probes,
  3719. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  3720. if (scan->channel_count == 0) {
  3721. IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
  3722. goto done;
  3723. }
  3724. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  3725. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  3726. cmd.data = scan;
  3727. scan->len = cpu_to_le16(cmd.len);
  3728. set_bit(STATUS_SCAN_HW, &priv->status);
  3729. rc = iwl_send_cmd_sync(priv, &cmd);
  3730. if (rc)
  3731. goto done;
  3732. queue_delayed_work(priv->workqueue, &priv->scan_check,
  3733. IWL_SCAN_CHECK_WATCHDOG);
  3734. mutex_unlock(&priv->mutex);
  3735. return;
  3736. done:
  3737. /* can not perform scan make sure we clear scanning
  3738. * bits from status so next scan request can be performed.
  3739. * if we dont clear scanning status bit here all next scan
  3740. * will fail
  3741. */
  3742. clear_bit(STATUS_SCAN_HW, &priv->status);
  3743. clear_bit(STATUS_SCANNING, &priv->status);
  3744. /* inform mac80211 scan aborted */
  3745. queue_work(priv->workqueue, &priv->scan_completed);
  3746. mutex_unlock(&priv->mutex);
  3747. }
  3748. static void iwl3945_bg_up(struct work_struct *data)
  3749. {
  3750. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  3751. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3752. return;
  3753. mutex_lock(&priv->mutex);
  3754. __iwl3945_up(priv);
  3755. mutex_unlock(&priv->mutex);
  3756. iwl_rfkill_set_hw_state(priv);
  3757. }
  3758. static void iwl3945_bg_restart(struct work_struct *data)
  3759. {
  3760. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  3761. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3762. return;
  3763. iwl3945_down(priv);
  3764. queue_work(priv->workqueue, &priv->up);
  3765. }
  3766. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  3767. {
  3768. struct iwl_priv *priv =
  3769. container_of(data, struct iwl_priv, rx_replenish);
  3770. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3771. return;
  3772. mutex_lock(&priv->mutex);
  3773. iwl3945_rx_replenish(priv);
  3774. mutex_unlock(&priv->mutex);
  3775. }
  3776. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  3777. static void iwl3945_post_associate(struct iwl_priv *priv)
  3778. {
  3779. int rc = 0;
  3780. struct ieee80211_conf *conf = NULL;
  3781. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  3782. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  3783. return;
  3784. }
  3785. IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
  3786. priv->assoc_id, priv->active39_rxon.bssid_addr);
  3787. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3788. return;
  3789. if (!priv->vif || !priv->is_open)
  3790. return;
  3791. iwl_scan_cancel_timeout(priv, 200);
  3792. conf = ieee80211_get_hw_conf(priv->hw);
  3793. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3794. iwl3945_commit_rxon(priv);
  3795. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  3796. iwl3945_setup_rxon_timing(priv);
  3797. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  3798. sizeof(priv->rxon_timing), &priv->rxon_timing);
  3799. if (rc)
  3800. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  3801. "Attempting to continue.\n");
  3802. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  3803. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  3804. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  3805. priv->assoc_id, priv->beacon_int);
  3806. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  3807. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3808. else
  3809. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3810. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  3811. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  3812. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3813. else
  3814. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3815. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  3816. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3817. }
  3818. iwl3945_commit_rxon(priv);
  3819. switch (priv->iw_mode) {
  3820. case NL80211_IFTYPE_STATION:
  3821. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  3822. break;
  3823. case NL80211_IFTYPE_ADHOC:
  3824. priv->assoc_id = 1;
  3825. iwl3945_add_station(priv, priv->bssid, 0, 0);
  3826. iwl3945_sync_sta(priv, IWL_STA_ID,
  3827. (priv->band == IEEE80211_BAND_5GHZ) ?
  3828. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  3829. CMD_ASYNC);
  3830. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  3831. iwl3945_send_beacon_cmd(priv);
  3832. break;
  3833. default:
  3834. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  3835. __func__, priv->iw_mode);
  3836. break;
  3837. }
  3838. iwl3945_activate_qos(priv, 0);
  3839. /* we have just associated, don't start scan too early */
  3840. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  3841. }
  3842. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
  3843. /*****************************************************************************
  3844. *
  3845. * mac80211 entry point functions
  3846. *
  3847. *****************************************************************************/
  3848. #define UCODE_READY_TIMEOUT (2 * HZ)
  3849. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  3850. {
  3851. struct iwl_priv *priv = hw->priv;
  3852. int ret;
  3853. IWL_DEBUG_MAC80211("enter\n");
  3854. /* we should be verifying the device is ready to be opened */
  3855. mutex_lock(&priv->mutex);
  3856. memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
  3857. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  3858. * ucode filename and max sizes are card-specific. */
  3859. if (!priv->ucode_code.len) {
  3860. ret = iwl3945_read_ucode(priv);
  3861. if (ret) {
  3862. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  3863. mutex_unlock(&priv->mutex);
  3864. goto out_release_irq;
  3865. }
  3866. }
  3867. ret = __iwl3945_up(priv);
  3868. mutex_unlock(&priv->mutex);
  3869. iwl_rfkill_set_hw_state(priv);
  3870. if (ret)
  3871. goto out_release_irq;
  3872. IWL_DEBUG_INFO("Start UP work.\n");
  3873. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  3874. return 0;
  3875. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  3876. * mac80211 will not be run successfully. */
  3877. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  3878. test_bit(STATUS_READY, &priv->status),
  3879. UCODE_READY_TIMEOUT);
  3880. if (!ret) {
  3881. if (!test_bit(STATUS_READY, &priv->status)) {
  3882. IWL_ERR(priv,
  3883. "Wait for START_ALIVE timeout after %dms.\n",
  3884. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  3885. ret = -ETIMEDOUT;
  3886. goto out_release_irq;
  3887. }
  3888. }
  3889. /* ucode is running and will send rfkill notifications,
  3890. * no need to poll the killswitch state anymore */
  3891. cancel_delayed_work(&priv->rfkill_poll);
  3892. priv->is_open = 1;
  3893. IWL_DEBUG_MAC80211("leave\n");
  3894. return 0;
  3895. out_release_irq:
  3896. priv->is_open = 0;
  3897. IWL_DEBUG_MAC80211("leave - failed\n");
  3898. return ret;
  3899. }
  3900. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  3901. {
  3902. struct iwl_priv *priv = hw->priv;
  3903. IWL_DEBUG_MAC80211("enter\n");
  3904. if (!priv->is_open) {
  3905. IWL_DEBUG_MAC80211("leave - skip\n");
  3906. return;
  3907. }
  3908. priv->is_open = 0;
  3909. if (iwl_is_ready_rf(priv)) {
  3910. /* stop mac, cancel any scan request and clear
  3911. * RXON_FILTER_ASSOC_MSK BIT
  3912. */
  3913. mutex_lock(&priv->mutex);
  3914. iwl_scan_cancel_timeout(priv, 100);
  3915. mutex_unlock(&priv->mutex);
  3916. }
  3917. iwl3945_down(priv);
  3918. flush_workqueue(priv->workqueue);
  3919. /* start polling the killswitch state again */
  3920. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3921. round_jiffies_relative(2 * HZ));
  3922. IWL_DEBUG_MAC80211("leave\n");
  3923. }
  3924. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  3925. {
  3926. struct iwl_priv *priv = hw->priv;
  3927. IWL_DEBUG_MAC80211("enter\n");
  3928. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  3929. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  3930. if (iwl3945_tx_skb(priv, skb))
  3931. dev_kfree_skb_any(skb);
  3932. IWL_DEBUG_MAC80211("leave\n");
  3933. return NETDEV_TX_OK;
  3934. }
  3935. static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
  3936. struct ieee80211_if_init_conf *conf)
  3937. {
  3938. struct iwl_priv *priv = hw->priv;
  3939. unsigned long flags;
  3940. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  3941. if (priv->vif) {
  3942. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  3943. return -EOPNOTSUPP;
  3944. }
  3945. spin_lock_irqsave(&priv->lock, flags);
  3946. priv->vif = conf->vif;
  3947. priv->iw_mode = conf->type;
  3948. spin_unlock_irqrestore(&priv->lock, flags);
  3949. mutex_lock(&priv->mutex);
  3950. if (conf->mac_addr) {
  3951. IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
  3952. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  3953. }
  3954. if (iwl_is_ready(priv))
  3955. iwl3945_set_mode(priv, conf->type);
  3956. mutex_unlock(&priv->mutex);
  3957. IWL_DEBUG_MAC80211("leave\n");
  3958. return 0;
  3959. }
  3960. /**
  3961. * iwl3945_mac_config - mac80211 config callback
  3962. *
  3963. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  3964. * be set inappropriately and the driver currently sets the hardware up to
  3965. * use it whenever needed.
  3966. */
  3967. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
  3968. {
  3969. struct iwl_priv *priv = hw->priv;
  3970. const struct iwl_channel_info *ch_info;
  3971. struct ieee80211_conf *conf = &hw->conf;
  3972. unsigned long flags;
  3973. int ret = 0;
  3974. mutex_lock(&priv->mutex);
  3975. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  3976. if (!iwl_is_ready(priv)) {
  3977. IWL_DEBUG_MAC80211("leave - not ready\n");
  3978. ret = -EIO;
  3979. goto out;
  3980. }
  3981. if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
  3982. test_bit(STATUS_SCANNING, &priv->status))) {
  3983. IWL_DEBUG_MAC80211("leave - scanning\n");
  3984. set_bit(STATUS_CONF_PENDING, &priv->status);
  3985. mutex_unlock(&priv->mutex);
  3986. return 0;
  3987. }
  3988. spin_lock_irqsave(&priv->lock, flags);
  3989. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  3990. conf->channel->hw_value);
  3991. if (!is_channel_valid(ch_info)) {
  3992. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
  3993. conf->channel->hw_value, conf->channel->band);
  3994. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  3995. spin_unlock_irqrestore(&priv->lock, flags);
  3996. ret = -EINVAL;
  3997. goto out;
  3998. }
  3999. iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
  4000. iwl3945_set_flags_for_phymode(priv, conf->channel->band);
  4001. /* The list of supported rates and rate mask can be different
  4002. * for each phymode; since the phymode may have changed, reset
  4003. * the rate mask to what mac80211 lists */
  4004. iwl3945_set_rate(priv);
  4005. spin_unlock_irqrestore(&priv->lock, flags);
  4006. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  4007. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  4008. iwl3945_hw_channel_switch(priv, conf->channel);
  4009. goto out;
  4010. }
  4011. #endif
  4012. iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
  4013. if (!conf->radio_enabled) {
  4014. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  4015. goto out;
  4016. }
  4017. if (iwl_is_rfkill(priv)) {
  4018. IWL_DEBUG_MAC80211("leave - RF kill\n");
  4019. ret = -EIO;
  4020. goto out;
  4021. }
  4022. iwl3945_set_rate(priv);
  4023. if (memcmp(&priv->active39_rxon,
  4024. &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
  4025. iwl3945_commit_rxon(priv);
  4026. else
  4027. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  4028. IWL_DEBUG_MAC80211("leave\n");
  4029. out:
  4030. clear_bit(STATUS_CONF_PENDING, &priv->status);
  4031. mutex_unlock(&priv->mutex);
  4032. return ret;
  4033. }
  4034. static void iwl3945_config_ap(struct iwl_priv *priv)
  4035. {
  4036. int rc = 0;
  4037. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4038. return;
  4039. /* The following should be done only at AP bring up */
  4040. if (!(iwl3945_is_associated(priv))) {
  4041. /* RXON - unassoc (to set timing command) */
  4042. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4043. iwl3945_commit_rxon(priv);
  4044. /* RXON Timing */
  4045. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4046. iwl3945_setup_rxon_timing(priv);
  4047. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4048. sizeof(priv->rxon_timing),
  4049. &priv->rxon_timing);
  4050. if (rc)
  4051. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4052. "Attempting to continue.\n");
  4053. /* FIXME: what should be the assoc_id for AP? */
  4054. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4055. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4056. priv->staging39_rxon.flags |=
  4057. RXON_FLG_SHORT_PREAMBLE_MSK;
  4058. else
  4059. priv->staging39_rxon.flags &=
  4060. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4061. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4062. if (priv->assoc_capability &
  4063. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4064. priv->staging39_rxon.flags |=
  4065. RXON_FLG_SHORT_SLOT_MSK;
  4066. else
  4067. priv->staging39_rxon.flags &=
  4068. ~RXON_FLG_SHORT_SLOT_MSK;
  4069. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4070. priv->staging39_rxon.flags &=
  4071. ~RXON_FLG_SHORT_SLOT_MSK;
  4072. }
  4073. /* restore RXON assoc */
  4074. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4075. iwl3945_commit_rxon(priv);
  4076. iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
  4077. }
  4078. iwl3945_send_beacon_cmd(priv);
  4079. /* FIXME - we need to add code here to detect a totally new
  4080. * configuration, reset the AP, unassoc, rxon timing, assoc,
  4081. * clear sta table, add BCAST sta... */
  4082. }
  4083. static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
  4084. struct ieee80211_vif *vif,
  4085. struct ieee80211_if_conf *conf)
  4086. {
  4087. struct iwl_priv *priv = hw->priv;
  4088. int rc;
  4089. if (conf == NULL)
  4090. return -EIO;
  4091. if (priv->vif != vif) {
  4092. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  4093. return 0;
  4094. }
  4095. /* handle this temporarily here */
  4096. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  4097. conf->changed & IEEE80211_IFCC_BEACON) {
  4098. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  4099. if (!beacon)
  4100. return -ENOMEM;
  4101. mutex_lock(&priv->mutex);
  4102. rc = iwl3945_mac_beacon_update(hw, beacon);
  4103. mutex_unlock(&priv->mutex);
  4104. if (rc)
  4105. return rc;
  4106. }
  4107. if (!iwl_is_alive(priv))
  4108. return -EAGAIN;
  4109. mutex_lock(&priv->mutex);
  4110. if (conf->bssid)
  4111. IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
  4112. /*
  4113. * very dubious code was here; the probe filtering flag is never set:
  4114. *
  4115. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  4116. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  4117. */
  4118. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4119. if (!conf->bssid) {
  4120. conf->bssid = priv->mac_addr;
  4121. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  4122. IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
  4123. conf->bssid);
  4124. }
  4125. if (priv->ibss_beacon)
  4126. dev_kfree_skb(priv->ibss_beacon);
  4127. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  4128. }
  4129. if (iwl_is_rfkill(priv))
  4130. goto done;
  4131. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  4132. !is_multicast_ether_addr(conf->bssid)) {
  4133. /* If there is currently a HW scan going on in the background
  4134. * then we need to cancel it else the RXON below will fail. */
  4135. if (iwl_scan_cancel_timeout(priv, 100)) {
  4136. IWL_WARN(priv, "Aborted scan still in progress "
  4137. "after 100ms\n");
  4138. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  4139. mutex_unlock(&priv->mutex);
  4140. return -EAGAIN;
  4141. }
  4142. memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  4143. /* TODO: Audit driver for usage of these members and see
  4144. * if mac80211 deprecates them (priv->bssid looks like it
  4145. * shouldn't be there, but I haven't scanned the IBSS code
  4146. * to verify) - jpk */
  4147. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  4148. if (priv->iw_mode == NL80211_IFTYPE_AP)
  4149. iwl3945_config_ap(priv);
  4150. else {
  4151. rc = iwl3945_commit_rxon(priv);
  4152. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  4153. iwl3945_add_station(priv,
  4154. priv->active39_rxon.bssid_addr, 1, 0);
  4155. }
  4156. } else {
  4157. iwl_scan_cancel_timeout(priv, 100);
  4158. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4159. iwl3945_commit_rxon(priv);
  4160. }
  4161. done:
  4162. IWL_DEBUG_MAC80211("leave\n");
  4163. mutex_unlock(&priv->mutex);
  4164. return 0;
  4165. }
  4166. static void iwl3945_configure_filter(struct ieee80211_hw *hw,
  4167. unsigned int changed_flags,
  4168. unsigned int *total_flags,
  4169. int mc_count, struct dev_addr_list *mc_list)
  4170. {
  4171. struct iwl_priv *priv = hw->priv;
  4172. __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
  4173. IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
  4174. changed_flags, *total_flags);
  4175. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  4176. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  4177. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  4178. else
  4179. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  4180. }
  4181. if (changed_flags & FIF_ALLMULTI) {
  4182. if (*total_flags & FIF_ALLMULTI)
  4183. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  4184. else
  4185. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  4186. }
  4187. if (changed_flags & FIF_CONTROL) {
  4188. if (*total_flags & FIF_CONTROL)
  4189. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  4190. else
  4191. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  4192. }
  4193. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  4194. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  4195. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  4196. else
  4197. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  4198. }
  4199. /* We avoid iwl_commit_rxon here to commit the new filter flags
  4200. * since mac80211 will call ieee80211_hw_config immediately.
  4201. * (mc_list is not supported at this time). Otherwise, we need to
  4202. * queue a background iwl_commit_rxon work.
  4203. */
  4204. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  4205. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  4206. }
  4207. static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
  4208. struct ieee80211_if_init_conf *conf)
  4209. {
  4210. struct iwl_priv *priv = hw->priv;
  4211. IWL_DEBUG_MAC80211("enter\n");
  4212. mutex_lock(&priv->mutex);
  4213. if (iwl_is_ready_rf(priv)) {
  4214. iwl_scan_cancel_timeout(priv, 100);
  4215. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4216. iwl3945_commit_rxon(priv);
  4217. }
  4218. if (priv->vif == conf->vif) {
  4219. priv->vif = NULL;
  4220. memset(priv->bssid, 0, ETH_ALEN);
  4221. }
  4222. mutex_unlock(&priv->mutex);
  4223. IWL_DEBUG_MAC80211("leave\n");
  4224. }
  4225. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  4226. static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
  4227. struct ieee80211_vif *vif,
  4228. struct ieee80211_bss_conf *bss_conf,
  4229. u32 changes)
  4230. {
  4231. struct iwl_priv *priv = hw->priv;
  4232. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  4233. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4234. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  4235. bss_conf->use_short_preamble);
  4236. if (bss_conf->use_short_preamble)
  4237. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4238. else
  4239. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4240. }
  4241. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4242. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  4243. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  4244. priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4245. else
  4246. priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4247. }
  4248. if (changes & BSS_CHANGED_ASSOC) {
  4249. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4250. /* This should never happen as this function should
  4251. * never be called from interrupt context. */
  4252. if (WARN_ON_ONCE(in_interrupt()))
  4253. return;
  4254. if (bss_conf->assoc) {
  4255. priv->assoc_id = bss_conf->aid;
  4256. priv->beacon_int = bss_conf->beacon_int;
  4257. priv->timestamp = bss_conf->timestamp;
  4258. priv->assoc_capability = bss_conf->assoc_capability;
  4259. priv->power_data.dtim_period = bss_conf->dtim_period;
  4260. priv->next_scan_jiffies = jiffies +
  4261. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  4262. mutex_lock(&priv->mutex);
  4263. iwl3945_post_associate(priv);
  4264. mutex_unlock(&priv->mutex);
  4265. } else {
  4266. priv->assoc_id = 0;
  4267. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  4268. }
  4269. } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
  4270. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  4271. iwl3945_send_rxon_assoc(priv);
  4272. }
  4273. }
  4274. static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  4275. {
  4276. int rc = 0;
  4277. unsigned long flags;
  4278. struct iwl_priv *priv = hw->priv;
  4279. DECLARE_SSID_BUF(ssid_buf);
  4280. IWL_DEBUG_MAC80211("enter\n");
  4281. mutex_lock(&priv->mutex);
  4282. spin_lock_irqsave(&priv->lock, flags);
  4283. if (!iwl_is_ready_rf(priv)) {
  4284. rc = -EIO;
  4285. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  4286. goto out_unlock;
  4287. }
  4288. /* we don't schedule scan within next_scan_jiffies period */
  4289. if (priv->next_scan_jiffies &&
  4290. time_after(priv->next_scan_jiffies, jiffies)) {
  4291. rc = -EAGAIN;
  4292. goto out_unlock;
  4293. }
  4294. /* if we just finished scan ask for delay for a broadcast scan */
  4295. if ((len == 0) && priv->last_scan_jiffies &&
  4296. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  4297. jiffies)) {
  4298. rc = -EAGAIN;
  4299. goto out_unlock;
  4300. }
  4301. if (len) {
  4302. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  4303. print_ssid(ssid_buf, ssid, len), (int)len);
  4304. priv->one_direct_scan = 1;
  4305. priv->direct_ssid_len = (u8)
  4306. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  4307. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  4308. } else
  4309. priv->one_direct_scan = 0;
  4310. rc = iwl3945_scan_initiate(priv);
  4311. IWL_DEBUG_MAC80211("leave\n");
  4312. out_unlock:
  4313. spin_unlock_irqrestore(&priv->lock, flags);
  4314. mutex_unlock(&priv->mutex);
  4315. return rc;
  4316. }
  4317. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  4318. struct ieee80211_vif *vif,
  4319. struct ieee80211_sta *sta,
  4320. struct ieee80211_key_conf *key)
  4321. {
  4322. struct iwl_priv *priv = hw->priv;
  4323. const u8 *addr;
  4324. int ret;
  4325. u8 sta_id;
  4326. IWL_DEBUG_MAC80211("enter\n");
  4327. if (iwl3945_mod_params.sw_crypto) {
  4328. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  4329. return -EOPNOTSUPP;
  4330. }
  4331. addr = sta ? sta->addr : iwl_bcast_addr;
  4332. sta_id = iwl3945_hw_find_station(priv, addr);
  4333. if (sta_id == IWL_INVALID_STATION) {
  4334. IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
  4335. addr);
  4336. return -EINVAL;
  4337. }
  4338. mutex_lock(&priv->mutex);
  4339. iwl_scan_cancel_timeout(priv, 100);
  4340. switch (cmd) {
  4341. case SET_KEY:
  4342. ret = iwl3945_update_sta_key_info(priv, key, sta_id);
  4343. if (!ret) {
  4344. iwl3945_set_rxon_hwcrypto(priv, 1);
  4345. iwl3945_commit_rxon(priv);
  4346. key->hw_key_idx = sta_id;
  4347. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  4348. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  4349. }
  4350. break;
  4351. case DISABLE_KEY:
  4352. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  4353. if (!ret) {
  4354. iwl3945_set_rxon_hwcrypto(priv, 0);
  4355. iwl3945_commit_rxon(priv);
  4356. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  4357. }
  4358. break;
  4359. default:
  4360. ret = -EINVAL;
  4361. }
  4362. IWL_DEBUG_MAC80211("leave\n");
  4363. mutex_unlock(&priv->mutex);
  4364. return ret;
  4365. }
  4366. static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  4367. const struct ieee80211_tx_queue_params *params)
  4368. {
  4369. struct iwl_priv *priv = hw->priv;
  4370. unsigned long flags;
  4371. int q;
  4372. IWL_DEBUG_MAC80211("enter\n");
  4373. if (!iwl_is_ready_rf(priv)) {
  4374. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  4375. return -EIO;
  4376. }
  4377. if (queue >= AC_NUM) {
  4378. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  4379. return 0;
  4380. }
  4381. q = AC_NUM - 1 - queue;
  4382. spin_lock_irqsave(&priv->lock, flags);
  4383. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  4384. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  4385. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  4386. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  4387. cpu_to_le16((params->txop * 32));
  4388. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  4389. priv->qos_data.qos_active = 1;
  4390. spin_unlock_irqrestore(&priv->lock, flags);
  4391. mutex_lock(&priv->mutex);
  4392. if (priv->iw_mode == NL80211_IFTYPE_AP)
  4393. iwl3945_activate_qos(priv, 1);
  4394. else if (priv->assoc_id && iwl3945_is_associated(priv))
  4395. iwl3945_activate_qos(priv, 0);
  4396. mutex_unlock(&priv->mutex);
  4397. IWL_DEBUG_MAC80211("leave\n");
  4398. return 0;
  4399. }
  4400. static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
  4401. struct ieee80211_tx_queue_stats *stats)
  4402. {
  4403. struct iwl_priv *priv = hw->priv;
  4404. int i, avail;
  4405. struct iwl_tx_queue *txq;
  4406. struct iwl_queue *q;
  4407. unsigned long flags;
  4408. IWL_DEBUG_MAC80211("enter\n");
  4409. if (!iwl_is_ready_rf(priv)) {
  4410. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  4411. return -EIO;
  4412. }
  4413. spin_lock_irqsave(&priv->lock, flags);
  4414. for (i = 0; i < AC_NUM; i++) {
  4415. txq = &priv->txq[i];
  4416. q = &txq->q;
  4417. avail = iwl_queue_space(q);
  4418. stats[i].len = q->n_window - avail;
  4419. stats[i].limit = q->n_window - q->high_mark;
  4420. stats[i].count = q->n_window;
  4421. }
  4422. spin_unlock_irqrestore(&priv->lock, flags);
  4423. IWL_DEBUG_MAC80211("leave\n");
  4424. return 0;
  4425. }
  4426. static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
  4427. {
  4428. struct iwl_priv *priv = hw->priv;
  4429. unsigned long flags;
  4430. mutex_lock(&priv->mutex);
  4431. IWL_DEBUG_MAC80211("enter\n");
  4432. iwl_reset_qos(priv);
  4433. spin_lock_irqsave(&priv->lock, flags);
  4434. priv->assoc_id = 0;
  4435. priv->assoc_capability = 0;
  4436. /* new association get rid of ibss beacon skb */
  4437. if (priv->ibss_beacon)
  4438. dev_kfree_skb(priv->ibss_beacon);
  4439. priv->ibss_beacon = NULL;
  4440. priv->beacon_int = priv->hw->conf.beacon_int;
  4441. priv->timestamp = 0;
  4442. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  4443. priv->beacon_int = 0;
  4444. spin_unlock_irqrestore(&priv->lock, flags);
  4445. if (!iwl_is_ready_rf(priv)) {
  4446. IWL_DEBUG_MAC80211("leave - not ready\n");
  4447. mutex_unlock(&priv->mutex);
  4448. return;
  4449. }
  4450. /* we are restarting association process
  4451. * clear RXON_FILTER_ASSOC_MSK bit
  4452. */
  4453. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  4454. iwl_scan_cancel_timeout(priv, 100);
  4455. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4456. iwl3945_commit_rxon(priv);
  4457. }
  4458. /* Per mac80211.h: This is only used in IBSS mode... */
  4459. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  4460. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  4461. mutex_unlock(&priv->mutex);
  4462. return;
  4463. }
  4464. iwl3945_set_rate(priv);
  4465. mutex_unlock(&priv->mutex);
  4466. IWL_DEBUG_MAC80211("leave\n");
  4467. }
  4468. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  4469. {
  4470. struct iwl_priv *priv = hw->priv;
  4471. unsigned long flags;
  4472. IWL_DEBUG_MAC80211("enter\n");
  4473. if (!iwl_is_ready_rf(priv)) {
  4474. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  4475. return -EIO;
  4476. }
  4477. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  4478. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  4479. return -EIO;
  4480. }
  4481. spin_lock_irqsave(&priv->lock, flags);
  4482. if (priv->ibss_beacon)
  4483. dev_kfree_skb(priv->ibss_beacon);
  4484. priv->ibss_beacon = skb;
  4485. priv->assoc_id = 0;
  4486. IWL_DEBUG_MAC80211("leave\n");
  4487. spin_unlock_irqrestore(&priv->lock, flags);
  4488. iwl_reset_qos(priv);
  4489. iwl3945_post_associate(priv);
  4490. return 0;
  4491. }
  4492. /*****************************************************************************
  4493. *
  4494. * sysfs attributes
  4495. *
  4496. *****************************************************************************/
  4497. #ifdef CONFIG_IWLWIFI_DEBUG
  4498. /*
  4499. * The following adds a new attribute to the sysfs representation
  4500. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  4501. * used for controlling the debug level.
  4502. *
  4503. * See the level definitions in iwl for details.
  4504. */
  4505. static ssize_t show_debug_level(struct device *d,
  4506. struct device_attribute *attr, char *buf)
  4507. {
  4508. struct iwl_priv *priv = d->driver_data;
  4509. return sprintf(buf, "0x%08X\n", priv->debug_level);
  4510. }
  4511. static ssize_t store_debug_level(struct device *d,
  4512. struct device_attribute *attr,
  4513. const char *buf, size_t count)
  4514. {
  4515. struct iwl_priv *priv = d->driver_data;
  4516. unsigned long val;
  4517. int ret;
  4518. ret = strict_strtoul(buf, 0, &val);
  4519. if (ret)
  4520. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  4521. else
  4522. priv->debug_level = val;
  4523. return strnlen(buf, count);
  4524. }
  4525. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  4526. show_debug_level, store_debug_level);
  4527. #endif /* CONFIG_IWLWIFI_DEBUG */
  4528. static ssize_t show_temperature(struct device *d,
  4529. struct device_attribute *attr, char *buf)
  4530. {
  4531. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4532. if (!iwl_is_alive(priv))
  4533. return -EAGAIN;
  4534. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  4535. }
  4536. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  4537. static ssize_t show_tx_power(struct device *d,
  4538. struct device_attribute *attr, char *buf)
  4539. {
  4540. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4541. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  4542. }
  4543. static ssize_t store_tx_power(struct device *d,
  4544. struct device_attribute *attr,
  4545. const char *buf, size_t count)
  4546. {
  4547. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4548. char *p = (char *)buf;
  4549. u32 val;
  4550. val = simple_strtoul(p, &p, 10);
  4551. if (p == buf)
  4552. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  4553. else
  4554. iwl3945_hw_reg_set_txpower(priv, val);
  4555. return count;
  4556. }
  4557. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  4558. static ssize_t show_flags(struct device *d,
  4559. struct device_attribute *attr, char *buf)
  4560. {
  4561. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4562. return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
  4563. }
  4564. static ssize_t store_flags(struct device *d,
  4565. struct device_attribute *attr,
  4566. const char *buf, size_t count)
  4567. {
  4568. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4569. u32 flags = simple_strtoul(buf, NULL, 0);
  4570. mutex_lock(&priv->mutex);
  4571. if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
  4572. /* Cancel any currently running scans... */
  4573. if (iwl_scan_cancel_timeout(priv, 100))
  4574. IWL_WARN(priv, "Could not cancel scan.\n");
  4575. else {
  4576. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  4577. flags);
  4578. priv->staging39_rxon.flags = cpu_to_le32(flags);
  4579. iwl3945_commit_rxon(priv);
  4580. }
  4581. }
  4582. mutex_unlock(&priv->mutex);
  4583. return count;
  4584. }
  4585. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  4586. static ssize_t show_filter_flags(struct device *d,
  4587. struct device_attribute *attr, char *buf)
  4588. {
  4589. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4590. return sprintf(buf, "0x%04X\n",
  4591. le32_to_cpu(priv->active39_rxon.filter_flags));
  4592. }
  4593. static ssize_t store_filter_flags(struct device *d,
  4594. struct device_attribute *attr,
  4595. const char *buf, size_t count)
  4596. {
  4597. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4598. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  4599. mutex_lock(&priv->mutex);
  4600. if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
  4601. /* Cancel any currently running scans... */
  4602. if (iwl_scan_cancel_timeout(priv, 100))
  4603. IWL_WARN(priv, "Could not cancel scan.\n");
  4604. else {
  4605. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  4606. "0x%04X\n", filter_flags);
  4607. priv->staging39_rxon.filter_flags =
  4608. cpu_to_le32(filter_flags);
  4609. iwl3945_commit_rxon(priv);
  4610. }
  4611. }
  4612. mutex_unlock(&priv->mutex);
  4613. return count;
  4614. }
  4615. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  4616. store_filter_flags);
  4617. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  4618. static ssize_t show_measurement(struct device *d,
  4619. struct device_attribute *attr, char *buf)
  4620. {
  4621. struct iwl_priv *priv = dev_get_drvdata(d);
  4622. struct iwl_spectrum_notification measure_report;
  4623. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  4624. u8 *data = (u8 *)&measure_report;
  4625. unsigned long flags;
  4626. spin_lock_irqsave(&priv->lock, flags);
  4627. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  4628. spin_unlock_irqrestore(&priv->lock, flags);
  4629. return 0;
  4630. }
  4631. memcpy(&measure_report, &priv->measure_report, size);
  4632. priv->measurement_status = 0;
  4633. spin_unlock_irqrestore(&priv->lock, flags);
  4634. while (size && (PAGE_SIZE - len)) {
  4635. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  4636. PAGE_SIZE - len, 1);
  4637. len = strlen(buf);
  4638. if (PAGE_SIZE - len)
  4639. buf[len++] = '\n';
  4640. ofs += 16;
  4641. size -= min(size, 16U);
  4642. }
  4643. return len;
  4644. }
  4645. static ssize_t store_measurement(struct device *d,
  4646. struct device_attribute *attr,
  4647. const char *buf, size_t count)
  4648. {
  4649. struct iwl_priv *priv = dev_get_drvdata(d);
  4650. struct ieee80211_measurement_params params = {
  4651. .channel = le16_to_cpu(priv->active39_rxon.channel),
  4652. .start_time = cpu_to_le64(priv->last_tsf),
  4653. .duration = cpu_to_le16(1),
  4654. };
  4655. u8 type = IWL_MEASURE_BASIC;
  4656. u8 buffer[32];
  4657. u8 channel;
  4658. if (count) {
  4659. char *p = buffer;
  4660. strncpy(buffer, buf, min(sizeof(buffer), count));
  4661. channel = simple_strtoul(p, NULL, 0);
  4662. if (channel)
  4663. params.channel = channel;
  4664. p = buffer;
  4665. while (*p && *p != ' ')
  4666. p++;
  4667. if (*p)
  4668. type = simple_strtoul(p + 1, NULL, 0);
  4669. }
  4670. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  4671. "channel %d (for '%s')\n", type, params.channel, buf);
  4672. iwl3945_get_measurement(priv, &params, type);
  4673. return count;
  4674. }
  4675. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  4676. show_measurement, store_measurement);
  4677. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  4678. static ssize_t store_retry_rate(struct device *d,
  4679. struct device_attribute *attr,
  4680. const char *buf, size_t count)
  4681. {
  4682. struct iwl_priv *priv = dev_get_drvdata(d);
  4683. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  4684. if (priv->retry_rate <= 0)
  4685. priv->retry_rate = 1;
  4686. return count;
  4687. }
  4688. static ssize_t show_retry_rate(struct device *d,
  4689. struct device_attribute *attr, char *buf)
  4690. {
  4691. struct iwl_priv *priv = dev_get_drvdata(d);
  4692. return sprintf(buf, "%d", priv->retry_rate);
  4693. }
  4694. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  4695. store_retry_rate);
  4696. static ssize_t store_power_level(struct device *d,
  4697. struct device_attribute *attr,
  4698. const char *buf, size_t count)
  4699. {
  4700. struct iwl_priv *priv = dev_get_drvdata(d);
  4701. int rc;
  4702. int mode;
  4703. mode = simple_strtoul(buf, NULL, 0);
  4704. mutex_lock(&priv->mutex);
  4705. if (!iwl_is_ready(priv)) {
  4706. rc = -EAGAIN;
  4707. goto out;
  4708. }
  4709. if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
  4710. (mode == IWL39_POWER_AC))
  4711. mode = IWL39_POWER_AC;
  4712. else
  4713. mode |= IWL_POWER_ENABLED;
  4714. if (mode != priv->power_mode) {
  4715. rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  4716. if (rc) {
  4717. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  4718. goto out;
  4719. }
  4720. priv->power_mode = mode;
  4721. }
  4722. rc = count;
  4723. out:
  4724. mutex_unlock(&priv->mutex);
  4725. return rc;
  4726. }
  4727. #define MAX_WX_STRING 80
  4728. /* Values are in microsecond */
  4729. static const s32 timeout_duration[] = {
  4730. 350000,
  4731. 250000,
  4732. 75000,
  4733. 37000,
  4734. 25000,
  4735. };
  4736. static const s32 period_duration[] = {
  4737. 400000,
  4738. 700000,
  4739. 1000000,
  4740. 1000000,
  4741. 1000000
  4742. };
  4743. static ssize_t show_power_level(struct device *d,
  4744. struct device_attribute *attr, char *buf)
  4745. {
  4746. struct iwl_priv *priv = dev_get_drvdata(d);
  4747. int level = IWL_POWER_LEVEL(priv->power_mode);
  4748. char *p = buf;
  4749. p += sprintf(p, "%d ", level);
  4750. switch (level) {
  4751. case IWL_POWER_MODE_CAM:
  4752. case IWL39_POWER_AC:
  4753. p += sprintf(p, "(AC)");
  4754. break;
  4755. case IWL39_POWER_BATTERY:
  4756. p += sprintf(p, "(BATTERY)");
  4757. break;
  4758. default:
  4759. p += sprintf(p,
  4760. "(Timeout %dms, Period %dms)",
  4761. timeout_duration[level - 1] / 1000,
  4762. period_duration[level - 1] / 1000);
  4763. }
  4764. if (!(priv->power_mode & IWL_POWER_ENABLED))
  4765. p += sprintf(p, " OFF\n");
  4766. else
  4767. p += sprintf(p, " \n");
  4768. return p - buf + 1;
  4769. }
  4770. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  4771. store_power_level);
  4772. static ssize_t show_channels(struct device *d,
  4773. struct device_attribute *attr, char *buf)
  4774. {
  4775. /* all this shit doesn't belong into sysfs anyway */
  4776. return 0;
  4777. }
  4778. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  4779. static ssize_t show_statistics(struct device *d,
  4780. struct device_attribute *attr, char *buf)
  4781. {
  4782. struct iwl_priv *priv = dev_get_drvdata(d);
  4783. u32 size = sizeof(struct iwl3945_notif_statistics);
  4784. u32 len = 0, ofs = 0;
  4785. u8 *data = (u8 *)&priv->statistics_39;
  4786. int rc = 0;
  4787. if (!iwl_is_alive(priv))
  4788. return -EAGAIN;
  4789. mutex_lock(&priv->mutex);
  4790. rc = iwl3945_send_statistics_request(priv);
  4791. mutex_unlock(&priv->mutex);
  4792. if (rc) {
  4793. len = sprintf(buf,
  4794. "Error sending statistics request: 0x%08X\n", rc);
  4795. return len;
  4796. }
  4797. while (size && (PAGE_SIZE - len)) {
  4798. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  4799. PAGE_SIZE - len, 1);
  4800. len = strlen(buf);
  4801. if (PAGE_SIZE - len)
  4802. buf[len++] = '\n';
  4803. ofs += 16;
  4804. size -= min(size, 16U);
  4805. }
  4806. return len;
  4807. }
  4808. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  4809. static ssize_t show_antenna(struct device *d,
  4810. struct device_attribute *attr, char *buf)
  4811. {
  4812. struct iwl_priv *priv = dev_get_drvdata(d);
  4813. if (!iwl_is_alive(priv))
  4814. return -EAGAIN;
  4815. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  4816. }
  4817. static ssize_t store_antenna(struct device *d,
  4818. struct device_attribute *attr,
  4819. const char *buf, size_t count)
  4820. {
  4821. int ant;
  4822. struct iwl_priv *priv = dev_get_drvdata(d);
  4823. if (count == 0)
  4824. return 0;
  4825. if (sscanf(buf, "%1i", &ant) != 1) {
  4826. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  4827. return count;
  4828. }
  4829. if ((ant >= 0) && (ant <= 2)) {
  4830. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  4831. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  4832. } else
  4833. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  4834. return count;
  4835. }
  4836. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  4837. static ssize_t show_status(struct device *d,
  4838. struct device_attribute *attr, char *buf)
  4839. {
  4840. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  4841. if (!iwl_is_alive(priv))
  4842. return -EAGAIN;
  4843. return sprintf(buf, "0x%08x\n", (int)priv->status);
  4844. }
  4845. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  4846. static ssize_t dump_error_log(struct device *d,
  4847. struct device_attribute *attr,
  4848. const char *buf, size_t count)
  4849. {
  4850. char *p = (char *)buf;
  4851. if (p[0] == '1')
  4852. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  4853. return strnlen(buf, count);
  4854. }
  4855. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  4856. static ssize_t dump_event_log(struct device *d,
  4857. struct device_attribute *attr,
  4858. const char *buf, size_t count)
  4859. {
  4860. char *p = (char *)buf;
  4861. if (p[0] == '1')
  4862. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  4863. return strnlen(buf, count);
  4864. }
  4865. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  4866. /*****************************************************************************
  4867. *
  4868. * driver setup and tear down
  4869. *
  4870. *****************************************************************************/
  4871. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  4872. {
  4873. priv->workqueue = create_workqueue(DRV_NAME);
  4874. init_waitqueue_head(&priv->wait_command_queue);
  4875. INIT_WORK(&priv->up, iwl3945_bg_up);
  4876. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  4877. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  4878. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  4879. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  4880. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  4881. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  4882. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  4883. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  4884. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  4885. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  4886. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  4887. iwl3945_hw_setup_deferred_work(priv);
  4888. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  4889. iwl3945_irq_tasklet, (unsigned long)priv);
  4890. }
  4891. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  4892. {
  4893. iwl3945_hw_cancel_deferred_work(priv);
  4894. cancel_delayed_work_sync(&priv->init_alive_start);
  4895. cancel_delayed_work(&priv->scan_check);
  4896. cancel_delayed_work(&priv->alive_start);
  4897. cancel_work_sync(&priv->beacon_update);
  4898. }
  4899. static struct attribute *iwl3945_sysfs_entries[] = {
  4900. &dev_attr_antenna.attr,
  4901. &dev_attr_channels.attr,
  4902. &dev_attr_dump_errors.attr,
  4903. &dev_attr_dump_events.attr,
  4904. &dev_attr_flags.attr,
  4905. &dev_attr_filter_flags.attr,
  4906. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  4907. &dev_attr_measurement.attr,
  4908. #endif
  4909. &dev_attr_power_level.attr,
  4910. &dev_attr_retry_rate.attr,
  4911. &dev_attr_statistics.attr,
  4912. &dev_attr_status.attr,
  4913. &dev_attr_temperature.attr,
  4914. &dev_attr_tx_power.attr,
  4915. #ifdef CONFIG_IWLWIFI_DEBUG
  4916. &dev_attr_debug_level.attr,
  4917. #endif
  4918. NULL
  4919. };
  4920. static struct attribute_group iwl3945_attribute_group = {
  4921. .name = NULL, /* put in device directory */
  4922. .attrs = iwl3945_sysfs_entries,
  4923. };
  4924. static struct ieee80211_ops iwl3945_hw_ops = {
  4925. .tx = iwl3945_mac_tx,
  4926. .start = iwl3945_mac_start,
  4927. .stop = iwl3945_mac_stop,
  4928. .add_interface = iwl3945_mac_add_interface,
  4929. .remove_interface = iwl3945_mac_remove_interface,
  4930. .config = iwl3945_mac_config,
  4931. .config_interface = iwl3945_mac_config_interface,
  4932. .configure_filter = iwl3945_configure_filter,
  4933. .set_key = iwl3945_mac_set_key,
  4934. .get_tx_stats = iwl3945_mac_get_tx_stats,
  4935. .conf_tx = iwl3945_mac_conf_tx,
  4936. .reset_tsf = iwl3945_mac_reset_tsf,
  4937. .bss_info_changed = iwl3945_bss_info_changed,
  4938. .hw_scan = iwl3945_mac_hw_scan
  4939. };
  4940. static int iwl3945_init_drv(struct iwl_priv *priv)
  4941. {
  4942. int ret;
  4943. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  4944. priv->retry_rate = 1;
  4945. priv->ibss_beacon = NULL;
  4946. spin_lock_init(&priv->lock);
  4947. spin_lock_init(&priv->power_data.lock);
  4948. spin_lock_init(&priv->sta_lock);
  4949. spin_lock_init(&priv->hcmd_lock);
  4950. INIT_LIST_HEAD(&priv->free_frames);
  4951. mutex_init(&priv->mutex);
  4952. /* Clear the driver's (not device's) station table */
  4953. iwl3945_clear_stations_table(priv);
  4954. priv->data_retry_limit = -1;
  4955. priv->ieee_channels = NULL;
  4956. priv->ieee_rates = NULL;
  4957. priv->band = IEEE80211_BAND_2GHZ;
  4958. priv->iw_mode = NL80211_IFTYPE_STATION;
  4959. iwl_reset_qos(priv);
  4960. priv->qos_data.qos_active = 0;
  4961. priv->qos_data.qos_cap.val = 0;
  4962. priv->rates_mask = IWL_RATES_MASK;
  4963. /* If power management is turned on, default to AC mode */
  4964. priv->power_mode = IWL39_POWER_AC;
  4965. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  4966. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  4967. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  4968. eeprom->version);
  4969. ret = -EINVAL;
  4970. goto err;
  4971. }
  4972. ret = iwl_init_channel_map(priv);
  4973. if (ret) {
  4974. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  4975. goto err;
  4976. }
  4977. /* Set up txpower settings in driver for all channels */
  4978. if (iwl3945_txpower_set_from_eeprom(priv)) {
  4979. ret = -EIO;
  4980. goto err_free_channel_map;
  4981. }
  4982. ret = iwlcore_init_geos(priv);
  4983. if (ret) {
  4984. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  4985. goto err_free_channel_map;
  4986. }
  4987. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  4988. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4989. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4990. &priv->bands[IEEE80211_BAND_2GHZ];
  4991. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4992. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4993. &priv->bands[IEEE80211_BAND_5GHZ];
  4994. return 0;
  4995. err_free_channel_map:
  4996. iwl_free_channel_map(priv);
  4997. err:
  4998. return ret;
  4999. }
  5000. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  5001. {
  5002. int err = 0;
  5003. struct iwl_priv *priv;
  5004. struct ieee80211_hw *hw;
  5005. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  5006. struct iwl3945_eeprom *eeprom;
  5007. unsigned long flags;
  5008. /***********************
  5009. * 1. Allocating HW data
  5010. * ********************/
  5011. /* mac80211 allocates memory for this device instance, including
  5012. * space for this driver's private structure */
  5013. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  5014. if (hw == NULL) {
  5015. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  5016. err = -ENOMEM;
  5017. goto out;
  5018. }
  5019. priv = hw->priv;
  5020. SET_IEEE80211_DEV(hw, &pdev->dev);
  5021. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  5022. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  5023. IWL_ERR(priv,
  5024. "invalid queues_num, should be between %d and %d\n",
  5025. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  5026. err = -EINVAL;
  5027. goto out;
  5028. }
  5029. /*
  5030. * Disabling hardware scan means that mac80211 will perform scans
  5031. * "the hard way", rather than using device's scan.
  5032. */
  5033. if (iwl3945_mod_params.disable_hw_scan) {
  5034. IWL_DEBUG_INFO("Disabling hw_scan\n");
  5035. iwl3945_hw_ops.hw_scan = NULL;
  5036. }
  5037. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  5038. priv->cfg = cfg;
  5039. priv->pci_dev = pdev;
  5040. #ifdef CONFIG_IWLWIFI_DEBUG
  5041. priv->debug_level = iwl3945_mod_params.debug;
  5042. atomic_set(&priv->restrict_refcnt, 0);
  5043. #endif
  5044. hw->rate_control_algorithm = "iwl-3945-rs";
  5045. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  5046. /* Tell mac80211 our characteristics */
  5047. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  5048. IEEE80211_HW_NOISE_DBM;
  5049. hw->wiphy->interface_modes =
  5050. BIT(NL80211_IFTYPE_STATION) |
  5051. BIT(NL80211_IFTYPE_ADHOC);
  5052. hw->wiphy->custom_regulatory = true;
  5053. /* 4 EDCA QOS priorities */
  5054. hw->queues = 4;
  5055. /***************************
  5056. * 2. Initializing PCI bus
  5057. * *************************/
  5058. if (pci_enable_device(pdev)) {
  5059. err = -ENODEV;
  5060. goto out_ieee80211_free_hw;
  5061. }
  5062. pci_set_master(pdev);
  5063. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  5064. if (!err)
  5065. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  5066. if (err) {
  5067. IWL_WARN(priv, "No suitable DMA available.\n");
  5068. goto out_pci_disable_device;
  5069. }
  5070. pci_set_drvdata(pdev, priv);
  5071. err = pci_request_regions(pdev, DRV_NAME);
  5072. if (err)
  5073. goto out_pci_disable_device;
  5074. /***********************
  5075. * 3. Read REV Register
  5076. * ********************/
  5077. priv->hw_base = pci_iomap(pdev, 0, 0);
  5078. if (!priv->hw_base) {
  5079. err = -ENODEV;
  5080. goto out_pci_release_regions;
  5081. }
  5082. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  5083. (unsigned long long) pci_resource_len(pdev, 0));
  5084. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  5085. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  5086. * PCI Tx retries from interfering with C3 CPU state */
  5087. pci_write_config_byte(pdev, 0x41, 0x00);
  5088. /* amp init */
  5089. err = priv->cfg->ops->lib->apm_ops.init(priv);
  5090. if (err < 0) {
  5091. IWL_DEBUG_INFO("Failed to init APMG\n");
  5092. goto out_iounmap;
  5093. }
  5094. /***********************
  5095. * 4. Read EEPROM
  5096. * ********************/
  5097. /* Read the EEPROM */
  5098. err = iwl_eeprom_init(priv);
  5099. if (err) {
  5100. IWL_ERR(priv, "Unable to init EEPROM\n");
  5101. goto out_remove_sysfs;
  5102. }
  5103. /* MAC Address location in EEPROM same for 3945/4965 */
  5104. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  5105. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  5106. IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
  5107. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5108. /***********************
  5109. * 5. Setup HW Constants
  5110. * ********************/
  5111. /* Device-specific setup */
  5112. if (iwl3945_hw_set_hw_params(priv)) {
  5113. IWL_ERR(priv, "failed to set hw settings\n");
  5114. goto out_iounmap;
  5115. }
  5116. /***********************
  5117. * 6. Setup priv
  5118. * ********************/
  5119. err = iwl3945_init_drv(priv);
  5120. if (err) {
  5121. IWL_ERR(priv, "initializing driver failed\n");
  5122. goto out_free_geos;
  5123. }
  5124. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  5125. priv->cfg->name);
  5126. /***********************************
  5127. * 7. Initialize Module Parameters
  5128. * **********************************/
  5129. /* Initialize module parameter values here */
  5130. /* Disable radio (SW RF KILL) via parameter when loading driver */
  5131. if (iwl3945_mod_params.disable) {
  5132. set_bit(STATUS_RF_KILL_SW, &priv->status);
  5133. IWL_DEBUG_INFO("Radio disabled.\n");
  5134. }
  5135. /***********************
  5136. * 8. Setup Services
  5137. * ********************/
  5138. spin_lock_irqsave(&priv->lock, flags);
  5139. iwl3945_disable_interrupts(priv);
  5140. spin_unlock_irqrestore(&priv->lock, flags);
  5141. pci_enable_msi(priv->pci_dev);
  5142. err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
  5143. DRV_NAME, priv);
  5144. if (err) {
  5145. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  5146. goto out_disable_msi;
  5147. }
  5148. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5149. if (err) {
  5150. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  5151. goto out_release_irq;
  5152. }
  5153. iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  5154. iwl3945_setup_deferred_work(priv);
  5155. iwl3945_setup_rx_handlers(priv);
  5156. /*********************************
  5157. * 9. Setup and Register mac80211
  5158. * *******************************/
  5159. err = ieee80211_register_hw(priv->hw);
  5160. if (err) {
  5161. IWL_ERR(priv, "Failed to register network device: %d\n", err);
  5162. goto out_remove_sysfs;
  5163. }
  5164. priv->hw->conf.beacon_int = 100;
  5165. priv->mac80211_registered = 1;
  5166. err = iwl_rfkill_init(priv);
  5167. if (err)
  5168. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  5169. "Ignoring error: %d\n", err);
  5170. /* Start monitoring the killswitch */
  5171. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  5172. 2 * HZ);
  5173. return 0;
  5174. out_remove_sysfs:
  5175. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5176. out_free_geos:
  5177. iwlcore_free_geos(priv);
  5178. out_release_irq:
  5179. free_irq(priv->pci_dev->irq, priv);
  5180. destroy_workqueue(priv->workqueue);
  5181. priv->workqueue = NULL;
  5182. iwl3945_unset_hw_params(priv);
  5183. out_disable_msi:
  5184. pci_disable_msi(priv->pci_dev);
  5185. out_iounmap:
  5186. pci_iounmap(pdev, priv->hw_base);
  5187. out_pci_release_regions:
  5188. pci_release_regions(pdev);
  5189. out_pci_disable_device:
  5190. pci_disable_device(pdev);
  5191. pci_set_drvdata(pdev, NULL);
  5192. out_ieee80211_free_hw:
  5193. ieee80211_free_hw(priv->hw);
  5194. out:
  5195. return err;
  5196. }
  5197. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  5198. {
  5199. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5200. unsigned long flags;
  5201. if (!priv)
  5202. return;
  5203. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  5204. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5205. if (priv->mac80211_registered) {
  5206. ieee80211_unregister_hw(priv->hw);
  5207. priv->mac80211_registered = 0;
  5208. } else {
  5209. iwl3945_down(priv);
  5210. }
  5211. /* make sure we flush any pending irq or
  5212. * tasklet for the driver
  5213. */
  5214. spin_lock_irqsave(&priv->lock, flags);
  5215. iwl3945_disable_interrupts(priv);
  5216. spin_unlock_irqrestore(&priv->lock, flags);
  5217. iwl_synchronize_irq(priv);
  5218. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5219. iwl_rfkill_unregister(priv);
  5220. cancel_delayed_work(&priv->rfkill_poll);
  5221. iwl3945_dealloc_ucode_pci(priv);
  5222. if (priv->rxq.bd)
  5223. iwl_rx_queue_free(priv, &priv->rxq);
  5224. iwl3945_hw_txq_ctx_free(priv);
  5225. iwl3945_unset_hw_params(priv);
  5226. iwl3945_clear_stations_table(priv);
  5227. /*netif_stop_queue(dev); */
  5228. flush_workqueue(priv->workqueue);
  5229. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  5230. * priv->workqueue... so we can't take down the workqueue
  5231. * until now... */
  5232. destroy_workqueue(priv->workqueue);
  5233. priv->workqueue = NULL;
  5234. free_irq(pdev->irq, priv);
  5235. pci_disable_msi(pdev);
  5236. pci_iounmap(pdev, priv->hw_base);
  5237. pci_release_regions(pdev);
  5238. pci_disable_device(pdev);
  5239. pci_set_drvdata(pdev, NULL);
  5240. iwl_free_channel_map(priv);
  5241. iwlcore_free_geos(priv);
  5242. kfree(priv->scan);
  5243. if (priv->ibss_beacon)
  5244. dev_kfree_skb(priv->ibss_beacon);
  5245. ieee80211_free_hw(priv->hw);
  5246. }
  5247. #ifdef CONFIG_PM
  5248. static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  5249. {
  5250. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5251. if (priv->is_open) {
  5252. set_bit(STATUS_IN_SUSPEND, &priv->status);
  5253. iwl3945_mac_stop(priv->hw);
  5254. priv->is_open = 1;
  5255. }
  5256. pci_save_state(pdev);
  5257. pci_disable_device(pdev);
  5258. pci_set_power_state(pdev, PCI_D3hot);
  5259. return 0;
  5260. }
  5261. static int iwl3945_pci_resume(struct pci_dev *pdev)
  5262. {
  5263. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5264. pci_set_power_state(pdev, PCI_D0);
  5265. pci_enable_device(pdev);
  5266. pci_restore_state(pdev);
  5267. if (priv->is_open)
  5268. iwl3945_mac_start(priv->hw);
  5269. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  5270. return 0;
  5271. }
  5272. #endif /* CONFIG_PM */
  5273. /*****************************************************************************
  5274. *
  5275. * driver and module entry point
  5276. *
  5277. *****************************************************************************/
  5278. static struct pci_driver iwl3945_driver = {
  5279. .name = DRV_NAME,
  5280. .id_table = iwl3945_hw_card_ids,
  5281. .probe = iwl3945_pci_probe,
  5282. .remove = __devexit_p(iwl3945_pci_remove),
  5283. #ifdef CONFIG_PM
  5284. .suspend = iwl3945_pci_suspend,
  5285. .resume = iwl3945_pci_resume,
  5286. #endif
  5287. };
  5288. static int __init iwl3945_init(void)
  5289. {
  5290. int ret;
  5291. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  5292. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  5293. ret = iwl3945_rate_control_register();
  5294. if (ret) {
  5295. printk(KERN_ERR DRV_NAME
  5296. "Unable to register rate control algorithm: %d\n", ret);
  5297. return ret;
  5298. }
  5299. ret = pci_register_driver(&iwl3945_driver);
  5300. if (ret) {
  5301. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  5302. goto error_register;
  5303. }
  5304. return ret;
  5305. error_register:
  5306. iwl3945_rate_control_unregister();
  5307. return ret;
  5308. }
  5309. static void __exit iwl3945_exit(void)
  5310. {
  5311. pci_unregister_driver(&iwl3945_driver);
  5312. iwl3945_rate_control_unregister();
  5313. }
  5314. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  5315. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  5316. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  5317. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  5318. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  5319. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  5320. MODULE_PARM_DESC(swcrypto,
  5321. "using software crypto (default 1 [software])\n");
  5322. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  5323. MODULE_PARM_DESC(debug, "debug output mask");
  5324. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  5325. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  5326. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  5327. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  5328. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  5329. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  5330. module_exit(iwl3945_exit);
  5331. module_init(iwl3945_init);