tda18218.c 8.2 KB

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  1. /*
  2. * NXP TDA18218HN silicon tuner driver
  3. *
  4. * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include "tda18218.h"
  21. #include "tda18218_priv.h"
  22. static int debug;
  23. module_param(debug, int, 0644);
  24. MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
  25. /* write multiple registers */
  26. static int tda18218_wr_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
  27. {
  28. int ret = 0, len2, remaining;
  29. u8 buf[1 + len];
  30. struct i2c_msg msg[1] = {
  31. {
  32. .addr = priv->cfg->i2c_address,
  33. .flags = 0,
  34. .buf = buf,
  35. }
  36. };
  37. for (remaining = len; remaining > 0;
  38. remaining -= (priv->cfg->i2c_wr_max - 1)) {
  39. len2 = remaining;
  40. if (len2 > (priv->cfg->i2c_wr_max - 1))
  41. len2 = (priv->cfg->i2c_wr_max - 1);
  42. msg[0].len = 1 + len2;
  43. buf[0] = reg + len - remaining;
  44. memcpy(&buf[1], &val[len - remaining], len2);
  45. ret = i2c_transfer(priv->i2c, msg, 1);
  46. if (ret != 1)
  47. break;
  48. }
  49. if (ret == 1) {
  50. ret = 0;
  51. } else {
  52. warn("i2c wr failed ret:%d reg:%02x len:%d", ret, reg, len);
  53. ret = -EREMOTEIO;
  54. }
  55. return ret;
  56. }
  57. /* read multiple registers */
  58. static int tda18218_rd_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
  59. {
  60. int ret;
  61. u8 buf[reg+len]; /* we must start read always from reg 0x00 */
  62. struct i2c_msg msg[2] = {
  63. {
  64. .addr = priv->cfg->i2c_address,
  65. .flags = 0,
  66. .len = 1,
  67. .buf = "\x00",
  68. }, {
  69. .addr = priv->cfg->i2c_address,
  70. .flags = I2C_M_RD,
  71. .len = sizeof(buf),
  72. .buf = buf,
  73. }
  74. };
  75. ret = i2c_transfer(priv->i2c, msg, 2);
  76. if (ret == 2) {
  77. memcpy(val, &buf[reg], len);
  78. ret = 0;
  79. } else {
  80. warn("i2c rd failed ret:%d reg:%02x len:%d", ret, reg, len);
  81. ret = -EREMOTEIO;
  82. }
  83. return ret;
  84. }
  85. /* write single register */
  86. static int tda18218_wr_reg(struct tda18218_priv *priv, u8 reg, u8 val)
  87. {
  88. return tda18218_wr_regs(priv, reg, &val, 1);
  89. }
  90. /* read single register */
  91. static int tda18218_rd_reg(struct tda18218_priv *priv, u8 reg, u8 *val)
  92. {
  93. return tda18218_rd_regs(priv, reg, val, 1);
  94. }
  95. static int tda18218_set_params(struct dvb_frontend *fe)
  96. {
  97. struct tda18218_priv *priv = fe->tuner_priv;
  98. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  99. u32 bw = c->bandwidth_hz;
  100. int ret;
  101. u8 buf[3], i, BP_Filter, LP_Fc;
  102. u32 LO_Frac;
  103. /* TODO: find out correct AGC algorithm */
  104. u8 agc[][2] = {
  105. { R20_AGC11, 0x60 },
  106. { R23_AGC21, 0x02 },
  107. { R20_AGC11, 0xa0 },
  108. { R23_AGC21, 0x09 },
  109. { R20_AGC11, 0xe0 },
  110. { R23_AGC21, 0x0c },
  111. { R20_AGC11, 0x40 },
  112. { R23_AGC21, 0x01 },
  113. { R20_AGC11, 0x80 },
  114. { R23_AGC21, 0x08 },
  115. { R20_AGC11, 0xc0 },
  116. { R23_AGC21, 0x0b },
  117. { R24_AGC22, 0x1c },
  118. { R24_AGC22, 0x0c },
  119. };
  120. if (fe->ops.i2c_gate_ctrl)
  121. fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
  122. /* low-pass filter cut-off frequency */
  123. if (bw <= 6000000) {
  124. LP_Fc = 0;
  125. priv->if_frequency = 3000000;
  126. } else if (bw <= 7000000) {
  127. LP_Fc = 1;
  128. priv->if_frequency = 3500000;
  129. } else {
  130. LP_Fc = 2;
  131. priv->if_frequency = 4000000;
  132. }
  133. LO_Frac = c->frequency + priv->if_frequency;
  134. /* band-pass filter */
  135. if (LO_Frac < 188000000)
  136. BP_Filter = 3;
  137. else if (LO_Frac < 253000000)
  138. BP_Filter = 4;
  139. else if (LO_Frac < 343000000)
  140. BP_Filter = 5;
  141. else
  142. BP_Filter = 6;
  143. buf[0] = (priv->regs[R1A_IF1] & ~7) | BP_Filter; /* BP_Filter */
  144. buf[1] = (priv->regs[R1B_IF2] & ~3) | LP_Fc; /* LP_Fc */
  145. buf[2] = priv->regs[R1C_AGC2B];
  146. ret = tda18218_wr_regs(priv, R1A_IF1, buf, 3);
  147. if (ret)
  148. goto error;
  149. buf[0] = (LO_Frac / 1000) >> 12; /* LO_Frac_0 */
  150. buf[1] = (LO_Frac / 1000) >> 4; /* LO_Frac_1 */
  151. buf[2] = (LO_Frac / 1000) << 4 |
  152. (priv->regs[R0C_MD5] & 0x0f); /* LO_Frac_2 */
  153. ret = tda18218_wr_regs(priv, R0A_MD3, buf, 3);
  154. if (ret)
  155. goto error;
  156. buf[0] = priv->regs[R0F_MD8] | (1 << 6); /* Freq_prog_Start */
  157. ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
  158. if (ret)
  159. goto error;
  160. buf[0] = priv->regs[R0F_MD8] & ~(1 << 6); /* Freq_prog_Start */
  161. ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
  162. if (ret)
  163. goto error;
  164. /* trigger AGC */
  165. for (i = 0; i < ARRAY_SIZE(agc); i++) {
  166. ret = tda18218_wr_reg(priv, agc[i][0], agc[i][1]);
  167. if (ret)
  168. goto error;
  169. }
  170. error:
  171. if (fe->ops.i2c_gate_ctrl)
  172. fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
  173. if (ret)
  174. dbg("%s: failed ret:%d", __func__, ret);
  175. return ret;
  176. }
  177. static int tda18218_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  178. {
  179. struct tda18218_priv *priv = fe->tuner_priv;
  180. *frequency = priv->if_frequency;
  181. dbg("%s: if=%d", __func__, *frequency);
  182. return 0;
  183. }
  184. static int tda18218_sleep(struct dvb_frontend *fe)
  185. {
  186. struct tda18218_priv *priv = fe->tuner_priv;
  187. int ret;
  188. if (fe->ops.i2c_gate_ctrl)
  189. fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
  190. /* standby */
  191. ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));
  192. if (fe->ops.i2c_gate_ctrl)
  193. fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
  194. if (ret)
  195. dbg("%s: failed ret:%d", __func__, ret);
  196. return ret;
  197. }
  198. static int tda18218_init(struct dvb_frontend *fe)
  199. {
  200. struct tda18218_priv *priv = fe->tuner_priv;
  201. int ret;
  202. /* TODO: calibrations */
  203. if (fe->ops.i2c_gate_ctrl)
  204. fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
  205. ret = tda18218_wr_regs(priv, R00_ID, priv->regs, TDA18218_NUM_REGS);
  206. if (fe->ops.i2c_gate_ctrl)
  207. fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
  208. if (ret)
  209. dbg("%s: failed ret:%d", __func__, ret);
  210. return ret;
  211. }
  212. static int tda18218_release(struct dvb_frontend *fe)
  213. {
  214. kfree(fe->tuner_priv);
  215. fe->tuner_priv = NULL;
  216. return 0;
  217. }
  218. static const struct dvb_tuner_ops tda18218_tuner_ops = {
  219. .info = {
  220. .name = "NXP TDA18218",
  221. .frequency_min = 174000000,
  222. .frequency_max = 864000000,
  223. .frequency_step = 1000,
  224. },
  225. .release = tda18218_release,
  226. .init = tda18218_init,
  227. .sleep = tda18218_sleep,
  228. .set_params = tda18218_set_params,
  229. .get_if_frequency = tda18218_get_if_frequency,
  230. };
  231. struct dvb_frontend *tda18218_attach(struct dvb_frontend *fe,
  232. struct i2c_adapter *i2c, struct tda18218_config *cfg)
  233. {
  234. struct tda18218_priv *priv = NULL;
  235. u8 uninitialized_var(val);
  236. int ret;
  237. /* chip default registers values */
  238. static u8 def_regs[] = {
  239. 0xc0, 0x88, 0x00, 0x8e, 0x03, 0x00, 0x00, 0xd0, 0x00, 0x40,
  240. 0x00, 0x00, 0x07, 0xff, 0x84, 0x09, 0x00, 0x13, 0x00, 0x00,
  241. 0x01, 0x84, 0x09, 0xf0, 0x19, 0x0a, 0x8e, 0x69, 0x98, 0x01,
  242. 0x00, 0x58, 0x10, 0x40, 0x8c, 0x00, 0x0c, 0x48, 0x85, 0xc9,
  243. 0xa7, 0x00, 0x00, 0x00, 0x30, 0x81, 0x80, 0x00, 0x39, 0x00,
  244. 0x8a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf6, 0xf6
  245. };
  246. priv = kzalloc(sizeof(struct tda18218_priv), GFP_KERNEL);
  247. if (priv == NULL)
  248. return NULL;
  249. priv->cfg = cfg;
  250. priv->i2c = i2c;
  251. fe->tuner_priv = priv;
  252. if (fe->ops.i2c_gate_ctrl)
  253. fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
  254. /* check if the tuner is there */
  255. ret = tda18218_rd_reg(priv, R00_ID, &val);
  256. dbg("%s: ret:%d chip ID:%02x", __func__, ret, val);
  257. if (ret || val != def_regs[R00_ID]) {
  258. kfree(priv);
  259. return NULL;
  260. }
  261. info("NXP TDA18218HN successfully identified.");
  262. memcpy(&fe->ops.tuner_ops, &tda18218_tuner_ops,
  263. sizeof(struct dvb_tuner_ops));
  264. memcpy(priv->regs, def_regs, sizeof(def_regs));
  265. /* loop-through enabled chip default register values */
  266. if (priv->cfg->loop_through) {
  267. priv->regs[R17_PD1] = 0xb0;
  268. priv->regs[R18_PD2] = 0x59;
  269. }
  270. /* standby */
  271. ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));
  272. if (ret)
  273. dbg("%s: failed ret:%d", __func__, ret);
  274. if (fe->ops.i2c_gate_ctrl)
  275. fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
  276. return fe;
  277. }
  278. EXPORT_SYMBOL(tda18218_attach);
  279. MODULE_DESCRIPTION("NXP TDA18218HN silicon tuner driver");
  280. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  281. MODULE_LICENSE("GPL");