wm8523.c 14 KB

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  1. /*
  2. * wm8523.c -- WM8523 ALSA SoC Audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/slab.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include "wm8523.h"
  30. #define WM8523_NUM_SUPPLIES 2
  31. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  32. "AVDD",
  33. "LINEVDD",
  34. };
  35. #define WM8523_NUM_RATES 7
  36. /* codec private data */
  37. struct wm8523_priv {
  38. enum snd_soc_control_type control_type;
  39. u16 reg_cache[WM8523_REGISTER_COUNT];
  40. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  41. unsigned int sysclk;
  42. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  43. struct snd_pcm_hw_constraint_list rate_constraint;
  44. };
  45. static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
  46. 0x8523, /* R0 - DEVICE_ID */
  47. 0x0001, /* R1 - REVISION */
  48. 0x0000, /* R2 - PSCTRL1 */
  49. 0x1812, /* R3 - AIF_CTRL1 */
  50. 0x0000, /* R4 - AIF_CTRL2 */
  51. 0x0001, /* R5 - DAC_CTRL3 */
  52. 0x0190, /* R6 - DAC_GAINL */
  53. 0x0190, /* R7 - DAC_GAINR */
  54. 0x0000, /* R8 - ZERO_DETECT */
  55. };
  56. static int wm8523_volatile_register(unsigned int reg)
  57. {
  58. switch (reg) {
  59. case WM8523_DEVICE_ID:
  60. case WM8523_REVISION:
  61. return 1;
  62. default:
  63. return 0;
  64. }
  65. }
  66. static int wm8523_reset(struct snd_soc_codec *codec)
  67. {
  68. return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
  69. }
  70. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  71. static const char *wm8523_zd_count_text[] = {
  72. "1024",
  73. "2048",
  74. };
  75. static const struct soc_enum wm8523_zc_count =
  76. SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
  77. static const struct snd_kcontrol_new wm8523_snd_controls[] = {
  78. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  79. 0, 448, 0, dac_tlv),
  80. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  81. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  82. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  83. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  84. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  85. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  86. };
  87. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  88. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  89. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  90. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  91. };
  92. static const struct snd_soc_dapm_route intercon[] = {
  93. { "LINEVOUTL", NULL, "DAC" },
  94. { "LINEVOUTR", NULL, "DAC" },
  95. };
  96. static int wm8523_add_widgets(struct snd_soc_codec *codec)
  97. {
  98. snd_soc_dapm_new_controls(codec, wm8523_dapm_widgets,
  99. ARRAY_SIZE(wm8523_dapm_widgets));
  100. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  101. return 0;
  102. }
  103. static struct {
  104. int value;
  105. int ratio;
  106. } lrclk_ratios[WM8523_NUM_RATES] = {
  107. { 1, 128 },
  108. { 2, 192 },
  109. { 3, 256 },
  110. { 4, 384 },
  111. { 5, 512 },
  112. { 6, 768 },
  113. { 7, 1152 },
  114. };
  115. static int wm8523_startup(struct snd_pcm_substream *substream,
  116. struct snd_soc_dai *dai)
  117. {
  118. struct snd_soc_codec *codec = dai->codec;
  119. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  120. /* The set of sample rates that can be supported depends on the
  121. * MCLK supplied to the CODEC - enforce this.
  122. */
  123. if (!wm8523->sysclk) {
  124. dev_err(codec->dev,
  125. "No MCLK configured, call set_sysclk() on init\n");
  126. return -EINVAL;
  127. }
  128. return 0;
  129. snd_pcm_hw_constraint_list(substream->runtime, 0,
  130. SNDRV_PCM_HW_PARAM_RATE,
  131. &wm8523->rate_constraint);
  132. return 0;
  133. }
  134. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  135. struct snd_pcm_hw_params *params,
  136. struct snd_soc_dai *dai)
  137. {
  138. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  139. struct snd_soc_codec *codec = rtd->codec;
  140. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  141. int i;
  142. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  143. u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
  144. /* Find a supported LRCLK ratio */
  145. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  146. if (wm8523->sysclk / params_rate(params) ==
  147. lrclk_ratios[i].ratio)
  148. break;
  149. }
  150. /* Should never happen, should be handled by constraints */
  151. if (i == ARRAY_SIZE(lrclk_ratios)) {
  152. dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
  153. wm8523->sysclk / params_rate(params));
  154. return -EINVAL;
  155. }
  156. aifctrl2 &= ~WM8523_SR_MASK;
  157. aifctrl2 |= lrclk_ratios[i].value;
  158. aifctrl1 &= ~WM8523_WL_MASK;
  159. switch (params_format(params)) {
  160. case SNDRV_PCM_FORMAT_S16_LE:
  161. break;
  162. case SNDRV_PCM_FORMAT_S20_3LE:
  163. aifctrl1 |= 0x8;
  164. break;
  165. case SNDRV_PCM_FORMAT_S24_LE:
  166. aifctrl1 |= 0x10;
  167. break;
  168. case SNDRV_PCM_FORMAT_S32_LE:
  169. aifctrl1 |= 0x18;
  170. break;
  171. }
  172. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  173. snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
  174. return 0;
  175. }
  176. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  177. int clk_id, unsigned int freq, int dir)
  178. {
  179. struct snd_soc_codec *codec = codec_dai->codec;
  180. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  181. unsigned int val;
  182. int i;
  183. wm8523->sysclk = freq;
  184. wm8523->rate_constraint.count = 0;
  185. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  186. val = freq / lrclk_ratios[i].ratio;
  187. /* Check that it's a standard rate since core can't
  188. * cope with others and having the odd rates confuses
  189. * constraint matching.
  190. */
  191. switch (val) {
  192. case 8000:
  193. case 11025:
  194. case 16000:
  195. case 22050:
  196. case 32000:
  197. case 44100:
  198. case 48000:
  199. case 64000:
  200. case 88200:
  201. case 96000:
  202. case 176400:
  203. case 192000:
  204. dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
  205. val);
  206. wm8523->rate_constraint_list[i] = val;
  207. wm8523->rate_constraint.count++;
  208. break;
  209. default:
  210. dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
  211. val);
  212. }
  213. }
  214. /* Need at least one supported rate... */
  215. if (wm8523->rate_constraint.count == 0)
  216. return -EINVAL;
  217. return 0;
  218. }
  219. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  220. unsigned int fmt)
  221. {
  222. struct snd_soc_codec *codec = codec_dai->codec;
  223. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  224. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  225. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  226. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  227. case SND_SOC_DAIFMT_CBM_CFM:
  228. aifctrl1 |= WM8523_AIF_MSTR;
  229. break;
  230. case SND_SOC_DAIFMT_CBS_CFS:
  231. break;
  232. default:
  233. return -EINVAL;
  234. }
  235. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  236. case SND_SOC_DAIFMT_I2S:
  237. aifctrl1 |= 0x0002;
  238. break;
  239. case SND_SOC_DAIFMT_RIGHT_J:
  240. break;
  241. case SND_SOC_DAIFMT_LEFT_J:
  242. aifctrl1 |= 0x0001;
  243. break;
  244. case SND_SOC_DAIFMT_DSP_A:
  245. aifctrl1 |= 0x0003;
  246. break;
  247. case SND_SOC_DAIFMT_DSP_B:
  248. aifctrl1 |= 0x0023;
  249. break;
  250. default:
  251. return -EINVAL;
  252. }
  253. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  254. case SND_SOC_DAIFMT_NB_NF:
  255. break;
  256. case SND_SOC_DAIFMT_IB_IF:
  257. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  258. break;
  259. case SND_SOC_DAIFMT_IB_NF:
  260. aifctrl1 |= WM8523_BCLK_INV;
  261. break;
  262. case SND_SOC_DAIFMT_NB_IF:
  263. aifctrl1 |= WM8523_LRCLK_INV;
  264. break;
  265. default:
  266. return -EINVAL;
  267. }
  268. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  269. return 0;
  270. }
  271. static int wm8523_set_bias_level(struct snd_soc_codec *codec,
  272. enum snd_soc_bias_level level)
  273. {
  274. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  275. int ret, i;
  276. switch (level) {
  277. case SND_SOC_BIAS_ON:
  278. break;
  279. case SND_SOC_BIAS_PREPARE:
  280. /* Full power on */
  281. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  282. WM8523_SYS_ENA_MASK, 3);
  283. break;
  284. case SND_SOC_BIAS_STANDBY:
  285. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  286. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  287. wm8523->supplies);
  288. if (ret != 0) {
  289. dev_err(codec->dev,
  290. "Failed to enable supplies: %d\n",
  291. ret);
  292. return ret;
  293. }
  294. /* Initial power up */
  295. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  296. WM8523_SYS_ENA_MASK, 1);
  297. /* Sync back default/cached values */
  298. for (i = WM8523_AIF_CTRL1;
  299. i < WM8523_MAX_REGISTER; i++)
  300. snd_soc_write(codec, i, wm8523->reg_cache[i]);
  301. msleep(100);
  302. }
  303. /* Power up to mute */
  304. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  305. WM8523_SYS_ENA_MASK, 2);
  306. break;
  307. case SND_SOC_BIAS_OFF:
  308. /* The chip runs through the power down sequence for us. */
  309. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  310. WM8523_SYS_ENA_MASK, 0);
  311. msleep(100);
  312. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  313. wm8523->supplies);
  314. break;
  315. }
  316. codec->bias_level = level;
  317. return 0;
  318. }
  319. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  320. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  321. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  322. static struct snd_soc_dai_ops wm8523_dai_ops = {
  323. .startup = wm8523_startup,
  324. .hw_params = wm8523_hw_params,
  325. .set_sysclk = wm8523_set_dai_sysclk,
  326. .set_fmt = wm8523_set_dai_fmt,
  327. };
  328. static struct snd_soc_dai_driver wm8523_dai = {
  329. .name = "wm8523-hifi",
  330. .playback = {
  331. .stream_name = "Playback",
  332. .channels_min = 2, /* Mono modes not yet supported */
  333. .channels_max = 2,
  334. .rates = WM8523_RATES,
  335. .formats = WM8523_FORMATS,
  336. },
  337. .ops = &wm8523_dai_ops,
  338. };
  339. #ifdef CONFIG_PM
  340. static int wm8523_suspend(struct snd_soc_codec *codec, pm_message_t state)
  341. {
  342. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  343. return 0;
  344. }
  345. static int wm8523_resume(struct snd_soc_codec *codec)
  346. {
  347. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  348. return 0;
  349. }
  350. #else
  351. #define wm8523_suspend NULL
  352. #define wm8523_resume NULL
  353. #endif
  354. static int wm8523_probe(struct snd_soc_codec *codec)
  355. {
  356. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  357. int ret, i;
  358. codec->hw_write = (hw_write_t)i2c_master_send;
  359. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  360. wm8523->rate_constraint.count =
  361. ARRAY_SIZE(wm8523->rate_constraint_list);
  362. ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
  363. if (ret != 0) {
  364. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  365. return ret;
  366. }
  367. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  368. wm8523->supplies[i].supply = wm8523_supply_names[i];
  369. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
  370. wm8523->supplies);
  371. if (ret != 0) {
  372. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  373. return ret;
  374. }
  375. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  376. wm8523->supplies);
  377. if (ret != 0) {
  378. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  379. goto err_get;
  380. }
  381. ret = snd_soc_read(codec, WM8523_DEVICE_ID);
  382. if (ret < 0) {
  383. dev_err(codec->dev, "Failed to read ID register\n");
  384. goto err_enable;
  385. }
  386. if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
  387. dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
  388. ret = -EINVAL;
  389. goto err_enable;
  390. }
  391. ret = snd_soc_read(codec, WM8523_REVISION);
  392. if (ret < 0) {
  393. dev_err(codec->dev, "Failed to read revision register\n");
  394. goto err_enable;
  395. }
  396. dev_info(codec->dev, "revision %c\n",
  397. (ret & WM8523_CHIP_REV_MASK) + 'A');
  398. ret = wm8523_reset(codec);
  399. if (ret < 0) {
  400. dev_err(codec->dev, "Failed to issue reset\n");
  401. goto err_enable;
  402. }
  403. /* Change some default settings - latch VU and enable ZC */
  404. wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
  405. wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
  406. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  407. /* Bias level configuration will have done an extra enable */
  408. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  409. snd_soc_add_controls(codec, wm8523_snd_controls,
  410. ARRAY_SIZE(wm8523_snd_controls));
  411. wm8523_add_widgets(codec);
  412. return 0;
  413. err_enable:
  414. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  415. err_get:
  416. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  417. return ret;
  418. }
  419. static int wm8523_remove(struct snd_soc_codec *codec)
  420. {
  421. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  422. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  423. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  424. return 0;
  425. }
  426. static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
  427. .probe = wm8523_probe,
  428. .remove = wm8523_remove,
  429. .suspend = wm8523_suspend,
  430. .resume = wm8523_resume,
  431. .set_bias_level = wm8523_set_bias_level,
  432. .reg_cache_size = WM8523_REGISTER_COUNT,
  433. .reg_word_size = sizeof(u16),
  434. .reg_cache_default = wm8523_reg,
  435. .volatile_register = wm8523_volatile_register,
  436. };
  437. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  438. static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
  439. const struct i2c_device_id *id)
  440. {
  441. struct wm8523_priv *wm8523;
  442. int ret;
  443. wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
  444. if (wm8523 == NULL)
  445. return -ENOMEM;
  446. i2c_set_clientdata(i2c, wm8523);
  447. wm8523->control_type = SND_SOC_I2C;
  448. ret = snd_soc_register_codec(&i2c->dev,
  449. &soc_codec_dev_wm8523, &wm8523_dai, 1);
  450. if (ret < 0)
  451. kfree(wm8523);
  452. return ret;
  453. }
  454. static __devexit int wm8523_i2c_remove(struct i2c_client *client)
  455. {
  456. snd_soc_unregister_codec(&client->dev);
  457. kfree(i2c_get_clientdata(client));
  458. return 0;
  459. }
  460. static const struct i2c_device_id wm8523_i2c_id[] = {
  461. { "wm8523", 0 },
  462. { }
  463. };
  464. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  465. static struct i2c_driver wm8523_i2c_driver = {
  466. .driver = {
  467. .name = "wm8523-codec",
  468. .owner = THIS_MODULE,
  469. },
  470. .probe = wm8523_i2c_probe,
  471. .remove = __devexit_p(wm8523_i2c_remove),
  472. .id_table = wm8523_i2c_id,
  473. };
  474. #endif
  475. static int __init wm8523_modinit(void)
  476. {
  477. int ret;
  478. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  479. ret = i2c_add_driver(&wm8523_i2c_driver);
  480. if (ret != 0) {
  481. printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
  482. ret);
  483. }
  484. #endif
  485. return 0;
  486. }
  487. module_init(wm8523_modinit);
  488. static void __exit wm8523_exit(void)
  489. {
  490. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  491. i2c_del_driver(&wm8523_i2c_driver);
  492. #endif
  493. }
  494. module_exit(wm8523_exit);
  495. MODULE_DESCRIPTION("ASoC WM8523 driver");
  496. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  497. MODULE_LICENSE("GPL");