synclink_cs.c 115 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522
  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/pci.h>
  43. #include <linux/tty.h>
  44. #include <linux/tty_flip.h>
  45. #include <linux/serial.h>
  46. #include <linux/major.h>
  47. #include <linux/string.h>
  48. #include <linux/fcntl.h>
  49. #include <linux/ptrace.h>
  50. #include <linux/ioport.h>
  51. #include <linux/mm.h>
  52. #include <linux/slab.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/vmalloc.h>
  55. #include <linux/init.h>
  56. #include <linux/delay.h>
  57. #include <linux/ioctl.h>
  58. #include <asm/system.h>
  59. #include <asm/io.h>
  60. #include <asm/irq.h>
  61. #include <asm/dma.h>
  62. #include <linux/bitops.h>
  63. #include <asm/types.h>
  64. #include <linux/termios.h>
  65. #include <linux/workqueue.h>
  66. #include <linux/hdlc.h>
  67. #include <pcmcia/cs_types.h>
  68. #include <pcmcia/cs.h>
  69. #include <pcmcia/cistpl.h>
  70. #include <pcmcia/cisreg.h>
  71. #include <pcmcia/ds.h>
  72. #ifdef CONFIG_HDLC_MODULE
  73. #define CONFIG_HDLC 1
  74. #endif
  75. #define GET_USER(error,value,addr) error = get_user(value,addr)
  76. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  77. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  78. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  79. #include <asm/uaccess.h>
  80. #include "linux/synclink.h"
  81. static MGSL_PARAMS default_params = {
  82. MGSL_MODE_HDLC, /* unsigned long mode */
  83. 0, /* unsigned char loopback; */
  84. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  85. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  86. 0, /* unsigned long clock_speed; */
  87. 0xff, /* unsigned char addr_filter; */
  88. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  89. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  90. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  91. 9600, /* unsigned long data_rate; */
  92. 8, /* unsigned char data_bits; */
  93. 1, /* unsigned char stop_bits; */
  94. ASYNC_PARITY_NONE /* unsigned char parity; */
  95. };
  96. typedef struct
  97. {
  98. int count;
  99. unsigned char status;
  100. char data[1];
  101. } RXBUF;
  102. /* The queue of BH actions to be performed */
  103. #define BH_RECEIVE 1
  104. #define BH_TRANSMIT 2
  105. #define BH_STATUS 4
  106. #define IO_PIN_SHUTDOWN_LIMIT 100
  107. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  108. struct _input_signal_events {
  109. int ri_up;
  110. int ri_down;
  111. int dsr_up;
  112. int dsr_down;
  113. int dcd_up;
  114. int dcd_down;
  115. int cts_up;
  116. int cts_down;
  117. };
  118. /*
  119. * Device instance data structure
  120. */
  121. typedef struct _mgslpc_info {
  122. void *if_ptr; /* General purpose pointer (used by SPPP) */
  123. int magic;
  124. int flags;
  125. int count; /* count of opens */
  126. int line;
  127. unsigned short close_delay;
  128. unsigned short closing_wait; /* time to wait before closing */
  129. struct mgsl_icount icount;
  130. struct tty_struct *tty;
  131. int timeout;
  132. int x_char; /* xon/xoff character */
  133. int blocked_open; /* # of blocked opens */
  134. unsigned char read_status_mask;
  135. unsigned char ignore_status_mask;
  136. unsigned char *tx_buf;
  137. int tx_put;
  138. int tx_get;
  139. int tx_count;
  140. /* circular list of fixed length rx buffers */
  141. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  142. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  143. int rx_put; /* index of next empty rx buffer */
  144. int rx_get; /* index of next full rx buffer */
  145. int rx_buf_size; /* size in bytes of single rx buffer */
  146. int rx_buf_count; /* total number of rx buffers */
  147. int rx_frame_count; /* number of full rx buffers */
  148. wait_queue_head_t open_wait;
  149. wait_queue_head_t close_wait;
  150. wait_queue_head_t status_event_wait_q;
  151. wait_queue_head_t event_wait_q;
  152. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  153. struct _mgslpc_info *next_device; /* device list link */
  154. unsigned short imra_value;
  155. unsigned short imrb_value;
  156. unsigned char pim_value;
  157. spinlock_t lock;
  158. struct work_struct task; /* task structure for scheduling bh */
  159. u32 max_frame_size;
  160. u32 pending_bh;
  161. int bh_running;
  162. int bh_requested;
  163. int dcd_chkcount; /* check counts to prevent */
  164. int cts_chkcount; /* too many IRQs if a signal */
  165. int dsr_chkcount; /* is floating */
  166. int ri_chkcount;
  167. int rx_enabled;
  168. int rx_overflow;
  169. int tx_enabled;
  170. int tx_active;
  171. int tx_aborting;
  172. u32 idle_mode;
  173. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  174. char device_name[25]; /* device instance name */
  175. unsigned int io_base; /* base I/O address of adapter */
  176. unsigned int irq_level;
  177. MGSL_PARAMS params; /* communications parameters */
  178. unsigned char serial_signals; /* current serial signal states */
  179. char irq_occurred; /* for diagnostics use */
  180. char testing_irq;
  181. unsigned int init_error; /* startup error (DIAGS) */
  182. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  183. BOOLEAN drop_rts_on_tx_done;
  184. struct _input_signal_events input_signal_events;
  185. /* PCMCIA support */
  186. struct pcmcia_device *p_dev;
  187. dev_node_t node;
  188. int stop;
  189. /* SPPP/Cisco HDLC device parts */
  190. int netcount;
  191. int dosyncppp;
  192. spinlock_t netlock;
  193. #ifdef CONFIG_HDLC
  194. struct net_device *netdev;
  195. #endif
  196. } MGSLPC_INFO;
  197. #define MGSLPC_MAGIC 0x5402
  198. /*
  199. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  200. */
  201. #define TXBUFSIZE 4096
  202. #define CHA 0x00 /* channel A offset */
  203. #define CHB 0x40 /* channel B offset */
  204. /*
  205. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  206. */
  207. #undef PVR
  208. #define RXFIFO 0
  209. #define TXFIFO 0
  210. #define STAR 0x20
  211. #define CMDR 0x20
  212. #define RSTA 0x21
  213. #define PRE 0x21
  214. #define MODE 0x22
  215. #define TIMR 0x23
  216. #define XAD1 0x24
  217. #define XAD2 0x25
  218. #define RAH1 0x26
  219. #define RAH2 0x27
  220. #define DAFO 0x27
  221. #define RAL1 0x28
  222. #define RFC 0x28
  223. #define RHCR 0x29
  224. #define RAL2 0x29
  225. #define RBCL 0x2a
  226. #define XBCL 0x2a
  227. #define RBCH 0x2b
  228. #define XBCH 0x2b
  229. #define CCR0 0x2c
  230. #define CCR1 0x2d
  231. #define CCR2 0x2e
  232. #define CCR3 0x2f
  233. #define VSTR 0x34
  234. #define BGR 0x34
  235. #define RLCR 0x35
  236. #define AML 0x36
  237. #define AMH 0x37
  238. #define GIS 0x38
  239. #define IVA 0x38
  240. #define IPC 0x39
  241. #define ISR 0x3a
  242. #define IMR 0x3a
  243. #define PVR 0x3c
  244. #define PIS 0x3d
  245. #define PIM 0x3d
  246. #define PCR 0x3e
  247. #define CCR4 0x3f
  248. // IMR/ISR
  249. #define IRQ_BREAK_ON BIT15 // rx break detected
  250. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  251. #define IRQ_ALLSENT BIT13 // all sent
  252. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  253. #define IRQ_TIMER BIT11 // timer interrupt
  254. #define IRQ_CTS BIT10 // CTS status change
  255. #define IRQ_TXREPEAT BIT9 // tx message repeat
  256. #define IRQ_TXFIFO BIT8 // transmit pool ready
  257. #define IRQ_RXEOM BIT7 // receive message end
  258. #define IRQ_EXITHUNT BIT6 // receive frame start
  259. #define IRQ_RXTIME BIT6 // rx char timeout
  260. #define IRQ_DCD BIT2 // carrier detect status change
  261. #define IRQ_OVERRUN BIT1 // receive frame overflow
  262. #define IRQ_RXFIFO BIT0 // receive pool full
  263. // STAR
  264. #define XFW BIT6 // transmit FIFO write enable
  265. #define CEC BIT2 // command executing
  266. #define CTS BIT1 // CTS state
  267. #define PVR_DTR BIT0
  268. #define PVR_DSR BIT1
  269. #define PVR_RI BIT2
  270. #define PVR_AUTOCTS BIT3
  271. #define PVR_RS232 0x20 /* 0010b */
  272. #define PVR_V35 0xe0 /* 1110b */
  273. #define PVR_RS422 0x40 /* 0100b */
  274. /* Register access functions */
  275. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  276. #define read_reg(info, reg) inb((info)->io_base + (reg))
  277. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  278. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  279. #define set_reg_bits(info, reg, mask) \
  280. write_reg(info, (reg), \
  281. (unsigned char) (read_reg(info, (reg)) | (mask)))
  282. #define clear_reg_bits(info, reg, mask) \
  283. write_reg(info, (reg), \
  284. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  285. /*
  286. * interrupt enable/disable routines
  287. */
  288. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  289. {
  290. if (channel == CHA) {
  291. info->imra_value |= mask;
  292. write_reg16(info, CHA + IMR, info->imra_value);
  293. } else {
  294. info->imrb_value |= mask;
  295. write_reg16(info, CHB + IMR, info->imrb_value);
  296. }
  297. }
  298. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  299. {
  300. if (channel == CHA) {
  301. info->imra_value &= ~mask;
  302. write_reg16(info, CHA + IMR, info->imra_value);
  303. } else {
  304. info->imrb_value &= ~mask;
  305. write_reg16(info, CHB + IMR, info->imrb_value);
  306. }
  307. }
  308. #define port_irq_disable(info, mask) \
  309. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  310. #define port_irq_enable(info, mask) \
  311. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  312. static void rx_start(MGSLPC_INFO *info);
  313. static void rx_stop(MGSLPC_INFO *info);
  314. static void tx_start(MGSLPC_INFO *info);
  315. static void tx_stop(MGSLPC_INFO *info);
  316. static void tx_set_idle(MGSLPC_INFO *info);
  317. static void get_signals(MGSLPC_INFO *info);
  318. static void set_signals(MGSLPC_INFO *info);
  319. static void reset_device(MGSLPC_INFO *info);
  320. static void hdlc_mode(MGSLPC_INFO *info);
  321. static void async_mode(MGSLPC_INFO *info);
  322. static void tx_timeout(unsigned long context);
  323. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  324. #ifdef CONFIG_HDLC
  325. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  326. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  327. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  328. static int hdlcdev_init(MGSLPC_INFO *info);
  329. static void hdlcdev_exit(MGSLPC_INFO *info);
  330. #endif
  331. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  332. static BOOLEAN register_test(MGSLPC_INFO *info);
  333. static BOOLEAN irq_test(MGSLPC_INFO *info);
  334. static int adapter_test(MGSLPC_INFO *info);
  335. static int claim_resources(MGSLPC_INFO *info);
  336. static void release_resources(MGSLPC_INFO *info);
  337. static void mgslpc_add_device(MGSLPC_INFO *info);
  338. static void mgslpc_remove_device(MGSLPC_INFO *info);
  339. static int rx_get_frame(MGSLPC_INFO *info);
  340. static void rx_reset_buffers(MGSLPC_INFO *info);
  341. static int rx_alloc_buffers(MGSLPC_INFO *info);
  342. static void rx_free_buffers(MGSLPC_INFO *info);
  343. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  344. /*
  345. * Bottom half interrupt handlers
  346. */
  347. static void bh_handler(void* Context);
  348. static void bh_transmit(MGSLPC_INFO *info);
  349. static void bh_status(MGSLPC_INFO *info);
  350. /*
  351. * ioctl handlers
  352. */
  353. static int tiocmget(struct tty_struct *tty, struct file *file);
  354. static int tiocmset(struct tty_struct *tty, struct file *file,
  355. unsigned int set, unsigned int clear);
  356. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  357. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  358. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  359. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  360. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  361. static int set_txenable(MGSLPC_INFO *info, int enable);
  362. static int tx_abort(MGSLPC_INFO *info);
  363. static int set_rxenable(MGSLPC_INFO *info, int enable);
  364. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  365. static MGSLPC_INFO *mgslpc_device_list = NULL;
  366. static int mgslpc_device_count = 0;
  367. /*
  368. * Set this param to non-zero to load eax with the
  369. * .text section address and breakpoint on module load.
  370. * This is useful for use with gdb and add-symbol-file command.
  371. */
  372. static int break_on_load=0;
  373. /*
  374. * Driver major number, defaults to zero to get auto
  375. * assigned major number. May be forced as module parameter.
  376. */
  377. static int ttymajor=0;
  378. static int debug_level = 0;
  379. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  380. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  381. module_param(break_on_load, bool, 0);
  382. module_param(ttymajor, int, 0);
  383. module_param(debug_level, int, 0);
  384. module_param_array(maxframe, int, NULL, 0);
  385. module_param_array(dosyncppp, int, NULL, 0);
  386. MODULE_LICENSE("GPL");
  387. static char *driver_name = "SyncLink PC Card driver";
  388. static char *driver_version = "$Revision: 4.34 $";
  389. static struct tty_driver *serial_driver;
  390. /* number of characters left in xmit buffer before we ask for more */
  391. #define WAKEUP_CHARS 256
  392. static void mgslpc_change_params(MGSLPC_INFO *info);
  393. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  394. /* PCMCIA prototypes */
  395. static int mgslpc_config(struct pcmcia_device *link);
  396. static void mgslpc_release(u_long arg);
  397. static void mgslpc_detach(struct pcmcia_device *p_dev);
  398. /*
  399. * 1st function defined in .text section. Calling this function in
  400. * init_module() followed by a breakpoint allows a remote debugger
  401. * (gdb) to get the .text address for the add-symbol-file command.
  402. * This allows remote debugging of dynamically loadable modules.
  403. */
  404. static void* mgslpc_get_text_ptr(void)
  405. {
  406. return mgslpc_get_text_ptr;
  407. }
  408. /**
  409. * line discipline callback wrappers
  410. *
  411. * The wrappers maintain line discipline references
  412. * while calling into the line discipline.
  413. *
  414. * ldisc_flush_buffer - flush line discipline receive buffers
  415. * ldisc_receive_buf - pass receive data to line discipline
  416. */
  417. static void ldisc_flush_buffer(struct tty_struct *tty)
  418. {
  419. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  420. if (ld) {
  421. if (ld->flush_buffer)
  422. ld->flush_buffer(tty);
  423. tty_ldisc_deref(ld);
  424. }
  425. }
  426. static void ldisc_receive_buf(struct tty_struct *tty,
  427. const __u8 *data, char *flags, int count)
  428. {
  429. struct tty_ldisc *ld;
  430. if (!tty)
  431. return;
  432. ld = tty_ldisc_ref(tty);
  433. if (ld) {
  434. if (ld->receive_buf)
  435. ld->receive_buf(tty, data, flags, count);
  436. tty_ldisc_deref(ld);
  437. }
  438. }
  439. static int mgslpc_probe(struct pcmcia_device *link)
  440. {
  441. MGSLPC_INFO *info;
  442. int ret;
  443. if (debug_level >= DEBUG_LEVEL_INFO)
  444. printk("mgslpc_attach\n");
  445. info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  446. if (!info) {
  447. printk("Error can't allocate device instance data\n");
  448. return -ENOMEM;
  449. }
  450. memset(info, 0, sizeof(MGSLPC_INFO));
  451. info->magic = MGSLPC_MAGIC;
  452. INIT_WORK(&info->task, bh_handler, info);
  453. info->max_frame_size = 4096;
  454. info->close_delay = 5*HZ/10;
  455. info->closing_wait = 30*HZ;
  456. init_waitqueue_head(&info->open_wait);
  457. init_waitqueue_head(&info->close_wait);
  458. init_waitqueue_head(&info->status_event_wait_q);
  459. init_waitqueue_head(&info->event_wait_q);
  460. spin_lock_init(&info->lock);
  461. spin_lock_init(&info->netlock);
  462. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  463. info->idle_mode = HDLC_TXIDLE_FLAGS;
  464. info->imra_value = 0xffff;
  465. info->imrb_value = 0xffff;
  466. info->pim_value = 0xff;
  467. info->p_dev = link;
  468. link->priv = info;
  469. /* Initialize the struct pcmcia_device structure */
  470. /* Interrupt setup */
  471. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  472. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  473. link->irq.Handler = NULL;
  474. link->conf.Attributes = 0;
  475. link->conf.IntType = INT_MEMORY_AND_IO;
  476. ret = mgslpc_config(link);
  477. if (ret)
  478. return ret;
  479. mgslpc_add_device(info);
  480. return 0;
  481. }
  482. /* Card has been inserted.
  483. */
  484. #define CS_CHECK(fn, ret) \
  485. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  486. static int mgslpc_config(struct pcmcia_device *link)
  487. {
  488. MGSLPC_INFO *info = link->priv;
  489. tuple_t tuple;
  490. cisparse_t parse;
  491. int last_fn, last_ret;
  492. u_char buf[64];
  493. cistpl_cftable_entry_t dflt = { 0 };
  494. cistpl_cftable_entry_t *cfg;
  495. if (debug_level >= DEBUG_LEVEL_INFO)
  496. printk("mgslpc_config(0x%p)\n", link);
  497. tuple.Attributes = 0;
  498. tuple.TupleData = buf;
  499. tuple.TupleDataMax = sizeof(buf);
  500. tuple.TupleOffset = 0;
  501. /* get CIS configuration entry */
  502. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  503. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  504. cfg = &(parse.cftable_entry);
  505. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  506. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  507. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  508. if (cfg->index == 0)
  509. goto cs_failed;
  510. link->conf.ConfigIndex = cfg->index;
  511. link->conf.Attributes |= CONF_ENABLE_IRQ;
  512. /* IO window settings */
  513. link->io.NumPorts1 = 0;
  514. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  515. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  516. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  517. if (!(io->flags & CISTPL_IO_8BIT))
  518. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  519. if (!(io->flags & CISTPL_IO_16BIT))
  520. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  521. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  522. link->io.BasePort1 = io->win[0].base;
  523. link->io.NumPorts1 = io->win[0].len;
  524. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  525. }
  526. link->conf.Attributes = CONF_ENABLE_IRQ;
  527. link->conf.IntType = INT_MEMORY_AND_IO;
  528. link->conf.ConfigIndex = 8;
  529. link->conf.Present = PRESENT_OPTION;
  530. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  531. link->irq.Handler = mgslpc_isr;
  532. link->irq.Instance = info;
  533. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  534. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  535. info->io_base = link->io.BasePort1;
  536. info->irq_level = link->irq.AssignedIRQ;
  537. /* add to linked list of devices */
  538. sprintf(info->node.dev_name, "mgslpc0");
  539. info->node.major = info->node.minor = 0;
  540. link->dev_node = &info->node;
  541. printk(KERN_INFO "%s: index 0x%02x:",
  542. info->node.dev_name, link->conf.ConfigIndex);
  543. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  544. printk(", irq %d", link->irq.AssignedIRQ);
  545. if (link->io.NumPorts1)
  546. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  547. link->io.BasePort1+link->io.NumPorts1-1);
  548. printk("\n");
  549. return 0;
  550. cs_failed:
  551. cs_error(link, last_fn, last_ret);
  552. mgslpc_release((u_long)link);
  553. return -ENODEV;
  554. }
  555. /* Card has been removed.
  556. * Unregister device and release PCMCIA configuration.
  557. * If device is open, postpone until it is closed.
  558. */
  559. static void mgslpc_release(u_long arg)
  560. {
  561. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  562. if (debug_level >= DEBUG_LEVEL_INFO)
  563. printk("mgslpc_release(0x%p)\n", link);
  564. pcmcia_disable_device(link);
  565. }
  566. static void mgslpc_detach(struct pcmcia_device *link)
  567. {
  568. if (debug_level >= DEBUG_LEVEL_INFO)
  569. printk("mgslpc_detach(0x%p)\n", link);
  570. ((MGSLPC_INFO *)link->priv)->stop = 1;
  571. mgslpc_release((u_long)link);
  572. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  573. }
  574. static int mgslpc_suspend(struct pcmcia_device *link)
  575. {
  576. MGSLPC_INFO *info = link->priv;
  577. info->stop = 1;
  578. return 0;
  579. }
  580. static int mgslpc_resume(struct pcmcia_device *link)
  581. {
  582. MGSLPC_INFO *info = link->priv;
  583. info->stop = 0;
  584. return 0;
  585. }
  586. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  587. char *name, const char *routine)
  588. {
  589. #ifdef MGSLPC_PARANOIA_CHECK
  590. static const char *badmagic =
  591. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  592. static const char *badinfo =
  593. "Warning: null mgslpc_info for (%s) in %s\n";
  594. if (!info) {
  595. printk(badinfo, name, routine);
  596. return 1;
  597. }
  598. if (info->magic != MGSLPC_MAGIC) {
  599. printk(badmagic, name, routine);
  600. return 1;
  601. }
  602. #else
  603. if (!info)
  604. return 1;
  605. #endif
  606. return 0;
  607. }
  608. #define CMD_RXFIFO BIT7 // release current rx FIFO
  609. #define CMD_RXRESET BIT6 // receiver reset
  610. #define CMD_RXFIFO_READ BIT5
  611. #define CMD_START_TIMER BIT4
  612. #define CMD_TXFIFO BIT3 // release current tx FIFO
  613. #define CMD_TXEOM BIT1 // transmit end message
  614. #define CMD_TXRESET BIT0 // transmit reset
  615. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  616. {
  617. int i = 0;
  618. /* wait for command completion */
  619. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  620. udelay(1);
  621. if (i++ == 1000)
  622. return FALSE;
  623. }
  624. return TRUE;
  625. }
  626. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  627. {
  628. wait_command_complete(info, channel);
  629. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  630. }
  631. static void tx_pause(struct tty_struct *tty)
  632. {
  633. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  634. unsigned long flags;
  635. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  636. return;
  637. if (debug_level >= DEBUG_LEVEL_INFO)
  638. printk("tx_pause(%s)\n",info->device_name);
  639. spin_lock_irqsave(&info->lock,flags);
  640. if (info->tx_enabled)
  641. tx_stop(info);
  642. spin_unlock_irqrestore(&info->lock,flags);
  643. }
  644. static void tx_release(struct tty_struct *tty)
  645. {
  646. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  647. unsigned long flags;
  648. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  649. return;
  650. if (debug_level >= DEBUG_LEVEL_INFO)
  651. printk("tx_release(%s)\n",info->device_name);
  652. spin_lock_irqsave(&info->lock,flags);
  653. if (!info->tx_enabled)
  654. tx_start(info);
  655. spin_unlock_irqrestore(&info->lock,flags);
  656. }
  657. /* Return next bottom half action to perform.
  658. * or 0 if nothing to do.
  659. */
  660. static int bh_action(MGSLPC_INFO *info)
  661. {
  662. unsigned long flags;
  663. int rc = 0;
  664. spin_lock_irqsave(&info->lock,flags);
  665. if (info->pending_bh & BH_RECEIVE) {
  666. info->pending_bh &= ~BH_RECEIVE;
  667. rc = BH_RECEIVE;
  668. } else if (info->pending_bh & BH_TRANSMIT) {
  669. info->pending_bh &= ~BH_TRANSMIT;
  670. rc = BH_TRANSMIT;
  671. } else if (info->pending_bh & BH_STATUS) {
  672. info->pending_bh &= ~BH_STATUS;
  673. rc = BH_STATUS;
  674. }
  675. if (!rc) {
  676. /* Mark BH routine as complete */
  677. info->bh_running = 0;
  678. info->bh_requested = 0;
  679. }
  680. spin_unlock_irqrestore(&info->lock,flags);
  681. return rc;
  682. }
  683. static void bh_handler(void* Context)
  684. {
  685. MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
  686. int action;
  687. if (!info)
  688. return;
  689. if (debug_level >= DEBUG_LEVEL_BH)
  690. printk( "%s(%d):bh_handler(%s) entry\n",
  691. __FILE__,__LINE__,info->device_name);
  692. info->bh_running = 1;
  693. while((action = bh_action(info)) != 0) {
  694. /* Process work item */
  695. if ( debug_level >= DEBUG_LEVEL_BH )
  696. printk( "%s(%d):bh_handler() work item action=%d\n",
  697. __FILE__,__LINE__,action);
  698. switch (action) {
  699. case BH_RECEIVE:
  700. while(rx_get_frame(info));
  701. break;
  702. case BH_TRANSMIT:
  703. bh_transmit(info);
  704. break;
  705. case BH_STATUS:
  706. bh_status(info);
  707. break;
  708. default:
  709. /* unknown work item ID */
  710. printk("Unknown work item ID=%08X!\n", action);
  711. break;
  712. }
  713. }
  714. if (debug_level >= DEBUG_LEVEL_BH)
  715. printk( "%s(%d):bh_handler(%s) exit\n",
  716. __FILE__,__LINE__,info->device_name);
  717. }
  718. static void bh_transmit(MGSLPC_INFO *info)
  719. {
  720. struct tty_struct *tty = info->tty;
  721. if (debug_level >= DEBUG_LEVEL_BH)
  722. printk("bh_transmit() entry on %s\n", info->device_name);
  723. if (tty) {
  724. tty_wakeup(tty);
  725. wake_up_interruptible(&tty->write_wait);
  726. }
  727. }
  728. static void bh_status(MGSLPC_INFO *info)
  729. {
  730. info->ri_chkcount = 0;
  731. info->dsr_chkcount = 0;
  732. info->dcd_chkcount = 0;
  733. info->cts_chkcount = 0;
  734. }
  735. /* eom: non-zero = end of frame */
  736. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  737. {
  738. unsigned char data[2];
  739. unsigned char fifo_count, read_count, i;
  740. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  741. if (debug_level >= DEBUG_LEVEL_ISR)
  742. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  743. if (!info->rx_enabled)
  744. return;
  745. if (info->rx_frame_count >= info->rx_buf_count) {
  746. /* no more free buffers */
  747. issue_command(info, CHA, CMD_RXRESET);
  748. info->pending_bh |= BH_RECEIVE;
  749. info->rx_overflow = 1;
  750. info->icount.buf_overrun++;
  751. return;
  752. }
  753. if (eom) {
  754. /* end of frame, get FIFO count from RBCL register */
  755. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  756. fifo_count = 32;
  757. } else
  758. fifo_count = 32;
  759. do {
  760. if (fifo_count == 1) {
  761. read_count = 1;
  762. data[0] = read_reg(info, CHA + RXFIFO);
  763. } else {
  764. read_count = 2;
  765. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  766. }
  767. fifo_count -= read_count;
  768. if (!fifo_count && eom)
  769. buf->status = data[--read_count];
  770. for (i = 0; i < read_count; i++) {
  771. if (buf->count >= info->max_frame_size) {
  772. /* frame too large, reset receiver and reset current buffer */
  773. issue_command(info, CHA, CMD_RXRESET);
  774. buf->count = 0;
  775. return;
  776. }
  777. *(buf->data + buf->count) = data[i];
  778. buf->count++;
  779. }
  780. } while (fifo_count);
  781. if (eom) {
  782. info->pending_bh |= BH_RECEIVE;
  783. info->rx_frame_count++;
  784. info->rx_put++;
  785. if (info->rx_put >= info->rx_buf_count)
  786. info->rx_put = 0;
  787. }
  788. issue_command(info, CHA, CMD_RXFIFO);
  789. }
  790. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  791. {
  792. unsigned char data, status, flag;
  793. int fifo_count;
  794. int work = 0;
  795. struct tty_struct *tty = info->tty;
  796. struct mgsl_icount *icount = &info->icount;
  797. if (tcd) {
  798. /* early termination, get FIFO count from RBCL register */
  799. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  800. /* Zero fifo count could mean 0 or 32 bytes available.
  801. * If BIT5 of STAR is set then at least 1 byte is available.
  802. */
  803. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  804. fifo_count = 32;
  805. } else
  806. fifo_count = 32;
  807. tty_buffer_request_room(tty, fifo_count);
  808. /* Flush received async data to receive data buffer. */
  809. while (fifo_count) {
  810. data = read_reg(info, CHA + RXFIFO);
  811. status = read_reg(info, CHA + RXFIFO);
  812. fifo_count -= 2;
  813. icount->rx++;
  814. flag = TTY_NORMAL;
  815. // if no frameing/crc error then save data
  816. // BIT7:parity error
  817. // BIT6:framing error
  818. if (status & (BIT7 + BIT6)) {
  819. if (status & BIT7)
  820. icount->parity++;
  821. else
  822. icount->frame++;
  823. /* discard char if tty control flags say so */
  824. if (status & info->ignore_status_mask)
  825. continue;
  826. status &= info->read_status_mask;
  827. if (status & BIT7)
  828. flag = TTY_PARITY;
  829. else if (status & BIT6)
  830. flag = TTY_FRAME;
  831. }
  832. work += tty_insert_flip_char(tty, data, flag);
  833. }
  834. issue_command(info, CHA, CMD_RXFIFO);
  835. if (debug_level >= DEBUG_LEVEL_ISR) {
  836. printk("%s(%d):rx_ready_async",
  837. __FILE__,__LINE__);
  838. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  839. __FILE__,__LINE__,icount->rx,icount->brk,
  840. icount->parity,icount->frame,icount->overrun);
  841. }
  842. if (work)
  843. tty_flip_buffer_push(tty);
  844. }
  845. static void tx_done(MGSLPC_INFO *info)
  846. {
  847. if (!info->tx_active)
  848. return;
  849. info->tx_active = 0;
  850. info->tx_aborting = 0;
  851. if (info->params.mode == MGSL_MODE_ASYNC)
  852. return;
  853. info->tx_count = info->tx_put = info->tx_get = 0;
  854. del_timer(&info->tx_timer);
  855. if (info->drop_rts_on_tx_done) {
  856. get_signals(info);
  857. if (info->serial_signals & SerialSignal_RTS) {
  858. info->serial_signals &= ~SerialSignal_RTS;
  859. set_signals(info);
  860. }
  861. info->drop_rts_on_tx_done = 0;
  862. }
  863. #ifdef CONFIG_HDLC
  864. if (info->netcount)
  865. hdlcdev_tx_done(info);
  866. else
  867. #endif
  868. {
  869. if (info->tty->stopped || info->tty->hw_stopped) {
  870. tx_stop(info);
  871. return;
  872. }
  873. info->pending_bh |= BH_TRANSMIT;
  874. }
  875. }
  876. static void tx_ready(MGSLPC_INFO *info)
  877. {
  878. unsigned char fifo_count = 32;
  879. int c;
  880. if (debug_level >= DEBUG_LEVEL_ISR)
  881. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  882. if (info->params.mode == MGSL_MODE_HDLC) {
  883. if (!info->tx_active)
  884. return;
  885. } else {
  886. if (info->tty->stopped || info->tty->hw_stopped) {
  887. tx_stop(info);
  888. return;
  889. }
  890. if (!info->tx_count)
  891. info->tx_active = 0;
  892. }
  893. if (!info->tx_count)
  894. return;
  895. while (info->tx_count && fifo_count) {
  896. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  897. if (c == 1) {
  898. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  899. } else {
  900. write_reg16(info, CHA + TXFIFO,
  901. *((unsigned short*)(info->tx_buf + info->tx_get)));
  902. }
  903. info->tx_count -= c;
  904. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  905. fifo_count -= c;
  906. }
  907. if (info->params.mode == MGSL_MODE_ASYNC) {
  908. if (info->tx_count < WAKEUP_CHARS)
  909. info->pending_bh |= BH_TRANSMIT;
  910. issue_command(info, CHA, CMD_TXFIFO);
  911. } else {
  912. if (info->tx_count)
  913. issue_command(info, CHA, CMD_TXFIFO);
  914. else
  915. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  916. }
  917. }
  918. static void cts_change(MGSLPC_INFO *info)
  919. {
  920. get_signals(info);
  921. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  922. irq_disable(info, CHB, IRQ_CTS);
  923. info->icount.cts++;
  924. if (info->serial_signals & SerialSignal_CTS)
  925. info->input_signal_events.cts_up++;
  926. else
  927. info->input_signal_events.cts_down++;
  928. wake_up_interruptible(&info->status_event_wait_q);
  929. wake_up_interruptible(&info->event_wait_q);
  930. if (info->flags & ASYNC_CTS_FLOW) {
  931. if (info->tty->hw_stopped) {
  932. if (info->serial_signals & SerialSignal_CTS) {
  933. if (debug_level >= DEBUG_LEVEL_ISR)
  934. printk("CTS tx start...");
  935. if (info->tty)
  936. info->tty->hw_stopped = 0;
  937. tx_start(info);
  938. info->pending_bh |= BH_TRANSMIT;
  939. return;
  940. }
  941. } else {
  942. if (!(info->serial_signals & SerialSignal_CTS)) {
  943. if (debug_level >= DEBUG_LEVEL_ISR)
  944. printk("CTS tx stop...");
  945. if (info->tty)
  946. info->tty->hw_stopped = 1;
  947. tx_stop(info);
  948. }
  949. }
  950. }
  951. info->pending_bh |= BH_STATUS;
  952. }
  953. static void dcd_change(MGSLPC_INFO *info)
  954. {
  955. get_signals(info);
  956. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  957. irq_disable(info, CHB, IRQ_DCD);
  958. info->icount.dcd++;
  959. if (info->serial_signals & SerialSignal_DCD) {
  960. info->input_signal_events.dcd_up++;
  961. }
  962. else
  963. info->input_signal_events.dcd_down++;
  964. #ifdef CONFIG_HDLC
  965. if (info->netcount) {
  966. if (info->serial_signals & SerialSignal_DCD)
  967. netif_carrier_on(info->netdev);
  968. else
  969. netif_carrier_off(info->netdev);
  970. }
  971. #endif
  972. wake_up_interruptible(&info->status_event_wait_q);
  973. wake_up_interruptible(&info->event_wait_q);
  974. if (info->flags & ASYNC_CHECK_CD) {
  975. if (debug_level >= DEBUG_LEVEL_ISR)
  976. printk("%s CD now %s...", info->device_name,
  977. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  978. if (info->serial_signals & SerialSignal_DCD)
  979. wake_up_interruptible(&info->open_wait);
  980. else {
  981. if (debug_level >= DEBUG_LEVEL_ISR)
  982. printk("doing serial hangup...");
  983. if (info->tty)
  984. tty_hangup(info->tty);
  985. }
  986. }
  987. info->pending_bh |= BH_STATUS;
  988. }
  989. static void dsr_change(MGSLPC_INFO *info)
  990. {
  991. get_signals(info);
  992. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  993. port_irq_disable(info, PVR_DSR);
  994. info->icount.dsr++;
  995. if (info->serial_signals & SerialSignal_DSR)
  996. info->input_signal_events.dsr_up++;
  997. else
  998. info->input_signal_events.dsr_down++;
  999. wake_up_interruptible(&info->status_event_wait_q);
  1000. wake_up_interruptible(&info->event_wait_q);
  1001. info->pending_bh |= BH_STATUS;
  1002. }
  1003. static void ri_change(MGSLPC_INFO *info)
  1004. {
  1005. get_signals(info);
  1006. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1007. port_irq_disable(info, PVR_RI);
  1008. info->icount.rng++;
  1009. if (info->serial_signals & SerialSignal_RI)
  1010. info->input_signal_events.ri_up++;
  1011. else
  1012. info->input_signal_events.ri_down++;
  1013. wake_up_interruptible(&info->status_event_wait_q);
  1014. wake_up_interruptible(&info->event_wait_q);
  1015. info->pending_bh |= BH_STATUS;
  1016. }
  1017. /* Interrupt service routine entry point.
  1018. *
  1019. * Arguments:
  1020. *
  1021. * irq interrupt number that caused interrupt
  1022. * dev_id device ID supplied during interrupt registration
  1023. */
  1024. static irqreturn_t mgslpc_isr(int irq, void *dev_id)
  1025. {
  1026. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1027. unsigned short isr;
  1028. unsigned char gis, pis;
  1029. int count=0;
  1030. if (debug_level >= DEBUG_LEVEL_ISR)
  1031. printk("mgslpc_isr(%d) entry.\n", irq);
  1032. if (!info)
  1033. return IRQ_NONE;
  1034. if (!(info->p_dev->_locked))
  1035. return IRQ_HANDLED;
  1036. spin_lock(&info->lock);
  1037. while ((gis = read_reg(info, CHA + GIS))) {
  1038. if (debug_level >= DEBUG_LEVEL_ISR)
  1039. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1040. if ((gis & 0x70) || count > 1000) {
  1041. printk("synclink_cs:hardware failed or ejected\n");
  1042. break;
  1043. }
  1044. count++;
  1045. if (gis & (BIT1 + BIT0)) {
  1046. isr = read_reg16(info, CHB + ISR);
  1047. if (isr & IRQ_DCD)
  1048. dcd_change(info);
  1049. if (isr & IRQ_CTS)
  1050. cts_change(info);
  1051. }
  1052. if (gis & (BIT3 + BIT2))
  1053. {
  1054. isr = read_reg16(info, CHA + ISR);
  1055. if (isr & IRQ_TIMER) {
  1056. info->irq_occurred = 1;
  1057. irq_disable(info, CHA, IRQ_TIMER);
  1058. }
  1059. /* receive IRQs */
  1060. if (isr & IRQ_EXITHUNT) {
  1061. info->icount.exithunt++;
  1062. wake_up_interruptible(&info->event_wait_q);
  1063. }
  1064. if (isr & IRQ_BREAK_ON) {
  1065. info->icount.brk++;
  1066. if (info->flags & ASYNC_SAK)
  1067. do_SAK(info->tty);
  1068. }
  1069. if (isr & IRQ_RXTIME) {
  1070. issue_command(info, CHA, CMD_RXFIFO_READ);
  1071. }
  1072. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1073. if (info->params.mode == MGSL_MODE_HDLC)
  1074. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1075. else
  1076. rx_ready_async(info, isr & IRQ_RXEOM);
  1077. }
  1078. /* transmit IRQs */
  1079. if (isr & IRQ_UNDERRUN) {
  1080. if (info->tx_aborting)
  1081. info->icount.txabort++;
  1082. else
  1083. info->icount.txunder++;
  1084. tx_done(info);
  1085. }
  1086. else if (isr & IRQ_ALLSENT) {
  1087. info->icount.txok++;
  1088. tx_done(info);
  1089. }
  1090. else if (isr & IRQ_TXFIFO)
  1091. tx_ready(info);
  1092. }
  1093. if (gis & BIT7) {
  1094. pis = read_reg(info, CHA + PIS);
  1095. if (pis & BIT1)
  1096. dsr_change(info);
  1097. if (pis & BIT2)
  1098. ri_change(info);
  1099. }
  1100. }
  1101. /* Request bottom half processing if there's something
  1102. * for it to do and the bh is not already running
  1103. */
  1104. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1105. if ( debug_level >= DEBUG_LEVEL_ISR )
  1106. printk("%s(%d):%s queueing bh task.\n",
  1107. __FILE__,__LINE__,info->device_name);
  1108. schedule_work(&info->task);
  1109. info->bh_requested = 1;
  1110. }
  1111. spin_unlock(&info->lock);
  1112. if (debug_level >= DEBUG_LEVEL_ISR)
  1113. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1114. __FILE__,__LINE__,irq);
  1115. return IRQ_HANDLED;
  1116. }
  1117. /* Initialize and start device.
  1118. */
  1119. static int startup(MGSLPC_INFO * info)
  1120. {
  1121. int retval = 0;
  1122. if (debug_level >= DEBUG_LEVEL_INFO)
  1123. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1124. if (info->flags & ASYNC_INITIALIZED)
  1125. return 0;
  1126. if (!info->tx_buf) {
  1127. /* allocate a page of memory for a transmit buffer */
  1128. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1129. if (!info->tx_buf) {
  1130. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1131. __FILE__,__LINE__,info->device_name);
  1132. return -ENOMEM;
  1133. }
  1134. }
  1135. info->pending_bh = 0;
  1136. memset(&info->icount, 0, sizeof(info->icount));
  1137. init_timer(&info->tx_timer);
  1138. info->tx_timer.data = (unsigned long)info;
  1139. info->tx_timer.function = tx_timeout;
  1140. /* Allocate and claim adapter resources */
  1141. retval = claim_resources(info);
  1142. /* perform existance check and diagnostics */
  1143. if ( !retval )
  1144. retval = adapter_test(info);
  1145. if ( retval ) {
  1146. if (capable(CAP_SYS_ADMIN) && info->tty)
  1147. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1148. release_resources(info);
  1149. return retval;
  1150. }
  1151. /* program hardware for current parameters */
  1152. mgslpc_change_params(info);
  1153. if (info->tty)
  1154. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1155. info->flags |= ASYNC_INITIALIZED;
  1156. return 0;
  1157. }
  1158. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1159. */
  1160. static void shutdown(MGSLPC_INFO * info)
  1161. {
  1162. unsigned long flags;
  1163. if (!(info->flags & ASYNC_INITIALIZED))
  1164. return;
  1165. if (debug_level >= DEBUG_LEVEL_INFO)
  1166. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1167. __FILE__,__LINE__, info->device_name );
  1168. /* clear status wait queue because status changes */
  1169. /* can't happen after shutting down the hardware */
  1170. wake_up_interruptible(&info->status_event_wait_q);
  1171. wake_up_interruptible(&info->event_wait_q);
  1172. del_timer(&info->tx_timer);
  1173. if (info->tx_buf) {
  1174. free_page((unsigned long) info->tx_buf);
  1175. info->tx_buf = NULL;
  1176. }
  1177. spin_lock_irqsave(&info->lock,flags);
  1178. rx_stop(info);
  1179. tx_stop(info);
  1180. /* TODO:disable interrupts instead of reset to preserve signal states */
  1181. reset_device(info);
  1182. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1183. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1184. set_signals(info);
  1185. }
  1186. spin_unlock_irqrestore(&info->lock,flags);
  1187. release_resources(info);
  1188. if (info->tty)
  1189. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1190. info->flags &= ~ASYNC_INITIALIZED;
  1191. }
  1192. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1193. {
  1194. unsigned long flags;
  1195. spin_lock_irqsave(&info->lock,flags);
  1196. rx_stop(info);
  1197. tx_stop(info);
  1198. info->tx_count = info->tx_put = info->tx_get = 0;
  1199. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1200. hdlc_mode(info);
  1201. else
  1202. async_mode(info);
  1203. set_signals(info);
  1204. info->dcd_chkcount = 0;
  1205. info->cts_chkcount = 0;
  1206. info->ri_chkcount = 0;
  1207. info->dsr_chkcount = 0;
  1208. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1209. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1210. get_signals(info);
  1211. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1212. rx_start(info);
  1213. spin_unlock_irqrestore(&info->lock,flags);
  1214. }
  1215. /* Reconfigure adapter based on new parameters
  1216. */
  1217. static void mgslpc_change_params(MGSLPC_INFO *info)
  1218. {
  1219. unsigned cflag;
  1220. int bits_per_char;
  1221. if (!info->tty || !info->tty->termios)
  1222. return;
  1223. if (debug_level >= DEBUG_LEVEL_INFO)
  1224. printk("%s(%d):mgslpc_change_params(%s)\n",
  1225. __FILE__,__LINE__, info->device_name );
  1226. cflag = info->tty->termios->c_cflag;
  1227. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1228. /* otherwise assert DTR and RTS */
  1229. if (cflag & CBAUD)
  1230. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1231. else
  1232. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1233. /* byte size and parity */
  1234. switch (cflag & CSIZE) {
  1235. case CS5: info->params.data_bits = 5; break;
  1236. case CS6: info->params.data_bits = 6; break;
  1237. case CS7: info->params.data_bits = 7; break;
  1238. case CS8: info->params.data_bits = 8; break;
  1239. default: info->params.data_bits = 7; break;
  1240. }
  1241. if (cflag & CSTOPB)
  1242. info->params.stop_bits = 2;
  1243. else
  1244. info->params.stop_bits = 1;
  1245. info->params.parity = ASYNC_PARITY_NONE;
  1246. if (cflag & PARENB) {
  1247. if (cflag & PARODD)
  1248. info->params.parity = ASYNC_PARITY_ODD;
  1249. else
  1250. info->params.parity = ASYNC_PARITY_EVEN;
  1251. #ifdef CMSPAR
  1252. if (cflag & CMSPAR)
  1253. info->params.parity = ASYNC_PARITY_SPACE;
  1254. #endif
  1255. }
  1256. /* calculate number of jiffies to transmit a full
  1257. * FIFO (32 bytes) at specified data rate
  1258. */
  1259. bits_per_char = info->params.data_bits +
  1260. info->params.stop_bits + 1;
  1261. /* if port data rate is set to 460800 or less then
  1262. * allow tty settings to override, otherwise keep the
  1263. * current data rate.
  1264. */
  1265. if (info->params.data_rate <= 460800) {
  1266. info->params.data_rate = tty_get_baud_rate(info->tty);
  1267. }
  1268. if ( info->params.data_rate ) {
  1269. info->timeout = (32*HZ*bits_per_char) /
  1270. info->params.data_rate;
  1271. }
  1272. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1273. if (cflag & CRTSCTS)
  1274. info->flags |= ASYNC_CTS_FLOW;
  1275. else
  1276. info->flags &= ~ASYNC_CTS_FLOW;
  1277. if (cflag & CLOCAL)
  1278. info->flags &= ~ASYNC_CHECK_CD;
  1279. else
  1280. info->flags |= ASYNC_CHECK_CD;
  1281. /* process tty input control flags */
  1282. info->read_status_mask = 0;
  1283. if (I_INPCK(info->tty))
  1284. info->read_status_mask |= BIT7 | BIT6;
  1285. if (I_IGNPAR(info->tty))
  1286. info->ignore_status_mask |= BIT7 | BIT6;
  1287. mgslpc_program_hw(info);
  1288. }
  1289. /* Add a character to the transmit buffer
  1290. */
  1291. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1292. {
  1293. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1294. unsigned long flags;
  1295. if (debug_level >= DEBUG_LEVEL_INFO) {
  1296. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1297. __FILE__,__LINE__,ch,info->device_name);
  1298. }
  1299. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1300. return;
  1301. if (!info->tx_buf)
  1302. return;
  1303. spin_lock_irqsave(&info->lock,flags);
  1304. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1305. if (info->tx_count < TXBUFSIZE - 1) {
  1306. info->tx_buf[info->tx_put++] = ch;
  1307. info->tx_put &= TXBUFSIZE-1;
  1308. info->tx_count++;
  1309. }
  1310. }
  1311. spin_unlock_irqrestore(&info->lock,flags);
  1312. }
  1313. /* Enable transmitter so remaining characters in the
  1314. * transmit buffer are sent.
  1315. */
  1316. static void mgslpc_flush_chars(struct tty_struct *tty)
  1317. {
  1318. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1319. unsigned long flags;
  1320. if (debug_level >= DEBUG_LEVEL_INFO)
  1321. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1322. __FILE__,__LINE__,info->device_name,info->tx_count);
  1323. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1324. return;
  1325. if (info->tx_count <= 0 || tty->stopped ||
  1326. tty->hw_stopped || !info->tx_buf)
  1327. return;
  1328. if (debug_level >= DEBUG_LEVEL_INFO)
  1329. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1330. __FILE__,__LINE__,info->device_name);
  1331. spin_lock_irqsave(&info->lock,flags);
  1332. if (!info->tx_active)
  1333. tx_start(info);
  1334. spin_unlock_irqrestore(&info->lock,flags);
  1335. }
  1336. /* Send a block of data
  1337. *
  1338. * Arguments:
  1339. *
  1340. * tty pointer to tty information structure
  1341. * buf pointer to buffer containing send data
  1342. * count size of send data in bytes
  1343. *
  1344. * Returns: number of characters written
  1345. */
  1346. static int mgslpc_write(struct tty_struct * tty,
  1347. const unsigned char *buf, int count)
  1348. {
  1349. int c, ret = 0;
  1350. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1351. unsigned long flags;
  1352. if (debug_level >= DEBUG_LEVEL_INFO)
  1353. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1354. __FILE__,__LINE__,info->device_name,count);
  1355. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1356. !info->tx_buf)
  1357. goto cleanup;
  1358. if (info->params.mode == MGSL_MODE_HDLC) {
  1359. if (count > TXBUFSIZE) {
  1360. ret = -EIO;
  1361. goto cleanup;
  1362. }
  1363. if (info->tx_active)
  1364. goto cleanup;
  1365. else if (info->tx_count)
  1366. goto start;
  1367. }
  1368. for (;;) {
  1369. c = min(count,
  1370. min(TXBUFSIZE - info->tx_count - 1,
  1371. TXBUFSIZE - info->tx_put));
  1372. if (c <= 0)
  1373. break;
  1374. memcpy(info->tx_buf + info->tx_put, buf, c);
  1375. spin_lock_irqsave(&info->lock,flags);
  1376. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1377. info->tx_count += c;
  1378. spin_unlock_irqrestore(&info->lock,flags);
  1379. buf += c;
  1380. count -= c;
  1381. ret += c;
  1382. }
  1383. start:
  1384. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1385. spin_lock_irqsave(&info->lock,flags);
  1386. if (!info->tx_active)
  1387. tx_start(info);
  1388. spin_unlock_irqrestore(&info->lock,flags);
  1389. }
  1390. cleanup:
  1391. if (debug_level >= DEBUG_LEVEL_INFO)
  1392. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1393. __FILE__,__LINE__,info->device_name,ret);
  1394. return ret;
  1395. }
  1396. /* Return the count of free bytes in transmit buffer
  1397. */
  1398. static int mgslpc_write_room(struct tty_struct *tty)
  1399. {
  1400. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1401. int ret;
  1402. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1403. return 0;
  1404. if (info->params.mode == MGSL_MODE_HDLC) {
  1405. /* HDLC (frame oriented) mode */
  1406. if (info->tx_active)
  1407. return 0;
  1408. else
  1409. return HDLC_MAX_FRAME_SIZE;
  1410. } else {
  1411. ret = TXBUFSIZE - info->tx_count - 1;
  1412. if (ret < 0)
  1413. ret = 0;
  1414. }
  1415. if (debug_level >= DEBUG_LEVEL_INFO)
  1416. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1417. __FILE__,__LINE__, info->device_name, ret);
  1418. return ret;
  1419. }
  1420. /* Return the count of bytes in transmit buffer
  1421. */
  1422. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1423. {
  1424. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1425. int rc;
  1426. if (debug_level >= DEBUG_LEVEL_INFO)
  1427. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1428. __FILE__,__LINE__, info->device_name );
  1429. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1430. return 0;
  1431. if (info->params.mode == MGSL_MODE_HDLC)
  1432. rc = info->tx_active ? info->max_frame_size : 0;
  1433. else
  1434. rc = info->tx_count;
  1435. if (debug_level >= DEBUG_LEVEL_INFO)
  1436. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1437. __FILE__,__LINE__, info->device_name, rc);
  1438. return rc;
  1439. }
  1440. /* Discard all data in the send buffer
  1441. */
  1442. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1443. {
  1444. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1445. unsigned long flags;
  1446. if (debug_level >= DEBUG_LEVEL_INFO)
  1447. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1448. __FILE__,__LINE__, info->device_name );
  1449. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1450. return;
  1451. spin_lock_irqsave(&info->lock,flags);
  1452. info->tx_count = info->tx_put = info->tx_get = 0;
  1453. del_timer(&info->tx_timer);
  1454. spin_unlock_irqrestore(&info->lock,flags);
  1455. wake_up_interruptible(&tty->write_wait);
  1456. tty_wakeup(tty);
  1457. }
  1458. /* Send a high-priority XON/XOFF character
  1459. */
  1460. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1461. {
  1462. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1463. unsigned long flags;
  1464. if (debug_level >= DEBUG_LEVEL_INFO)
  1465. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1466. __FILE__,__LINE__, info->device_name, ch );
  1467. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1468. return;
  1469. info->x_char = ch;
  1470. if (ch) {
  1471. spin_lock_irqsave(&info->lock,flags);
  1472. if (!info->tx_enabled)
  1473. tx_start(info);
  1474. spin_unlock_irqrestore(&info->lock,flags);
  1475. }
  1476. }
  1477. /* Signal remote device to throttle send data (our receive data)
  1478. */
  1479. static void mgslpc_throttle(struct tty_struct * tty)
  1480. {
  1481. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1482. unsigned long flags;
  1483. if (debug_level >= DEBUG_LEVEL_INFO)
  1484. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1485. __FILE__,__LINE__, info->device_name );
  1486. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1487. return;
  1488. if (I_IXOFF(tty))
  1489. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1490. if (tty->termios->c_cflag & CRTSCTS) {
  1491. spin_lock_irqsave(&info->lock,flags);
  1492. info->serial_signals &= ~SerialSignal_RTS;
  1493. set_signals(info);
  1494. spin_unlock_irqrestore(&info->lock,flags);
  1495. }
  1496. }
  1497. /* Signal remote device to stop throttling send data (our receive data)
  1498. */
  1499. static void mgslpc_unthrottle(struct tty_struct * tty)
  1500. {
  1501. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1502. unsigned long flags;
  1503. if (debug_level >= DEBUG_LEVEL_INFO)
  1504. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1505. __FILE__,__LINE__, info->device_name );
  1506. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1507. return;
  1508. if (I_IXOFF(tty)) {
  1509. if (info->x_char)
  1510. info->x_char = 0;
  1511. else
  1512. mgslpc_send_xchar(tty, START_CHAR(tty));
  1513. }
  1514. if (tty->termios->c_cflag & CRTSCTS) {
  1515. spin_lock_irqsave(&info->lock,flags);
  1516. info->serial_signals |= SerialSignal_RTS;
  1517. set_signals(info);
  1518. spin_unlock_irqrestore(&info->lock,flags);
  1519. }
  1520. }
  1521. /* get the current serial statistics
  1522. */
  1523. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1524. {
  1525. int err;
  1526. if (debug_level >= DEBUG_LEVEL_INFO)
  1527. printk("get_params(%s)\n", info->device_name);
  1528. if (!user_icount) {
  1529. memset(&info->icount, 0, sizeof(info->icount));
  1530. } else {
  1531. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1532. if (err)
  1533. return -EFAULT;
  1534. }
  1535. return 0;
  1536. }
  1537. /* get the current serial parameters
  1538. */
  1539. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1540. {
  1541. int err;
  1542. if (debug_level >= DEBUG_LEVEL_INFO)
  1543. printk("get_params(%s)\n", info->device_name);
  1544. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1545. if (err)
  1546. return -EFAULT;
  1547. return 0;
  1548. }
  1549. /* set the serial parameters
  1550. *
  1551. * Arguments:
  1552. *
  1553. * info pointer to device instance data
  1554. * new_params user buffer containing new serial params
  1555. *
  1556. * Returns: 0 if success, otherwise error code
  1557. */
  1558. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1559. {
  1560. unsigned long flags;
  1561. MGSL_PARAMS tmp_params;
  1562. int err;
  1563. if (debug_level >= DEBUG_LEVEL_INFO)
  1564. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1565. info->device_name );
  1566. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1567. if (err) {
  1568. if ( debug_level >= DEBUG_LEVEL_INFO )
  1569. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1570. __FILE__,__LINE__,info->device_name);
  1571. return -EFAULT;
  1572. }
  1573. spin_lock_irqsave(&info->lock,flags);
  1574. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1575. spin_unlock_irqrestore(&info->lock,flags);
  1576. mgslpc_change_params(info);
  1577. return 0;
  1578. }
  1579. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1580. {
  1581. int err;
  1582. if (debug_level >= DEBUG_LEVEL_INFO)
  1583. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1584. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1585. if (err)
  1586. return -EFAULT;
  1587. return 0;
  1588. }
  1589. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1590. {
  1591. unsigned long flags;
  1592. if (debug_level >= DEBUG_LEVEL_INFO)
  1593. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1594. spin_lock_irqsave(&info->lock,flags);
  1595. info->idle_mode = idle_mode;
  1596. tx_set_idle(info);
  1597. spin_unlock_irqrestore(&info->lock,flags);
  1598. return 0;
  1599. }
  1600. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1601. {
  1602. int err;
  1603. if (debug_level >= DEBUG_LEVEL_INFO)
  1604. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1605. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1606. if (err)
  1607. return -EFAULT;
  1608. return 0;
  1609. }
  1610. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1611. {
  1612. unsigned long flags;
  1613. unsigned char val;
  1614. if (debug_level >= DEBUG_LEVEL_INFO)
  1615. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1616. spin_lock_irqsave(&info->lock,flags);
  1617. info->if_mode = if_mode;
  1618. val = read_reg(info, PVR) & 0x0f;
  1619. switch (info->if_mode)
  1620. {
  1621. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1622. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1623. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1624. }
  1625. write_reg(info, PVR, val);
  1626. spin_unlock_irqrestore(&info->lock,flags);
  1627. return 0;
  1628. }
  1629. static int set_txenable(MGSLPC_INFO * info, int enable)
  1630. {
  1631. unsigned long flags;
  1632. if (debug_level >= DEBUG_LEVEL_INFO)
  1633. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1634. spin_lock_irqsave(&info->lock,flags);
  1635. if (enable) {
  1636. if (!info->tx_enabled)
  1637. tx_start(info);
  1638. } else {
  1639. if (info->tx_enabled)
  1640. tx_stop(info);
  1641. }
  1642. spin_unlock_irqrestore(&info->lock,flags);
  1643. return 0;
  1644. }
  1645. static int tx_abort(MGSLPC_INFO * info)
  1646. {
  1647. unsigned long flags;
  1648. if (debug_level >= DEBUG_LEVEL_INFO)
  1649. printk("tx_abort(%s)\n", info->device_name);
  1650. spin_lock_irqsave(&info->lock,flags);
  1651. if (info->tx_active && info->tx_count &&
  1652. info->params.mode == MGSL_MODE_HDLC) {
  1653. /* clear data count so FIFO is not filled on next IRQ.
  1654. * This results in underrun and abort transmission.
  1655. */
  1656. info->tx_count = info->tx_put = info->tx_get = 0;
  1657. info->tx_aborting = TRUE;
  1658. }
  1659. spin_unlock_irqrestore(&info->lock,flags);
  1660. return 0;
  1661. }
  1662. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1663. {
  1664. unsigned long flags;
  1665. if (debug_level >= DEBUG_LEVEL_INFO)
  1666. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1667. spin_lock_irqsave(&info->lock,flags);
  1668. if (enable) {
  1669. if (!info->rx_enabled)
  1670. rx_start(info);
  1671. } else {
  1672. if (info->rx_enabled)
  1673. rx_stop(info);
  1674. }
  1675. spin_unlock_irqrestore(&info->lock,flags);
  1676. return 0;
  1677. }
  1678. /* wait for specified event to occur
  1679. *
  1680. * Arguments: info pointer to device instance data
  1681. * mask pointer to bitmask of events to wait for
  1682. * Return Value: 0 if successful and bit mask updated with
  1683. * of events triggerred,
  1684. * otherwise error code
  1685. */
  1686. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1687. {
  1688. unsigned long flags;
  1689. int s;
  1690. int rc=0;
  1691. struct mgsl_icount cprev, cnow;
  1692. int events;
  1693. int mask;
  1694. struct _input_signal_events oldsigs, newsigs;
  1695. DECLARE_WAITQUEUE(wait, current);
  1696. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1697. if (rc)
  1698. return -EFAULT;
  1699. if (debug_level >= DEBUG_LEVEL_INFO)
  1700. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1701. spin_lock_irqsave(&info->lock,flags);
  1702. /* return immediately if state matches requested events */
  1703. get_signals(info);
  1704. s = info->serial_signals;
  1705. events = mask &
  1706. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1707. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1708. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1709. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1710. if (events) {
  1711. spin_unlock_irqrestore(&info->lock,flags);
  1712. goto exit;
  1713. }
  1714. /* save current irq counts */
  1715. cprev = info->icount;
  1716. oldsigs = info->input_signal_events;
  1717. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1718. (mask & MgslEvent_ExitHuntMode))
  1719. irq_enable(info, CHA, IRQ_EXITHUNT);
  1720. set_current_state(TASK_INTERRUPTIBLE);
  1721. add_wait_queue(&info->event_wait_q, &wait);
  1722. spin_unlock_irqrestore(&info->lock,flags);
  1723. for(;;) {
  1724. schedule();
  1725. if (signal_pending(current)) {
  1726. rc = -ERESTARTSYS;
  1727. break;
  1728. }
  1729. /* get current irq counts */
  1730. spin_lock_irqsave(&info->lock,flags);
  1731. cnow = info->icount;
  1732. newsigs = info->input_signal_events;
  1733. set_current_state(TASK_INTERRUPTIBLE);
  1734. spin_unlock_irqrestore(&info->lock,flags);
  1735. /* if no change, wait aborted for some reason */
  1736. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1737. newsigs.dsr_down == oldsigs.dsr_down &&
  1738. newsigs.dcd_up == oldsigs.dcd_up &&
  1739. newsigs.dcd_down == oldsigs.dcd_down &&
  1740. newsigs.cts_up == oldsigs.cts_up &&
  1741. newsigs.cts_down == oldsigs.cts_down &&
  1742. newsigs.ri_up == oldsigs.ri_up &&
  1743. newsigs.ri_down == oldsigs.ri_down &&
  1744. cnow.exithunt == cprev.exithunt &&
  1745. cnow.rxidle == cprev.rxidle) {
  1746. rc = -EIO;
  1747. break;
  1748. }
  1749. events = mask &
  1750. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1751. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1752. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1753. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1754. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1755. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1756. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1757. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1758. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1759. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1760. if (events)
  1761. break;
  1762. cprev = cnow;
  1763. oldsigs = newsigs;
  1764. }
  1765. remove_wait_queue(&info->event_wait_q, &wait);
  1766. set_current_state(TASK_RUNNING);
  1767. if (mask & MgslEvent_ExitHuntMode) {
  1768. spin_lock_irqsave(&info->lock,flags);
  1769. if (!waitqueue_active(&info->event_wait_q))
  1770. irq_disable(info, CHA, IRQ_EXITHUNT);
  1771. spin_unlock_irqrestore(&info->lock,flags);
  1772. }
  1773. exit:
  1774. if (rc == 0)
  1775. PUT_USER(rc, events, mask_ptr);
  1776. return rc;
  1777. }
  1778. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1779. {
  1780. unsigned long flags;
  1781. int rc;
  1782. struct mgsl_icount cprev, cnow;
  1783. DECLARE_WAITQUEUE(wait, current);
  1784. /* save current irq counts */
  1785. spin_lock_irqsave(&info->lock,flags);
  1786. cprev = info->icount;
  1787. add_wait_queue(&info->status_event_wait_q, &wait);
  1788. set_current_state(TASK_INTERRUPTIBLE);
  1789. spin_unlock_irqrestore(&info->lock,flags);
  1790. for(;;) {
  1791. schedule();
  1792. if (signal_pending(current)) {
  1793. rc = -ERESTARTSYS;
  1794. break;
  1795. }
  1796. /* get new irq counts */
  1797. spin_lock_irqsave(&info->lock,flags);
  1798. cnow = info->icount;
  1799. set_current_state(TASK_INTERRUPTIBLE);
  1800. spin_unlock_irqrestore(&info->lock,flags);
  1801. /* if no change, wait aborted for some reason */
  1802. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1803. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1804. rc = -EIO;
  1805. break;
  1806. }
  1807. /* check for change in caller specified modem input */
  1808. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1809. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1810. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1811. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1812. rc = 0;
  1813. break;
  1814. }
  1815. cprev = cnow;
  1816. }
  1817. remove_wait_queue(&info->status_event_wait_q, &wait);
  1818. set_current_state(TASK_RUNNING);
  1819. return rc;
  1820. }
  1821. /* return the state of the serial control and status signals
  1822. */
  1823. static int tiocmget(struct tty_struct *tty, struct file *file)
  1824. {
  1825. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1826. unsigned int result;
  1827. unsigned long flags;
  1828. spin_lock_irqsave(&info->lock,flags);
  1829. get_signals(info);
  1830. spin_unlock_irqrestore(&info->lock,flags);
  1831. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1832. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1833. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1834. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1835. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1836. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1837. if (debug_level >= DEBUG_LEVEL_INFO)
  1838. printk("%s(%d):%s tiocmget() value=%08X\n",
  1839. __FILE__,__LINE__, info->device_name, result );
  1840. return result;
  1841. }
  1842. /* set modem control signals (DTR/RTS)
  1843. */
  1844. static int tiocmset(struct tty_struct *tty, struct file *file,
  1845. unsigned int set, unsigned int clear)
  1846. {
  1847. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1848. unsigned long flags;
  1849. if (debug_level >= DEBUG_LEVEL_INFO)
  1850. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1851. __FILE__,__LINE__,info->device_name, set, clear);
  1852. if (set & TIOCM_RTS)
  1853. info->serial_signals |= SerialSignal_RTS;
  1854. if (set & TIOCM_DTR)
  1855. info->serial_signals |= SerialSignal_DTR;
  1856. if (clear & TIOCM_RTS)
  1857. info->serial_signals &= ~SerialSignal_RTS;
  1858. if (clear & TIOCM_DTR)
  1859. info->serial_signals &= ~SerialSignal_DTR;
  1860. spin_lock_irqsave(&info->lock,flags);
  1861. set_signals(info);
  1862. spin_unlock_irqrestore(&info->lock,flags);
  1863. return 0;
  1864. }
  1865. /* Set or clear transmit break condition
  1866. *
  1867. * Arguments: tty pointer to tty instance data
  1868. * break_state -1=set break condition, 0=clear
  1869. */
  1870. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1871. {
  1872. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1873. unsigned long flags;
  1874. if (debug_level >= DEBUG_LEVEL_INFO)
  1875. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1876. __FILE__,__LINE__, info->device_name, break_state);
  1877. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1878. return;
  1879. spin_lock_irqsave(&info->lock,flags);
  1880. if (break_state == -1)
  1881. set_reg_bits(info, CHA+DAFO, BIT6);
  1882. else
  1883. clear_reg_bits(info, CHA+DAFO, BIT6);
  1884. spin_unlock_irqrestore(&info->lock,flags);
  1885. }
  1886. /* Service an IOCTL request
  1887. *
  1888. * Arguments:
  1889. *
  1890. * tty pointer to tty instance data
  1891. * file pointer to associated file object for device
  1892. * cmd IOCTL command code
  1893. * arg command argument/context
  1894. *
  1895. * Return Value: 0 if success, otherwise error code
  1896. */
  1897. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1898. unsigned int cmd, unsigned long arg)
  1899. {
  1900. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1901. if (debug_level >= DEBUG_LEVEL_INFO)
  1902. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1903. info->device_name, cmd );
  1904. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1905. return -ENODEV;
  1906. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1907. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1908. if (tty->flags & (1 << TTY_IO_ERROR))
  1909. return -EIO;
  1910. }
  1911. return ioctl_common(info, cmd, arg);
  1912. }
  1913. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1914. {
  1915. int error;
  1916. struct mgsl_icount cnow; /* kernel counter temps */
  1917. struct serial_icounter_struct __user *p_cuser; /* user space */
  1918. void __user *argp = (void __user *)arg;
  1919. unsigned long flags;
  1920. switch (cmd) {
  1921. case MGSL_IOCGPARAMS:
  1922. return get_params(info, argp);
  1923. case MGSL_IOCSPARAMS:
  1924. return set_params(info, argp);
  1925. case MGSL_IOCGTXIDLE:
  1926. return get_txidle(info, argp);
  1927. case MGSL_IOCSTXIDLE:
  1928. return set_txidle(info, (int)arg);
  1929. case MGSL_IOCGIF:
  1930. return get_interface(info, argp);
  1931. case MGSL_IOCSIF:
  1932. return set_interface(info,(int)arg);
  1933. case MGSL_IOCTXENABLE:
  1934. return set_txenable(info,(int)arg);
  1935. case MGSL_IOCRXENABLE:
  1936. return set_rxenable(info,(int)arg);
  1937. case MGSL_IOCTXABORT:
  1938. return tx_abort(info);
  1939. case MGSL_IOCGSTATS:
  1940. return get_stats(info, argp);
  1941. case MGSL_IOCWAITEVENT:
  1942. return wait_events(info, argp);
  1943. case TIOCMIWAIT:
  1944. return modem_input_wait(info,(int)arg);
  1945. case TIOCGICOUNT:
  1946. spin_lock_irqsave(&info->lock,flags);
  1947. cnow = info->icount;
  1948. spin_unlock_irqrestore(&info->lock,flags);
  1949. p_cuser = argp;
  1950. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1951. if (error) return error;
  1952. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1953. if (error) return error;
  1954. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1955. if (error) return error;
  1956. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1957. if (error) return error;
  1958. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1959. if (error) return error;
  1960. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1961. if (error) return error;
  1962. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1963. if (error) return error;
  1964. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1965. if (error) return error;
  1966. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1967. if (error) return error;
  1968. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1969. if (error) return error;
  1970. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1971. if (error) return error;
  1972. return 0;
  1973. default:
  1974. return -ENOIOCTLCMD;
  1975. }
  1976. return 0;
  1977. }
  1978. /* Set new termios settings
  1979. *
  1980. * Arguments:
  1981. *
  1982. * tty pointer to tty structure
  1983. * termios pointer to buffer to hold returned old termios
  1984. */
  1985. static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
  1986. {
  1987. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1988. unsigned long flags;
  1989. if (debug_level >= DEBUG_LEVEL_INFO)
  1990. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1991. tty->driver->name );
  1992. /* just return if nothing has changed */
  1993. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1994. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1995. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1996. return;
  1997. mgslpc_change_params(info);
  1998. /* Handle transition to B0 status */
  1999. if (old_termios->c_cflag & CBAUD &&
  2000. !(tty->termios->c_cflag & CBAUD)) {
  2001. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  2002. spin_lock_irqsave(&info->lock,flags);
  2003. set_signals(info);
  2004. spin_unlock_irqrestore(&info->lock,flags);
  2005. }
  2006. /* Handle transition away from B0 status */
  2007. if (!(old_termios->c_cflag & CBAUD) &&
  2008. tty->termios->c_cflag & CBAUD) {
  2009. info->serial_signals |= SerialSignal_DTR;
  2010. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2011. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2012. info->serial_signals |= SerialSignal_RTS;
  2013. }
  2014. spin_lock_irqsave(&info->lock,flags);
  2015. set_signals(info);
  2016. spin_unlock_irqrestore(&info->lock,flags);
  2017. }
  2018. /* Handle turning off CRTSCTS */
  2019. if (old_termios->c_cflag & CRTSCTS &&
  2020. !(tty->termios->c_cflag & CRTSCTS)) {
  2021. tty->hw_stopped = 0;
  2022. tx_release(tty);
  2023. }
  2024. }
  2025. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2026. {
  2027. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2028. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2029. return;
  2030. if (debug_level >= DEBUG_LEVEL_INFO)
  2031. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2032. __FILE__,__LINE__, info->device_name, info->count);
  2033. if (!info->count)
  2034. return;
  2035. if (tty_hung_up_p(filp))
  2036. goto cleanup;
  2037. if ((tty->count == 1) && (info->count != 1)) {
  2038. /*
  2039. * tty->count is 1 and the tty structure will be freed.
  2040. * info->count should be one in this case.
  2041. * if it's not, correct it so that the port is shutdown.
  2042. */
  2043. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2044. "info->count is %d\n", info->count);
  2045. info->count = 1;
  2046. }
  2047. info->count--;
  2048. /* if at least one open remaining, leave hardware active */
  2049. if (info->count)
  2050. goto cleanup;
  2051. info->flags |= ASYNC_CLOSING;
  2052. /* set tty->closing to notify line discipline to
  2053. * only process XON/XOFF characters. Only the N_TTY
  2054. * discipline appears to use this (ppp does not).
  2055. */
  2056. tty->closing = 1;
  2057. /* wait for transmit data to clear all layers */
  2058. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2059. if (debug_level >= DEBUG_LEVEL_INFO)
  2060. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2061. __FILE__,__LINE__, info->device_name );
  2062. tty_wait_until_sent(tty, info->closing_wait);
  2063. }
  2064. if (info->flags & ASYNC_INITIALIZED)
  2065. mgslpc_wait_until_sent(tty, info->timeout);
  2066. if (tty->driver->flush_buffer)
  2067. tty->driver->flush_buffer(tty);
  2068. ldisc_flush_buffer(tty);
  2069. shutdown(info);
  2070. tty->closing = 0;
  2071. info->tty = NULL;
  2072. if (info->blocked_open) {
  2073. if (info->close_delay) {
  2074. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2075. }
  2076. wake_up_interruptible(&info->open_wait);
  2077. }
  2078. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2079. wake_up_interruptible(&info->close_wait);
  2080. cleanup:
  2081. if (debug_level >= DEBUG_LEVEL_INFO)
  2082. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2083. tty->driver->name, info->count);
  2084. }
  2085. /* Wait until the transmitter is empty.
  2086. */
  2087. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2088. {
  2089. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2090. unsigned long orig_jiffies, char_time;
  2091. if (!info )
  2092. return;
  2093. if (debug_level >= DEBUG_LEVEL_INFO)
  2094. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2095. __FILE__,__LINE__, info->device_name );
  2096. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2097. return;
  2098. if (!(info->flags & ASYNC_INITIALIZED))
  2099. goto exit;
  2100. orig_jiffies = jiffies;
  2101. /* Set check interval to 1/5 of estimated time to
  2102. * send a character, and make it at least 1. The check
  2103. * interval should also be less than the timeout.
  2104. * Note: use tight timings here to satisfy the NIST-PCTS.
  2105. */
  2106. if ( info->params.data_rate ) {
  2107. char_time = info->timeout/(32 * 5);
  2108. if (!char_time)
  2109. char_time++;
  2110. } else
  2111. char_time = 1;
  2112. if (timeout)
  2113. char_time = min_t(unsigned long, char_time, timeout);
  2114. if (info->params.mode == MGSL_MODE_HDLC) {
  2115. while (info->tx_active) {
  2116. msleep_interruptible(jiffies_to_msecs(char_time));
  2117. if (signal_pending(current))
  2118. break;
  2119. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2120. break;
  2121. }
  2122. } else {
  2123. while ((info->tx_count || info->tx_active) &&
  2124. info->tx_enabled) {
  2125. msleep_interruptible(jiffies_to_msecs(char_time));
  2126. if (signal_pending(current))
  2127. break;
  2128. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2129. break;
  2130. }
  2131. }
  2132. exit:
  2133. if (debug_level >= DEBUG_LEVEL_INFO)
  2134. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2135. __FILE__,__LINE__, info->device_name );
  2136. }
  2137. /* Called by tty_hangup() when a hangup is signaled.
  2138. * This is the same as closing all open files for the port.
  2139. */
  2140. static void mgslpc_hangup(struct tty_struct *tty)
  2141. {
  2142. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2143. if (debug_level >= DEBUG_LEVEL_INFO)
  2144. printk("%s(%d):mgslpc_hangup(%s)\n",
  2145. __FILE__,__LINE__, info->device_name );
  2146. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2147. return;
  2148. mgslpc_flush_buffer(tty);
  2149. shutdown(info);
  2150. info->count = 0;
  2151. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2152. info->tty = NULL;
  2153. wake_up_interruptible(&info->open_wait);
  2154. }
  2155. /* Block the current process until the specified port
  2156. * is ready to be opened.
  2157. */
  2158. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2159. MGSLPC_INFO *info)
  2160. {
  2161. DECLARE_WAITQUEUE(wait, current);
  2162. int retval;
  2163. int do_clocal = 0, extra_count = 0;
  2164. unsigned long flags;
  2165. if (debug_level >= DEBUG_LEVEL_INFO)
  2166. printk("%s(%d):block_til_ready on %s\n",
  2167. __FILE__,__LINE__, tty->driver->name );
  2168. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2169. /* nonblock mode is set or port is not enabled */
  2170. /* just verify that callout device is not active */
  2171. info->flags |= ASYNC_NORMAL_ACTIVE;
  2172. return 0;
  2173. }
  2174. if (tty->termios->c_cflag & CLOCAL)
  2175. do_clocal = 1;
  2176. /* Wait for carrier detect and the line to become
  2177. * free (i.e., not in use by the callout). While we are in
  2178. * this loop, info->count is dropped by one, so that
  2179. * mgslpc_close() knows when to free things. We restore it upon
  2180. * exit, either normal or abnormal.
  2181. */
  2182. retval = 0;
  2183. add_wait_queue(&info->open_wait, &wait);
  2184. if (debug_level >= DEBUG_LEVEL_INFO)
  2185. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2186. __FILE__,__LINE__, tty->driver->name, info->count );
  2187. spin_lock_irqsave(&info->lock, flags);
  2188. if (!tty_hung_up_p(filp)) {
  2189. extra_count = 1;
  2190. info->count--;
  2191. }
  2192. spin_unlock_irqrestore(&info->lock, flags);
  2193. info->blocked_open++;
  2194. while (1) {
  2195. if ((tty->termios->c_cflag & CBAUD)) {
  2196. spin_lock_irqsave(&info->lock,flags);
  2197. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2198. set_signals(info);
  2199. spin_unlock_irqrestore(&info->lock,flags);
  2200. }
  2201. set_current_state(TASK_INTERRUPTIBLE);
  2202. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2203. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2204. -EAGAIN : -ERESTARTSYS;
  2205. break;
  2206. }
  2207. spin_lock_irqsave(&info->lock,flags);
  2208. get_signals(info);
  2209. spin_unlock_irqrestore(&info->lock,flags);
  2210. if (!(info->flags & ASYNC_CLOSING) &&
  2211. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2212. break;
  2213. }
  2214. if (signal_pending(current)) {
  2215. retval = -ERESTARTSYS;
  2216. break;
  2217. }
  2218. if (debug_level >= DEBUG_LEVEL_INFO)
  2219. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2220. __FILE__,__LINE__, tty->driver->name, info->count );
  2221. schedule();
  2222. }
  2223. set_current_state(TASK_RUNNING);
  2224. remove_wait_queue(&info->open_wait, &wait);
  2225. if (extra_count)
  2226. info->count++;
  2227. info->blocked_open--;
  2228. if (debug_level >= DEBUG_LEVEL_INFO)
  2229. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2230. __FILE__,__LINE__, tty->driver->name, info->count );
  2231. if (!retval)
  2232. info->flags |= ASYNC_NORMAL_ACTIVE;
  2233. return retval;
  2234. }
  2235. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2236. {
  2237. MGSLPC_INFO *info;
  2238. int retval, line;
  2239. unsigned long flags;
  2240. /* verify range of specified line number */
  2241. line = tty->index;
  2242. if ((line < 0) || (line >= mgslpc_device_count)) {
  2243. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2244. __FILE__,__LINE__,line);
  2245. return -ENODEV;
  2246. }
  2247. /* find the info structure for the specified line */
  2248. info = mgslpc_device_list;
  2249. while(info && info->line != line)
  2250. info = info->next_device;
  2251. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2252. return -ENODEV;
  2253. tty->driver_data = info;
  2254. info->tty = tty;
  2255. if (debug_level >= DEBUG_LEVEL_INFO)
  2256. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2257. __FILE__,__LINE__,tty->driver->name, info->count);
  2258. /* If port is closing, signal caller to try again */
  2259. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2260. if (info->flags & ASYNC_CLOSING)
  2261. interruptible_sleep_on(&info->close_wait);
  2262. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2263. -EAGAIN : -ERESTARTSYS);
  2264. goto cleanup;
  2265. }
  2266. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2267. spin_lock_irqsave(&info->netlock, flags);
  2268. if (info->netcount) {
  2269. retval = -EBUSY;
  2270. spin_unlock_irqrestore(&info->netlock, flags);
  2271. goto cleanup;
  2272. }
  2273. info->count++;
  2274. spin_unlock_irqrestore(&info->netlock, flags);
  2275. if (info->count == 1) {
  2276. /* 1st open on this device, init hardware */
  2277. retval = startup(info);
  2278. if (retval < 0)
  2279. goto cleanup;
  2280. }
  2281. retval = block_til_ready(tty, filp, info);
  2282. if (retval) {
  2283. if (debug_level >= DEBUG_LEVEL_INFO)
  2284. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2285. __FILE__,__LINE__, info->device_name, retval);
  2286. goto cleanup;
  2287. }
  2288. if (debug_level >= DEBUG_LEVEL_INFO)
  2289. printk("%s(%d):mgslpc_open(%s) success\n",
  2290. __FILE__,__LINE__, info->device_name);
  2291. retval = 0;
  2292. cleanup:
  2293. if (retval) {
  2294. if (tty->count == 1)
  2295. info->tty = NULL; /* tty layer will release tty struct */
  2296. if(info->count)
  2297. info->count--;
  2298. }
  2299. return retval;
  2300. }
  2301. /*
  2302. * /proc fs routines....
  2303. */
  2304. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2305. {
  2306. char stat_buf[30];
  2307. int ret;
  2308. unsigned long flags;
  2309. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2310. info->device_name, info->io_base, info->irq_level);
  2311. /* output current serial signal states */
  2312. spin_lock_irqsave(&info->lock,flags);
  2313. get_signals(info);
  2314. spin_unlock_irqrestore(&info->lock,flags);
  2315. stat_buf[0] = 0;
  2316. stat_buf[1] = 0;
  2317. if (info->serial_signals & SerialSignal_RTS)
  2318. strcat(stat_buf, "|RTS");
  2319. if (info->serial_signals & SerialSignal_CTS)
  2320. strcat(stat_buf, "|CTS");
  2321. if (info->serial_signals & SerialSignal_DTR)
  2322. strcat(stat_buf, "|DTR");
  2323. if (info->serial_signals & SerialSignal_DSR)
  2324. strcat(stat_buf, "|DSR");
  2325. if (info->serial_signals & SerialSignal_DCD)
  2326. strcat(stat_buf, "|CD");
  2327. if (info->serial_signals & SerialSignal_RI)
  2328. strcat(stat_buf, "|RI");
  2329. if (info->params.mode == MGSL_MODE_HDLC) {
  2330. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2331. info->icount.txok, info->icount.rxok);
  2332. if (info->icount.txunder)
  2333. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2334. if (info->icount.txabort)
  2335. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2336. if (info->icount.rxshort)
  2337. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2338. if (info->icount.rxlong)
  2339. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2340. if (info->icount.rxover)
  2341. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2342. if (info->icount.rxcrc)
  2343. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2344. } else {
  2345. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2346. info->icount.tx, info->icount.rx);
  2347. if (info->icount.frame)
  2348. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2349. if (info->icount.parity)
  2350. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2351. if (info->icount.brk)
  2352. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2353. if (info->icount.overrun)
  2354. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2355. }
  2356. /* Append serial signal status to end */
  2357. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2358. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2359. info->tx_active,info->bh_requested,info->bh_running,
  2360. info->pending_bh);
  2361. return ret;
  2362. }
  2363. /* Called to print information about devices
  2364. */
  2365. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2366. int *eof, void *data)
  2367. {
  2368. int len = 0, l;
  2369. off_t begin = 0;
  2370. MGSLPC_INFO *info;
  2371. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2372. info = mgslpc_device_list;
  2373. while( info ) {
  2374. l = line_info(page + len, info);
  2375. len += l;
  2376. if (len+begin > off+count)
  2377. goto done;
  2378. if (len+begin < off) {
  2379. begin += len;
  2380. len = 0;
  2381. }
  2382. info = info->next_device;
  2383. }
  2384. *eof = 1;
  2385. done:
  2386. if (off >= len+begin)
  2387. return 0;
  2388. *start = page + (off-begin);
  2389. return ((count < begin+len-off) ? count : begin+len-off);
  2390. }
  2391. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2392. {
  2393. /* each buffer has header and data */
  2394. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2395. /* calculate total allocation size for 8 buffers */
  2396. info->rx_buf_total_size = info->rx_buf_size * 8;
  2397. /* limit total allocated memory */
  2398. if (info->rx_buf_total_size > 0x10000)
  2399. info->rx_buf_total_size = 0x10000;
  2400. /* calculate number of buffers */
  2401. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2402. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2403. if (info->rx_buf == NULL)
  2404. return -ENOMEM;
  2405. rx_reset_buffers(info);
  2406. return 0;
  2407. }
  2408. static void rx_free_buffers(MGSLPC_INFO *info)
  2409. {
  2410. kfree(info->rx_buf);
  2411. info->rx_buf = NULL;
  2412. }
  2413. static int claim_resources(MGSLPC_INFO *info)
  2414. {
  2415. if (rx_alloc_buffers(info) < 0 ) {
  2416. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2417. release_resources(info);
  2418. return -ENODEV;
  2419. }
  2420. return 0;
  2421. }
  2422. static void release_resources(MGSLPC_INFO *info)
  2423. {
  2424. if (debug_level >= DEBUG_LEVEL_INFO)
  2425. printk("release_resources(%s)\n", info->device_name);
  2426. rx_free_buffers(info);
  2427. }
  2428. /* Add the specified device instance data structure to the
  2429. * global linked list of devices and increment the device count.
  2430. *
  2431. * Arguments: info pointer to device instance data
  2432. */
  2433. static void mgslpc_add_device(MGSLPC_INFO *info)
  2434. {
  2435. info->next_device = NULL;
  2436. info->line = mgslpc_device_count;
  2437. sprintf(info->device_name,"ttySLP%d",info->line);
  2438. if (info->line < MAX_DEVICE_COUNT) {
  2439. if (maxframe[info->line])
  2440. info->max_frame_size = maxframe[info->line];
  2441. info->dosyncppp = dosyncppp[info->line];
  2442. }
  2443. mgslpc_device_count++;
  2444. if (!mgslpc_device_list)
  2445. mgslpc_device_list = info;
  2446. else {
  2447. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2448. while( current_dev->next_device )
  2449. current_dev = current_dev->next_device;
  2450. current_dev->next_device = info;
  2451. }
  2452. if (info->max_frame_size < 4096)
  2453. info->max_frame_size = 4096;
  2454. else if (info->max_frame_size > 65535)
  2455. info->max_frame_size = 65535;
  2456. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2457. info->device_name, info->io_base, info->irq_level);
  2458. #ifdef CONFIG_HDLC
  2459. hdlcdev_init(info);
  2460. #endif
  2461. }
  2462. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2463. {
  2464. MGSLPC_INFO *info = mgslpc_device_list;
  2465. MGSLPC_INFO *last = NULL;
  2466. while(info) {
  2467. if (info == remove_info) {
  2468. if (last)
  2469. last->next_device = info->next_device;
  2470. else
  2471. mgslpc_device_list = info->next_device;
  2472. #ifdef CONFIG_HDLC
  2473. hdlcdev_exit(info);
  2474. #endif
  2475. release_resources(info);
  2476. kfree(info);
  2477. mgslpc_device_count--;
  2478. return;
  2479. }
  2480. last = info;
  2481. info = info->next_device;
  2482. }
  2483. }
  2484. static struct pcmcia_device_id mgslpc_ids[] = {
  2485. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2486. PCMCIA_DEVICE_NULL
  2487. };
  2488. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2489. static struct pcmcia_driver mgslpc_driver = {
  2490. .owner = THIS_MODULE,
  2491. .drv = {
  2492. .name = "synclink_cs",
  2493. },
  2494. .probe = mgslpc_probe,
  2495. .remove = mgslpc_detach,
  2496. .id_table = mgslpc_ids,
  2497. .suspend = mgslpc_suspend,
  2498. .resume = mgslpc_resume,
  2499. };
  2500. static const struct tty_operations mgslpc_ops = {
  2501. .open = mgslpc_open,
  2502. .close = mgslpc_close,
  2503. .write = mgslpc_write,
  2504. .put_char = mgslpc_put_char,
  2505. .flush_chars = mgslpc_flush_chars,
  2506. .write_room = mgslpc_write_room,
  2507. .chars_in_buffer = mgslpc_chars_in_buffer,
  2508. .flush_buffer = mgslpc_flush_buffer,
  2509. .ioctl = mgslpc_ioctl,
  2510. .throttle = mgslpc_throttle,
  2511. .unthrottle = mgslpc_unthrottle,
  2512. .send_xchar = mgslpc_send_xchar,
  2513. .break_ctl = mgslpc_break,
  2514. .wait_until_sent = mgslpc_wait_until_sent,
  2515. .read_proc = mgslpc_read_proc,
  2516. .set_termios = mgslpc_set_termios,
  2517. .stop = tx_pause,
  2518. .start = tx_release,
  2519. .hangup = mgslpc_hangup,
  2520. .tiocmget = tiocmget,
  2521. .tiocmset = tiocmset,
  2522. };
  2523. static void synclink_cs_cleanup(void)
  2524. {
  2525. int rc;
  2526. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2527. while(mgslpc_device_list)
  2528. mgslpc_remove_device(mgslpc_device_list);
  2529. if (serial_driver) {
  2530. if ((rc = tty_unregister_driver(serial_driver)))
  2531. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2532. __FILE__,__LINE__,rc);
  2533. put_tty_driver(serial_driver);
  2534. }
  2535. pcmcia_unregister_driver(&mgslpc_driver);
  2536. }
  2537. static int __init synclink_cs_init(void)
  2538. {
  2539. int rc;
  2540. if (break_on_load) {
  2541. mgslpc_get_text_ptr();
  2542. BREAKPOINT();
  2543. }
  2544. printk("%s %s\n", driver_name, driver_version);
  2545. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2546. return rc;
  2547. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2548. if (!serial_driver) {
  2549. rc = -ENOMEM;
  2550. goto error;
  2551. }
  2552. /* Initialize the tty_driver structure */
  2553. serial_driver->owner = THIS_MODULE;
  2554. serial_driver->driver_name = "synclink_cs";
  2555. serial_driver->name = "ttySLP";
  2556. serial_driver->major = ttymajor;
  2557. serial_driver->minor_start = 64;
  2558. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2559. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2560. serial_driver->init_termios = tty_std_termios;
  2561. serial_driver->init_termios.c_cflag =
  2562. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2563. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2564. tty_set_operations(serial_driver, &mgslpc_ops);
  2565. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2566. printk("%s(%d):Couldn't register serial driver\n",
  2567. __FILE__,__LINE__);
  2568. put_tty_driver(serial_driver);
  2569. serial_driver = NULL;
  2570. goto error;
  2571. }
  2572. printk("%s %s, tty major#%d\n",
  2573. driver_name, driver_version,
  2574. serial_driver->major);
  2575. return 0;
  2576. error:
  2577. synclink_cs_cleanup();
  2578. return rc;
  2579. }
  2580. static void __exit synclink_cs_exit(void)
  2581. {
  2582. synclink_cs_cleanup();
  2583. }
  2584. module_init(synclink_cs_init);
  2585. module_exit(synclink_cs_exit);
  2586. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2587. {
  2588. unsigned int M, N;
  2589. unsigned char val;
  2590. /* note:standard BRG mode is broken in V3.2 chip
  2591. * so enhanced mode is always used
  2592. */
  2593. if (rate) {
  2594. N = 3686400 / rate;
  2595. if (!N)
  2596. N = 1;
  2597. N >>= 1;
  2598. for (M = 1; N > 64 && M < 16; M++)
  2599. N >>= 1;
  2600. N--;
  2601. /* BGR[5..0] = N
  2602. * BGR[9..6] = M
  2603. * BGR[7..0] contained in BGR register
  2604. * BGR[9..8] contained in CCR2[7..6]
  2605. * divisor = (N+1)*2^M
  2606. *
  2607. * Note: M *must* not be zero (causes asymetric duty cycle)
  2608. */
  2609. write_reg(info, (unsigned char) (channel + BGR),
  2610. (unsigned char) ((M << 6) + N));
  2611. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2612. val |= ((M << 4) & 0xc0);
  2613. write_reg(info, (unsigned char) (channel + CCR2), val);
  2614. }
  2615. }
  2616. /* Enabled the AUX clock output at the specified frequency.
  2617. */
  2618. static void enable_auxclk(MGSLPC_INFO *info)
  2619. {
  2620. unsigned char val;
  2621. /* MODE
  2622. *
  2623. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2624. * 05 ADM Address Mode, 0 = no addr recognition
  2625. * 04 TMD Timer Mode, 0 = external
  2626. * 03 RAC Receiver Active, 0 = inactive
  2627. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2628. * 01 TRS Timer Resolution, 1=512
  2629. * 00 TLP Test Loop, 0 = no loop
  2630. *
  2631. * 1000 0010
  2632. */
  2633. val = 0x82;
  2634. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2635. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2636. val |= BIT2;
  2637. write_reg(info, CHB + MODE, val);
  2638. /* CCR0
  2639. *
  2640. * 07 PU Power Up, 1=active, 0=power down
  2641. * 06 MCE Master Clock Enable, 1=enabled
  2642. * 05 Reserved, 0
  2643. * 04..02 SC[2..0] Encoding
  2644. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2645. *
  2646. * 11000000
  2647. */
  2648. write_reg(info, CHB + CCR0, 0xc0);
  2649. /* CCR1
  2650. *
  2651. * 07 SFLG Shared Flag, 0 = disable shared flags
  2652. * 06 GALP Go Active On Loop, 0 = not used
  2653. * 05 GLP Go On Loop, 0 = not used
  2654. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2655. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2656. * 02..00 CM[2..0] Clock Mode
  2657. *
  2658. * 0001 0111
  2659. */
  2660. write_reg(info, CHB + CCR1, 0x17);
  2661. /* CCR2 (Channel B)
  2662. *
  2663. * 07..06 BGR[9..8] Baud rate bits 9..8
  2664. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2665. * 04 SSEL Clock source select, 1=submode b
  2666. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2667. * 02 RWX Read/Write Exchange 0=disabled
  2668. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2669. * 00 DIV, data inversion 0=disabled, 1=enabled
  2670. *
  2671. * 0011 1000
  2672. */
  2673. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2674. write_reg(info, CHB + CCR2, 0x38);
  2675. else
  2676. write_reg(info, CHB + CCR2, 0x30);
  2677. /* CCR4
  2678. *
  2679. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2680. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2681. * 05 TST1 Test Pin, 0=normal operation
  2682. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2683. * 03..02 Reserved, must be 0
  2684. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2685. *
  2686. * 0101 0000
  2687. */
  2688. write_reg(info, CHB + CCR4, 0x50);
  2689. /* if auxclk not enabled, set internal BRG so
  2690. * CTS transitions can be detected (requires TxC)
  2691. */
  2692. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2693. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2694. else
  2695. mgslpc_set_rate(info, CHB, 921600);
  2696. }
  2697. static void loopback_enable(MGSLPC_INFO *info)
  2698. {
  2699. unsigned char val;
  2700. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2701. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2702. write_reg(info, CHA + CCR1, val);
  2703. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2704. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2705. write_reg(info, CHA + CCR2, val);
  2706. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2707. if (info->params.clock_speed)
  2708. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2709. else
  2710. mgslpc_set_rate(info, CHA, 1843200);
  2711. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2712. val = read_reg(info, CHA + MODE) | BIT0;
  2713. write_reg(info, CHA + MODE, val);
  2714. }
  2715. static void hdlc_mode(MGSLPC_INFO *info)
  2716. {
  2717. unsigned char val;
  2718. unsigned char clkmode, clksubmode;
  2719. /* disable all interrupts */
  2720. irq_disable(info, CHA, 0xffff);
  2721. irq_disable(info, CHB, 0xffff);
  2722. port_irq_disable(info, 0xff);
  2723. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2724. clkmode = clksubmode = 0;
  2725. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2726. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2727. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2728. clkmode = 7;
  2729. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2730. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2731. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2732. clkmode = 7;
  2733. clksubmode = 1;
  2734. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2735. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2736. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2737. clkmode = 6;
  2738. clksubmode = 1;
  2739. } else {
  2740. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2741. clkmode = 6;
  2742. }
  2743. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2744. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2745. clksubmode = 1;
  2746. }
  2747. /* MODE
  2748. *
  2749. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2750. * 05 ADM Address Mode, 0 = no addr recognition
  2751. * 04 TMD Timer Mode, 0 = external
  2752. * 03 RAC Receiver Active, 0 = inactive
  2753. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2754. * 01 TRS Timer Resolution, 1=512
  2755. * 00 TLP Test Loop, 0 = no loop
  2756. *
  2757. * 1000 0010
  2758. */
  2759. val = 0x82;
  2760. if (info->params.loopback)
  2761. val |= BIT0;
  2762. /* preserve RTS state */
  2763. if (info->serial_signals & SerialSignal_RTS)
  2764. val |= BIT2;
  2765. write_reg(info, CHA + MODE, val);
  2766. /* CCR0
  2767. *
  2768. * 07 PU Power Up, 1=active, 0=power down
  2769. * 06 MCE Master Clock Enable, 1=enabled
  2770. * 05 Reserved, 0
  2771. * 04..02 SC[2..0] Encoding
  2772. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2773. *
  2774. * 11000000
  2775. */
  2776. val = 0xc0;
  2777. switch (info->params.encoding)
  2778. {
  2779. case HDLC_ENCODING_NRZI:
  2780. val |= BIT3;
  2781. break;
  2782. case HDLC_ENCODING_BIPHASE_SPACE:
  2783. val |= BIT4;
  2784. break; // FM0
  2785. case HDLC_ENCODING_BIPHASE_MARK:
  2786. val |= BIT4 + BIT2;
  2787. break; // FM1
  2788. case HDLC_ENCODING_BIPHASE_LEVEL:
  2789. val |= BIT4 + BIT3;
  2790. break; // Manchester
  2791. }
  2792. write_reg(info, CHA + CCR0, val);
  2793. /* CCR1
  2794. *
  2795. * 07 SFLG Shared Flag, 0 = disable shared flags
  2796. * 06 GALP Go Active On Loop, 0 = not used
  2797. * 05 GLP Go On Loop, 0 = not used
  2798. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2799. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2800. * 02..00 CM[2..0] Clock Mode
  2801. *
  2802. * 0001 0000
  2803. */
  2804. val = 0x10 + clkmode;
  2805. write_reg(info, CHA + CCR1, val);
  2806. /* CCR2
  2807. *
  2808. * 07..06 BGR[9..8] Baud rate bits 9..8
  2809. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2810. * 04 SSEL Clock source select, 1=submode b
  2811. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2812. * 02 RWX Read/Write Exchange 0=disabled
  2813. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2814. * 00 DIV, data inversion 0=disabled, 1=enabled
  2815. *
  2816. * 0000 0000
  2817. */
  2818. val = 0x00;
  2819. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2820. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2821. val |= BIT5;
  2822. if (clksubmode)
  2823. val |= BIT4;
  2824. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2825. val |= BIT1;
  2826. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2827. val |= BIT0;
  2828. write_reg(info, CHA + CCR2, val);
  2829. /* CCR3
  2830. *
  2831. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2832. * 05 EPT Enable preamble transmission, 1=enabled
  2833. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2834. * 03 CRL CRC Reset Level, 0=FFFF
  2835. * 02 RCRC Rx CRC 0=On 1=Off
  2836. * 01 TCRC Tx CRC 0=On 1=Off
  2837. * 00 PSD DPLL Phase Shift Disable
  2838. *
  2839. * 0000 0000
  2840. */
  2841. val = 0x00;
  2842. if (info->params.crc_type == HDLC_CRC_NONE)
  2843. val |= BIT2 + BIT1;
  2844. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2845. val |= BIT5;
  2846. switch (info->params.preamble_length)
  2847. {
  2848. case HDLC_PREAMBLE_LENGTH_16BITS:
  2849. val |= BIT6;
  2850. break;
  2851. case HDLC_PREAMBLE_LENGTH_32BITS:
  2852. val |= BIT6;
  2853. break;
  2854. case HDLC_PREAMBLE_LENGTH_64BITS:
  2855. val |= BIT7 + BIT6;
  2856. break;
  2857. }
  2858. write_reg(info, CHA + CCR3, val);
  2859. /* PRE - Preamble pattern */
  2860. val = 0;
  2861. switch (info->params.preamble)
  2862. {
  2863. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2864. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2865. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2866. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2867. }
  2868. write_reg(info, CHA + PRE, val);
  2869. /* CCR4
  2870. *
  2871. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2872. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2873. * 05 TST1 Test Pin, 0=normal operation
  2874. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2875. * 03..02 Reserved, must be 0
  2876. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2877. *
  2878. * 0101 0000
  2879. */
  2880. val = 0x50;
  2881. write_reg(info, CHA + CCR4, val);
  2882. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2883. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2884. else
  2885. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2886. /* RLCR Receive length check register
  2887. *
  2888. * 7 1=enable receive length check
  2889. * 6..0 Max frame length = (RL + 1) * 32
  2890. */
  2891. write_reg(info, CHA + RLCR, 0);
  2892. /* XBCH Transmit Byte Count High
  2893. *
  2894. * 07 DMA mode, 0 = interrupt driven
  2895. * 06 NRM, 0=ABM (ignored)
  2896. * 05 CAS Carrier Auto Start
  2897. * 04 XC Transmit Continuously (ignored)
  2898. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2899. *
  2900. * 0000 0000
  2901. */
  2902. val = 0x00;
  2903. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2904. val |= BIT5;
  2905. write_reg(info, CHA + XBCH, val);
  2906. enable_auxclk(info);
  2907. if (info->params.loopback || info->testing_irq)
  2908. loopback_enable(info);
  2909. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2910. {
  2911. irq_enable(info, CHB, IRQ_CTS);
  2912. /* PVR[3] 1=AUTO CTS active */
  2913. set_reg_bits(info, CHA + PVR, BIT3);
  2914. } else
  2915. clear_reg_bits(info, CHA + PVR, BIT3);
  2916. irq_enable(info, CHA,
  2917. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2918. IRQ_UNDERRUN + IRQ_TXFIFO);
  2919. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2920. wait_command_complete(info, CHA);
  2921. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2922. /* Master clock mode enabled above to allow reset commands
  2923. * to complete even if no data clocks are present.
  2924. *
  2925. * Disable master clock mode for normal communications because
  2926. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2927. * IRQ when in master clock mode.
  2928. *
  2929. * Leave master clock mode enabled for IRQ test because the
  2930. * timer IRQ used by the test can only happen in master clock mode.
  2931. */
  2932. if (!info->testing_irq)
  2933. clear_reg_bits(info, CHA + CCR0, BIT6);
  2934. tx_set_idle(info);
  2935. tx_stop(info);
  2936. rx_stop(info);
  2937. }
  2938. static void rx_stop(MGSLPC_INFO *info)
  2939. {
  2940. if (debug_level >= DEBUG_LEVEL_ISR)
  2941. printk("%s(%d):rx_stop(%s)\n",
  2942. __FILE__,__LINE__, info->device_name );
  2943. /* MODE:03 RAC Receiver Active, 0=inactive */
  2944. clear_reg_bits(info, CHA + MODE, BIT3);
  2945. info->rx_enabled = 0;
  2946. info->rx_overflow = 0;
  2947. }
  2948. static void rx_start(MGSLPC_INFO *info)
  2949. {
  2950. if (debug_level >= DEBUG_LEVEL_ISR)
  2951. printk("%s(%d):rx_start(%s)\n",
  2952. __FILE__,__LINE__, info->device_name );
  2953. rx_reset_buffers(info);
  2954. info->rx_enabled = 0;
  2955. info->rx_overflow = 0;
  2956. /* MODE:03 RAC Receiver Active, 1=active */
  2957. set_reg_bits(info, CHA + MODE, BIT3);
  2958. info->rx_enabled = 1;
  2959. }
  2960. static void tx_start(MGSLPC_INFO *info)
  2961. {
  2962. if (debug_level >= DEBUG_LEVEL_ISR)
  2963. printk("%s(%d):tx_start(%s)\n",
  2964. __FILE__,__LINE__, info->device_name );
  2965. if (info->tx_count) {
  2966. /* If auto RTS enabled and RTS is inactive, then assert */
  2967. /* RTS and set a flag indicating that the driver should */
  2968. /* negate RTS when the transmission completes. */
  2969. info->drop_rts_on_tx_done = 0;
  2970. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2971. get_signals(info);
  2972. if (!(info->serial_signals & SerialSignal_RTS)) {
  2973. info->serial_signals |= SerialSignal_RTS;
  2974. set_signals(info);
  2975. info->drop_rts_on_tx_done = 1;
  2976. }
  2977. }
  2978. if (info->params.mode == MGSL_MODE_ASYNC) {
  2979. if (!info->tx_active) {
  2980. info->tx_active = 1;
  2981. tx_ready(info);
  2982. }
  2983. } else {
  2984. info->tx_active = 1;
  2985. tx_ready(info);
  2986. info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
  2987. add_timer(&info->tx_timer);
  2988. }
  2989. }
  2990. if (!info->tx_enabled)
  2991. info->tx_enabled = 1;
  2992. }
  2993. static void tx_stop(MGSLPC_INFO *info)
  2994. {
  2995. if (debug_level >= DEBUG_LEVEL_ISR)
  2996. printk("%s(%d):tx_stop(%s)\n",
  2997. __FILE__,__LINE__, info->device_name );
  2998. del_timer(&info->tx_timer);
  2999. info->tx_enabled = 0;
  3000. info->tx_active = 0;
  3001. }
  3002. /* Reset the adapter to a known state and prepare it for further use.
  3003. */
  3004. static void reset_device(MGSLPC_INFO *info)
  3005. {
  3006. /* power up both channels (set BIT7) */
  3007. write_reg(info, CHA + CCR0, 0x80);
  3008. write_reg(info, CHB + CCR0, 0x80);
  3009. write_reg(info, CHA + MODE, 0);
  3010. write_reg(info, CHB + MODE, 0);
  3011. /* disable all interrupts */
  3012. irq_disable(info, CHA, 0xffff);
  3013. irq_disable(info, CHB, 0xffff);
  3014. port_irq_disable(info, 0xff);
  3015. /* PCR Port Configuration Register
  3016. *
  3017. * 07..04 DEC[3..0] Serial I/F select outputs
  3018. * 03 output, 1=AUTO CTS control enabled
  3019. * 02 RI Ring Indicator input 0=active
  3020. * 01 DSR input 0=active
  3021. * 00 DTR output 0=active
  3022. *
  3023. * 0000 0110
  3024. */
  3025. write_reg(info, PCR, 0x06);
  3026. /* PVR Port Value Register
  3027. *
  3028. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3029. * 03 AUTO CTS output 1=enabled
  3030. * 02 RI Ring Indicator input
  3031. * 01 DSR input
  3032. * 00 DTR output (1=inactive)
  3033. *
  3034. * 0000 0001
  3035. */
  3036. // write_reg(info, PVR, PVR_DTR);
  3037. /* IPC Interrupt Port Configuration
  3038. *
  3039. * 07 VIS 1=Masked interrupts visible
  3040. * 06..05 Reserved, 0
  3041. * 04..03 SLA Slave address, 00 ignored
  3042. * 02 CASM Cascading Mode, 1=daisy chain
  3043. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3044. *
  3045. * 0000 0101
  3046. */
  3047. write_reg(info, IPC, 0x05);
  3048. }
  3049. static void async_mode(MGSLPC_INFO *info)
  3050. {
  3051. unsigned char val;
  3052. /* disable all interrupts */
  3053. irq_disable(info, CHA, 0xffff);
  3054. irq_disable(info, CHB, 0xffff);
  3055. port_irq_disable(info, 0xff);
  3056. /* MODE
  3057. *
  3058. * 07 Reserved, 0
  3059. * 06 FRTS RTS State, 0=active
  3060. * 05 FCTS Flow Control on CTS
  3061. * 04 FLON Flow Control Enable
  3062. * 03 RAC Receiver Active, 0 = inactive
  3063. * 02 RTS 0=Auto RTS, 1=manual RTS
  3064. * 01 TRS Timer Resolution, 1=512
  3065. * 00 TLP Test Loop, 0 = no loop
  3066. *
  3067. * 0000 0110
  3068. */
  3069. val = 0x06;
  3070. if (info->params.loopback)
  3071. val |= BIT0;
  3072. /* preserve RTS state */
  3073. if (!(info->serial_signals & SerialSignal_RTS))
  3074. val |= BIT6;
  3075. write_reg(info, CHA + MODE, val);
  3076. /* CCR0
  3077. *
  3078. * 07 PU Power Up, 1=active, 0=power down
  3079. * 06 MCE Master Clock Enable, 1=enabled
  3080. * 05 Reserved, 0
  3081. * 04..02 SC[2..0] Encoding, 000=NRZ
  3082. * 01..00 SM[1..0] Serial Mode, 11=Async
  3083. *
  3084. * 1000 0011
  3085. */
  3086. write_reg(info, CHA + CCR0, 0x83);
  3087. /* CCR1
  3088. *
  3089. * 07..05 Reserved, 0
  3090. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3091. * 03 BCR Bit Clock Rate, 1=16x
  3092. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3093. *
  3094. * 0001 1111
  3095. */
  3096. write_reg(info, CHA + CCR1, 0x1f);
  3097. /* CCR2 (channel A)
  3098. *
  3099. * 07..06 BGR[9..8] Baud rate bits 9..8
  3100. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3101. * 04 SSEL Clock source select, 1=submode b
  3102. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3103. * 02 RWX Read/Write Exchange 0=disabled
  3104. * 01 Reserved, 0
  3105. * 00 DIV, data inversion 0=disabled, 1=enabled
  3106. *
  3107. * 0001 0000
  3108. */
  3109. write_reg(info, CHA + CCR2, 0x10);
  3110. /* CCR3
  3111. *
  3112. * 07..01 Reserved, 0
  3113. * 00 PSD DPLL Phase Shift Disable
  3114. *
  3115. * 0000 0000
  3116. */
  3117. write_reg(info, CHA + CCR3, 0);
  3118. /* CCR4
  3119. *
  3120. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3121. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3122. * 05 TST1 Test Pin, 0=normal operation
  3123. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3124. * 03..00 Reserved, must be 0
  3125. *
  3126. * 0101 0000
  3127. */
  3128. write_reg(info, CHA + CCR4, 0x50);
  3129. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3130. /* DAFO Data Format
  3131. *
  3132. * 07 Reserved, 0
  3133. * 06 XBRK transmit break, 0=normal operation
  3134. * 05 Stop bits (0=1, 1=2)
  3135. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3136. * 02 PAREN Parity Enable
  3137. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3138. *
  3139. */
  3140. val = 0x00;
  3141. if (info->params.data_bits != 8)
  3142. val |= BIT0; /* 7 bits */
  3143. if (info->params.stop_bits != 1)
  3144. val |= BIT5;
  3145. if (info->params.parity != ASYNC_PARITY_NONE)
  3146. {
  3147. val |= BIT2; /* Parity enable */
  3148. if (info->params.parity == ASYNC_PARITY_ODD)
  3149. val |= BIT3;
  3150. else
  3151. val |= BIT4;
  3152. }
  3153. write_reg(info, CHA + DAFO, val);
  3154. /* RFC Rx FIFO Control
  3155. *
  3156. * 07 Reserved, 0
  3157. * 06 DPS, 1=parity bit not stored in data byte
  3158. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3159. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3160. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3161. * 01 Reserved, 0
  3162. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3163. *
  3164. * 0101 1100
  3165. */
  3166. write_reg(info, CHA + RFC, 0x5c);
  3167. /* RLCR Receive length check register
  3168. *
  3169. * Max frame length = (RL + 1) * 32
  3170. */
  3171. write_reg(info, CHA + RLCR, 0);
  3172. /* XBCH Transmit Byte Count High
  3173. *
  3174. * 07 DMA mode, 0 = interrupt driven
  3175. * 06 NRM, 0=ABM (ignored)
  3176. * 05 CAS Carrier Auto Start
  3177. * 04 XC Transmit Continuously (ignored)
  3178. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3179. *
  3180. * 0000 0000
  3181. */
  3182. val = 0x00;
  3183. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3184. val |= BIT5;
  3185. write_reg(info, CHA + XBCH, val);
  3186. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3187. irq_enable(info, CHA, IRQ_CTS);
  3188. /* MODE:03 RAC Receiver Active, 1=active */
  3189. set_reg_bits(info, CHA + MODE, BIT3);
  3190. enable_auxclk(info);
  3191. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3192. irq_enable(info, CHB, IRQ_CTS);
  3193. /* PVR[3] 1=AUTO CTS active */
  3194. set_reg_bits(info, CHA + PVR, BIT3);
  3195. } else
  3196. clear_reg_bits(info, CHA + PVR, BIT3);
  3197. irq_enable(info, CHA,
  3198. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3199. IRQ_ALLSENT + IRQ_TXFIFO);
  3200. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3201. wait_command_complete(info, CHA);
  3202. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3203. }
  3204. /* Set the HDLC idle mode for the transmitter.
  3205. */
  3206. static void tx_set_idle(MGSLPC_INFO *info)
  3207. {
  3208. /* Note: ESCC2 only supports flags and one idle modes */
  3209. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3210. set_reg_bits(info, CHA + CCR1, BIT3);
  3211. else
  3212. clear_reg_bits(info, CHA + CCR1, BIT3);
  3213. }
  3214. /* get state of the V24 status (input) signals.
  3215. */
  3216. static void get_signals(MGSLPC_INFO *info)
  3217. {
  3218. unsigned char status = 0;
  3219. /* preserve DTR and RTS */
  3220. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3221. if (read_reg(info, CHB + VSTR) & BIT7)
  3222. info->serial_signals |= SerialSignal_DCD;
  3223. if (read_reg(info, CHB + STAR) & BIT1)
  3224. info->serial_signals |= SerialSignal_CTS;
  3225. status = read_reg(info, CHA + PVR);
  3226. if (!(status & PVR_RI))
  3227. info->serial_signals |= SerialSignal_RI;
  3228. if (!(status & PVR_DSR))
  3229. info->serial_signals |= SerialSignal_DSR;
  3230. }
  3231. /* Set the state of DTR and RTS based on contents of
  3232. * serial_signals member of device extension.
  3233. */
  3234. static void set_signals(MGSLPC_INFO *info)
  3235. {
  3236. unsigned char val;
  3237. val = read_reg(info, CHA + MODE);
  3238. if (info->params.mode == MGSL_MODE_ASYNC) {
  3239. if (info->serial_signals & SerialSignal_RTS)
  3240. val &= ~BIT6;
  3241. else
  3242. val |= BIT6;
  3243. } else {
  3244. if (info->serial_signals & SerialSignal_RTS)
  3245. val |= BIT2;
  3246. else
  3247. val &= ~BIT2;
  3248. }
  3249. write_reg(info, CHA + MODE, val);
  3250. if (info->serial_signals & SerialSignal_DTR)
  3251. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3252. else
  3253. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3254. }
  3255. static void rx_reset_buffers(MGSLPC_INFO *info)
  3256. {
  3257. RXBUF *buf;
  3258. int i;
  3259. info->rx_put = 0;
  3260. info->rx_get = 0;
  3261. info->rx_frame_count = 0;
  3262. for (i=0 ; i < info->rx_buf_count ; i++) {
  3263. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3264. buf->status = buf->count = 0;
  3265. }
  3266. }
  3267. /* Attempt to return a received HDLC frame
  3268. * Only frames received without errors are returned.
  3269. *
  3270. * Returns 1 if frame returned, otherwise 0
  3271. */
  3272. static int rx_get_frame(MGSLPC_INFO *info)
  3273. {
  3274. unsigned short status;
  3275. RXBUF *buf;
  3276. unsigned int framesize = 0;
  3277. unsigned long flags;
  3278. struct tty_struct *tty = info->tty;
  3279. int return_frame = 0;
  3280. if (info->rx_frame_count == 0)
  3281. return 0;
  3282. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3283. status = buf->status;
  3284. /* 07 VFR 1=valid frame
  3285. * 06 RDO 1=data overrun
  3286. * 05 CRC 1=OK, 0=error
  3287. * 04 RAB 1=frame aborted
  3288. */
  3289. if ((status & 0xf0) != 0xA0) {
  3290. if (!(status & BIT7) || (status & BIT4))
  3291. info->icount.rxabort++;
  3292. else if (status & BIT6)
  3293. info->icount.rxover++;
  3294. else if (!(status & BIT5)) {
  3295. info->icount.rxcrc++;
  3296. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3297. return_frame = 1;
  3298. }
  3299. framesize = 0;
  3300. #ifdef CONFIG_HDLC
  3301. {
  3302. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3303. stats->rx_errors++;
  3304. stats->rx_frame_errors++;
  3305. }
  3306. #endif
  3307. } else
  3308. return_frame = 1;
  3309. if (return_frame)
  3310. framesize = buf->count;
  3311. if (debug_level >= DEBUG_LEVEL_BH)
  3312. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3313. __FILE__,__LINE__,info->device_name,status,framesize);
  3314. if (debug_level >= DEBUG_LEVEL_DATA)
  3315. trace_block(info, buf->data, framesize, 0);
  3316. if (framesize) {
  3317. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3318. framesize+1 > info->max_frame_size) ||
  3319. framesize > info->max_frame_size)
  3320. info->icount.rxlong++;
  3321. else {
  3322. if (status & BIT5)
  3323. info->icount.rxok++;
  3324. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3325. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3326. ++framesize;
  3327. }
  3328. #ifdef CONFIG_HDLC
  3329. if (info->netcount)
  3330. hdlcdev_rx(info, buf->data, framesize);
  3331. else
  3332. #endif
  3333. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3334. }
  3335. }
  3336. spin_lock_irqsave(&info->lock,flags);
  3337. buf->status = buf->count = 0;
  3338. info->rx_frame_count--;
  3339. info->rx_get++;
  3340. if (info->rx_get >= info->rx_buf_count)
  3341. info->rx_get = 0;
  3342. spin_unlock_irqrestore(&info->lock,flags);
  3343. return 1;
  3344. }
  3345. static BOOLEAN register_test(MGSLPC_INFO *info)
  3346. {
  3347. static unsigned char patterns[] =
  3348. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3349. static unsigned int count = ARRAY_SIZE(patterns);
  3350. unsigned int i;
  3351. BOOLEAN rc = TRUE;
  3352. unsigned long flags;
  3353. spin_lock_irqsave(&info->lock,flags);
  3354. reset_device(info);
  3355. for (i = 0; i < count; i++) {
  3356. write_reg(info, XAD1, patterns[i]);
  3357. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3358. if ((read_reg(info, XAD1) != patterns[i]) ||
  3359. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3360. rc = FALSE;
  3361. break;
  3362. }
  3363. }
  3364. spin_unlock_irqrestore(&info->lock,flags);
  3365. return rc;
  3366. }
  3367. static BOOLEAN irq_test(MGSLPC_INFO *info)
  3368. {
  3369. unsigned long end_time;
  3370. unsigned long flags;
  3371. spin_lock_irqsave(&info->lock,flags);
  3372. reset_device(info);
  3373. info->testing_irq = TRUE;
  3374. hdlc_mode(info);
  3375. info->irq_occurred = FALSE;
  3376. /* init hdlc mode */
  3377. irq_enable(info, CHA, IRQ_TIMER);
  3378. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3379. issue_command(info, CHA, CMD_START_TIMER);
  3380. spin_unlock_irqrestore(&info->lock,flags);
  3381. end_time=100;
  3382. while(end_time-- && !info->irq_occurred) {
  3383. msleep_interruptible(10);
  3384. }
  3385. info->testing_irq = FALSE;
  3386. spin_lock_irqsave(&info->lock,flags);
  3387. reset_device(info);
  3388. spin_unlock_irqrestore(&info->lock,flags);
  3389. return info->irq_occurred ? TRUE : FALSE;
  3390. }
  3391. static int adapter_test(MGSLPC_INFO *info)
  3392. {
  3393. if (!register_test(info)) {
  3394. info->init_error = DiagStatus_AddressFailure;
  3395. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3396. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3397. return -ENODEV;
  3398. }
  3399. if (!irq_test(info)) {
  3400. info->init_error = DiagStatus_IrqFailure;
  3401. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3402. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3403. return -ENODEV;
  3404. }
  3405. if (debug_level >= DEBUG_LEVEL_INFO)
  3406. printk("%s(%d):device %s passed diagnostics\n",
  3407. __FILE__,__LINE__,info->device_name);
  3408. return 0;
  3409. }
  3410. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3411. {
  3412. int i;
  3413. int linecount;
  3414. if (xmit)
  3415. printk("%s tx data:\n",info->device_name);
  3416. else
  3417. printk("%s rx data:\n",info->device_name);
  3418. while(count) {
  3419. if (count > 16)
  3420. linecount = 16;
  3421. else
  3422. linecount = count;
  3423. for(i=0;i<linecount;i++)
  3424. printk("%02X ",(unsigned char)data[i]);
  3425. for(;i<17;i++)
  3426. printk(" ");
  3427. for(i=0;i<linecount;i++) {
  3428. if (data[i]>=040 && data[i]<=0176)
  3429. printk("%c",data[i]);
  3430. else
  3431. printk(".");
  3432. }
  3433. printk("\n");
  3434. data += linecount;
  3435. count -= linecount;
  3436. }
  3437. }
  3438. /* HDLC frame time out
  3439. * update stats and do tx completion processing
  3440. */
  3441. static void tx_timeout(unsigned long context)
  3442. {
  3443. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3444. unsigned long flags;
  3445. if ( debug_level >= DEBUG_LEVEL_INFO )
  3446. printk( "%s(%d):tx_timeout(%s)\n",
  3447. __FILE__,__LINE__,info->device_name);
  3448. if(info->tx_active &&
  3449. info->params.mode == MGSL_MODE_HDLC) {
  3450. info->icount.txtimeout++;
  3451. }
  3452. spin_lock_irqsave(&info->lock,flags);
  3453. info->tx_active = 0;
  3454. info->tx_count = info->tx_put = info->tx_get = 0;
  3455. spin_unlock_irqrestore(&info->lock,flags);
  3456. #ifdef CONFIG_HDLC
  3457. if (info->netcount)
  3458. hdlcdev_tx_done(info);
  3459. else
  3460. #endif
  3461. bh_transmit(info);
  3462. }
  3463. #ifdef CONFIG_HDLC
  3464. /**
  3465. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3466. * set encoding and frame check sequence (FCS) options
  3467. *
  3468. * dev pointer to network device structure
  3469. * encoding serial encoding setting
  3470. * parity FCS setting
  3471. *
  3472. * returns 0 if success, otherwise error code
  3473. */
  3474. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3475. unsigned short parity)
  3476. {
  3477. MGSLPC_INFO *info = dev_to_port(dev);
  3478. unsigned char new_encoding;
  3479. unsigned short new_crctype;
  3480. /* return error if TTY interface open */
  3481. if (info->count)
  3482. return -EBUSY;
  3483. switch (encoding)
  3484. {
  3485. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3486. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3487. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3488. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3489. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3490. default: return -EINVAL;
  3491. }
  3492. switch (parity)
  3493. {
  3494. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3495. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3496. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3497. default: return -EINVAL;
  3498. }
  3499. info->params.encoding = new_encoding;
  3500. info->params.crc_type = new_crctype;
  3501. /* if network interface up, reprogram hardware */
  3502. if (info->netcount)
  3503. mgslpc_program_hw(info);
  3504. return 0;
  3505. }
  3506. /**
  3507. * called by generic HDLC layer to send frame
  3508. *
  3509. * skb socket buffer containing HDLC frame
  3510. * dev pointer to network device structure
  3511. *
  3512. * returns 0 if success, otherwise error code
  3513. */
  3514. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3515. {
  3516. MGSLPC_INFO *info = dev_to_port(dev);
  3517. struct net_device_stats *stats = hdlc_stats(dev);
  3518. unsigned long flags;
  3519. if (debug_level >= DEBUG_LEVEL_INFO)
  3520. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3521. /* stop sending until this frame completes */
  3522. netif_stop_queue(dev);
  3523. /* copy data to device buffers */
  3524. memcpy(info->tx_buf, skb->data, skb->len);
  3525. info->tx_get = 0;
  3526. info->tx_put = info->tx_count = skb->len;
  3527. /* update network statistics */
  3528. stats->tx_packets++;
  3529. stats->tx_bytes += skb->len;
  3530. /* done with socket buffer, so free it */
  3531. dev_kfree_skb(skb);
  3532. /* save start time for transmit timeout detection */
  3533. dev->trans_start = jiffies;
  3534. /* start hardware transmitter if necessary */
  3535. spin_lock_irqsave(&info->lock,flags);
  3536. if (!info->tx_active)
  3537. tx_start(info);
  3538. spin_unlock_irqrestore(&info->lock,flags);
  3539. return 0;
  3540. }
  3541. /**
  3542. * called by network layer when interface enabled
  3543. * claim resources and initialize hardware
  3544. *
  3545. * dev pointer to network device structure
  3546. *
  3547. * returns 0 if success, otherwise error code
  3548. */
  3549. static int hdlcdev_open(struct net_device *dev)
  3550. {
  3551. MGSLPC_INFO *info = dev_to_port(dev);
  3552. int rc;
  3553. unsigned long flags;
  3554. if (debug_level >= DEBUG_LEVEL_INFO)
  3555. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3556. /* generic HDLC layer open processing */
  3557. if ((rc = hdlc_open(dev)))
  3558. return rc;
  3559. /* arbitrate between network and tty opens */
  3560. spin_lock_irqsave(&info->netlock, flags);
  3561. if (info->count != 0 || info->netcount != 0) {
  3562. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3563. spin_unlock_irqrestore(&info->netlock, flags);
  3564. return -EBUSY;
  3565. }
  3566. info->netcount=1;
  3567. spin_unlock_irqrestore(&info->netlock, flags);
  3568. /* claim resources and init adapter */
  3569. if ((rc = startup(info)) != 0) {
  3570. spin_lock_irqsave(&info->netlock, flags);
  3571. info->netcount=0;
  3572. spin_unlock_irqrestore(&info->netlock, flags);
  3573. return rc;
  3574. }
  3575. /* assert DTR and RTS, apply hardware settings */
  3576. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3577. mgslpc_program_hw(info);
  3578. /* enable network layer transmit */
  3579. dev->trans_start = jiffies;
  3580. netif_start_queue(dev);
  3581. /* inform generic HDLC layer of current DCD status */
  3582. spin_lock_irqsave(&info->lock, flags);
  3583. get_signals(info);
  3584. spin_unlock_irqrestore(&info->lock, flags);
  3585. if (info->serial_signals & SerialSignal_DCD)
  3586. netif_carrier_on(dev);
  3587. else
  3588. netif_carrier_off(dev);
  3589. return 0;
  3590. }
  3591. /**
  3592. * called by network layer when interface is disabled
  3593. * shutdown hardware and release resources
  3594. *
  3595. * dev pointer to network device structure
  3596. *
  3597. * returns 0 if success, otherwise error code
  3598. */
  3599. static int hdlcdev_close(struct net_device *dev)
  3600. {
  3601. MGSLPC_INFO *info = dev_to_port(dev);
  3602. unsigned long flags;
  3603. if (debug_level >= DEBUG_LEVEL_INFO)
  3604. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3605. netif_stop_queue(dev);
  3606. /* shutdown adapter and release resources */
  3607. shutdown(info);
  3608. hdlc_close(dev);
  3609. spin_lock_irqsave(&info->netlock, flags);
  3610. info->netcount=0;
  3611. spin_unlock_irqrestore(&info->netlock, flags);
  3612. return 0;
  3613. }
  3614. /**
  3615. * called by network layer to process IOCTL call to network device
  3616. *
  3617. * dev pointer to network device structure
  3618. * ifr pointer to network interface request structure
  3619. * cmd IOCTL command code
  3620. *
  3621. * returns 0 if success, otherwise error code
  3622. */
  3623. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3624. {
  3625. const size_t size = sizeof(sync_serial_settings);
  3626. sync_serial_settings new_line;
  3627. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3628. MGSLPC_INFO *info = dev_to_port(dev);
  3629. unsigned int flags;
  3630. if (debug_level >= DEBUG_LEVEL_INFO)
  3631. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3632. /* return error if TTY interface open */
  3633. if (info->count)
  3634. return -EBUSY;
  3635. if (cmd != SIOCWANDEV)
  3636. return hdlc_ioctl(dev, ifr, cmd);
  3637. switch(ifr->ifr_settings.type) {
  3638. case IF_GET_IFACE: /* return current sync_serial_settings */
  3639. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3640. if (ifr->ifr_settings.size < size) {
  3641. ifr->ifr_settings.size = size; /* data size wanted */
  3642. return -ENOBUFS;
  3643. }
  3644. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3645. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3646. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3647. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3648. switch (flags){
  3649. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3650. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3651. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3652. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3653. default: new_line.clock_type = CLOCK_DEFAULT;
  3654. }
  3655. new_line.clock_rate = info->params.clock_speed;
  3656. new_line.loopback = info->params.loopback ? 1:0;
  3657. if (copy_to_user(line, &new_line, size))
  3658. return -EFAULT;
  3659. return 0;
  3660. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3661. if(!capable(CAP_NET_ADMIN))
  3662. return -EPERM;
  3663. if (copy_from_user(&new_line, line, size))
  3664. return -EFAULT;
  3665. switch (new_line.clock_type)
  3666. {
  3667. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3668. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3669. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3670. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3671. case CLOCK_DEFAULT: flags = info->params.flags &
  3672. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3673. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3674. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3675. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3676. default: return -EINVAL;
  3677. }
  3678. if (new_line.loopback != 0 && new_line.loopback != 1)
  3679. return -EINVAL;
  3680. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3681. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3682. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3683. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3684. info->params.flags |= flags;
  3685. info->params.loopback = new_line.loopback;
  3686. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3687. info->params.clock_speed = new_line.clock_rate;
  3688. else
  3689. info->params.clock_speed = 0;
  3690. /* if network interface up, reprogram hardware */
  3691. if (info->netcount)
  3692. mgslpc_program_hw(info);
  3693. return 0;
  3694. default:
  3695. return hdlc_ioctl(dev, ifr, cmd);
  3696. }
  3697. }
  3698. /**
  3699. * called by network layer when transmit timeout is detected
  3700. *
  3701. * dev pointer to network device structure
  3702. */
  3703. static void hdlcdev_tx_timeout(struct net_device *dev)
  3704. {
  3705. MGSLPC_INFO *info = dev_to_port(dev);
  3706. struct net_device_stats *stats = hdlc_stats(dev);
  3707. unsigned long flags;
  3708. if (debug_level >= DEBUG_LEVEL_INFO)
  3709. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3710. stats->tx_errors++;
  3711. stats->tx_aborted_errors++;
  3712. spin_lock_irqsave(&info->lock,flags);
  3713. tx_stop(info);
  3714. spin_unlock_irqrestore(&info->lock,flags);
  3715. netif_wake_queue(dev);
  3716. }
  3717. /**
  3718. * called by device driver when transmit completes
  3719. * reenable network layer transmit if stopped
  3720. *
  3721. * info pointer to device instance information
  3722. */
  3723. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3724. {
  3725. if (netif_queue_stopped(info->netdev))
  3726. netif_wake_queue(info->netdev);
  3727. }
  3728. /**
  3729. * called by device driver when frame received
  3730. * pass frame to network layer
  3731. *
  3732. * info pointer to device instance information
  3733. * buf pointer to buffer contianing frame data
  3734. * size count of data bytes in buf
  3735. */
  3736. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3737. {
  3738. struct sk_buff *skb = dev_alloc_skb(size);
  3739. struct net_device *dev = info->netdev;
  3740. struct net_device_stats *stats = hdlc_stats(dev);
  3741. if (debug_level >= DEBUG_LEVEL_INFO)
  3742. printk("hdlcdev_rx(%s)\n",dev->name);
  3743. if (skb == NULL) {
  3744. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3745. stats->rx_dropped++;
  3746. return;
  3747. }
  3748. memcpy(skb_put(skb, size),buf,size);
  3749. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3750. stats->rx_packets++;
  3751. stats->rx_bytes += size;
  3752. netif_rx(skb);
  3753. info->netdev->last_rx = jiffies;
  3754. }
  3755. /**
  3756. * called by device driver when adding device instance
  3757. * do generic HDLC initialization
  3758. *
  3759. * info pointer to device instance information
  3760. *
  3761. * returns 0 if success, otherwise error code
  3762. */
  3763. static int hdlcdev_init(MGSLPC_INFO *info)
  3764. {
  3765. int rc;
  3766. struct net_device *dev;
  3767. hdlc_device *hdlc;
  3768. /* allocate and initialize network and HDLC layer objects */
  3769. if (!(dev = alloc_hdlcdev(info))) {
  3770. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3771. return -ENOMEM;
  3772. }
  3773. /* for network layer reporting purposes only */
  3774. dev->base_addr = info->io_base;
  3775. dev->irq = info->irq_level;
  3776. /* network layer callbacks and settings */
  3777. dev->do_ioctl = hdlcdev_ioctl;
  3778. dev->open = hdlcdev_open;
  3779. dev->stop = hdlcdev_close;
  3780. dev->tx_timeout = hdlcdev_tx_timeout;
  3781. dev->watchdog_timeo = 10*HZ;
  3782. dev->tx_queue_len = 50;
  3783. /* generic HDLC layer callbacks and settings */
  3784. hdlc = dev_to_hdlc(dev);
  3785. hdlc->attach = hdlcdev_attach;
  3786. hdlc->xmit = hdlcdev_xmit;
  3787. /* register objects with HDLC layer */
  3788. if ((rc = register_hdlc_device(dev))) {
  3789. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3790. free_netdev(dev);
  3791. return rc;
  3792. }
  3793. info->netdev = dev;
  3794. return 0;
  3795. }
  3796. /**
  3797. * called by device driver when removing device instance
  3798. * do generic HDLC cleanup
  3799. *
  3800. * info pointer to device instance information
  3801. */
  3802. static void hdlcdev_exit(MGSLPC_INFO *info)
  3803. {
  3804. unregister_hdlc_device(info->netdev);
  3805. free_netdev(info->netdev);
  3806. info->netdev = NULL;
  3807. }
  3808. #endif /* CONFIG_HDLC */