cnic.c 66 KB

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  1. /* cnic.c: Broadcom CNIC core network driver.
  2. *
  3. * Copyright (c) 2006-2009 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
  10. * Modified and maintained by: Michael Chan <mchan@broadcom.com>
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/list.h>
  16. #include <linux/slab.h>
  17. #include <linux/pci.h>
  18. #include <linux/init.h>
  19. #include <linux/netdevice.h>
  20. #include <linux/uio_driver.h>
  21. #include <linux/in.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/delay.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/if_vlan.h>
  26. #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  27. #define BCM_VLAN 1
  28. #endif
  29. #include <net/ip.h>
  30. #include <net/tcp.h>
  31. #include <net/route.h>
  32. #include <net/ipv6.h>
  33. #include <net/ip6_route.h>
  34. #include <scsi/iscsi_if.h>
  35. #include "cnic_if.h"
  36. #include "bnx2.h"
  37. #include "cnic.h"
  38. #include "cnic_defs.h"
  39. #define DRV_MODULE_NAME "cnic"
  40. #define PFX DRV_MODULE_NAME ": "
  41. static char version[] __devinitdata =
  42. "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
  43. MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
  44. "Chen (zongxi@broadcom.com");
  45. MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
  46. MODULE_LICENSE("GPL");
  47. MODULE_VERSION(CNIC_MODULE_VERSION);
  48. static LIST_HEAD(cnic_dev_list);
  49. static DEFINE_RWLOCK(cnic_dev_lock);
  50. static DEFINE_MUTEX(cnic_lock);
  51. static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
  52. static int cnic_service_bnx2(void *, void *);
  53. static int cnic_ctl(void *, struct cnic_ctl_info *);
  54. static struct cnic_ops cnic_bnx2_ops = {
  55. .cnic_owner = THIS_MODULE,
  56. .cnic_handler = cnic_service_bnx2,
  57. .cnic_ctl = cnic_ctl,
  58. };
  59. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *);
  60. static void cnic_init_bnx2_tx_ring(struct cnic_dev *);
  61. static void cnic_init_bnx2_rx_ring(struct cnic_dev *);
  62. static int cnic_cm_set_pg(struct cnic_sock *);
  63. static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
  64. {
  65. struct cnic_dev *dev = uinfo->priv;
  66. struct cnic_local *cp = dev->cnic_priv;
  67. if (!capable(CAP_NET_ADMIN))
  68. return -EPERM;
  69. if (cp->uio_dev != -1)
  70. return -EBUSY;
  71. cp->uio_dev = iminor(inode);
  72. cnic_shutdown_bnx2_rx_ring(dev);
  73. cnic_init_bnx2_tx_ring(dev);
  74. cnic_init_bnx2_rx_ring(dev);
  75. return 0;
  76. }
  77. static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
  78. {
  79. struct cnic_dev *dev = uinfo->priv;
  80. struct cnic_local *cp = dev->cnic_priv;
  81. cp->uio_dev = -1;
  82. return 0;
  83. }
  84. static inline void cnic_hold(struct cnic_dev *dev)
  85. {
  86. atomic_inc(&dev->ref_count);
  87. }
  88. static inline void cnic_put(struct cnic_dev *dev)
  89. {
  90. atomic_dec(&dev->ref_count);
  91. }
  92. static inline void csk_hold(struct cnic_sock *csk)
  93. {
  94. atomic_inc(&csk->ref_count);
  95. }
  96. static inline void csk_put(struct cnic_sock *csk)
  97. {
  98. atomic_dec(&csk->ref_count);
  99. }
  100. static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
  101. {
  102. struct cnic_dev *cdev;
  103. read_lock(&cnic_dev_lock);
  104. list_for_each_entry(cdev, &cnic_dev_list, list) {
  105. if (netdev == cdev->netdev) {
  106. cnic_hold(cdev);
  107. read_unlock(&cnic_dev_lock);
  108. return cdev;
  109. }
  110. }
  111. read_unlock(&cnic_dev_lock);
  112. return NULL;
  113. }
  114. static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
  115. {
  116. atomic_inc(&ulp_ops->ref_count);
  117. }
  118. static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
  119. {
  120. atomic_dec(&ulp_ops->ref_count);
  121. }
  122. static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
  123. {
  124. struct cnic_local *cp = dev->cnic_priv;
  125. struct cnic_eth_dev *ethdev = cp->ethdev;
  126. struct drv_ctl_info info;
  127. struct drv_ctl_io *io = &info.data.io;
  128. info.cmd = DRV_CTL_CTX_WR_CMD;
  129. io->cid_addr = cid_addr;
  130. io->offset = off;
  131. io->data = val;
  132. ethdev->drv_ctl(dev->netdev, &info);
  133. }
  134. static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
  135. {
  136. struct cnic_local *cp = dev->cnic_priv;
  137. struct cnic_eth_dev *ethdev = cp->ethdev;
  138. struct drv_ctl_info info;
  139. struct drv_ctl_io *io = &info.data.io;
  140. info.cmd = DRV_CTL_IO_WR_CMD;
  141. io->offset = off;
  142. io->data = val;
  143. ethdev->drv_ctl(dev->netdev, &info);
  144. }
  145. static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
  146. {
  147. struct cnic_local *cp = dev->cnic_priv;
  148. struct cnic_eth_dev *ethdev = cp->ethdev;
  149. struct drv_ctl_info info;
  150. struct drv_ctl_io *io = &info.data.io;
  151. info.cmd = DRV_CTL_IO_RD_CMD;
  152. io->offset = off;
  153. ethdev->drv_ctl(dev->netdev, &info);
  154. return io->data;
  155. }
  156. static int cnic_in_use(struct cnic_sock *csk)
  157. {
  158. return test_bit(SK_F_INUSE, &csk->flags);
  159. }
  160. static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
  161. {
  162. struct cnic_local *cp = dev->cnic_priv;
  163. struct cnic_eth_dev *ethdev = cp->ethdev;
  164. struct drv_ctl_info info;
  165. info.cmd = DRV_CTL_COMPLETION_CMD;
  166. info.data.comp.comp_count = count;
  167. ethdev->drv_ctl(dev->netdev, &info);
  168. }
  169. static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
  170. struct cnic_sock *csk)
  171. {
  172. struct iscsi_path path_req;
  173. char *buf = NULL;
  174. u16 len = 0;
  175. u32 msg_type = ISCSI_KEVENT_IF_DOWN;
  176. struct cnic_ulp_ops *ulp_ops;
  177. if (cp->uio_dev == -1)
  178. return -ENODEV;
  179. if (csk) {
  180. len = sizeof(path_req);
  181. buf = (char *) &path_req;
  182. memset(&path_req, 0, len);
  183. msg_type = ISCSI_KEVENT_PATH_REQ;
  184. path_req.handle = (u64) csk->l5_cid;
  185. if (test_bit(SK_F_IPV6, &csk->flags)) {
  186. memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
  187. sizeof(struct in6_addr));
  188. path_req.ip_addr_len = 16;
  189. } else {
  190. memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
  191. sizeof(struct in_addr));
  192. path_req.ip_addr_len = 4;
  193. }
  194. path_req.vlan_id = csk->vlan_id;
  195. path_req.pmtu = csk->mtu;
  196. }
  197. rcu_read_lock();
  198. ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
  199. if (ulp_ops)
  200. ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
  201. rcu_read_unlock();
  202. return 0;
  203. }
  204. static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
  205. char *buf, u16 len)
  206. {
  207. int rc = -EINVAL;
  208. switch (msg_type) {
  209. case ISCSI_UEVENT_PATH_UPDATE: {
  210. struct cnic_local *cp;
  211. u32 l5_cid;
  212. struct cnic_sock *csk;
  213. struct iscsi_path *path_resp;
  214. if (len < sizeof(*path_resp))
  215. break;
  216. path_resp = (struct iscsi_path *) buf;
  217. cp = dev->cnic_priv;
  218. l5_cid = (u32) path_resp->handle;
  219. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  220. break;
  221. csk = &cp->csk_tbl[l5_cid];
  222. csk_hold(csk);
  223. if (cnic_in_use(csk)) {
  224. memcpy(csk->ha, path_resp->mac_addr, 6);
  225. if (test_bit(SK_F_IPV6, &csk->flags))
  226. memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
  227. sizeof(struct in6_addr));
  228. else
  229. memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
  230. sizeof(struct in_addr));
  231. if (is_valid_ether_addr(csk->ha))
  232. cnic_cm_set_pg(csk);
  233. }
  234. csk_put(csk);
  235. rc = 0;
  236. }
  237. }
  238. return rc;
  239. }
  240. static int cnic_offld_prep(struct cnic_sock *csk)
  241. {
  242. if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  243. return 0;
  244. if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
  245. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  246. return 0;
  247. }
  248. return 1;
  249. }
  250. static int cnic_close_prep(struct cnic_sock *csk)
  251. {
  252. clear_bit(SK_F_CONNECT_START, &csk->flags);
  253. smp_mb__after_clear_bit();
  254. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  255. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  256. msleep(1);
  257. return 1;
  258. }
  259. return 0;
  260. }
  261. static int cnic_abort_prep(struct cnic_sock *csk)
  262. {
  263. clear_bit(SK_F_CONNECT_START, &csk->flags);
  264. smp_mb__after_clear_bit();
  265. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  266. msleep(1);
  267. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  268. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  269. return 1;
  270. }
  271. return 0;
  272. }
  273. static void cnic_uio_stop(void)
  274. {
  275. struct cnic_dev *dev;
  276. read_lock(&cnic_dev_lock);
  277. list_for_each_entry(dev, &cnic_dev_list, list) {
  278. struct cnic_local *cp = dev->cnic_priv;
  279. if (cp->cnic_uinfo)
  280. cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
  281. }
  282. read_unlock(&cnic_dev_lock);
  283. }
  284. int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
  285. {
  286. struct cnic_dev *dev;
  287. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  288. printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
  289. ulp_type);
  290. return -EINVAL;
  291. }
  292. mutex_lock(&cnic_lock);
  293. if (cnic_ulp_tbl[ulp_type]) {
  294. printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
  295. "been registered\n", ulp_type);
  296. mutex_unlock(&cnic_lock);
  297. return -EBUSY;
  298. }
  299. read_lock(&cnic_dev_lock);
  300. list_for_each_entry(dev, &cnic_dev_list, list) {
  301. struct cnic_local *cp = dev->cnic_priv;
  302. clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
  303. }
  304. read_unlock(&cnic_dev_lock);
  305. atomic_set(&ulp_ops->ref_count, 0);
  306. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
  307. mutex_unlock(&cnic_lock);
  308. /* Prevent race conditions with netdev_event */
  309. rtnl_lock();
  310. read_lock(&cnic_dev_lock);
  311. list_for_each_entry(dev, &cnic_dev_list, list) {
  312. struct cnic_local *cp = dev->cnic_priv;
  313. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
  314. ulp_ops->cnic_init(dev);
  315. }
  316. read_unlock(&cnic_dev_lock);
  317. rtnl_unlock();
  318. return 0;
  319. }
  320. int cnic_unregister_driver(int ulp_type)
  321. {
  322. struct cnic_dev *dev;
  323. struct cnic_ulp_ops *ulp_ops;
  324. int i = 0;
  325. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  326. printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
  327. ulp_type);
  328. return -EINVAL;
  329. }
  330. mutex_lock(&cnic_lock);
  331. ulp_ops = cnic_ulp_tbl[ulp_type];
  332. if (!ulp_ops) {
  333. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
  334. "been registered\n", ulp_type);
  335. goto out_unlock;
  336. }
  337. read_lock(&cnic_dev_lock);
  338. list_for_each_entry(dev, &cnic_dev_list, list) {
  339. struct cnic_local *cp = dev->cnic_priv;
  340. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  341. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
  342. "still has devices registered\n", ulp_type);
  343. read_unlock(&cnic_dev_lock);
  344. goto out_unlock;
  345. }
  346. }
  347. read_unlock(&cnic_dev_lock);
  348. if (ulp_type == CNIC_ULP_ISCSI)
  349. cnic_uio_stop();
  350. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
  351. mutex_unlock(&cnic_lock);
  352. synchronize_rcu();
  353. while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
  354. msleep(100);
  355. i++;
  356. }
  357. if (atomic_read(&ulp_ops->ref_count) != 0)
  358. printk(KERN_WARNING PFX "%s: Failed waiting for ref count to go"
  359. " to zero.\n", dev->netdev->name);
  360. return 0;
  361. out_unlock:
  362. mutex_unlock(&cnic_lock);
  363. return -EINVAL;
  364. }
  365. static int cnic_start_hw(struct cnic_dev *);
  366. static void cnic_stop_hw(struct cnic_dev *);
  367. static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
  368. void *ulp_ctx)
  369. {
  370. struct cnic_local *cp = dev->cnic_priv;
  371. struct cnic_ulp_ops *ulp_ops;
  372. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  373. printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
  374. ulp_type);
  375. return -EINVAL;
  376. }
  377. mutex_lock(&cnic_lock);
  378. if (cnic_ulp_tbl[ulp_type] == NULL) {
  379. printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
  380. "has not been registered\n", ulp_type);
  381. mutex_unlock(&cnic_lock);
  382. return -EAGAIN;
  383. }
  384. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  385. printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
  386. "been registered to this device\n", ulp_type);
  387. mutex_unlock(&cnic_lock);
  388. return -EBUSY;
  389. }
  390. clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
  391. cp->ulp_handle[ulp_type] = ulp_ctx;
  392. ulp_ops = cnic_ulp_tbl[ulp_type];
  393. rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
  394. cnic_hold(dev);
  395. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  396. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
  397. ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
  398. mutex_unlock(&cnic_lock);
  399. return 0;
  400. }
  401. EXPORT_SYMBOL(cnic_register_driver);
  402. static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
  403. {
  404. struct cnic_local *cp = dev->cnic_priv;
  405. int i = 0;
  406. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  407. printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
  408. ulp_type);
  409. return -EINVAL;
  410. }
  411. mutex_lock(&cnic_lock);
  412. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  413. rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
  414. cnic_put(dev);
  415. } else {
  416. printk(KERN_ERR PFX "cnic_unregister_device: device not "
  417. "registered to this ulp type %d\n", ulp_type);
  418. mutex_unlock(&cnic_lock);
  419. return -EINVAL;
  420. }
  421. mutex_unlock(&cnic_lock);
  422. synchronize_rcu();
  423. while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
  424. i < 20) {
  425. msleep(100);
  426. i++;
  427. }
  428. if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
  429. printk(KERN_WARNING PFX "%s: Failed waiting for ULP up call"
  430. " to complete.\n", dev->netdev->name);
  431. return 0;
  432. }
  433. EXPORT_SYMBOL(cnic_unregister_driver);
  434. static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
  435. {
  436. id_tbl->start = start_id;
  437. id_tbl->max = size;
  438. id_tbl->next = 0;
  439. spin_lock_init(&id_tbl->lock);
  440. id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
  441. if (!id_tbl->table)
  442. return -ENOMEM;
  443. return 0;
  444. }
  445. static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
  446. {
  447. kfree(id_tbl->table);
  448. id_tbl->table = NULL;
  449. }
  450. static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
  451. {
  452. int ret = -1;
  453. id -= id_tbl->start;
  454. if (id >= id_tbl->max)
  455. return ret;
  456. spin_lock(&id_tbl->lock);
  457. if (!test_bit(id, id_tbl->table)) {
  458. set_bit(id, id_tbl->table);
  459. ret = 0;
  460. }
  461. spin_unlock(&id_tbl->lock);
  462. return ret;
  463. }
  464. /* Returns -1 if not successful */
  465. static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
  466. {
  467. u32 id;
  468. spin_lock(&id_tbl->lock);
  469. id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
  470. if (id >= id_tbl->max) {
  471. id = -1;
  472. if (id_tbl->next != 0) {
  473. id = find_first_zero_bit(id_tbl->table, id_tbl->next);
  474. if (id >= id_tbl->next)
  475. id = -1;
  476. }
  477. }
  478. if (id < id_tbl->max) {
  479. set_bit(id, id_tbl->table);
  480. id_tbl->next = (id + 1) & (id_tbl->max - 1);
  481. id += id_tbl->start;
  482. }
  483. spin_unlock(&id_tbl->lock);
  484. return id;
  485. }
  486. static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
  487. {
  488. if (id == -1)
  489. return;
  490. id -= id_tbl->start;
  491. if (id >= id_tbl->max)
  492. return;
  493. clear_bit(id, id_tbl->table);
  494. }
  495. static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
  496. {
  497. int i;
  498. if (!dma->pg_arr)
  499. return;
  500. for (i = 0; i < dma->num_pages; i++) {
  501. if (dma->pg_arr[i]) {
  502. pci_free_consistent(dev->pcidev, BCM_PAGE_SIZE,
  503. dma->pg_arr[i], dma->pg_map_arr[i]);
  504. dma->pg_arr[i] = NULL;
  505. }
  506. }
  507. if (dma->pgtbl) {
  508. pci_free_consistent(dev->pcidev, dma->pgtbl_size,
  509. dma->pgtbl, dma->pgtbl_map);
  510. dma->pgtbl = NULL;
  511. }
  512. kfree(dma->pg_arr);
  513. dma->pg_arr = NULL;
  514. dma->num_pages = 0;
  515. }
  516. static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
  517. {
  518. int i;
  519. u32 *page_table = dma->pgtbl;
  520. for (i = 0; i < dma->num_pages; i++) {
  521. /* Each entry needs to be in big endian format. */
  522. *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
  523. page_table++;
  524. *page_table = (u32) dma->pg_map_arr[i];
  525. page_table++;
  526. }
  527. }
  528. static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
  529. int pages, int use_pg_tbl)
  530. {
  531. int i, size;
  532. struct cnic_local *cp = dev->cnic_priv;
  533. size = pages * (sizeof(void *) + sizeof(dma_addr_t));
  534. dma->pg_arr = kzalloc(size, GFP_ATOMIC);
  535. if (dma->pg_arr == NULL)
  536. return -ENOMEM;
  537. dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
  538. dma->num_pages = pages;
  539. for (i = 0; i < pages; i++) {
  540. dma->pg_arr[i] = pci_alloc_consistent(dev->pcidev,
  541. BCM_PAGE_SIZE,
  542. &dma->pg_map_arr[i]);
  543. if (dma->pg_arr[i] == NULL)
  544. goto error;
  545. }
  546. if (!use_pg_tbl)
  547. return 0;
  548. dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
  549. ~(BCM_PAGE_SIZE - 1);
  550. dma->pgtbl = pci_alloc_consistent(dev->pcidev, dma->pgtbl_size,
  551. &dma->pgtbl_map);
  552. if (dma->pgtbl == NULL)
  553. goto error;
  554. cp->setup_pgtbl(dev, dma);
  555. return 0;
  556. error:
  557. cnic_free_dma(dev, dma);
  558. return -ENOMEM;
  559. }
  560. static void cnic_free_resc(struct cnic_dev *dev)
  561. {
  562. struct cnic_local *cp = dev->cnic_priv;
  563. int i = 0;
  564. if (cp->cnic_uinfo) {
  565. while (cp->uio_dev != -1 && i < 15) {
  566. msleep(100);
  567. i++;
  568. }
  569. uio_unregister_device(cp->cnic_uinfo);
  570. kfree(cp->cnic_uinfo);
  571. cp->cnic_uinfo = NULL;
  572. }
  573. if (cp->l2_buf) {
  574. pci_free_consistent(dev->pcidev, cp->l2_buf_size,
  575. cp->l2_buf, cp->l2_buf_map);
  576. cp->l2_buf = NULL;
  577. }
  578. if (cp->l2_ring) {
  579. pci_free_consistent(dev->pcidev, cp->l2_ring_size,
  580. cp->l2_ring, cp->l2_ring_map);
  581. cp->l2_ring = NULL;
  582. }
  583. for (i = 0; i < cp->ctx_blks; i++) {
  584. if (cp->ctx_arr[i].ctx) {
  585. pci_free_consistent(dev->pcidev, cp->ctx_blk_size,
  586. cp->ctx_arr[i].ctx,
  587. cp->ctx_arr[i].mapping);
  588. cp->ctx_arr[i].ctx = NULL;
  589. }
  590. }
  591. kfree(cp->ctx_arr);
  592. cp->ctx_arr = NULL;
  593. cp->ctx_blks = 0;
  594. cnic_free_dma(dev, &cp->gbl_buf_info);
  595. cnic_free_dma(dev, &cp->conn_buf_info);
  596. cnic_free_dma(dev, &cp->kwq_info);
  597. cnic_free_dma(dev, &cp->kcq_info);
  598. kfree(cp->iscsi_tbl);
  599. cp->iscsi_tbl = NULL;
  600. kfree(cp->ctx_tbl);
  601. cp->ctx_tbl = NULL;
  602. cnic_free_id_tbl(&cp->cid_tbl);
  603. }
  604. static int cnic_alloc_context(struct cnic_dev *dev)
  605. {
  606. struct cnic_local *cp = dev->cnic_priv;
  607. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  608. int i, k, arr_size;
  609. cp->ctx_blk_size = BCM_PAGE_SIZE;
  610. cp->cids_per_blk = BCM_PAGE_SIZE / 128;
  611. arr_size = BNX2_MAX_CID / cp->cids_per_blk *
  612. sizeof(struct cnic_ctx);
  613. cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
  614. if (cp->ctx_arr == NULL)
  615. return -ENOMEM;
  616. k = 0;
  617. for (i = 0; i < 2; i++) {
  618. u32 j, reg, off, lo, hi;
  619. if (i == 0)
  620. off = BNX2_PG_CTX_MAP;
  621. else
  622. off = BNX2_ISCSI_CTX_MAP;
  623. reg = cnic_reg_rd_ind(dev, off);
  624. lo = reg >> 16;
  625. hi = reg & 0xffff;
  626. for (j = lo; j < hi; j += cp->cids_per_blk, k++)
  627. cp->ctx_arr[k].cid = j;
  628. }
  629. cp->ctx_blks = k;
  630. if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
  631. cp->ctx_blks = 0;
  632. return -ENOMEM;
  633. }
  634. for (i = 0; i < cp->ctx_blks; i++) {
  635. cp->ctx_arr[i].ctx =
  636. pci_alloc_consistent(dev->pcidev, BCM_PAGE_SIZE,
  637. &cp->ctx_arr[i].mapping);
  638. if (cp->ctx_arr[i].ctx == NULL)
  639. return -ENOMEM;
  640. }
  641. }
  642. return 0;
  643. }
  644. static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
  645. {
  646. struct cnic_local *cp = dev->cnic_priv;
  647. struct uio_info *uinfo;
  648. int ret;
  649. ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
  650. if (ret)
  651. goto error;
  652. cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
  653. ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
  654. if (ret)
  655. goto error;
  656. cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
  657. ret = cnic_alloc_context(dev);
  658. if (ret)
  659. goto error;
  660. cp->l2_ring_size = 2 * BCM_PAGE_SIZE;
  661. cp->l2_ring = pci_alloc_consistent(dev->pcidev, cp->l2_ring_size,
  662. &cp->l2_ring_map);
  663. if (!cp->l2_ring)
  664. goto error;
  665. cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
  666. cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
  667. cp->l2_buf = pci_alloc_consistent(dev->pcidev, cp->l2_buf_size,
  668. &cp->l2_buf_map);
  669. if (!cp->l2_buf)
  670. goto error;
  671. uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
  672. if (!uinfo)
  673. goto error;
  674. uinfo->mem[0].addr = dev->netdev->base_addr;
  675. uinfo->mem[0].internal_addr = dev->regview;
  676. uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
  677. uinfo->mem[0].memtype = UIO_MEM_PHYS;
  678. uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
  679. if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
  680. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
  681. else
  682. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
  683. uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
  684. uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
  685. uinfo->mem[2].size = cp->l2_ring_size;
  686. uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
  687. uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
  688. uinfo->mem[3].size = cp->l2_buf_size;
  689. uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
  690. uinfo->name = "bnx2_cnic";
  691. uinfo->version = CNIC_MODULE_VERSION;
  692. uinfo->irq = UIO_IRQ_CUSTOM;
  693. uinfo->open = cnic_uio_open;
  694. uinfo->release = cnic_uio_close;
  695. uinfo->priv = dev;
  696. ret = uio_register_device(&dev->pcidev->dev, uinfo);
  697. if (ret) {
  698. kfree(uinfo);
  699. goto error;
  700. }
  701. cp->cnic_uinfo = uinfo;
  702. return 0;
  703. error:
  704. cnic_free_resc(dev);
  705. return ret;
  706. }
  707. static inline u32 cnic_kwq_avail(struct cnic_local *cp)
  708. {
  709. return cp->max_kwq_idx -
  710. ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
  711. }
  712. static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
  713. u32 num_wqes)
  714. {
  715. struct cnic_local *cp = dev->cnic_priv;
  716. struct kwqe *prod_qe;
  717. u16 prod, sw_prod, i;
  718. if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
  719. return -EAGAIN; /* bnx2 is down */
  720. spin_lock_bh(&cp->cnic_ulp_lock);
  721. if (num_wqes > cnic_kwq_avail(cp) &&
  722. !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
  723. spin_unlock_bh(&cp->cnic_ulp_lock);
  724. return -EAGAIN;
  725. }
  726. cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
  727. prod = cp->kwq_prod_idx;
  728. sw_prod = prod & MAX_KWQ_IDX;
  729. for (i = 0; i < num_wqes; i++) {
  730. prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
  731. memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
  732. prod++;
  733. sw_prod = prod & MAX_KWQ_IDX;
  734. }
  735. cp->kwq_prod_idx = prod;
  736. CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
  737. spin_unlock_bh(&cp->cnic_ulp_lock);
  738. return 0;
  739. }
  740. static void service_kcqes(struct cnic_dev *dev, int num_cqes)
  741. {
  742. struct cnic_local *cp = dev->cnic_priv;
  743. int i, j;
  744. i = 0;
  745. j = 1;
  746. while (num_cqes) {
  747. struct cnic_ulp_ops *ulp_ops;
  748. int ulp_type;
  749. u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
  750. u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
  751. if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
  752. cnic_kwq_completion(dev, 1);
  753. while (j < num_cqes) {
  754. u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
  755. if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
  756. break;
  757. if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
  758. cnic_kwq_completion(dev, 1);
  759. j++;
  760. }
  761. if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
  762. ulp_type = CNIC_ULP_RDMA;
  763. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
  764. ulp_type = CNIC_ULP_ISCSI;
  765. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
  766. ulp_type = CNIC_ULP_L4;
  767. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
  768. goto end;
  769. else {
  770. printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
  771. dev->netdev->name, kcqe_op_flag);
  772. goto end;
  773. }
  774. rcu_read_lock();
  775. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  776. if (likely(ulp_ops)) {
  777. ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
  778. cp->completed_kcq + i, j);
  779. }
  780. rcu_read_unlock();
  781. end:
  782. num_cqes -= j;
  783. i += j;
  784. j = 1;
  785. }
  786. return;
  787. }
  788. static u16 cnic_bnx2_next_idx(u16 idx)
  789. {
  790. return idx + 1;
  791. }
  792. static u16 cnic_bnx2_hw_idx(u16 idx)
  793. {
  794. return idx;
  795. }
  796. static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
  797. {
  798. struct cnic_local *cp = dev->cnic_priv;
  799. u16 i, ri, last;
  800. struct kcqe *kcqe;
  801. int kcqe_cnt = 0, last_cnt = 0;
  802. i = ri = last = *sw_prod;
  803. ri &= MAX_KCQ_IDX;
  804. while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
  805. kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
  806. cp->completed_kcq[kcqe_cnt++] = kcqe;
  807. i = cp->next_idx(i);
  808. ri = i & MAX_KCQ_IDX;
  809. if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
  810. last_cnt = kcqe_cnt;
  811. last = i;
  812. }
  813. }
  814. *sw_prod = last;
  815. return last_cnt;
  816. }
  817. static void cnic_chk_bnx2_pkt_rings(struct cnic_local *cp)
  818. {
  819. u16 rx_cons = *cp->rx_cons_ptr;
  820. u16 tx_cons = *cp->tx_cons_ptr;
  821. if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
  822. cp->tx_cons = tx_cons;
  823. cp->rx_cons = rx_cons;
  824. uio_event_notify(cp->cnic_uinfo);
  825. }
  826. }
  827. static int cnic_service_bnx2(void *data, void *status_blk)
  828. {
  829. struct cnic_dev *dev = data;
  830. struct status_block *sblk = status_blk;
  831. struct cnic_local *cp = dev->cnic_priv;
  832. u32 status_idx = sblk->status_idx;
  833. u16 hw_prod, sw_prod;
  834. int kcqe_cnt;
  835. if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  836. return status_idx;
  837. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  838. hw_prod = sblk->status_completion_producer_index;
  839. sw_prod = cp->kcq_prod_idx;
  840. while (sw_prod != hw_prod) {
  841. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  842. if (kcqe_cnt == 0)
  843. goto done;
  844. service_kcqes(dev, kcqe_cnt);
  845. /* Tell compiler that status_blk fields can change. */
  846. barrier();
  847. if (status_idx != sblk->status_idx) {
  848. status_idx = sblk->status_idx;
  849. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  850. hw_prod = sblk->status_completion_producer_index;
  851. } else
  852. break;
  853. }
  854. done:
  855. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  856. cp->kcq_prod_idx = sw_prod;
  857. cnic_chk_bnx2_pkt_rings(cp);
  858. return status_idx;
  859. }
  860. static void cnic_service_bnx2_msix(unsigned long data)
  861. {
  862. struct cnic_dev *dev = (struct cnic_dev *) data;
  863. struct cnic_local *cp = dev->cnic_priv;
  864. struct status_block_msix *status_blk = cp->bnx2_status_blk;
  865. u32 status_idx = status_blk->status_idx;
  866. u16 hw_prod, sw_prod;
  867. int kcqe_cnt;
  868. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  869. hw_prod = status_blk->status_completion_producer_index;
  870. sw_prod = cp->kcq_prod_idx;
  871. while (sw_prod != hw_prod) {
  872. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  873. if (kcqe_cnt == 0)
  874. goto done;
  875. service_kcqes(dev, kcqe_cnt);
  876. /* Tell compiler that status_blk fields can change. */
  877. barrier();
  878. if (status_idx != status_blk->status_idx) {
  879. status_idx = status_blk->status_idx;
  880. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  881. hw_prod = status_blk->status_completion_producer_index;
  882. } else
  883. break;
  884. }
  885. done:
  886. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  887. cp->kcq_prod_idx = sw_prod;
  888. cnic_chk_bnx2_pkt_rings(cp);
  889. cp->last_status_idx = status_idx;
  890. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  891. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  892. }
  893. static irqreturn_t cnic_irq(int irq, void *dev_instance)
  894. {
  895. struct cnic_dev *dev = dev_instance;
  896. struct cnic_local *cp = dev->cnic_priv;
  897. u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
  898. if (cp->ack_int)
  899. cp->ack_int(dev);
  900. prefetch(cp->status_blk);
  901. prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
  902. if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  903. tasklet_schedule(&cp->cnic_irq_task);
  904. return IRQ_HANDLED;
  905. }
  906. static void cnic_ulp_stop(struct cnic_dev *dev)
  907. {
  908. struct cnic_local *cp = dev->cnic_priv;
  909. int if_type;
  910. if (cp->cnic_uinfo)
  911. cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
  912. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  913. struct cnic_ulp_ops *ulp_ops;
  914. mutex_lock(&cnic_lock);
  915. ulp_ops = cp->ulp_ops[if_type];
  916. if (!ulp_ops) {
  917. mutex_unlock(&cnic_lock);
  918. continue;
  919. }
  920. set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
  921. mutex_unlock(&cnic_lock);
  922. if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  923. ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
  924. clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
  925. }
  926. }
  927. static void cnic_ulp_start(struct cnic_dev *dev)
  928. {
  929. struct cnic_local *cp = dev->cnic_priv;
  930. int if_type;
  931. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  932. struct cnic_ulp_ops *ulp_ops;
  933. mutex_lock(&cnic_lock);
  934. ulp_ops = cp->ulp_ops[if_type];
  935. if (!ulp_ops || !ulp_ops->cnic_start) {
  936. mutex_unlock(&cnic_lock);
  937. continue;
  938. }
  939. set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
  940. mutex_unlock(&cnic_lock);
  941. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  942. ulp_ops->cnic_start(cp->ulp_handle[if_type]);
  943. clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
  944. }
  945. }
  946. static int cnic_ctl(void *data, struct cnic_ctl_info *info)
  947. {
  948. struct cnic_dev *dev = data;
  949. switch (info->cmd) {
  950. case CNIC_CTL_STOP_CMD:
  951. cnic_hold(dev);
  952. cnic_ulp_stop(dev);
  953. cnic_stop_hw(dev);
  954. cnic_put(dev);
  955. break;
  956. case CNIC_CTL_START_CMD:
  957. cnic_hold(dev);
  958. if (!cnic_start_hw(dev))
  959. cnic_ulp_start(dev);
  960. cnic_put(dev);
  961. break;
  962. default:
  963. return -EINVAL;
  964. }
  965. return 0;
  966. }
  967. static void cnic_ulp_init(struct cnic_dev *dev)
  968. {
  969. int i;
  970. struct cnic_local *cp = dev->cnic_priv;
  971. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  972. struct cnic_ulp_ops *ulp_ops;
  973. mutex_lock(&cnic_lock);
  974. ulp_ops = cnic_ulp_tbl[i];
  975. if (!ulp_ops || !ulp_ops->cnic_init) {
  976. mutex_unlock(&cnic_lock);
  977. continue;
  978. }
  979. ulp_get(ulp_ops);
  980. mutex_unlock(&cnic_lock);
  981. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  982. ulp_ops->cnic_init(dev);
  983. ulp_put(ulp_ops);
  984. }
  985. }
  986. static void cnic_ulp_exit(struct cnic_dev *dev)
  987. {
  988. int i;
  989. struct cnic_local *cp = dev->cnic_priv;
  990. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  991. struct cnic_ulp_ops *ulp_ops;
  992. mutex_lock(&cnic_lock);
  993. ulp_ops = cnic_ulp_tbl[i];
  994. if (!ulp_ops || !ulp_ops->cnic_exit) {
  995. mutex_unlock(&cnic_lock);
  996. continue;
  997. }
  998. ulp_get(ulp_ops);
  999. mutex_unlock(&cnic_lock);
  1000. if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  1001. ulp_ops->cnic_exit(dev);
  1002. ulp_put(ulp_ops);
  1003. }
  1004. }
  1005. static int cnic_cm_offload_pg(struct cnic_sock *csk)
  1006. {
  1007. struct cnic_dev *dev = csk->dev;
  1008. struct l4_kwq_offload_pg *l4kwqe;
  1009. struct kwqe *wqes[1];
  1010. l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
  1011. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1012. wqes[0] = (struct kwqe *) l4kwqe;
  1013. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
  1014. l4kwqe->flags =
  1015. L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
  1016. l4kwqe->l2hdr_nbytes = ETH_HLEN;
  1017. l4kwqe->da0 = csk->ha[0];
  1018. l4kwqe->da1 = csk->ha[1];
  1019. l4kwqe->da2 = csk->ha[2];
  1020. l4kwqe->da3 = csk->ha[3];
  1021. l4kwqe->da4 = csk->ha[4];
  1022. l4kwqe->da5 = csk->ha[5];
  1023. l4kwqe->sa0 = dev->mac_addr[0];
  1024. l4kwqe->sa1 = dev->mac_addr[1];
  1025. l4kwqe->sa2 = dev->mac_addr[2];
  1026. l4kwqe->sa3 = dev->mac_addr[3];
  1027. l4kwqe->sa4 = dev->mac_addr[4];
  1028. l4kwqe->sa5 = dev->mac_addr[5];
  1029. l4kwqe->etype = ETH_P_IP;
  1030. l4kwqe->ipid_count = DEF_IPID_COUNT;
  1031. l4kwqe->host_opaque = csk->l5_cid;
  1032. if (csk->vlan_id) {
  1033. l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
  1034. l4kwqe->vlan_tag = csk->vlan_id;
  1035. l4kwqe->l2hdr_nbytes += 4;
  1036. }
  1037. return dev->submit_kwqes(dev, wqes, 1);
  1038. }
  1039. static int cnic_cm_update_pg(struct cnic_sock *csk)
  1040. {
  1041. struct cnic_dev *dev = csk->dev;
  1042. struct l4_kwq_update_pg *l4kwqe;
  1043. struct kwqe *wqes[1];
  1044. l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
  1045. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1046. wqes[0] = (struct kwqe *) l4kwqe;
  1047. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
  1048. l4kwqe->flags =
  1049. L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
  1050. l4kwqe->pg_cid = csk->pg_cid;
  1051. l4kwqe->da0 = csk->ha[0];
  1052. l4kwqe->da1 = csk->ha[1];
  1053. l4kwqe->da2 = csk->ha[2];
  1054. l4kwqe->da3 = csk->ha[3];
  1055. l4kwqe->da4 = csk->ha[4];
  1056. l4kwqe->da5 = csk->ha[5];
  1057. l4kwqe->pg_host_opaque = csk->l5_cid;
  1058. l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
  1059. return dev->submit_kwqes(dev, wqes, 1);
  1060. }
  1061. static int cnic_cm_upload_pg(struct cnic_sock *csk)
  1062. {
  1063. struct cnic_dev *dev = csk->dev;
  1064. struct l4_kwq_upload *l4kwqe;
  1065. struct kwqe *wqes[1];
  1066. l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
  1067. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1068. wqes[0] = (struct kwqe *) l4kwqe;
  1069. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
  1070. l4kwqe->flags =
  1071. L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
  1072. l4kwqe->cid = csk->pg_cid;
  1073. return dev->submit_kwqes(dev, wqes, 1);
  1074. }
  1075. static int cnic_cm_conn_req(struct cnic_sock *csk)
  1076. {
  1077. struct cnic_dev *dev = csk->dev;
  1078. struct l4_kwq_connect_req1 *l4kwqe1;
  1079. struct l4_kwq_connect_req2 *l4kwqe2;
  1080. struct l4_kwq_connect_req3 *l4kwqe3;
  1081. struct kwqe *wqes[3];
  1082. u8 tcp_flags = 0;
  1083. int num_wqes = 2;
  1084. l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
  1085. l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
  1086. l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
  1087. memset(l4kwqe1, 0, sizeof(*l4kwqe1));
  1088. memset(l4kwqe2, 0, sizeof(*l4kwqe2));
  1089. memset(l4kwqe3, 0, sizeof(*l4kwqe3));
  1090. l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
  1091. l4kwqe3->flags =
  1092. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
  1093. l4kwqe3->ka_timeout = csk->ka_timeout;
  1094. l4kwqe3->ka_interval = csk->ka_interval;
  1095. l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
  1096. l4kwqe3->tos = csk->tos;
  1097. l4kwqe3->ttl = csk->ttl;
  1098. l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
  1099. l4kwqe3->pmtu = csk->mtu;
  1100. l4kwqe3->rcv_buf = csk->rcv_buf;
  1101. l4kwqe3->snd_buf = csk->snd_buf;
  1102. l4kwqe3->seed = csk->seed;
  1103. wqes[0] = (struct kwqe *) l4kwqe1;
  1104. if (test_bit(SK_F_IPV6, &csk->flags)) {
  1105. wqes[1] = (struct kwqe *) l4kwqe2;
  1106. wqes[2] = (struct kwqe *) l4kwqe3;
  1107. num_wqes = 3;
  1108. l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
  1109. l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
  1110. l4kwqe2->flags =
  1111. L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
  1112. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
  1113. l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
  1114. l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
  1115. l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
  1116. l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
  1117. l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
  1118. l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
  1119. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
  1120. sizeof(struct tcphdr);
  1121. } else {
  1122. wqes[1] = (struct kwqe *) l4kwqe3;
  1123. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
  1124. sizeof(struct tcphdr);
  1125. }
  1126. l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
  1127. l4kwqe1->flags =
  1128. (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
  1129. L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
  1130. l4kwqe1->cid = csk->cid;
  1131. l4kwqe1->pg_cid = csk->pg_cid;
  1132. l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
  1133. l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
  1134. l4kwqe1->src_port = be16_to_cpu(csk->src_port);
  1135. l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
  1136. if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
  1137. tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
  1138. if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
  1139. tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
  1140. if (csk->tcp_flags & SK_TCP_NAGLE)
  1141. tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
  1142. if (csk->tcp_flags & SK_TCP_TIMESTAMP)
  1143. tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
  1144. if (csk->tcp_flags & SK_TCP_SACK)
  1145. tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
  1146. if (csk->tcp_flags & SK_TCP_SEG_SCALING)
  1147. tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
  1148. l4kwqe1->tcp_flags = tcp_flags;
  1149. return dev->submit_kwqes(dev, wqes, num_wqes);
  1150. }
  1151. static int cnic_cm_close_req(struct cnic_sock *csk)
  1152. {
  1153. struct cnic_dev *dev = csk->dev;
  1154. struct l4_kwq_close_req *l4kwqe;
  1155. struct kwqe *wqes[1];
  1156. l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
  1157. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1158. wqes[0] = (struct kwqe *) l4kwqe;
  1159. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
  1160. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
  1161. l4kwqe->cid = csk->cid;
  1162. return dev->submit_kwqes(dev, wqes, 1);
  1163. }
  1164. static int cnic_cm_abort_req(struct cnic_sock *csk)
  1165. {
  1166. struct cnic_dev *dev = csk->dev;
  1167. struct l4_kwq_reset_req *l4kwqe;
  1168. struct kwqe *wqes[1];
  1169. l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
  1170. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1171. wqes[0] = (struct kwqe *) l4kwqe;
  1172. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
  1173. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
  1174. l4kwqe->cid = csk->cid;
  1175. return dev->submit_kwqes(dev, wqes, 1);
  1176. }
  1177. static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
  1178. u32 l5_cid, struct cnic_sock **csk, void *context)
  1179. {
  1180. struct cnic_local *cp = dev->cnic_priv;
  1181. struct cnic_sock *csk1;
  1182. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1183. return -EINVAL;
  1184. csk1 = &cp->csk_tbl[l5_cid];
  1185. if (atomic_read(&csk1->ref_count))
  1186. return -EAGAIN;
  1187. if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
  1188. return -EBUSY;
  1189. csk1->dev = dev;
  1190. csk1->cid = cid;
  1191. csk1->l5_cid = l5_cid;
  1192. csk1->ulp_type = ulp_type;
  1193. csk1->context = context;
  1194. csk1->ka_timeout = DEF_KA_TIMEOUT;
  1195. csk1->ka_interval = DEF_KA_INTERVAL;
  1196. csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
  1197. csk1->tos = DEF_TOS;
  1198. csk1->ttl = DEF_TTL;
  1199. csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
  1200. csk1->rcv_buf = DEF_RCV_BUF;
  1201. csk1->snd_buf = DEF_SND_BUF;
  1202. csk1->seed = DEF_SEED;
  1203. *csk = csk1;
  1204. return 0;
  1205. }
  1206. static void cnic_cm_cleanup(struct cnic_sock *csk)
  1207. {
  1208. if (csk->src_port) {
  1209. struct cnic_dev *dev = csk->dev;
  1210. struct cnic_local *cp = dev->cnic_priv;
  1211. cnic_free_id(&cp->csk_port_tbl, csk->src_port);
  1212. csk->src_port = 0;
  1213. }
  1214. }
  1215. static void cnic_close_conn(struct cnic_sock *csk)
  1216. {
  1217. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
  1218. cnic_cm_upload_pg(csk);
  1219. clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1220. }
  1221. cnic_cm_cleanup(csk);
  1222. }
  1223. static int cnic_cm_destroy(struct cnic_sock *csk)
  1224. {
  1225. if (!cnic_in_use(csk))
  1226. return -EINVAL;
  1227. csk_hold(csk);
  1228. clear_bit(SK_F_INUSE, &csk->flags);
  1229. smp_mb__after_clear_bit();
  1230. while (atomic_read(&csk->ref_count) != 1)
  1231. msleep(1);
  1232. cnic_cm_cleanup(csk);
  1233. csk->flags = 0;
  1234. csk_put(csk);
  1235. return 0;
  1236. }
  1237. static inline u16 cnic_get_vlan(struct net_device *dev,
  1238. struct net_device **vlan_dev)
  1239. {
  1240. if (dev->priv_flags & IFF_802_1Q_VLAN) {
  1241. *vlan_dev = vlan_dev_real_dev(dev);
  1242. return vlan_dev_vlan_id(dev);
  1243. }
  1244. *vlan_dev = dev;
  1245. return 0;
  1246. }
  1247. static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
  1248. struct dst_entry **dst)
  1249. {
  1250. #if defined(CONFIG_INET)
  1251. struct flowi fl;
  1252. int err;
  1253. struct rtable *rt;
  1254. memset(&fl, 0, sizeof(fl));
  1255. fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
  1256. err = ip_route_output_key(&init_net, &rt, &fl);
  1257. if (!err)
  1258. *dst = &rt->u.dst;
  1259. return err;
  1260. #else
  1261. return -ENETUNREACH;
  1262. #endif
  1263. }
  1264. static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
  1265. struct dst_entry **dst)
  1266. {
  1267. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1268. struct flowi fl;
  1269. memset(&fl, 0, sizeof(fl));
  1270. ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
  1271. if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
  1272. fl.oif = dst_addr->sin6_scope_id;
  1273. *dst = ip6_route_output(&init_net, NULL, &fl);
  1274. if (*dst)
  1275. return 0;
  1276. #endif
  1277. return -ENETUNREACH;
  1278. }
  1279. static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
  1280. int ulp_type)
  1281. {
  1282. struct cnic_dev *dev = NULL;
  1283. struct dst_entry *dst;
  1284. struct net_device *netdev = NULL;
  1285. int err = -ENETUNREACH;
  1286. if (dst_addr->sin_family == AF_INET)
  1287. err = cnic_get_v4_route(dst_addr, &dst);
  1288. else if (dst_addr->sin_family == AF_INET6) {
  1289. struct sockaddr_in6 *dst_addr6 =
  1290. (struct sockaddr_in6 *) dst_addr;
  1291. err = cnic_get_v6_route(dst_addr6, &dst);
  1292. } else
  1293. return NULL;
  1294. if (err)
  1295. return NULL;
  1296. if (!dst->dev)
  1297. goto done;
  1298. cnic_get_vlan(dst->dev, &netdev);
  1299. dev = cnic_from_netdev(netdev);
  1300. done:
  1301. dst_release(dst);
  1302. if (dev)
  1303. cnic_put(dev);
  1304. return dev;
  1305. }
  1306. static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1307. {
  1308. struct cnic_dev *dev = csk->dev;
  1309. struct cnic_local *cp = dev->cnic_priv;
  1310. return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
  1311. }
  1312. static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1313. {
  1314. struct cnic_dev *dev = csk->dev;
  1315. struct cnic_local *cp = dev->cnic_priv;
  1316. int is_v6, err, rc = -ENETUNREACH;
  1317. struct dst_entry *dst;
  1318. struct net_device *realdev;
  1319. u32 local_port;
  1320. if (saddr->local.v6.sin6_family == AF_INET6 &&
  1321. saddr->remote.v6.sin6_family == AF_INET6)
  1322. is_v6 = 1;
  1323. else if (saddr->local.v4.sin_family == AF_INET &&
  1324. saddr->remote.v4.sin_family == AF_INET)
  1325. is_v6 = 0;
  1326. else
  1327. return -EINVAL;
  1328. clear_bit(SK_F_IPV6, &csk->flags);
  1329. if (is_v6) {
  1330. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1331. set_bit(SK_F_IPV6, &csk->flags);
  1332. err = cnic_get_v6_route(&saddr->remote.v6, &dst);
  1333. if (err)
  1334. return err;
  1335. if (!dst || dst->error || !dst->dev)
  1336. goto err_out;
  1337. memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
  1338. sizeof(struct in6_addr));
  1339. csk->dst_port = saddr->remote.v6.sin6_port;
  1340. local_port = saddr->local.v6.sin6_port;
  1341. #else
  1342. return rc;
  1343. #endif
  1344. } else {
  1345. err = cnic_get_v4_route(&saddr->remote.v4, &dst);
  1346. if (err)
  1347. return err;
  1348. if (!dst || dst->error || !dst->dev)
  1349. goto err_out;
  1350. csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
  1351. csk->dst_port = saddr->remote.v4.sin_port;
  1352. local_port = saddr->local.v4.sin_port;
  1353. }
  1354. csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
  1355. if (realdev != dev->netdev)
  1356. goto err_out;
  1357. if (local_port >= CNIC_LOCAL_PORT_MIN &&
  1358. local_port < CNIC_LOCAL_PORT_MAX) {
  1359. if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
  1360. local_port = 0;
  1361. } else
  1362. local_port = 0;
  1363. if (!local_port) {
  1364. local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
  1365. if (local_port == -1) {
  1366. rc = -ENOMEM;
  1367. goto err_out;
  1368. }
  1369. }
  1370. csk->src_port = local_port;
  1371. csk->mtu = dst_mtu(dst);
  1372. rc = 0;
  1373. err_out:
  1374. dst_release(dst);
  1375. return rc;
  1376. }
  1377. static void cnic_init_csk_state(struct cnic_sock *csk)
  1378. {
  1379. csk->state = 0;
  1380. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1381. clear_bit(SK_F_CLOSING, &csk->flags);
  1382. }
  1383. static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1384. {
  1385. int err = 0;
  1386. if (!cnic_in_use(csk))
  1387. return -EINVAL;
  1388. if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
  1389. return -EINVAL;
  1390. cnic_init_csk_state(csk);
  1391. err = cnic_get_route(csk, saddr);
  1392. if (err)
  1393. goto err_out;
  1394. err = cnic_resolve_addr(csk, saddr);
  1395. if (!err)
  1396. return 0;
  1397. err_out:
  1398. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1399. return err;
  1400. }
  1401. static int cnic_cm_abort(struct cnic_sock *csk)
  1402. {
  1403. struct cnic_local *cp = csk->dev->cnic_priv;
  1404. u32 opcode;
  1405. if (!cnic_in_use(csk))
  1406. return -EINVAL;
  1407. if (cnic_abort_prep(csk))
  1408. return cnic_cm_abort_req(csk);
  1409. /* Getting here means that we haven't started connect, or
  1410. * connect was not successful.
  1411. */
  1412. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  1413. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1414. opcode = csk->state;
  1415. else
  1416. opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
  1417. cp->close_conn(csk, opcode);
  1418. return 0;
  1419. }
  1420. static int cnic_cm_close(struct cnic_sock *csk)
  1421. {
  1422. if (!cnic_in_use(csk))
  1423. return -EINVAL;
  1424. if (cnic_close_prep(csk)) {
  1425. csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
  1426. return cnic_cm_close_req(csk);
  1427. }
  1428. return 0;
  1429. }
  1430. static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
  1431. u8 opcode)
  1432. {
  1433. struct cnic_ulp_ops *ulp_ops;
  1434. int ulp_type = csk->ulp_type;
  1435. rcu_read_lock();
  1436. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  1437. if (ulp_ops) {
  1438. if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
  1439. ulp_ops->cm_connect_complete(csk);
  1440. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
  1441. ulp_ops->cm_close_complete(csk);
  1442. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
  1443. ulp_ops->cm_remote_abort(csk);
  1444. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
  1445. ulp_ops->cm_abort_complete(csk);
  1446. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
  1447. ulp_ops->cm_remote_close(csk);
  1448. }
  1449. rcu_read_unlock();
  1450. }
  1451. static int cnic_cm_set_pg(struct cnic_sock *csk)
  1452. {
  1453. if (cnic_offld_prep(csk)) {
  1454. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1455. cnic_cm_update_pg(csk);
  1456. else
  1457. cnic_cm_offload_pg(csk);
  1458. }
  1459. return 0;
  1460. }
  1461. static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
  1462. {
  1463. struct cnic_local *cp = dev->cnic_priv;
  1464. u32 l5_cid = kcqe->pg_host_opaque;
  1465. u8 opcode = kcqe->op_code;
  1466. struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
  1467. csk_hold(csk);
  1468. if (!cnic_in_use(csk))
  1469. goto done;
  1470. if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1471. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1472. goto done;
  1473. }
  1474. csk->pg_cid = kcqe->pg_cid;
  1475. set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1476. cnic_cm_conn_req(csk);
  1477. done:
  1478. csk_put(csk);
  1479. }
  1480. static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
  1481. {
  1482. struct cnic_local *cp = dev->cnic_priv;
  1483. struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
  1484. u8 opcode = l4kcqe->op_code;
  1485. u32 l5_cid;
  1486. struct cnic_sock *csk;
  1487. if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
  1488. opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1489. cnic_cm_process_offld_pg(dev, l4kcqe);
  1490. return;
  1491. }
  1492. l5_cid = l4kcqe->conn_id;
  1493. if (opcode & 0x80)
  1494. l5_cid = l4kcqe->cid;
  1495. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1496. return;
  1497. csk = &cp->csk_tbl[l5_cid];
  1498. csk_hold(csk);
  1499. if (!cnic_in_use(csk)) {
  1500. csk_put(csk);
  1501. return;
  1502. }
  1503. switch (opcode) {
  1504. case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
  1505. if (l4kcqe->status == 0)
  1506. set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
  1507. smp_mb__before_clear_bit();
  1508. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1509. cnic_cm_upcall(cp, csk, opcode);
  1510. break;
  1511. case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
  1512. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
  1513. csk->state = opcode;
  1514. /* fall through */
  1515. case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
  1516. case L4_KCQE_OPCODE_VALUE_RESET_COMP:
  1517. cp->close_conn(csk, opcode);
  1518. break;
  1519. case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
  1520. cnic_cm_upcall(cp, csk, opcode);
  1521. break;
  1522. }
  1523. csk_put(csk);
  1524. }
  1525. static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
  1526. {
  1527. struct cnic_dev *dev = data;
  1528. int i;
  1529. for (i = 0; i < num; i++)
  1530. cnic_cm_process_kcqe(dev, kcqe[i]);
  1531. }
  1532. static struct cnic_ulp_ops cm_ulp_ops = {
  1533. .indicate_kcqes = cnic_cm_indicate_kcqe,
  1534. };
  1535. static void cnic_cm_free_mem(struct cnic_dev *dev)
  1536. {
  1537. struct cnic_local *cp = dev->cnic_priv;
  1538. kfree(cp->csk_tbl);
  1539. cp->csk_tbl = NULL;
  1540. cnic_free_id_tbl(&cp->csk_port_tbl);
  1541. }
  1542. static int cnic_cm_alloc_mem(struct cnic_dev *dev)
  1543. {
  1544. struct cnic_local *cp = dev->cnic_priv;
  1545. cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
  1546. GFP_KERNEL);
  1547. if (!cp->csk_tbl)
  1548. return -ENOMEM;
  1549. if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
  1550. CNIC_LOCAL_PORT_MIN)) {
  1551. cnic_cm_free_mem(dev);
  1552. return -ENOMEM;
  1553. }
  1554. return 0;
  1555. }
  1556. static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
  1557. {
  1558. if ((opcode == csk->state) ||
  1559. (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
  1560. csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
  1561. if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
  1562. return 1;
  1563. }
  1564. return 0;
  1565. }
  1566. static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
  1567. {
  1568. struct cnic_dev *dev = csk->dev;
  1569. struct cnic_local *cp = dev->cnic_priv;
  1570. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1571. if (cnic_ready_to_close(csk, opcode)) {
  1572. cnic_close_conn(csk);
  1573. cnic_cm_upcall(cp, csk, opcode);
  1574. }
  1575. }
  1576. static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
  1577. {
  1578. }
  1579. static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
  1580. {
  1581. u32 seed;
  1582. get_random_bytes(&seed, 4);
  1583. cnic_ctx_wr(dev, 45, 0, seed);
  1584. return 0;
  1585. }
  1586. static int cnic_cm_open(struct cnic_dev *dev)
  1587. {
  1588. struct cnic_local *cp = dev->cnic_priv;
  1589. int err;
  1590. err = cnic_cm_alloc_mem(dev);
  1591. if (err)
  1592. return err;
  1593. err = cp->start_cm(dev);
  1594. if (err)
  1595. goto err_out;
  1596. dev->cm_create = cnic_cm_create;
  1597. dev->cm_destroy = cnic_cm_destroy;
  1598. dev->cm_connect = cnic_cm_connect;
  1599. dev->cm_abort = cnic_cm_abort;
  1600. dev->cm_close = cnic_cm_close;
  1601. dev->cm_select_dev = cnic_cm_select_dev;
  1602. cp->ulp_handle[CNIC_ULP_L4] = dev;
  1603. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
  1604. return 0;
  1605. err_out:
  1606. cnic_cm_free_mem(dev);
  1607. return err;
  1608. }
  1609. static int cnic_cm_shutdown(struct cnic_dev *dev)
  1610. {
  1611. struct cnic_local *cp = dev->cnic_priv;
  1612. int i;
  1613. cp->stop_cm(dev);
  1614. if (!cp->csk_tbl)
  1615. return 0;
  1616. for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
  1617. struct cnic_sock *csk = &cp->csk_tbl[i];
  1618. clear_bit(SK_F_INUSE, &csk->flags);
  1619. cnic_cm_cleanup(csk);
  1620. }
  1621. cnic_cm_free_mem(dev);
  1622. return 0;
  1623. }
  1624. static void cnic_init_context(struct cnic_dev *dev, u32 cid)
  1625. {
  1626. struct cnic_local *cp = dev->cnic_priv;
  1627. u32 cid_addr;
  1628. int i;
  1629. if (CHIP_NUM(cp) == CHIP_NUM_5709)
  1630. return;
  1631. cid_addr = GET_CID_ADDR(cid);
  1632. for (i = 0; i < CTX_SIZE; i += 4)
  1633. cnic_ctx_wr(dev, cid_addr, i, 0);
  1634. }
  1635. static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
  1636. {
  1637. struct cnic_local *cp = dev->cnic_priv;
  1638. int ret = 0, i;
  1639. u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
  1640. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1641. return 0;
  1642. for (i = 0; i < cp->ctx_blks; i++) {
  1643. int j;
  1644. u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
  1645. u32 val;
  1646. memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
  1647. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
  1648. (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
  1649. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
  1650. (u64) cp->ctx_arr[i].mapping >> 32);
  1651. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
  1652. BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
  1653. for (j = 0; j < 10; j++) {
  1654. val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
  1655. if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
  1656. break;
  1657. udelay(5);
  1658. }
  1659. if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
  1660. ret = -EBUSY;
  1661. break;
  1662. }
  1663. }
  1664. return ret;
  1665. }
  1666. static void cnic_free_irq(struct cnic_dev *dev)
  1667. {
  1668. struct cnic_local *cp = dev->cnic_priv;
  1669. struct cnic_eth_dev *ethdev = cp->ethdev;
  1670. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1671. cp->disable_int_sync(dev);
  1672. tasklet_disable(&cp->cnic_irq_task);
  1673. free_irq(ethdev->irq_arr[0].vector, dev);
  1674. }
  1675. }
  1676. static int cnic_init_bnx2_irq(struct cnic_dev *dev)
  1677. {
  1678. struct cnic_local *cp = dev->cnic_priv;
  1679. struct cnic_eth_dev *ethdev = cp->ethdev;
  1680. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1681. int err, i = 0;
  1682. int sblk_num = cp->status_blk_num;
  1683. u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
  1684. BNX2_HC_SB_CONFIG_1;
  1685. CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
  1686. CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
  1687. CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
  1688. CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
  1689. cp->bnx2_status_blk = cp->status_blk;
  1690. cp->last_status_idx = cp->bnx2_status_blk->status_idx;
  1691. tasklet_init(&cp->cnic_irq_task, &cnic_service_bnx2_msix,
  1692. (unsigned long) dev);
  1693. err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
  1694. "cnic", dev);
  1695. if (err) {
  1696. tasklet_disable(&cp->cnic_irq_task);
  1697. return err;
  1698. }
  1699. while (cp->bnx2_status_blk->status_completion_producer_index &&
  1700. i < 10) {
  1701. CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
  1702. 1 << (11 + sblk_num));
  1703. udelay(10);
  1704. i++;
  1705. barrier();
  1706. }
  1707. if (cp->bnx2_status_blk->status_completion_producer_index) {
  1708. cnic_free_irq(dev);
  1709. goto failed;
  1710. }
  1711. } else {
  1712. struct status_block *sblk = cp->status_blk;
  1713. u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
  1714. int i = 0;
  1715. while (sblk->status_completion_producer_index && i < 10) {
  1716. CNIC_WR(dev, BNX2_HC_COMMAND,
  1717. hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
  1718. udelay(10);
  1719. i++;
  1720. barrier();
  1721. }
  1722. if (sblk->status_completion_producer_index)
  1723. goto failed;
  1724. }
  1725. return 0;
  1726. failed:
  1727. printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
  1728. dev->netdev->name);
  1729. return -EBUSY;
  1730. }
  1731. static void cnic_enable_bnx2_int(struct cnic_dev *dev)
  1732. {
  1733. struct cnic_local *cp = dev->cnic_priv;
  1734. struct cnic_eth_dev *ethdev = cp->ethdev;
  1735. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1736. return;
  1737. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1738. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  1739. }
  1740. static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
  1741. {
  1742. struct cnic_local *cp = dev->cnic_priv;
  1743. struct cnic_eth_dev *ethdev = cp->ethdev;
  1744. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1745. return;
  1746. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1747. BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
  1748. CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
  1749. synchronize_irq(ethdev->irq_arr[0].vector);
  1750. }
  1751. static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
  1752. {
  1753. struct cnic_local *cp = dev->cnic_priv;
  1754. struct cnic_eth_dev *ethdev = cp->ethdev;
  1755. u32 cid_addr, tx_cid, sb_id;
  1756. u32 val, offset0, offset1, offset2, offset3;
  1757. int i;
  1758. struct tx_bd *txbd;
  1759. dma_addr_t buf_map;
  1760. struct status_block *s_blk = cp->status_blk;
  1761. sb_id = cp->status_blk_num;
  1762. tx_cid = 20;
  1763. cnic_init_context(dev, tx_cid);
  1764. cnic_init_context(dev, tx_cid + 1);
  1765. cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
  1766. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1767. struct status_block_msix *sblk = cp->status_blk;
  1768. tx_cid = TX_TSS_CID + sb_id - 1;
  1769. cnic_init_context(dev, tx_cid);
  1770. CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
  1771. (TX_TSS_CID << 7));
  1772. cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
  1773. }
  1774. cp->tx_cons = *cp->tx_cons_ptr;
  1775. cid_addr = GET_CID_ADDR(tx_cid);
  1776. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  1777. u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
  1778. for (i = 0; i < PHY_CTX_SIZE; i += 4)
  1779. cnic_ctx_wr(dev, cid_addr2, i, 0);
  1780. offset0 = BNX2_L2CTX_TYPE_XI;
  1781. offset1 = BNX2_L2CTX_CMD_TYPE_XI;
  1782. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
  1783. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
  1784. } else {
  1785. offset0 = BNX2_L2CTX_TYPE;
  1786. offset1 = BNX2_L2CTX_CMD_TYPE;
  1787. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
  1788. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
  1789. }
  1790. val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
  1791. cnic_ctx_wr(dev, cid_addr, offset0, val);
  1792. val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
  1793. cnic_ctx_wr(dev, cid_addr, offset1, val);
  1794. txbd = (struct tx_bd *) cp->l2_ring;
  1795. buf_map = cp->l2_buf_map;
  1796. for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
  1797. txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
  1798. txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1799. }
  1800. val = (u64) cp->l2_ring_map >> 32;
  1801. cnic_ctx_wr(dev, cid_addr, offset2, val);
  1802. txbd->tx_bd_haddr_hi = val;
  1803. val = (u64) cp->l2_ring_map & 0xffffffff;
  1804. cnic_ctx_wr(dev, cid_addr, offset3, val);
  1805. txbd->tx_bd_haddr_lo = val;
  1806. }
  1807. static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
  1808. {
  1809. struct cnic_local *cp = dev->cnic_priv;
  1810. struct cnic_eth_dev *ethdev = cp->ethdev;
  1811. u32 cid_addr, sb_id, val, coal_reg, coal_val;
  1812. int i;
  1813. struct rx_bd *rxbd;
  1814. struct status_block *s_blk = cp->status_blk;
  1815. sb_id = cp->status_blk_num;
  1816. cnic_init_context(dev, 2);
  1817. cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
  1818. coal_reg = BNX2_HC_COMMAND;
  1819. coal_val = CNIC_RD(dev, coal_reg);
  1820. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1821. struct status_block_msix *sblk = cp->status_blk;
  1822. cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
  1823. coal_reg = BNX2_HC_COALESCE_NOW;
  1824. coal_val = 1 << (11 + sb_id);
  1825. }
  1826. i = 0;
  1827. while (!(*cp->rx_cons_ptr != 0) && i < 10) {
  1828. CNIC_WR(dev, coal_reg, coal_val);
  1829. udelay(10);
  1830. i++;
  1831. barrier();
  1832. }
  1833. cp->rx_cons = *cp->rx_cons_ptr;
  1834. cid_addr = GET_CID_ADDR(2);
  1835. val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
  1836. BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
  1837. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
  1838. if (sb_id == 0)
  1839. val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT;
  1840. else
  1841. val = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1842. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
  1843. rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
  1844. for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
  1845. dma_addr_t buf_map;
  1846. int n = (i % cp->l2_rx_ring_size) + 1;
  1847. buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
  1848. rxbd->rx_bd_len = cp->l2_single_buf_size;
  1849. rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
  1850. rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
  1851. rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1852. }
  1853. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
  1854. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
  1855. rxbd->rx_bd_haddr_hi = val;
  1856. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
  1857. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
  1858. rxbd->rx_bd_haddr_lo = val;
  1859. val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
  1860. cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
  1861. }
  1862. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
  1863. {
  1864. struct kwqe *wqes[1], l2kwqe;
  1865. memset(&l2kwqe, 0, sizeof(l2kwqe));
  1866. wqes[0] = &l2kwqe;
  1867. l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
  1868. (L2_KWQE_OPCODE_VALUE_FLUSH <<
  1869. KWQE_OPCODE_SHIFT) | 2;
  1870. dev->submit_kwqes(dev, wqes, 1);
  1871. }
  1872. static void cnic_set_bnx2_mac(struct cnic_dev *dev)
  1873. {
  1874. struct cnic_local *cp = dev->cnic_priv;
  1875. u32 val;
  1876. val = cp->func << 2;
  1877. cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
  1878. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1879. BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
  1880. dev->mac_addr[0] = (u8) (val >> 8);
  1881. dev->mac_addr[1] = (u8) val;
  1882. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
  1883. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1884. BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
  1885. dev->mac_addr[2] = (u8) (val >> 24);
  1886. dev->mac_addr[3] = (u8) (val >> 16);
  1887. dev->mac_addr[4] = (u8) (val >> 8);
  1888. dev->mac_addr[5] = (u8) val;
  1889. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
  1890. val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
  1891. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1892. val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
  1893. CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
  1894. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
  1895. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
  1896. }
  1897. static int cnic_start_bnx2_hw(struct cnic_dev *dev)
  1898. {
  1899. struct cnic_local *cp = dev->cnic_priv;
  1900. struct cnic_eth_dev *ethdev = cp->ethdev;
  1901. struct status_block *sblk = cp->status_blk;
  1902. u32 val;
  1903. int err;
  1904. cnic_set_bnx2_mac(dev);
  1905. val = CNIC_RD(dev, BNX2_MQ_CONFIG);
  1906. val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
  1907. if (BCM_PAGE_BITS > 12)
  1908. val |= (12 - 8) << 4;
  1909. else
  1910. val |= (BCM_PAGE_BITS - 8) << 4;
  1911. CNIC_WR(dev, BNX2_MQ_CONFIG, val);
  1912. CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
  1913. CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
  1914. CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
  1915. err = cnic_setup_5709_context(dev, 1);
  1916. if (err)
  1917. return err;
  1918. cnic_init_context(dev, KWQ_CID);
  1919. cnic_init_context(dev, KCQ_CID);
  1920. cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
  1921. cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
  1922. cp->max_kwq_idx = MAX_KWQ_IDX;
  1923. cp->kwq_prod_idx = 0;
  1924. cp->kwq_con_idx = 0;
  1925. cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
  1926. if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
  1927. cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
  1928. else
  1929. cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
  1930. /* Initialize the kernel work queue context. */
  1931. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1932. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1933. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
  1934. val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
  1935. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1936. val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
  1937. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1938. val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
  1939. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1940. val = (u32) cp->kwq_info.pgtbl_map;
  1941. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1942. cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
  1943. cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
  1944. cp->kcq_prod_idx = 0;
  1945. /* Initialize the kernel complete queue context. */
  1946. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1947. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1948. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
  1949. val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
  1950. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1951. val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
  1952. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1953. val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
  1954. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1955. val = (u32) cp->kcq_info.pgtbl_map;
  1956. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1957. cp->int_num = 0;
  1958. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1959. u32 sb_id = cp->status_blk_num;
  1960. u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1961. cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
  1962. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1963. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1964. }
  1965. /* Enable Commnad Scheduler notification when we write to the
  1966. * host producer index of the kernel contexts. */
  1967. CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
  1968. /* Enable Command Scheduler notification when we write to either
  1969. * the Send Queue or Receive Queue producer indexes of the kernel
  1970. * bypass contexts. */
  1971. CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
  1972. CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
  1973. /* Notify COM when the driver post an application buffer. */
  1974. CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
  1975. /* Set the CP and COM doorbells. These two processors polls the
  1976. * doorbell for a non zero value before running. This must be done
  1977. * after setting up the kernel queue contexts. */
  1978. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
  1979. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
  1980. cnic_init_bnx2_tx_ring(dev);
  1981. cnic_init_bnx2_rx_ring(dev);
  1982. err = cnic_init_bnx2_irq(dev);
  1983. if (err) {
  1984. printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
  1985. dev->netdev->name);
  1986. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  1987. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  1988. return err;
  1989. }
  1990. return 0;
  1991. }
  1992. static int cnic_register_netdev(struct cnic_dev *dev)
  1993. {
  1994. struct cnic_local *cp = dev->cnic_priv;
  1995. struct cnic_eth_dev *ethdev = cp->ethdev;
  1996. int err;
  1997. if (!ethdev)
  1998. return -ENODEV;
  1999. if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
  2000. return 0;
  2001. err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
  2002. if (err)
  2003. printk(KERN_ERR PFX "%s: register_cnic failed\n",
  2004. dev->netdev->name);
  2005. return err;
  2006. }
  2007. static void cnic_unregister_netdev(struct cnic_dev *dev)
  2008. {
  2009. struct cnic_local *cp = dev->cnic_priv;
  2010. struct cnic_eth_dev *ethdev = cp->ethdev;
  2011. if (!ethdev)
  2012. return;
  2013. ethdev->drv_unregister_cnic(dev->netdev);
  2014. }
  2015. static int cnic_start_hw(struct cnic_dev *dev)
  2016. {
  2017. struct cnic_local *cp = dev->cnic_priv;
  2018. struct cnic_eth_dev *ethdev = cp->ethdev;
  2019. int err;
  2020. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  2021. return -EALREADY;
  2022. dev->regview = ethdev->io_base;
  2023. cp->chip_id = ethdev->chip_id;
  2024. pci_dev_get(dev->pcidev);
  2025. cp->func = PCI_FUNC(dev->pcidev->devfn);
  2026. cp->status_blk = ethdev->irq_arr[0].status_blk;
  2027. cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
  2028. err = cp->alloc_resc(dev);
  2029. if (err) {
  2030. printk(KERN_ERR PFX "%s: allocate resource failure\n",
  2031. dev->netdev->name);
  2032. goto err1;
  2033. }
  2034. err = cp->start_hw(dev);
  2035. if (err)
  2036. goto err1;
  2037. err = cnic_cm_open(dev);
  2038. if (err)
  2039. goto err1;
  2040. set_bit(CNIC_F_CNIC_UP, &dev->flags);
  2041. cp->enable_int(dev);
  2042. return 0;
  2043. err1:
  2044. cp->free_resc(dev);
  2045. pci_dev_put(dev->pcidev);
  2046. return err;
  2047. }
  2048. static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
  2049. {
  2050. cnic_disable_bnx2_int_sync(dev);
  2051. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  2052. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  2053. cnic_init_context(dev, KWQ_CID);
  2054. cnic_init_context(dev, KCQ_CID);
  2055. cnic_setup_5709_context(dev, 0);
  2056. cnic_free_irq(dev);
  2057. cnic_free_resc(dev);
  2058. }
  2059. static void cnic_stop_hw(struct cnic_dev *dev)
  2060. {
  2061. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  2062. struct cnic_local *cp = dev->cnic_priv;
  2063. clear_bit(CNIC_F_CNIC_UP, &dev->flags);
  2064. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
  2065. synchronize_rcu();
  2066. cnic_cm_shutdown(dev);
  2067. cp->stop_hw(dev);
  2068. pci_dev_put(dev->pcidev);
  2069. }
  2070. }
  2071. static void cnic_free_dev(struct cnic_dev *dev)
  2072. {
  2073. int i = 0;
  2074. while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
  2075. msleep(100);
  2076. i++;
  2077. }
  2078. if (atomic_read(&dev->ref_count) != 0)
  2079. printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
  2080. " to zero.\n", dev->netdev->name);
  2081. printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
  2082. dev_put(dev->netdev);
  2083. kfree(dev);
  2084. }
  2085. static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
  2086. struct pci_dev *pdev)
  2087. {
  2088. struct cnic_dev *cdev;
  2089. struct cnic_local *cp;
  2090. int alloc_size;
  2091. alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
  2092. cdev = kzalloc(alloc_size , GFP_KERNEL);
  2093. if (cdev == NULL) {
  2094. printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
  2095. dev->name);
  2096. return NULL;
  2097. }
  2098. cdev->netdev = dev;
  2099. cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
  2100. cdev->register_device = cnic_register_device;
  2101. cdev->unregister_device = cnic_unregister_device;
  2102. cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
  2103. cp = cdev->cnic_priv;
  2104. cp->dev = cdev;
  2105. cp->uio_dev = -1;
  2106. cp->l2_single_buf_size = 0x400;
  2107. cp->l2_rx_ring_size = 3;
  2108. spin_lock_init(&cp->cnic_ulp_lock);
  2109. printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
  2110. return cdev;
  2111. }
  2112. static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
  2113. {
  2114. struct pci_dev *pdev;
  2115. struct cnic_dev *cdev;
  2116. struct cnic_local *cp;
  2117. struct cnic_eth_dev *ethdev = NULL;
  2118. struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
  2119. probe = symbol_get(bnx2_cnic_probe);
  2120. if (probe) {
  2121. ethdev = (*probe)(dev);
  2122. symbol_put(bnx2_cnic_probe);
  2123. }
  2124. if (!ethdev)
  2125. return NULL;
  2126. pdev = ethdev->pdev;
  2127. if (!pdev)
  2128. return NULL;
  2129. dev_hold(dev);
  2130. pci_dev_get(pdev);
  2131. if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
  2132. pdev->device == PCI_DEVICE_ID_NX2_5709S) {
  2133. u8 rev;
  2134. pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
  2135. if (rev < 0x10) {
  2136. pci_dev_put(pdev);
  2137. goto cnic_err;
  2138. }
  2139. }
  2140. pci_dev_put(pdev);
  2141. cdev = cnic_alloc_dev(dev, pdev);
  2142. if (cdev == NULL)
  2143. goto cnic_err;
  2144. set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
  2145. cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
  2146. cp = cdev->cnic_priv;
  2147. cp->ethdev = ethdev;
  2148. cdev->pcidev = pdev;
  2149. cp->cnic_ops = &cnic_bnx2_ops;
  2150. cp->start_hw = cnic_start_bnx2_hw;
  2151. cp->stop_hw = cnic_stop_bnx2_hw;
  2152. cp->setup_pgtbl = cnic_setup_page_tbl;
  2153. cp->alloc_resc = cnic_alloc_bnx2_resc;
  2154. cp->free_resc = cnic_free_resc;
  2155. cp->start_cm = cnic_cm_init_bnx2_hw;
  2156. cp->stop_cm = cnic_cm_stop_bnx2_hw;
  2157. cp->enable_int = cnic_enable_bnx2_int;
  2158. cp->disable_int_sync = cnic_disable_bnx2_int_sync;
  2159. cp->close_conn = cnic_close_bnx2_conn;
  2160. cp->next_idx = cnic_bnx2_next_idx;
  2161. cp->hw_idx = cnic_bnx2_hw_idx;
  2162. return cdev;
  2163. cnic_err:
  2164. dev_put(dev);
  2165. return NULL;
  2166. }
  2167. static struct cnic_dev *is_cnic_dev(struct net_device *dev)
  2168. {
  2169. struct ethtool_drvinfo drvinfo;
  2170. struct cnic_dev *cdev = NULL;
  2171. if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
  2172. memset(&drvinfo, 0, sizeof(drvinfo));
  2173. dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
  2174. if (!strcmp(drvinfo.driver, "bnx2"))
  2175. cdev = init_bnx2_cnic(dev);
  2176. if (cdev) {
  2177. write_lock(&cnic_dev_lock);
  2178. list_add(&cdev->list, &cnic_dev_list);
  2179. write_unlock(&cnic_dev_lock);
  2180. }
  2181. }
  2182. return cdev;
  2183. }
  2184. /**
  2185. * netdev event handler
  2186. */
  2187. static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
  2188. void *ptr)
  2189. {
  2190. struct net_device *netdev = ptr;
  2191. struct cnic_dev *dev;
  2192. int if_type;
  2193. int new_dev = 0;
  2194. dev = cnic_from_netdev(netdev);
  2195. if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
  2196. /* Check for the hot-plug device */
  2197. dev = is_cnic_dev(netdev);
  2198. if (dev) {
  2199. new_dev = 1;
  2200. cnic_hold(dev);
  2201. }
  2202. }
  2203. if (dev) {
  2204. struct cnic_local *cp = dev->cnic_priv;
  2205. if (new_dev)
  2206. cnic_ulp_init(dev);
  2207. else if (event == NETDEV_UNREGISTER)
  2208. cnic_ulp_exit(dev);
  2209. else if (event == NETDEV_UP) {
  2210. if (cnic_register_netdev(dev) != 0) {
  2211. cnic_put(dev);
  2212. goto done;
  2213. }
  2214. if (!cnic_start_hw(dev))
  2215. cnic_ulp_start(dev);
  2216. }
  2217. rcu_read_lock();
  2218. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  2219. struct cnic_ulp_ops *ulp_ops;
  2220. void *ctx;
  2221. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  2222. if (!ulp_ops || !ulp_ops->indicate_netevent)
  2223. continue;
  2224. ctx = cp->ulp_handle[if_type];
  2225. ulp_ops->indicate_netevent(ctx, event);
  2226. }
  2227. rcu_read_unlock();
  2228. if (event == NETDEV_GOING_DOWN) {
  2229. cnic_ulp_stop(dev);
  2230. cnic_stop_hw(dev);
  2231. cnic_unregister_netdev(dev);
  2232. } else if (event == NETDEV_UNREGISTER) {
  2233. write_lock(&cnic_dev_lock);
  2234. list_del_init(&dev->list);
  2235. write_unlock(&cnic_dev_lock);
  2236. cnic_put(dev);
  2237. cnic_free_dev(dev);
  2238. goto done;
  2239. }
  2240. cnic_put(dev);
  2241. }
  2242. done:
  2243. return NOTIFY_DONE;
  2244. }
  2245. static struct notifier_block cnic_netdev_notifier = {
  2246. .notifier_call = cnic_netdev_event
  2247. };
  2248. static void cnic_release(void)
  2249. {
  2250. struct cnic_dev *dev;
  2251. while (!list_empty(&cnic_dev_list)) {
  2252. dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
  2253. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  2254. cnic_ulp_stop(dev);
  2255. cnic_stop_hw(dev);
  2256. }
  2257. cnic_ulp_exit(dev);
  2258. cnic_unregister_netdev(dev);
  2259. list_del_init(&dev->list);
  2260. cnic_free_dev(dev);
  2261. }
  2262. }
  2263. static int __init cnic_init(void)
  2264. {
  2265. int rc = 0;
  2266. printk(KERN_INFO "%s", version);
  2267. rc = register_netdevice_notifier(&cnic_netdev_notifier);
  2268. if (rc) {
  2269. cnic_release();
  2270. return rc;
  2271. }
  2272. return 0;
  2273. }
  2274. static void __exit cnic_exit(void)
  2275. {
  2276. unregister_netdevice_notifier(&cnic_netdev_notifier);
  2277. cnic_release();
  2278. return;
  2279. }
  2280. module_init(cnic_init);
  2281. module_exit(cnic_exit);