btcoex.c 10 KB

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  1. /*
  2. * Copyright (c) 2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "ath9k.h"
  17. static const struct ath_btcoex_config ath_bt_config = { 0, true, true,
  18. ATH_BT_COEX_MODE_SLOTTED, true, true, 2, 5, true };
  19. static const u16 ath_subsysid_tbl[] = {
  20. AR9280_COEX2WIRE_SUBSYSID,
  21. AT9285_COEX3WIRE_SA_SUBSYSID,
  22. AT9285_COEX3WIRE_DA_SUBSYSID
  23. };
  24. /*
  25. * Checks the subsystem id of the device to see if it
  26. * supports btcoex
  27. */
  28. bool ath_btcoex_supported(u16 subsysid)
  29. {
  30. int i;
  31. if (!subsysid)
  32. return false;
  33. for (i = 0; i < ARRAY_SIZE(ath_subsysid_tbl); i++)
  34. if (subsysid == ath_subsysid_tbl[i])
  35. return true;
  36. return false;
  37. }
  38. static void ath_btcoex_set_weight(struct ath_btcoex_info *btcoex_info,
  39. u32 bt_weight,
  40. u32 wlan_weight)
  41. {
  42. btcoex_info->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
  43. SM(wlan_weight, AR_BTCOEX_WL_WGHT);
  44. }
  45. void ath9k_hw_btcoex_init_weight(struct ath_hw *ah)
  46. {
  47. ath_btcoex_set_weight(&ah->btcoex_info, AR_BT_COEX_WGHT,
  48. AR_STOMP_LOW_WLAN_WGHT);
  49. }
  50. /*
  51. * Detects if there is any priority bt traffic
  52. */
  53. static void ath_detect_bt_priority(struct ath_softc *sc)
  54. {
  55. struct ath_btcoex *btcoex = &sc->btcoex;
  56. struct ath_hw *ah = sc->sc_ah;
  57. if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_info.btpriority_gpio))
  58. btcoex->bt_priority_cnt++;
  59. if (time_after(jiffies, btcoex->bt_priority_time +
  60. msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
  61. if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
  62. DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX,
  63. "BT priority traffic detected");
  64. sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED;
  65. } else {
  66. sc->sc_flags &= ~SC_OP_BT_PRIORITY_DETECTED;
  67. }
  68. btcoex->bt_priority_cnt = 0;
  69. btcoex->bt_priority_time = jiffies;
  70. }
  71. }
  72. /*
  73. * Configures appropriate weight based on stomp type.
  74. */
  75. static void ath_btcoex_bt_stomp(struct ath_softc *sc,
  76. struct ath_btcoex_info *btinfo,
  77. int stomp_type)
  78. {
  79. switch (stomp_type) {
  80. case ATH_BTCOEX_STOMP_ALL:
  81. ath_btcoex_set_weight(btinfo, AR_BT_COEX_WGHT,
  82. AR_STOMP_ALL_WLAN_WGHT);
  83. break;
  84. case ATH_BTCOEX_STOMP_LOW:
  85. ath_btcoex_set_weight(btinfo, AR_BT_COEX_WGHT,
  86. AR_STOMP_LOW_WLAN_WGHT);
  87. break;
  88. case ATH_BTCOEX_STOMP_NONE:
  89. ath_btcoex_set_weight(btinfo, AR_BT_COEX_WGHT,
  90. AR_STOMP_NONE_WLAN_WGHT);
  91. break;
  92. default:
  93. DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX, "Invalid Stomptype\n");
  94. break;
  95. }
  96. ath9k_hw_btcoex_enable(sc->sc_ah);
  97. }
  98. /*
  99. * This is the master bt coex timer which runs for every
  100. * 45ms, bt traffic will be given priority during 55% of this
  101. * period while wlan gets remaining 45%
  102. */
  103. static void ath_btcoex_period_timer(unsigned long data)
  104. {
  105. struct ath_softc *sc = (struct ath_softc *) data;
  106. struct ath_hw *ah = sc->sc_ah;
  107. struct ath_btcoex *btcoex = &sc->btcoex;
  108. struct ath_btcoex_info *btinfo = &ah->btcoex_info;
  109. ath_detect_bt_priority(sc);
  110. spin_lock_bh(&btcoex->btcoex_lock);
  111. ath_btcoex_bt_stomp(sc, btinfo, btinfo->bt_stomp_type);
  112. spin_unlock_bh(&btcoex->btcoex_lock);
  113. if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) {
  114. if (btcoex->hw_timer_enabled)
  115. ath_gen_timer_stop(ah, btinfo->no_stomp_timer);
  116. ath_gen_timer_start(ah,
  117. btinfo->no_stomp_timer,
  118. (ath9k_hw_gettsf32(sc->sc_ah) +
  119. btcoex->btcoex_no_stomp),
  120. btcoex->btcoex_no_stomp * 10);
  121. btcoex->hw_timer_enabled = true;
  122. }
  123. mod_timer(&btcoex->period_timer, jiffies +
  124. msecs_to_jiffies(ATH_BTCOEX_DEF_BT_PERIOD));
  125. }
  126. /*
  127. * Generic tsf based hw timer which configures weight
  128. * registers to time slice between wlan and bt traffic
  129. */
  130. static void ath_btcoex_no_stomp_timer(void *arg)
  131. {
  132. struct ath_softc *sc = (struct ath_softc *)arg;
  133. struct ath_hw *ah = sc->sc_ah;
  134. struct ath_btcoex *btcoex = &sc->btcoex;
  135. struct ath_btcoex_info *btinfo = &ah->btcoex_info;
  136. DPRINTF(ah, ATH_DBG_BTCOEX, "no stomp timer running \n");
  137. spin_lock_bh(&btcoex->btcoex_lock);
  138. if (btinfo->bt_stomp_type == ATH_BTCOEX_STOMP_LOW)
  139. ath_btcoex_bt_stomp(sc, btinfo, ATH_BTCOEX_STOMP_NONE);
  140. else if (btinfo->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
  141. ath_btcoex_bt_stomp(sc, btinfo, ATH_BTCOEX_STOMP_LOW);
  142. spin_unlock_bh(&btcoex->btcoex_lock);
  143. }
  144. static int ath_init_btcoex_info(struct ath_hw *ah,
  145. struct ath_btcoex_info *btcoex_info)
  146. {
  147. struct ath_btcoex *btcoex = &ah->ah_sc->btcoex;
  148. u32 i;
  149. int qnum;
  150. qnum = ath_tx_get_qnum(ah->ah_sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
  151. btcoex_info->bt_coex_mode =
  152. (btcoex_info->bt_coex_mode & AR_BT_QCU_THRESH) |
  153. SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
  154. SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
  155. SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
  156. SM(ath_bt_config.bt_mode, AR_BT_MODE) |
  157. SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
  158. SM(ath_bt_config.bt_rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
  159. SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
  160. SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
  161. SM(qnum, AR_BT_QCU_THRESH);
  162. btcoex_info->bt_coex_mode2 =
  163. SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
  164. SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
  165. AR_BT_DISABLE_BT_ANT;
  166. btcoex_info->bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
  167. btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD * 1000;
  168. btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) *
  169. btcoex->btcoex_period / 100;
  170. for (i = 0; i < 32; i++)
  171. ah->hw_gen_timers.gen_timer_index[(debruijn32 << i) >> 27] = i;
  172. setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
  173. (unsigned long) ah->ah_sc);
  174. btcoex_info->no_stomp_timer = ath_gen_timer_alloc(ah,
  175. ath_btcoex_no_stomp_timer,
  176. ath_btcoex_no_stomp_timer,
  177. (void *)ah->ah_sc, AR_FIRST_NDP_TIMER);
  178. if (btcoex_info->no_stomp_timer == NULL)
  179. return -ENOMEM;
  180. spin_lock_init(&btcoex->btcoex_lock);
  181. return 0;
  182. }
  183. int ath9k_hw_btcoex_init(struct ath_hw *ah)
  184. {
  185. struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
  186. int ret = 0;
  187. if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) {
  188. /* connect bt_active to baseband */
  189. REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
  190. (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
  191. AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
  192. REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
  193. AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
  194. /* Set input mux for bt_active to gpio pin */
  195. REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
  196. AR_GPIO_INPUT_MUX1_BT_ACTIVE,
  197. btcoex_info->btactive_gpio);
  198. /* Configure the desired gpio port for input */
  199. ath9k_hw_cfg_gpio_input(ah, btcoex_info->btactive_gpio);
  200. } else {
  201. /* btcoex 3-wire */
  202. REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
  203. (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
  204. AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
  205. /* Set input mux for bt_prority_async and
  206. * bt_active_async to GPIO pins */
  207. REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
  208. AR_GPIO_INPUT_MUX1_BT_ACTIVE,
  209. btcoex_info->btactive_gpio);
  210. REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
  211. AR_GPIO_INPUT_MUX1_BT_PRIORITY,
  212. btcoex_info->btpriority_gpio);
  213. /* Configure the desired GPIO ports for input */
  214. ath9k_hw_cfg_gpio_input(ah, btcoex_info->btactive_gpio);
  215. ath9k_hw_cfg_gpio_input(ah, btcoex_info->btpriority_gpio);
  216. ret = ath_init_btcoex_info(ah, btcoex_info);
  217. }
  218. return ret;
  219. }
  220. void ath9k_hw_btcoex_enable(struct ath_hw *ah)
  221. {
  222. struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
  223. if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) {
  224. /* Configure the desired GPIO port for TX_FRAME output */
  225. ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
  226. AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
  227. } else {
  228. /*
  229. * Program coex mode and weight registers to
  230. * enable coex 3-wire
  231. */
  232. REG_WRITE(ah, AR_BT_COEX_MODE, btcoex_info->bt_coex_mode);
  233. REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex_info->bt_coex_weights);
  234. REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex_info->bt_coex_mode2);
  235. REG_RMW_FIELD(ah, AR_QUIET1,
  236. AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
  237. REG_RMW_FIELD(ah, AR_PCU_MISC,
  238. AR_PCU_BT_ANT_PREVENT_RX, 0);
  239. ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
  240. AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
  241. }
  242. REG_RMW(ah, AR_GPIO_PDPU,
  243. (0x2 << (btcoex_info->btactive_gpio * 2)),
  244. (0x3 << (btcoex_info->btactive_gpio * 2)));
  245. ah->ah_sc->sc_flags |= SC_OP_BTCOEX_ENABLED;
  246. }
  247. void ath9k_hw_btcoex_disable(struct ath_hw *ah)
  248. {
  249. struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
  250. ath9k_hw_set_gpio(ah, btcoex_info->wlanactive_gpio, 0);
  251. ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
  252. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  253. if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_3WIRE) {
  254. REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
  255. REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
  256. REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
  257. }
  258. ah->ah_sc->sc_flags &= ~SC_OP_BTCOEX_ENABLED;
  259. }
  260. /*
  261. * Pause btcoex timer and bt duty cycle timer
  262. */
  263. void ath_btcoex_timer_pause(struct ath_softc *sc)
  264. {
  265. struct ath_btcoex *btcoex = &sc->btcoex;
  266. struct ath_hw *ah = sc->sc_ah;
  267. del_timer_sync(&btcoex->period_timer);
  268. if (btcoex->hw_timer_enabled)
  269. ath_gen_timer_stop(ah, ah->btcoex_info.no_stomp_timer);
  270. btcoex->hw_timer_enabled = false;
  271. }
  272. /*
  273. * (Re)start btcoex timers
  274. */
  275. void ath_btcoex_timer_resume(struct ath_softc *sc)
  276. {
  277. struct ath_btcoex *btcoex = &sc->btcoex;
  278. struct ath_hw *ah = sc->sc_ah;
  279. DPRINTF(ah, ATH_DBG_BTCOEX, "Starting btcoex timers");
  280. /* make sure duty cycle timer is also stopped when resuming */
  281. if (btcoex->hw_timer_enabled)
  282. ath_gen_timer_stop(sc->sc_ah, ah->btcoex_info.no_stomp_timer);
  283. btcoex->bt_priority_cnt = 0;
  284. btcoex->bt_priority_time = jiffies;
  285. sc->sc_flags &= ~SC_OP_BT_PRIORITY_DETECTED;
  286. mod_timer(&btcoex->period_timer, jiffies);
  287. }