bfa_ioc.c 50 KB

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  1. /*
  2. * Linux network driver for Brocade Converged Network Adapter.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License (GPL) Version 2 as
  6. * published by the Free Software Foundation
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. /*
  14. * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15. * All rights reserved
  16. * www.brocade.com
  17. */
  18. #include "bfa_ioc.h"
  19. #include "cna.h"
  20. #include "bfi.h"
  21. #include "bfi_reg.h"
  22. #include "bfa_defs.h"
  23. /**
  24. * IOC local definitions
  25. */
  26. /**
  27. * Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details.
  28. */
  29. #define bfa_ioc_firmware_lock(__ioc) \
  30. ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
  31. #define bfa_ioc_firmware_unlock(__ioc) \
  32. ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
  33. #define bfa_ioc_reg_init(__ioc) ((__ioc)->ioc_hwif->ioc_reg_init(__ioc))
  34. #define bfa_ioc_map_port(__ioc) ((__ioc)->ioc_hwif->ioc_map_port(__ioc))
  35. #define bfa_ioc_notify_fail(__ioc) \
  36. ((__ioc)->ioc_hwif->ioc_notify_fail(__ioc))
  37. #define bfa_ioc_sync_start(__ioc) \
  38. ((__ioc)->ioc_hwif->ioc_sync_start(__ioc))
  39. #define bfa_ioc_sync_join(__ioc) \
  40. ((__ioc)->ioc_hwif->ioc_sync_join(__ioc))
  41. #define bfa_ioc_sync_leave(__ioc) \
  42. ((__ioc)->ioc_hwif->ioc_sync_leave(__ioc))
  43. #define bfa_ioc_sync_ack(__ioc) \
  44. ((__ioc)->ioc_hwif->ioc_sync_ack(__ioc))
  45. #define bfa_ioc_sync_complete(__ioc) \
  46. ((__ioc)->ioc_hwif->ioc_sync_complete(__ioc))
  47. #define bfa_ioc_mbox_cmd_pending(__ioc) \
  48. (!list_empty(&((__ioc)->mbox_mod.cmd_q)) || \
  49. readl((__ioc)->ioc_regs.hfn_mbox_cmd))
  50. static bool bfa_nw_auto_recover = true;
  51. /*
  52. * forward declarations
  53. */
  54. static void bfa_ioc_hw_sem_init(struct bfa_ioc *ioc);
  55. static void bfa_ioc_hw_sem_get(struct bfa_ioc *ioc);
  56. static void bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc);
  57. static void bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force);
  58. static void bfa_ioc_send_enable(struct bfa_ioc *ioc);
  59. static void bfa_ioc_send_disable(struct bfa_ioc *ioc);
  60. static void bfa_ioc_send_getattr(struct bfa_ioc *ioc);
  61. static void bfa_ioc_hb_monitor(struct bfa_ioc *ioc);
  62. static void bfa_ioc_hb_stop(struct bfa_ioc *ioc);
  63. static void bfa_ioc_reset(struct bfa_ioc *ioc, bool force);
  64. static void bfa_ioc_mbox_poll(struct bfa_ioc *ioc);
  65. static void bfa_ioc_mbox_flush(struct bfa_ioc *ioc);
  66. static void bfa_ioc_recover(struct bfa_ioc *ioc);
  67. static void bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc);
  68. static void bfa_ioc_event_notify(struct bfa_ioc *, enum bfa_ioc_event);
  69. static void bfa_ioc_disable_comp(struct bfa_ioc *ioc);
  70. static void bfa_ioc_lpu_stop(struct bfa_ioc *ioc);
  71. static void bfa_ioc_fail_notify(struct bfa_ioc *ioc);
  72. static void bfa_ioc_pf_enabled(struct bfa_ioc *ioc);
  73. static void bfa_ioc_pf_disabled(struct bfa_ioc *ioc);
  74. static void bfa_ioc_pf_initfailed(struct bfa_ioc *ioc);
  75. static void bfa_ioc_pf_failed(struct bfa_ioc *ioc);
  76. static void bfa_ioc_pf_fwmismatch(struct bfa_ioc *ioc);
  77. static void bfa_ioc_boot(struct bfa_ioc *ioc, u32 boot_type,
  78. u32 boot_param);
  79. static u32 bfa_ioc_smem_pgnum(struct bfa_ioc *ioc, u32 fmaddr);
  80. static void bfa_ioc_get_adapter_serial_num(struct bfa_ioc *ioc,
  81. char *serial_num);
  82. static void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc *ioc,
  83. char *fw_ver);
  84. static void bfa_ioc_get_pci_chip_rev(struct bfa_ioc *ioc,
  85. char *chip_rev);
  86. static void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc *ioc,
  87. char *optrom_ver);
  88. static void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc *ioc,
  89. char *manufacturer);
  90. static void bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model);
  91. static u64 bfa_ioc_get_pwwn(struct bfa_ioc *ioc);
  92. /**
  93. * IOC state machine definitions/declarations
  94. */
  95. enum ioc_event {
  96. IOC_E_RESET = 1, /*!< IOC reset request */
  97. IOC_E_ENABLE = 2, /*!< IOC enable request */
  98. IOC_E_DISABLE = 3, /*!< IOC disable request */
  99. IOC_E_DETACH = 4, /*!< driver detach cleanup */
  100. IOC_E_ENABLED = 5, /*!< f/w enabled */
  101. IOC_E_FWRSP_GETATTR = 6, /*!< IOC get attribute response */
  102. IOC_E_DISABLED = 7, /*!< f/w disabled */
  103. IOC_E_INITFAILED = 8, /*!< failure notice by iocpf sm */
  104. IOC_E_PFFAILED = 9, /*!< failure notice by iocpf sm */
  105. IOC_E_HBFAIL = 10, /*!< heartbeat failure */
  106. IOC_E_HWERROR = 11, /*!< hardware error interrupt */
  107. IOC_E_TIMEOUT = 12, /*!< timeout */
  108. };
  109. bfa_fsm_state_decl(bfa_ioc, uninit, struct bfa_ioc, enum ioc_event);
  110. bfa_fsm_state_decl(bfa_ioc, reset, struct bfa_ioc, enum ioc_event);
  111. bfa_fsm_state_decl(bfa_ioc, enabling, struct bfa_ioc, enum ioc_event);
  112. bfa_fsm_state_decl(bfa_ioc, getattr, struct bfa_ioc, enum ioc_event);
  113. bfa_fsm_state_decl(bfa_ioc, op, struct bfa_ioc, enum ioc_event);
  114. bfa_fsm_state_decl(bfa_ioc, fail_retry, struct bfa_ioc, enum ioc_event);
  115. bfa_fsm_state_decl(bfa_ioc, fail, struct bfa_ioc, enum ioc_event);
  116. bfa_fsm_state_decl(bfa_ioc, disabling, struct bfa_ioc, enum ioc_event);
  117. bfa_fsm_state_decl(bfa_ioc, disabled, struct bfa_ioc, enum ioc_event);
  118. static struct bfa_sm_table ioc_sm_table[] = {
  119. {BFA_SM(bfa_ioc_sm_uninit), BFA_IOC_UNINIT},
  120. {BFA_SM(bfa_ioc_sm_reset), BFA_IOC_RESET},
  121. {BFA_SM(bfa_ioc_sm_enabling), BFA_IOC_ENABLING},
  122. {BFA_SM(bfa_ioc_sm_getattr), BFA_IOC_GETATTR},
  123. {BFA_SM(bfa_ioc_sm_op), BFA_IOC_OPERATIONAL},
  124. {BFA_SM(bfa_ioc_sm_fail_retry), BFA_IOC_INITFAIL},
  125. {BFA_SM(bfa_ioc_sm_fail), BFA_IOC_FAIL},
  126. {BFA_SM(bfa_ioc_sm_disabling), BFA_IOC_DISABLING},
  127. {BFA_SM(bfa_ioc_sm_disabled), BFA_IOC_DISABLED},
  128. };
  129. /**
  130. * IOCPF state machine definitions/declarations
  131. */
  132. /*
  133. * Forward declareations for iocpf state machine
  134. */
  135. static void bfa_iocpf_enable(struct bfa_ioc *ioc);
  136. static void bfa_iocpf_disable(struct bfa_ioc *ioc);
  137. static void bfa_iocpf_fail(struct bfa_ioc *ioc);
  138. static void bfa_iocpf_initfail(struct bfa_ioc *ioc);
  139. static void bfa_iocpf_getattrfail(struct bfa_ioc *ioc);
  140. static void bfa_iocpf_stop(struct bfa_ioc *ioc);
  141. /**
  142. * IOCPF state machine events
  143. */
  144. enum iocpf_event {
  145. IOCPF_E_ENABLE = 1, /*!< IOCPF enable request */
  146. IOCPF_E_DISABLE = 2, /*!< IOCPF disable request */
  147. IOCPF_E_STOP = 3, /*!< stop on driver detach */
  148. IOCPF_E_FWREADY = 4, /*!< f/w initialization done */
  149. IOCPF_E_FWRSP_ENABLE = 5, /*!< enable f/w response */
  150. IOCPF_E_FWRSP_DISABLE = 6, /*!< disable f/w response */
  151. IOCPF_E_FAIL = 7, /*!< failure notice by ioc sm */
  152. IOCPF_E_INITFAIL = 8, /*!< init fail notice by ioc sm */
  153. IOCPF_E_GETATTRFAIL = 9, /*!< init fail notice by ioc sm */
  154. IOCPF_E_SEMLOCKED = 10, /*!< h/w semaphore is locked */
  155. IOCPF_E_TIMEOUT = 11, /*!< f/w response timeout */
  156. };
  157. /**
  158. * IOCPF states
  159. */
  160. enum bfa_iocpf_state {
  161. BFA_IOCPF_RESET = 1, /*!< IOC is in reset state */
  162. BFA_IOCPF_SEMWAIT = 2, /*!< Waiting for IOC h/w semaphore */
  163. BFA_IOCPF_HWINIT = 3, /*!< IOC h/w is being initialized */
  164. BFA_IOCPF_READY = 4, /*!< IOCPF is initialized */
  165. BFA_IOCPF_INITFAIL = 5, /*!< IOCPF failed */
  166. BFA_IOCPF_FAIL = 6, /*!< IOCPF failed */
  167. BFA_IOCPF_DISABLING = 7, /*!< IOCPF is being disabled */
  168. BFA_IOCPF_DISABLED = 8, /*!< IOCPF is disabled */
  169. BFA_IOCPF_FWMISMATCH = 9, /*!< IOC f/w different from drivers */
  170. };
  171. bfa_fsm_state_decl(bfa_iocpf, reset, struct bfa_iocpf, enum iocpf_event);
  172. bfa_fsm_state_decl(bfa_iocpf, fwcheck, struct bfa_iocpf, enum iocpf_event);
  173. bfa_fsm_state_decl(bfa_iocpf, mismatch, struct bfa_iocpf, enum iocpf_event);
  174. bfa_fsm_state_decl(bfa_iocpf, semwait, struct bfa_iocpf, enum iocpf_event);
  175. bfa_fsm_state_decl(bfa_iocpf, hwinit, struct bfa_iocpf, enum iocpf_event);
  176. bfa_fsm_state_decl(bfa_iocpf, enabling, struct bfa_iocpf, enum iocpf_event);
  177. bfa_fsm_state_decl(bfa_iocpf, ready, struct bfa_iocpf, enum iocpf_event);
  178. bfa_fsm_state_decl(bfa_iocpf, initfail_sync, struct bfa_iocpf,
  179. enum iocpf_event);
  180. bfa_fsm_state_decl(bfa_iocpf, initfail, struct bfa_iocpf, enum iocpf_event);
  181. bfa_fsm_state_decl(bfa_iocpf, fail_sync, struct bfa_iocpf, enum iocpf_event);
  182. bfa_fsm_state_decl(bfa_iocpf, fail, struct bfa_iocpf, enum iocpf_event);
  183. bfa_fsm_state_decl(bfa_iocpf, disabling, struct bfa_iocpf, enum iocpf_event);
  184. bfa_fsm_state_decl(bfa_iocpf, disabling_sync, struct bfa_iocpf,
  185. enum iocpf_event);
  186. bfa_fsm_state_decl(bfa_iocpf, disabled, struct bfa_iocpf, enum iocpf_event);
  187. static struct bfa_sm_table iocpf_sm_table[] = {
  188. {BFA_SM(bfa_iocpf_sm_reset), BFA_IOCPF_RESET},
  189. {BFA_SM(bfa_iocpf_sm_fwcheck), BFA_IOCPF_FWMISMATCH},
  190. {BFA_SM(bfa_iocpf_sm_mismatch), BFA_IOCPF_FWMISMATCH},
  191. {BFA_SM(bfa_iocpf_sm_semwait), BFA_IOCPF_SEMWAIT},
  192. {BFA_SM(bfa_iocpf_sm_hwinit), BFA_IOCPF_HWINIT},
  193. {BFA_SM(bfa_iocpf_sm_enabling), BFA_IOCPF_HWINIT},
  194. {BFA_SM(bfa_iocpf_sm_ready), BFA_IOCPF_READY},
  195. {BFA_SM(bfa_iocpf_sm_initfail_sync), BFA_IOCPF_INITFAIL},
  196. {BFA_SM(bfa_iocpf_sm_initfail), BFA_IOCPF_INITFAIL},
  197. {BFA_SM(bfa_iocpf_sm_fail_sync), BFA_IOCPF_FAIL},
  198. {BFA_SM(bfa_iocpf_sm_fail), BFA_IOCPF_FAIL},
  199. {BFA_SM(bfa_iocpf_sm_disabling), BFA_IOCPF_DISABLING},
  200. {BFA_SM(bfa_iocpf_sm_disabling_sync), BFA_IOCPF_DISABLING},
  201. {BFA_SM(bfa_iocpf_sm_disabled), BFA_IOCPF_DISABLED},
  202. };
  203. /**
  204. * IOC State Machine
  205. */
  206. /**
  207. * Beginning state. IOC uninit state.
  208. */
  209. static void
  210. bfa_ioc_sm_uninit_entry(struct bfa_ioc *ioc)
  211. {
  212. }
  213. /**
  214. * IOC is in uninit state.
  215. */
  216. static void
  217. bfa_ioc_sm_uninit(struct bfa_ioc *ioc, enum ioc_event event)
  218. {
  219. switch (event) {
  220. case IOC_E_RESET:
  221. bfa_fsm_set_state(ioc, bfa_ioc_sm_reset);
  222. break;
  223. default:
  224. bfa_sm_fault(event);
  225. }
  226. }
  227. /**
  228. * Reset entry actions -- initialize state machine
  229. */
  230. static void
  231. bfa_ioc_sm_reset_entry(struct bfa_ioc *ioc)
  232. {
  233. bfa_fsm_set_state(&ioc->iocpf, bfa_iocpf_sm_reset);
  234. }
  235. /**
  236. * IOC is in reset state.
  237. */
  238. static void
  239. bfa_ioc_sm_reset(struct bfa_ioc *ioc, enum ioc_event event)
  240. {
  241. switch (event) {
  242. case IOC_E_ENABLE:
  243. bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
  244. break;
  245. case IOC_E_DISABLE:
  246. bfa_ioc_disable_comp(ioc);
  247. break;
  248. case IOC_E_DETACH:
  249. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  250. break;
  251. default:
  252. bfa_sm_fault(event);
  253. }
  254. }
  255. static void
  256. bfa_ioc_sm_enabling_entry(struct bfa_ioc *ioc)
  257. {
  258. bfa_iocpf_enable(ioc);
  259. }
  260. /**
  261. * Host IOC function is being enabled, awaiting response from firmware.
  262. * Semaphore is acquired.
  263. */
  264. static void
  265. bfa_ioc_sm_enabling(struct bfa_ioc *ioc, enum ioc_event event)
  266. {
  267. switch (event) {
  268. case IOC_E_ENABLED:
  269. bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
  270. break;
  271. case IOC_E_PFFAILED:
  272. /* !!! fall through !!! */
  273. case IOC_E_HWERROR:
  274. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  275. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
  276. if (event != IOC_E_PFFAILED)
  277. bfa_iocpf_initfail(ioc);
  278. break;
  279. case IOC_E_DISABLE:
  280. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  281. break;
  282. case IOC_E_DETACH:
  283. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  284. bfa_iocpf_stop(ioc);
  285. break;
  286. case IOC_E_ENABLE:
  287. break;
  288. default:
  289. bfa_sm_fault(event);
  290. }
  291. }
  292. /**
  293. * Semaphore should be acquired for version check.
  294. */
  295. static void
  296. bfa_ioc_sm_getattr_entry(struct bfa_ioc *ioc)
  297. {
  298. mod_timer(&ioc->ioc_timer, jiffies +
  299. msecs_to_jiffies(BFA_IOC_TOV));
  300. bfa_ioc_send_getattr(ioc);
  301. }
  302. /**
  303. * IOC configuration in progress. Timer is active.
  304. */
  305. static void
  306. bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event)
  307. {
  308. switch (event) {
  309. case IOC_E_FWRSP_GETATTR:
  310. del_timer(&ioc->ioc_timer);
  311. bfa_ioc_check_attr_wwns(ioc);
  312. bfa_fsm_set_state(ioc, bfa_ioc_sm_op);
  313. break;
  314. case IOC_E_PFFAILED:
  315. case IOC_E_HWERROR:
  316. del_timer(&ioc->ioc_timer);
  317. /* fall through */
  318. case IOC_E_TIMEOUT:
  319. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  320. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
  321. if (event != IOC_E_PFFAILED)
  322. bfa_iocpf_getattrfail(ioc);
  323. break;
  324. case IOC_E_DISABLE:
  325. del_timer(&ioc->ioc_timer);
  326. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  327. break;
  328. case IOC_E_ENABLE:
  329. break;
  330. default:
  331. bfa_sm_fault(event);
  332. }
  333. }
  334. static void
  335. bfa_ioc_sm_op_entry(struct bfa_ioc *ioc)
  336. {
  337. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_OK);
  338. bfa_ioc_hb_monitor(ioc);
  339. }
  340. static void
  341. bfa_ioc_sm_op(struct bfa_ioc *ioc, enum ioc_event event)
  342. {
  343. switch (event) {
  344. case IOC_E_ENABLE:
  345. break;
  346. case IOC_E_DISABLE:
  347. bfa_ioc_hb_stop(ioc);
  348. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  349. break;
  350. case IOC_E_PFFAILED:
  351. case IOC_E_HWERROR:
  352. bfa_ioc_hb_stop(ioc);
  353. /* !!! fall through !!! */
  354. case IOC_E_HBFAIL:
  355. bfa_ioc_fail_notify(ioc);
  356. if (ioc->iocpf.auto_recover)
  357. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
  358. else
  359. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
  360. if (event != IOC_E_PFFAILED)
  361. bfa_iocpf_fail(ioc);
  362. break;
  363. default:
  364. bfa_sm_fault(event);
  365. }
  366. }
  367. static void
  368. bfa_ioc_sm_disabling_entry(struct bfa_ioc *ioc)
  369. {
  370. bfa_iocpf_disable(ioc);
  371. }
  372. /**
  373. * IOC is being desabled
  374. */
  375. static void
  376. bfa_ioc_sm_disabling(struct bfa_ioc *ioc, enum ioc_event event)
  377. {
  378. switch (event) {
  379. case IOC_E_DISABLED:
  380. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabled);
  381. break;
  382. case IOC_E_HWERROR:
  383. /*
  384. * No state change. Will move to disabled state
  385. * after iocpf sm completes failure processing and
  386. * moves to disabled state.
  387. */
  388. bfa_iocpf_fail(ioc);
  389. break;
  390. default:
  391. bfa_sm_fault(event);
  392. }
  393. }
  394. /**
  395. * IOC desable completion entry.
  396. */
  397. static void
  398. bfa_ioc_sm_disabled_entry(struct bfa_ioc *ioc)
  399. {
  400. bfa_ioc_disable_comp(ioc);
  401. }
  402. static void
  403. bfa_ioc_sm_disabled(struct bfa_ioc *ioc, enum ioc_event event)
  404. {
  405. switch (event) {
  406. case IOC_E_ENABLE:
  407. bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
  408. break;
  409. case IOC_E_DISABLE:
  410. ioc->cbfn->disable_cbfn(ioc->bfa);
  411. break;
  412. case IOC_E_DETACH:
  413. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  414. bfa_iocpf_stop(ioc);
  415. break;
  416. default:
  417. bfa_sm_fault(event);
  418. }
  419. }
  420. static void
  421. bfa_ioc_sm_fail_retry_entry(struct bfa_ioc *ioc)
  422. {
  423. }
  424. /**
  425. * Hardware initialization retry.
  426. */
  427. static void
  428. bfa_ioc_sm_fail_retry(struct bfa_ioc *ioc, enum ioc_event event)
  429. {
  430. switch (event) {
  431. case IOC_E_ENABLED:
  432. bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
  433. break;
  434. case IOC_E_PFFAILED:
  435. case IOC_E_HWERROR:
  436. /**
  437. * Initialization retry failed.
  438. */
  439. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  440. if (event != IOC_E_PFFAILED)
  441. bfa_iocpf_initfail(ioc);
  442. break;
  443. case IOC_E_INITFAILED:
  444. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
  445. break;
  446. case IOC_E_ENABLE:
  447. break;
  448. case IOC_E_DISABLE:
  449. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  450. break;
  451. case IOC_E_DETACH:
  452. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  453. bfa_iocpf_stop(ioc);
  454. break;
  455. default:
  456. bfa_sm_fault(event);
  457. }
  458. }
  459. static void
  460. bfa_ioc_sm_fail_entry(struct bfa_ioc *ioc)
  461. {
  462. }
  463. /**
  464. * IOC failure.
  465. */
  466. static void
  467. bfa_ioc_sm_fail(struct bfa_ioc *ioc, enum ioc_event event)
  468. {
  469. switch (event) {
  470. case IOC_E_ENABLE:
  471. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  472. break;
  473. case IOC_E_DISABLE:
  474. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  475. break;
  476. case IOC_E_DETACH:
  477. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  478. bfa_iocpf_stop(ioc);
  479. break;
  480. case IOC_E_HWERROR:
  481. /* HB failure notification, ignore. */
  482. break;
  483. default:
  484. bfa_sm_fault(event);
  485. }
  486. }
  487. /**
  488. * IOCPF State Machine
  489. */
  490. /**
  491. * Reset entry actions -- initialize state machine
  492. */
  493. static void
  494. bfa_iocpf_sm_reset_entry(struct bfa_iocpf *iocpf)
  495. {
  496. iocpf->retry_count = 0;
  497. iocpf->auto_recover = bfa_nw_auto_recover;
  498. }
  499. /**
  500. * Beginning state. IOC is in reset state.
  501. */
  502. static void
  503. bfa_iocpf_sm_reset(struct bfa_iocpf *iocpf, enum iocpf_event event)
  504. {
  505. switch (event) {
  506. case IOCPF_E_ENABLE:
  507. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
  508. break;
  509. case IOCPF_E_STOP:
  510. break;
  511. default:
  512. bfa_sm_fault(event);
  513. }
  514. }
  515. /**
  516. * Semaphore should be acquired for version check.
  517. */
  518. static void
  519. bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf *iocpf)
  520. {
  521. bfa_ioc_hw_sem_init(iocpf->ioc);
  522. bfa_ioc_hw_sem_get(iocpf->ioc);
  523. }
  524. /**
  525. * Awaiting h/w semaphore to continue with version check.
  526. */
  527. static void
  528. bfa_iocpf_sm_fwcheck(struct bfa_iocpf *iocpf, enum iocpf_event event)
  529. {
  530. struct bfa_ioc *ioc = iocpf->ioc;
  531. switch (event) {
  532. case IOCPF_E_SEMLOCKED:
  533. if (bfa_ioc_firmware_lock(ioc)) {
  534. if (bfa_ioc_sync_start(ioc)) {
  535. iocpf->retry_count = 0;
  536. bfa_ioc_sync_join(ioc);
  537. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
  538. } else {
  539. bfa_ioc_firmware_unlock(ioc);
  540. bfa_nw_ioc_hw_sem_release(ioc);
  541. mod_timer(&ioc->sem_timer, jiffies +
  542. msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
  543. }
  544. } else {
  545. bfa_nw_ioc_hw_sem_release(ioc);
  546. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_mismatch);
  547. }
  548. break;
  549. case IOCPF_E_DISABLE:
  550. bfa_ioc_hw_sem_get_cancel(ioc);
  551. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  552. bfa_ioc_pf_disabled(ioc);
  553. break;
  554. case IOCPF_E_STOP:
  555. bfa_ioc_hw_sem_get_cancel(ioc);
  556. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  557. break;
  558. default:
  559. bfa_sm_fault(event);
  560. }
  561. }
  562. /**
  563. * Notify enable completion callback
  564. */
  565. static void
  566. bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf)
  567. {
  568. /* Call only the first time sm enters fwmismatch state. */
  569. if (iocpf->retry_count == 0)
  570. bfa_ioc_pf_fwmismatch(iocpf->ioc);
  571. iocpf->retry_count++;
  572. mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
  573. msecs_to_jiffies(BFA_IOC_TOV));
  574. }
  575. /**
  576. * Awaiting firmware version match.
  577. */
  578. static void
  579. bfa_iocpf_sm_mismatch(struct bfa_iocpf *iocpf, enum iocpf_event event)
  580. {
  581. struct bfa_ioc *ioc = iocpf->ioc;
  582. switch (event) {
  583. case IOCPF_E_TIMEOUT:
  584. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
  585. break;
  586. case IOCPF_E_DISABLE:
  587. del_timer(&ioc->iocpf_timer);
  588. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  589. bfa_ioc_pf_disabled(ioc);
  590. break;
  591. case IOCPF_E_STOP:
  592. del_timer(&ioc->iocpf_timer);
  593. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  594. break;
  595. default:
  596. bfa_sm_fault(event);
  597. }
  598. }
  599. /**
  600. * Request for semaphore.
  601. */
  602. static void
  603. bfa_iocpf_sm_semwait_entry(struct bfa_iocpf *iocpf)
  604. {
  605. bfa_ioc_hw_sem_get(iocpf->ioc);
  606. }
  607. /**
  608. * Awaiting semaphore for h/w initialzation.
  609. */
  610. static void
  611. bfa_iocpf_sm_semwait(struct bfa_iocpf *iocpf, enum iocpf_event event)
  612. {
  613. struct bfa_ioc *ioc = iocpf->ioc;
  614. switch (event) {
  615. case IOCPF_E_SEMLOCKED:
  616. if (bfa_ioc_sync_complete(ioc)) {
  617. bfa_ioc_sync_join(ioc);
  618. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
  619. } else {
  620. bfa_nw_ioc_hw_sem_release(ioc);
  621. mod_timer(&ioc->sem_timer, jiffies +
  622. msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
  623. }
  624. break;
  625. case IOCPF_E_DISABLE:
  626. bfa_ioc_hw_sem_get_cancel(ioc);
  627. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  628. break;
  629. default:
  630. bfa_sm_fault(event);
  631. }
  632. }
  633. static void
  634. bfa_iocpf_sm_hwinit_entry(struct bfa_iocpf *iocpf)
  635. {
  636. mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
  637. msecs_to_jiffies(BFA_IOC_TOV));
  638. bfa_ioc_reset(iocpf->ioc, 0);
  639. }
  640. /**
  641. * Hardware is being initialized. Interrupts are enabled.
  642. * Holding hardware semaphore lock.
  643. */
  644. static void
  645. bfa_iocpf_sm_hwinit(struct bfa_iocpf *iocpf, enum iocpf_event event)
  646. {
  647. struct bfa_ioc *ioc = iocpf->ioc;
  648. switch (event) {
  649. case IOCPF_E_FWREADY:
  650. del_timer(&ioc->iocpf_timer);
  651. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_enabling);
  652. break;
  653. case IOCPF_E_INITFAIL:
  654. del_timer(&ioc->iocpf_timer);
  655. /*
  656. * !!! fall through !!!
  657. */
  658. case IOCPF_E_TIMEOUT:
  659. bfa_nw_ioc_hw_sem_release(ioc);
  660. if (event == IOCPF_E_TIMEOUT)
  661. bfa_ioc_pf_failed(ioc);
  662. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
  663. break;
  664. case IOCPF_E_DISABLE:
  665. del_timer(&ioc->iocpf_timer);
  666. bfa_ioc_sync_leave(ioc);
  667. bfa_nw_ioc_hw_sem_release(ioc);
  668. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
  669. break;
  670. default:
  671. bfa_sm_fault(event);
  672. }
  673. }
  674. static void
  675. bfa_iocpf_sm_enabling_entry(struct bfa_iocpf *iocpf)
  676. {
  677. mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
  678. msecs_to_jiffies(BFA_IOC_TOV));
  679. bfa_ioc_send_enable(iocpf->ioc);
  680. }
  681. /**
  682. * Host IOC function is being enabled, awaiting response from firmware.
  683. * Semaphore is acquired.
  684. */
  685. static void
  686. bfa_iocpf_sm_enabling(struct bfa_iocpf *iocpf, enum iocpf_event event)
  687. {
  688. struct bfa_ioc *ioc = iocpf->ioc;
  689. switch (event) {
  690. case IOCPF_E_FWRSP_ENABLE:
  691. del_timer(&ioc->iocpf_timer);
  692. bfa_nw_ioc_hw_sem_release(ioc);
  693. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_ready);
  694. break;
  695. case IOCPF_E_INITFAIL:
  696. del_timer(&ioc->iocpf_timer);
  697. /*
  698. * !!! fall through !!!
  699. */
  700. case IOCPF_E_TIMEOUT:
  701. bfa_nw_ioc_hw_sem_release(ioc);
  702. if (event == IOCPF_E_TIMEOUT)
  703. bfa_ioc_pf_failed(ioc);
  704. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
  705. break;
  706. case IOCPF_E_DISABLE:
  707. del_timer(&ioc->iocpf_timer);
  708. bfa_nw_ioc_hw_sem_release(ioc);
  709. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
  710. break;
  711. case IOCPF_E_FWREADY:
  712. bfa_ioc_send_enable(ioc);
  713. break;
  714. default:
  715. bfa_sm_fault(event);
  716. }
  717. }
  718. static bool
  719. bfa_nw_ioc_is_operational(struct bfa_ioc *ioc)
  720. {
  721. return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_op);
  722. }
  723. static void
  724. bfa_iocpf_sm_ready_entry(struct bfa_iocpf *iocpf)
  725. {
  726. bfa_ioc_pf_enabled(iocpf->ioc);
  727. }
  728. static void
  729. bfa_iocpf_sm_ready(struct bfa_iocpf *iocpf, enum iocpf_event event)
  730. {
  731. struct bfa_ioc *ioc = iocpf->ioc;
  732. switch (event) {
  733. case IOCPF_E_DISABLE:
  734. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
  735. break;
  736. case IOCPF_E_GETATTRFAIL:
  737. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
  738. break;
  739. case IOCPF_E_FAIL:
  740. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail_sync);
  741. break;
  742. case IOCPF_E_FWREADY:
  743. bfa_ioc_pf_failed(ioc);
  744. if (bfa_nw_ioc_is_operational(ioc))
  745. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail_sync);
  746. else
  747. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
  748. break;
  749. default:
  750. bfa_sm_fault(event);
  751. }
  752. }
  753. static void
  754. bfa_iocpf_sm_disabling_entry(struct bfa_iocpf *iocpf)
  755. {
  756. mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
  757. msecs_to_jiffies(BFA_IOC_TOV));
  758. bfa_ioc_send_disable(iocpf->ioc);
  759. }
  760. /**
  761. * IOC is being disabled
  762. */
  763. static void
  764. bfa_iocpf_sm_disabling(struct bfa_iocpf *iocpf, enum iocpf_event event)
  765. {
  766. struct bfa_ioc *ioc = iocpf->ioc;
  767. switch (event) {
  768. case IOCPF_E_FWRSP_DISABLE:
  769. case IOCPF_E_FWREADY:
  770. del_timer(&ioc->iocpf_timer);
  771. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  772. break;
  773. case IOCPF_E_FAIL:
  774. del_timer(&ioc->iocpf_timer);
  775. /*
  776. * !!! fall through !!!
  777. */
  778. case IOCPF_E_TIMEOUT:
  779. writel(BFI_IOC_FAIL, ioc->ioc_regs.ioc_fwstate);
  780. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  781. break;
  782. case IOCPF_E_FWRSP_ENABLE:
  783. break;
  784. default:
  785. bfa_sm_fault(event);
  786. }
  787. }
  788. static void
  789. bfa_iocpf_sm_disabling_sync_entry(struct bfa_iocpf *iocpf)
  790. {
  791. bfa_ioc_hw_sem_get(iocpf->ioc);
  792. }
  793. /**
  794. * IOC hb ack request is being removed.
  795. */
  796. static void
  797. bfa_iocpf_sm_disabling_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
  798. {
  799. struct bfa_ioc *ioc = iocpf->ioc;
  800. switch (event) {
  801. case IOCPF_E_SEMLOCKED:
  802. bfa_ioc_sync_leave(ioc);
  803. bfa_nw_ioc_hw_sem_release(ioc);
  804. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
  805. break;
  806. case IOCPF_E_FAIL:
  807. break;
  808. default:
  809. bfa_sm_fault(event);
  810. }
  811. }
  812. /**
  813. * IOC disable completion entry.
  814. */
  815. static void
  816. bfa_iocpf_sm_disabled_entry(struct bfa_iocpf *iocpf)
  817. {
  818. bfa_ioc_mbox_flush(iocpf->ioc);
  819. bfa_ioc_pf_disabled(iocpf->ioc);
  820. }
  821. static void
  822. bfa_iocpf_sm_disabled(struct bfa_iocpf *iocpf, enum iocpf_event event)
  823. {
  824. struct bfa_ioc *ioc = iocpf->ioc;
  825. switch (event) {
  826. case IOCPF_E_ENABLE:
  827. iocpf->retry_count = 0;
  828. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
  829. break;
  830. case IOCPF_E_STOP:
  831. bfa_ioc_firmware_unlock(ioc);
  832. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  833. break;
  834. default:
  835. bfa_sm_fault(event);
  836. }
  837. }
  838. static void
  839. bfa_iocpf_sm_initfail_sync_entry(struct bfa_iocpf *iocpf)
  840. {
  841. bfa_ioc_hw_sem_get(iocpf->ioc);
  842. }
  843. /**
  844. * Hardware initialization failed.
  845. */
  846. static void
  847. bfa_iocpf_sm_initfail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
  848. {
  849. struct bfa_ioc *ioc = iocpf->ioc;
  850. switch (event) {
  851. case IOCPF_E_SEMLOCKED:
  852. bfa_ioc_notify_fail(ioc);
  853. bfa_ioc_sync_ack(ioc);
  854. iocpf->retry_count++;
  855. if (iocpf->retry_count >= BFA_IOC_HWINIT_MAX) {
  856. bfa_ioc_sync_leave(ioc);
  857. bfa_nw_ioc_hw_sem_release(ioc);
  858. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail);
  859. } else {
  860. if (bfa_ioc_sync_complete(ioc))
  861. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
  862. else {
  863. bfa_nw_ioc_hw_sem_release(ioc);
  864. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
  865. }
  866. }
  867. break;
  868. case IOCPF_E_DISABLE:
  869. bfa_ioc_hw_sem_get_cancel(ioc);
  870. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  871. break;
  872. case IOCPF_E_STOP:
  873. bfa_ioc_hw_sem_get_cancel(ioc);
  874. bfa_ioc_firmware_unlock(ioc);
  875. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  876. break;
  877. case IOCPF_E_FAIL:
  878. break;
  879. default:
  880. bfa_sm_fault(event);
  881. }
  882. }
  883. static void
  884. bfa_iocpf_sm_initfail_entry(struct bfa_iocpf *iocpf)
  885. {
  886. bfa_ioc_pf_initfailed(iocpf->ioc);
  887. }
  888. /**
  889. * Hardware initialization failed.
  890. */
  891. static void
  892. bfa_iocpf_sm_initfail(struct bfa_iocpf *iocpf, enum iocpf_event event)
  893. {
  894. struct bfa_ioc *ioc = iocpf->ioc;
  895. switch (event) {
  896. case IOCPF_E_DISABLE:
  897. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
  898. break;
  899. case IOCPF_E_STOP:
  900. bfa_ioc_firmware_unlock(ioc);
  901. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  902. break;
  903. default:
  904. bfa_sm_fault(event);
  905. }
  906. }
  907. static void
  908. bfa_iocpf_sm_fail_sync_entry(struct bfa_iocpf *iocpf)
  909. {
  910. /**
  911. * Mark IOC as failed in hardware and stop firmware.
  912. */
  913. bfa_ioc_lpu_stop(iocpf->ioc);
  914. /**
  915. * Flush any queued up mailbox requests.
  916. */
  917. bfa_ioc_mbox_flush(iocpf->ioc);
  918. bfa_ioc_hw_sem_get(iocpf->ioc);
  919. }
  920. /**
  921. * IOC is in failed state.
  922. */
  923. static void
  924. bfa_iocpf_sm_fail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
  925. {
  926. struct bfa_ioc *ioc = iocpf->ioc;
  927. switch (event) {
  928. case IOCPF_E_SEMLOCKED:
  929. iocpf->retry_count = 0;
  930. bfa_ioc_sync_ack(ioc);
  931. bfa_ioc_notify_fail(ioc);
  932. if (!iocpf->auto_recover) {
  933. bfa_ioc_sync_leave(ioc);
  934. bfa_nw_ioc_hw_sem_release(ioc);
  935. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
  936. } else {
  937. if (bfa_ioc_sync_complete(ioc))
  938. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
  939. else {
  940. bfa_nw_ioc_hw_sem_release(ioc);
  941. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
  942. }
  943. }
  944. break;
  945. case IOCPF_E_DISABLE:
  946. bfa_ioc_hw_sem_get_cancel(ioc);
  947. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  948. break;
  949. case IOCPF_E_FAIL:
  950. break;
  951. default:
  952. bfa_sm_fault(event);
  953. }
  954. }
  955. static void
  956. bfa_iocpf_sm_fail_entry(struct bfa_iocpf *iocpf)
  957. {
  958. }
  959. /**
  960. * @brief
  961. * IOC is in failed state.
  962. */
  963. static void
  964. bfa_iocpf_sm_fail(struct bfa_iocpf *iocpf, enum iocpf_event event)
  965. {
  966. switch (event) {
  967. case IOCPF_E_DISABLE:
  968. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
  969. break;
  970. default:
  971. bfa_sm_fault(event);
  972. }
  973. }
  974. /**
  975. * BFA IOC private functions
  976. */
  977. /**
  978. * Notify common modules registered for notification.
  979. */
  980. static void
  981. bfa_ioc_event_notify(struct bfa_ioc *ioc, enum bfa_ioc_event event)
  982. {
  983. struct bfa_ioc_notify *notify;
  984. struct list_head *qe;
  985. list_for_each(qe, &ioc->notify_q) {
  986. notify = (struct bfa_ioc_notify *)qe;
  987. notify->cbfn(notify->cbarg, event);
  988. }
  989. }
  990. static void
  991. bfa_ioc_disable_comp(struct bfa_ioc *ioc)
  992. {
  993. ioc->cbfn->disable_cbfn(ioc->bfa);
  994. bfa_ioc_event_notify(ioc, BFA_IOC_E_DISABLED);
  995. }
  996. bool
  997. bfa_nw_ioc_sem_get(void __iomem *sem_reg)
  998. {
  999. u32 r32;
  1000. int cnt = 0;
  1001. #define BFA_SEM_SPINCNT 3000
  1002. r32 = readl(sem_reg);
  1003. while (r32 && (cnt < BFA_SEM_SPINCNT)) {
  1004. cnt++;
  1005. udelay(2);
  1006. r32 = readl(sem_reg);
  1007. }
  1008. if (r32 == 0)
  1009. return true;
  1010. BUG_ON(!(cnt < BFA_SEM_SPINCNT));
  1011. return false;
  1012. }
  1013. void
  1014. bfa_nw_ioc_sem_release(void __iomem *sem_reg)
  1015. {
  1016. writel(1, sem_reg);
  1017. }
  1018. static void
  1019. bfa_ioc_hw_sem_init(struct bfa_ioc *ioc)
  1020. {
  1021. struct bfi_ioc_image_hdr fwhdr;
  1022. u32 fwstate = readl(ioc->ioc_regs.ioc_fwstate);
  1023. if (fwstate == BFI_IOC_UNINIT)
  1024. return;
  1025. bfa_nw_ioc_fwver_get(ioc, &fwhdr);
  1026. if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL)
  1027. return;
  1028. writel(BFI_IOC_UNINIT, ioc->ioc_regs.ioc_fwstate);
  1029. /*
  1030. * Try to lock and then unlock the semaphore.
  1031. */
  1032. readl(ioc->ioc_regs.ioc_sem_reg);
  1033. writel(1, ioc->ioc_regs.ioc_sem_reg);
  1034. }
  1035. static void
  1036. bfa_ioc_hw_sem_get(struct bfa_ioc *ioc)
  1037. {
  1038. u32 r32;
  1039. /**
  1040. * First read to the semaphore register will return 0, subsequent reads
  1041. * will return 1. Semaphore is released by writing 1 to the register
  1042. */
  1043. r32 = readl(ioc->ioc_regs.ioc_sem_reg);
  1044. if (r32 == 0) {
  1045. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEMLOCKED);
  1046. return;
  1047. }
  1048. mod_timer(&ioc->sem_timer, jiffies +
  1049. msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
  1050. }
  1051. void
  1052. bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc)
  1053. {
  1054. writel(1, ioc->ioc_regs.ioc_sem_reg);
  1055. }
  1056. static void
  1057. bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc)
  1058. {
  1059. del_timer(&ioc->sem_timer);
  1060. }
  1061. /**
  1062. * @brief
  1063. * Initialize LPU local memory (aka secondary memory / SRAM)
  1064. */
  1065. static void
  1066. bfa_ioc_lmem_init(struct bfa_ioc *ioc)
  1067. {
  1068. u32 pss_ctl;
  1069. int i;
  1070. #define PSS_LMEM_INIT_TIME 10000
  1071. pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
  1072. pss_ctl &= ~__PSS_LMEM_RESET;
  1073. pss_ctl |= __PSS_LMEM_INIT_EN;
  1074. /*
  1075. * i2c workaround 12.5khz clock
  1076. */
  1077. pss_ctl |= __PSS_I2C_CLK_DIV(3UL);
  1078. writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
  1079. /**
  1080. * wait for memory initialization to be complete
  1081. */
  1082. i = 0;
  1083. do {
  1084. pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
  1085. i++;
  1086. } while (!(pss_ctl & __PSS_LMEM_INIT_DONE) && (i < PSS_LMEM_INIT_TIME));
  1087. /**
  1088. * If memory initialization is not successful, IOC timeout will catch
  1089. * such failures.
  1090. */
  1091. BUG_ON(!(pss_ctl & __PSS_LMEM_INIT_DONE));
  1092. pss_ctl &= ~(__PSS_LMEM_INIT_DONE | __PSS_LMEM_INIT_EN);
  1093. writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
  1094. }
  1095. static void
  1096. bfa_ioc_lpu_start(struct bfa_ioc *ioc)
  1097. {
  1098. u32 pss_ctl;
  1099. /**
  1100. * Take processor out of reset.
  1101. */
  1102. pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
  1103. pss_ctl &= ~__PSS_LPU0_RESET;
  1104. writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
  1105. }
  1106. static void
  1107. bfa_ioc_lpu_stop(struct bfa_ioc *ioc)
  1108. {
  1109. u32 pss_ctl;
  1110. /**
  1111. * Put processors in reset.
  1112. */
  1113. pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
  1114. pss_ctl |= (__PSS_LPU0_RESET | __PSS_LPU1_RESET);
  1115. writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
  1116. }
  1117. /**
  1118. * Get driver and firmware versions.
  1119. */
  1120. void
  1121. bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
  1122. {
  1123. u32 pgnum;
  1124. u32 loff = 0;
  1125. int i;
  1126. u32 *fwsig = (u32 *) fwhdr;
  1127. pgnum = bfa_ioc_smem_pgnum(ioc, loff);
  1128. writel(pgnum, ioc->ioc_regs.host_page_num_fn);
  1129. for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr) / sizeof(u32));
  1130. i++) {
  1131. fwsig[i] =
  1132. swab32(readl((loff) + (ioc->ioc_regs.smem_page_start)));
  1133. loff += sizeof(u32);
  1134. }
  1135. }
  1136. /**
  1137. * Returns TRUE if same.
  1138. */
  1139. bool
  1140. bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
  1141. {
  1142. struct bfi_ioc_image_hdr *drv_fwhdr;
  1143. int i;
  1144. drv_fwhdr = (struct bfi_ioc_image_hdr *)
  1145. bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc), 0);
  1146. for (i = 0; i < BFI_IOC_MD5SUM_SZ; i++) {
  1147. if (fwhdr->md5sum[i] != drv_fwhdr->md5sum[i])
  1148. return false;
  1149. }
  1150. return true;
  1151. }
  1152. /**
  1153. * Return true if current running version is valid. Firmware signature and
  1154. * execution context (driver/bios) must match.
  1155. */
  1156. static bool
  1157. bfa_ioc_fwver_valid(struct bfa_ioc *ioc, u32 boot_env)
  1158. {
  1159. struct bfi_ioc_image_hdr fwhdr, *drv_fwhdr;
  1160. bfa_nw_ioc_fwver_get(ioc, &fwhdr);
  1161. drv_fwhdr = (struct bfi_ioc_image_hdr *)
  1162. bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc), 0);
  1163. if (fwhdr.signature != drv_fwhdr->signature)
  1164. return false;
  1165. if (swab32(fwhdr.param) != boot_env)
  1166. return false;
  1167. return bfa_nw_ioc_fwver_cmp(ioc, &fwhdr);
  1168. }
  1169. /**
  1170. * Conditionally flush any pending message from firmware at start.
  1171. */
  1172. static void
  1173. bfa_ioc_msgflush(struct bfa_ioc *ioc)
  1174. {
  1175. u32 r32;
  1176. r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
  1177. if (r32)
  1178. writel(1, ioc->ioc_regs.lpu_mbox_cmd);
  1179. }
  1180. /**
  1181. * @img ioc_init_logic.jpg
  1182. */
  1183. static void
  1184. bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force)
  1185. {
  1186. enum bfi_ioc_state ioc_fwstate;
  1187. bool fwvalid;
  1188. u32 boot_env;
  1189. ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate);
  1190. boot_env = BFI_BOOT_LOADER_OS;
  1191. if (force)
  1192. ioc_fwstate = BFI_IOC_UNINIT;
  1193. /**
  1194. * check if firmware is valid
  1195. */
  1196. fwvalid = (ioc_fwstate == BFI_IOC_UNINIT) ?
  1197. false : bfa_ioc_fwver_valid(ioc, boot_env);
  1198. if (!fwvalid) {
  1199. bfa_ioc_boot(ioc, BFI_BOOT_TYPE_NORMAL, boot_env);
  1200. return;
  1201. }
  1202. /**
  1203. * If hardware initialization is in progress (initialized by other IOC),
  1204. * just wait for an initialization completion interrupt.
  1205. */
  1206. if (ioc_fwstate == BFI_IOC_INITING) {
  1207. ioc->cbfn->reset_cbfn(ioc->bfa);
  1208. return;
  1209. }
  1210. /**
  1211. * If IOC function is disabled and firmware version is same,
  1212. * just re-enable IOC.
  1213. */
  1214. if (ioc_fwstate == BFI_IOC_DISABLED || ioc_fwstate == BFI_IOC_OP) {
  1215. /**
  1216. * When using MSI-X any pending firmware ready event should
  1217. * be flushed. Otherwise MSI-X interrupts are not delivered.
  1218. */
  1219. bfa_ioc_msgflush(ioc);
  1220. ioc->cbfn->reset_cbfn(ioc->bfa);
  1221. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FWREADY);
  1222. return;
  1223. }
  1224. /**
  1225. * Initialize the h/w for any other states.
  1226. */
  1227. bfa_ioc_boot(ioc, BFI_BOOT_TYPE_NORMAL, boot_env);
  1228. }
  1229. void
  1230. bfa_nw_ioc_timeout(void *ioc_arg)
  1231. {
  1232. struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
  1233. bfa_fsm_send_event(ioc, IOC_E_TIMEOUT);
  1234. }
  1235. static void
  1236. bfa_ioc_mbox_send(struct bfa_ioc *ioc, void *ioc_msg, int len)
  1237. {
  1238. u32 *msgp = (u32 *) ioc_msg;
  1239. u32 i;
  1240. BUG_ON(!(len <= BFI_IOC_MSGLEN_MAX));
  1241. /*
  1242. * first write msg to mailbox registers
  1243. */
  1244. for (i = 0; i < len / sizeof(u32); i++)
  1245. writel(cpu_to_le32(msgp[i]),
  1246. ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
  1247. for (; i < BFI_IOC_MSGLEN_MAX / sizeof(u32); i++)
  1248. writel(0, ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
  1249. /*
  1250. * write 1 to mailbox CMD to trigger LPU event
  1251. */
  1252. writel(1, ioc->ioc_regs.hfn_mbox_cmd);
  1253. (void) readl(ioc->ioc_regs.hfn_mbox_cmd);
  1254. }
  1255. static void
  1256. bfa_ioc_send_enable(struct bfa_ioc *ioc)
  1257. {
  1258. struct bfi_ioc_ctrl_req enable_req;
  1259. struct timeval tv;
  1260. bfi_h2i_set(enable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_ENABLE_REQ,
  1261. bfa_ioc_portid(ioc));
  1262. enable_req.ioc_class = ioc->ioc_mc;
  1263. do_gettimeofday(&tv);
  1264. enable_req.tv_sec = ntohl(tv.tv_sec);
  1265. bfa_ioc_mbox_send(ioc, &enable_req, sizeof(struct bfi_ioc_ctrl_req));
  1266. }
  1267. static void
  1268. bfa_ioc_send_disable(struct bfa_ioc *ioc)
  1269. {
  1270. struct bfi_ioc_ctrl_req disable_req;
  1271. bfi_h2i_set(disable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_DISABLE_REQ,
  1272. bfa_ioc_portid(ioc));
  1273. bfa_ioc_mbox_send(ioc, &disable_req, sizeof(struct bfi_ioc_ctrl_req));
  1274. }
  1275. static void
  1276. bfa_ioc_send_getattr(struct bfa_ioc *ioc)
  1277. {
  1278. struct bfi_ioc_getattr_req attr_req;
  1279. bfi_h2i_set(attr_req.mh, BFI_MC_IOC, BFI_IOC_H2I_GETATTR_REQ,
  1280. bfa_ioc_portid(ioc));
  1281. bfa_dma_be_addr_set(attr_req.attr_addr, ioc->attr_dma.pa);
  1282. bfa_ioc_mbox_send(ioc, &attr_req, sizeof(attr_req));
  1283. }
  1284. void
  1285. bfa_nw_ioc_hb_check(void *cbarg)
  1286. {
  1287. struct bfa_ioc *ioc = cbarg;
  1288. u32 hb_count;
  1289. hb_count = readl(ioc->ioc_regs.heartbeat);
  1290. if (ioc->hb_count == hb_count) {
  1291. bfa_ioc_recover(ioc);
  1292. return;
  1293. } else {
  1294. ioc->hb_count = hb_count;
  1295. }
  1296. bfa_ioc_mbox_poll(ioc);
  1297. mod_timer(&ioc->hb_timer, jiffies +
  1298. msecs_to_jiffies(BFA_IOC_HB_TOV));
  1299. }
  1300. static void
  1301. bfa_ioc_hb_monitor(struct bfa_ioc *ioc)
  1302. {
  1303. ioc->hb_count = readl(ioc->ioc_regs.heartbeat);
  1304. mod_timer(&ioc->hb_timer, jiffies +
  1305. msecs_to_jiffies(BFA_IOC_HB_TOV));
  1306. }
  1307. static void
  1308. bfa_ioc_hb_stop(struct bfa_ioc *ioc)
  1309. {
  1310. del_timer(&ioc->hb_timer);
  1311. }
  1312. /**
  1313. * @brief
  1314. * Initiate a full firmware download.
  1315. */
  1316. static void
  1317. bfa_ioc_download_fw(struct bfa_ioc *ioc, u32 boot_type,
  1318. u32 boot_env)
  1319. {
  1320. u32 *fwimg;
  1321. u32 pgnum;
  1322. u32 loff = 0;
  1323. u32 chunkno = 0;
  1324. u32 i;
  1325. /**
  1326. * Initialize LMEM first before code download
  1327. */
  1328. bfa_ioc_lmem_init(ioc);
  1329. fwimg = bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc), chunkno);
  1330. pgnum = bfa_ioc_smem_pgnum(ioc, loff);
  1331. writel(pgnum, ioc->ioc_regs.host_page_num_fn);
  1332. for (i = 0; i < bfa_cb_image_get_size(BFA_IOC_FWIMG_TYPE(ioc)); i++) {
  1333. if (BFA_IOC_FLASH_CHUNK_NO(i) != chunkno) {
  1334. chunkno = BFA_IOC_FLASH_CHUNK_NO(i);
  1335. fwimg = bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc),
  1336. BFA_IOC_FLASH_CHUNK_ADDR(chunkno));
  1337. }
  1338. /**
  1339. * write smem
  1340. */
  1341. writel((swab32(fwimg[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i)])),
  1342. ((ioc->ioc_regs.smem_page_start) + (loff)));
  1343. loff += sizeof(u32);
  1344. /**
  1345. * handle page offset wrap around
  1346. */
  1347. loff = PSS_SMEM_PGOFF(loff);
  1348. if (loff == 0) {
  1349. pgnum++;
  1350. writel(pgnum,
  1351. ioc->ioc_regs.host_page_num_fn);
  1352. }
  1353. }
  1354. writel(bfa_ioc_smem_pgnum(ioc, 0),
  1355. ioc->ioc_regs.host_page_num_fn);
  1356. /*
  1357. * Set boot type and boot param at the end.
  1358. */
  1359. writel(boot_type, ((ioc->ioc_regs.smem_page_start)
  1360. + (BFI_BOOT_TYPE_OFF)));
  1361. writel(boot_env, ((ioc->ioc_regs.smem_page_start)
  1362. + (BFI_BOOT_LOADER_OFF)));
  1363. }
  1364. static void
  1365. bfa_ioc_reset(struct bfa_ioc *ioc, bool force)
  1366. {
  1367. bfa_ioc_hwinit(ioc, force);
  1368. }
  1369. /**
  1370. * @brief
  1371. * Update BFA configuration from firmware configuration.
  1372. */
  1373. static void
  1374. bfa_ioc_getattr_reply(struct bfa_ioc *ioc)
  1375. {
  1376. struct bfi_ioc_attr *attr = ioc->attr;
  1377. attr->adapter_prop = ntohl(attr->adapter_prop);
  1378. attr->card_type = ntohl(attr->card_type);
  1379. attr->maxfrsize = ntohs(attr->maxfrsize);
  1380. bfa_fsm_send_event(ioc, IOC_E_FWRSP_GETATTR);
  1381. }
  1382. /**
  1383. * Attach time initialization of mbox logic.
  1384. */
  1385. static void
  1386. bfa_ioc_mbox_attach(struct bfa_ioc *ioc)
  1387. {
  1388. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1389. int mc;
  1390. INIT_LIST_HEAD(&mod->cmd_q);
  1391. for (mc = 0; mc < BFI_MC_MAX; mc++) {
  1392. mod->mbhdlr[mc].cbfn = NULL;
  1393. mod->mbhdlr[mc].cbarg = ioc->bfa;
  1394. }
  1395. }
  1396. /**
  1397. * Mbox poll timer -- restarts any pending mailbox requests.
  1398. */
  1399. static void
  1400. bfa_ioc_mbox_poll(struct bfa_ioc *ioc)
  1401. {
  1402. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1403. struct bfa_mbox_cmd *cmd;
  1404. u32 stat;
  1405. /**
  1406. * If no command pending, do nothing
  1407. */
  1408. if (list_empty(&mod->cmd_q))
  1409. return;
  1410. /**
  1411. * If previous command is not yet fetched by firmware, do nothing
  1412. */
  1413. stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
  1414. if (stat)
  1415. return;
  1416. /**
  1417. * Enqueue command to firmware.
  1418. */
  1419. bfa_q_deq(&mod->cmd_q, &cmd);
  1420. bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
  1421. }
  1422. /**
  1423. * Cleanup any pending requests.
  1424. */
  1425. static void
  1426. bfa_ioc_mbox_flush(struct bfa_ioc *ioc)
  1427. {
  1428. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1429. struct bfa_mbox_cmd *cmd;
  1430. while (!list_empty(&mod->cmd_q))
  1431. bfa_q_deq(&mod->cmd_q, &cmd);
  1432. }
  1433. static void
  1434. bfa_ioc_fail_notify(struct bfa_ioc *ioc)
  1435. {
  1436. /**
  1437. * Notify driver and common modules registered for notification.
  1438. */
  1439. ioc->cbfn->hbfail_cbfn(ioc->bfa);
  1440. bfa_ioc_event_notify(ioc, BFA_IOC_E_FAILED);
  1441. }
  1442. static void
  1443. bfa_ioc_pf_enabled(struct bfa_ioc *ioc)
  1444. {
  1445. bfa_fsm_send_event(ioc, IOC_E_ENABLED);
  1446. }
  1447. static void
  1448. bfa_ioc_pf_disabled(struct bfa_ioc *ioc)
  1449. {
  1450. bfa_fsm_send_event(ioc, IOC_E_DISABLED);
  1451. }
  1452. static void
  1453. bfa_ioc_pf_initfailed(struct bfa_ioc *ioc)
  1454. {
  1455. bfa_fsm_send_event(ioc, IOC_E_INITFAILED);
  1456. }
  1457. static void
  1458. bfa_ioc_pf_failed(struct bfa_ioc *ioc)
  1459. {
  1460. bfa_fsm_send_event(ioc, IOC_E_PFFAILED);
  1461. }
  1462. static void
  1463. bfa_ioc_pf_fwmismatch(struct bfa_ioc *ioc)
  1464. {
  1465. /**
  1466. * Provide enable completion callback and AEN notification.
  1467. */
  1468. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  1469. }
  1470. /**
  1471. * IOC public
  1472. */
  1473. static enum bfa_status
  1474. bfa_ioc_pll_init(struct bfa_ioc *ioc)
  1475. {
  1476. /*
  1477. * Hold semaphore so that nobody can access the chip during init.
  1478. */
  1479. bfa_nw_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg);
  1480. bfa_ioc_pll_init_asic(ioc);
  1481. ioc->pllinit = true;
  1482. /*
  1483. * release semaphore.
  1484. */
  1485. bfa_nw_ioc_sem_release(ioc->ioc_regs.ioc_init_sem_reg);
  1486. return BFA_STATUS_OK;
  1487. }
  1488. /**
  1489. * Interface used by diag module to do firmware boot with memory test
  1490. * as the entry vector.
  1491. */
  1492. static void
  1493. bfa_ioc_boot(struct bfa_ioc *ioc, u32 boot_type, u32 boot_env)
  1494. {
  1495. void __iomem *rb;
  1496. bfa_ioc_stats(ioc, ioc_boots);
  1497. if (bfa_ioc_pll_init(ioc) != BFA_STATUS_OK)
  1498. return;
  1499. /**
  1500. * Initialize IOC state of all functions on a chip reset.
  1501. */
  1502. rb = ioc->pcidev.pci_bar_kva;
  1503. if (boot_type == BFI_BOOT_TYPE_MEMTEST) {
  1504. writel(BFI_IOC_MEMTEST, (rb + BFA_IOC0_STATE_REG));
  1505. writel(BFI_IOC_MEMTEST, (rb + BFA_IOC1_STATE_REG));
  1506. } else {
  1507. writel(BFI_IOC_INITING, (rb + BFA_IOC0_STATE_REG));
  1508. writel(BFI_IOC_INITING, (rb + BFA_IOC1_STATE_REG));
  1509. }
  1510. bfa_ioc_msgflush(ioc);
  1511. bfa_ioc_download_fw(ioc, boot_type, boot_env);
  1512. /**
  1513. * Enable interrupts just before starting LPU
  1514. */
  1515. ioc->cbfn->reset_cbfn(ioc->bfa);
  1516. bfa_ioc_lpu_start(ioc);
  1517. }
  1518. /**
  1519. * Enable/disable IOC failure auto recovery.
  1520. */
  1521. void
  1522. bfa_nw_ioc_auto_recover(bool auto_recover)
  1523. {
  1524. bfa_nw_auto_recover = auto_recover;
  1525. }
  1526. static void
  1527. bfa_ioc_msgget(struct bfa_ioc *ioc, void *mbmsg)
  1528. {
  1529. u32 *msgp = mbmsg;
  1530. u32 r32;
  1531. int i;
  1532. /**
  1533. * read the MBOX msg
  1534. */
  1535. for (i = 0; i < (sizeof(union bfi_ioc_i2h_msg_u) / sizeof(u32));
  1536. i++) {
  1537. r32 = readl(ioc->ioc_regs.lpu_mbox +
  1538. i * sizeof(u32));
  1539. msgp[i] = htonl(r32);
  1540. }
  1541. /**
  1542. * turn off mailbox interrupt by clearing mailbox status
  1543. */
  1544. writel(1, ioc->ioc_regs.lpu_mbox_cmd);
  1545. readl(ioc->ioc_regs.lpu_mbox_cmd);
  1546. }
  1547. static void
  1548. bfa_ioc_isr(struct bfa_ioc *ioc, struct bfi_mbmsg *m)
  1549. {
  1550. union bfi_ioc_i2h_msg_u *msg;
  1551. struct bfa_iocpf *iocpf = &ioc->iocpf;
  1552. msg = (union bfi_ioc_i2h_msg_u *) m;
  1553. bfa_ioc_stats(ioc, ioc_isrs);
  1554. switch (msg->mh.msg_id) {
  1555. case BFI_IOC_I2H_HBEAT:
  1556. break;
  1557. case BFI_IOC_I2H_READY_EVENT:
  1558. bfa_fsm_send_event(iocpf, IOCPF_E_FWREADY);
  1559. break;
  1560. case BFI_IOC_I2H_ENABLE_REPLY:
  1561. bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_ENABLE);
  1562. break;
  1563. case BFI_IOC_I2H_DISABLE_REPLY:
  1564. bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_DISABLE);
  1565. break;
  1566. case BFI_IOC_I2H_GETATTR_REPLY:
  1567. bfa_ioc_getattr_reply(ioc);
  1568. break;
  1569. default:
  1570. BUG_ON(1);
  1571. }
  1572. }
  1573. /**
  1574. * IOC attach time initialization and setup.
  1575. *
  1576. * @param[in] ioc memory for IOC
  1577. * @param[in] bfa driver instance structure
  1578. */
  1579. void
  1580. bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa, struct bfa_ioc_cbfn *cbfn)
  1581. {
  1582. ioc->bfa = bfa;
  1583. ioc->cbfn = cbfn;
  1584. ioc->fcmode = false;
  1585. ioc->pllinit = false;
  1586. ioc->dbg_fwsave_once = true;
  1587. ioc->iocpf.ioc = ioc;
  1588. bfa_ioc_mbox_attach(ioc);
  1589. INIT_LIST_HEAD(&ioc->notify_q);
  1590. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  1591. bfa_fsm_send_event(ioc, IOC_E_RESET);
  1592. }
  1593. /**
  1594. * Driver detach time IOC cleanup.
  1595. */
  1596. void
  1597. bfa_nw_ioc_detach(struct bfa_ioc *ioc)
  1598. {
  1599. bfa_fsm_send_event(ioc, IOC_E_DETACH);
  1600. }
  1601. /**
  1602. * Setup IOC PCI properties.
  1603. *
  1604. * @param[in] pcidev PCI device information for this IOC
  1605. */
  1606. void
  1607. bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev,
  1608. enum bfi_mclass mc)
  1609. {
  1610. ioc->ioc_mc = mc;
  1611. ioc->pcidev = *pcidev;
  1612. ioc->ctdev = bfa_asic_id_ct(ioc->pcidev.device_id);
  1613. ioc->cna = ioc->ctdev && !ioc->fcmode;
  1614. bfa_nw_ioc_set_ct_hwif(ioc);
  1615. bfa_ioc_map_port(ioc);
  1616. bfa_ioc_reg_init(ioc);
  1617. }
  1618. /**
  1619. * Initialize IOC dma memory
  1620. *
  1621. * @param[in] dm_kva kernel virtual address of IOC dma memory
  1622. * @param[in] dm_pa physical address of IOC dma memory
  1623. */
  1624. void
  1625. bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa)
  1626. {
  1627. /**
  1628. * dma memory for firmware attribute
  1629. */
  1630. ioc->attr_dma.kva = dm_kva;
  1631. ioc->attr_dma.pa = dm_pa;
  1632. ioc->attr = (struct bfi_ioc_attr *) dm_kva;
  1633. }
  1634. /**
  1635. * Return size of dma memory required.
  1636. */
  1637. u32
  1638. bfa_nw_ioc_meminfo(void)
  1639. {
  1640. return roundup(sizeof(struct bfi_ioc_attr), BFA_DMA_ALIGN_SZ);
  1641. }
  1642. void
  1643. bfa_nw_ioc_enable(struct bfa_ioc *ioc)
  1644. {
  1645. bfa_ioc_stats(ioc, ioc_enables);
  1646. ioc->dbg_fwsave_once = true;
  1647. bfa_fsm_send_event(ioc, IOC_E_ENABLE);
  1648. }
  1649. void
  1650. bfa_nw_ioc_disable(struct bfa_ioc *ioc)
  1651. {
  1652. bfa_ioc_stats(ioc, ioc_disables);
  1653. bfa_fsm_send_event(ioc, IOC_E_DISABLE);
  1654. }
  1655. static u32
  1656. bfa_ioc_smem_pgnum(struct bfa_ioc *ioc, u32 fmaddr)
  1657. {
  1658. return PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, fmaddr);
  1659. }
  1660. /**
  1661. * Register mailbox message handler function, to be called by common modules
  1662. */
  1663. void
  1664. bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
  1665. bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg)
  1666. {
  1667. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1668. mod->mbhdlr[mc].cbfn = cbfn;
  1669. mod->mbhdlr[mc].cbarg = cbarg;
  1670. }
  1671. /**
  1672. * Queue a mailbox command request to firmware. Waits if mailbox is busy.
  1673. * Responsibility of caller to serialize
  1674. *
  1675. * @param[in] ioc IOC instance
  1676. * @param[i] cmd Mailbox command
  1677. */
  1678. bool
  1679. bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, struct bfa_mbox_cmd *cmd,
  1680. bfa_mbox_cmd_cbfn_t cbfn, void *cbarg)
  1681. {
  1682. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1683. u32 stat;
  1684. cmd->cbfn = cbfn;
  1685. cmd->cbarg = cbarg;
  1686. /**
  1687. * If a previous command is pending, queue new command
  1688. */
  1689. if (!list_empty(&mod->cmd_q)) {
  1690. list_add_tail(&cmd->qe, &mod->cmd_q);
  1691. return true;
  1692. }
  1693. /**
  1694. * If mailbox is busy, queue command for poll timer
  1695. */
  1696. stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
  1697. if (stat) {
  1698. list_add_tail(&cmd->qe, &mod->cmd_q);
  1699. return true;
  1700. }
  1701. /**
  1702. * mailbox is free -- queue command to firmware
  1703. */
  1704. bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
  1705. return false;
  1706. }
  1707. /**
  1708. * Handle mailbox interrupts
  1709. */
  1710. void
  1711. bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc)
  1712. {
  1713. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1714. struct bfi_mbmsg m;
  1715. int mc;
  1716. bfa_ioc_msgget(ioc, &m);
  1717. /**
  1718. * Treat IOC message class as special.
  1719. */
  1720. mc = m.mh.msg_class;
  1721. if (mc == BFI_MC_IOC) {
  1722. bfa_ioc_isr(ioc, &m);
  1723. return;
  1724. }
  1725. if ((mc >= BFI_MC_MAX) || (mod->mbhdlr[mc].cbfn == NULL))
  1726. return;
  1727. mod->mbhdlr[mc].cbfn(mod->mbhdlr[mc].cbarg, &m);
  1728. }
  1729. void
  1730. bfa_nw_ioc_error_isr(struct bfa_ioc *ioc)
  1731. {
  1732. bfa_ioc_stats(ioc, ioc_hbfails);
  1733. bfa_ioc_stats_hb_count(ioc, ioc->hb_count);
  1734. bfa_fsm_send_event(ioc, IOC_E_HWERROR);
  1735. }
  1736. /**
  1737. * return true if IOC is disabled
  1738. */
  1739. bool
  1740. bfa_nw_ioc_is_disabled(struct bfa_ioc *ioc)
  1741. {
  1742. return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabling) ||
  1743. bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled);
  1744. }
  1745. /**
  1746. * Add to IOC heartbeat failure notification queue. To be used by common
  1747. * modules such as cee, port, diag.
  1748. */
  1749. void
  1750. bfa_nw_ioc_notify_register(struct bfa_ioc *ioc,
  1751. struct bfa_ioc_notify *notify)
  1752. {
  1753. list_add_tail(&notify->qe, &ioc->notify_q);
  1754. }
  1755. #define BFA_MFG_NAME "Brocade"
  1756. static void
  1757. bfa_ioc_get_adapter_attr(struct bfa_ioc *ioc,
  1758. struct bfa_adapter_attr *ad_attr)
  1759. {
  1760. struct bfi_ioc_attr *ioc_attr;
  1761. ioc_attr = ioc->attr;
  1762. bfa_ioc_get_adapter_serial_num(ioc, ad_attr->serial_num);
  1763. bfa_ioc_get_adapter_fw_ver(ioc, ad_attr->fw_ver);
  1764. bfa_ioc_get_adapter_optrom_ver(ioc, ad_attr->optrom_ver);
  1765. bfa_ioc_get_adapter_manufacturer(ioc, ad_attr->manufacturer);
  1766. memcpy(&ad_attr->vpd, &ioc_attr->vpd,
  1767. sizeof(struct bfa_mfg_vpd));
  1768. ad_attr->nports = bfa_ioc_get_nports(ioc);
  1769. ad_attr->max_speed = bfa_ioc_speed_sup(ioc);
  1770. bfa_ioc_get_adapter_model(ioc, ad_attr->model);
  1771. /* For now, model descr uses same model string */
  1772. bfa_ioc_get_adapter_model(ioc, ad_attr->model_descr);
  1773. ad_attr->card_type = ioc_attr->card_type;
  1774. ad_attr->is_mezz = bfa_mfg_is_mezz(ioc_attr->card_type);
  1775. if (BFI_ADAPTER_IS_SPECIAL(ioc_attr->adapter_prop))
  1776. ad_attr->prototype = 1;
  1777. else
  1778. ad_attr->prototype = 0;
  1779. ad_attr->pwwn = bfa_ioc_get_pwwn(ioc);
  1780. ad_attr->mac = bfa_nw_ioc_get_mac(ioc);
  1781. ad_attr->pcie_gen = ioc_attr->pcie_gen;
  1782. ad_attr->pcie_lanes = ioc_attr->pcie_lanes;
  1783. ad_attr->pcie_lanes_orig = ioc_attr->pcie_lanes_orig;
  1784. ad_attr->asic_rev = ioc_attr->asic_rev;
  1785. bfa_ioc_get_pci_chip_rev(ioc, ad_attr->hw_ver);
  1786. ad_attr->cna_capable = ioc->cna;
  1787. ad_attr->trunk_capable = (ad_attr->nports > 1) && !ioc->cna;
  1788. }
  1789. static enum bfa_ioc_type
  1790. bfa_ioc_get_type(struct bfa_ioc *ioc)
  1791. {
  1792. if (!ioc->ctdev || ioc->fcmode)
  1793. return BFA_IOC_TYPE_FC;
  1794. else if (ioc->ioc_mc == BFI_MC_IOCFC)
  1795. return BFA_IOC_TYPE_FCoE;
  1796. else if (ioc->ioc_mc == BFI_MC_LL)
  1797. return BFA_IOC_TYPE_LL;
  1798. else {
  1799. BUG_ON(!(ioc->ioc_mc == BFI_MC_LL));
  1800. return BFA_IOC_TYPE_LL;
  1801. }
  1802. }
  1803. static void
  1804. bfa_ioc_get_adapter_serial_num(struct bfa_ioc *ioc, char *serial_num)
  1805. {
  1806. memset(serial_num, 0, BFA_ADAPTER_SERIAL_NUM_LEN);
  1807. memcpy(serial_num,
  1808. (void *)ioc->attr->brcd_serialnum,
  1809. BFA_ADAPTER_SERIAL_NUM_LEN);
  1810. }
  1811. static void
  1812. bfa_ioc_get_adapter_fw_ver(struct bfa_ioc *ioc, char *fw_ver)
  1813. {
  1814. memset(fw_ver, 0, BFA_VERSION_LEN);
  1815. memcpy(fw_ver, ioc->attr->fw_version, BFA_VERSION_LEN);
  1816. }
  1817. static void
  1818. bfa_ioc_get_pci_chip_rev(struct bfa_ioc *ioc, char *chip_rev)
  1819. {
  1820. BUG_ON(!(chip_rev));
  1821. memset(chip_rev, 0, BFA_IOC_CHIP_REV_LEN);
  1822. chip_rev[0] = 'R';
  1823. chip_rev[1] = 'e';
  1824. chip_rev[2] = 'v';
  1825. chip_rev[3] = '-';
  1826. chip_rev[4] = ioc->attr->asic_rev;
  1827. chip_rev[5] = '\0';
  1828. }
  1829. static void
  1830. bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc *ioc, char *optrom_ver)
  1831. {
  1832. memset(optrom_ver, 0, BFA_VERSION_LEN);
  1833. memcpy(optrom_ver, ioc->attr->optrom_version,
  1834. BFA_VERSION_LEN);
  1835. }
  1836. static void
  1837. bfa_ioc_get_adapter_manufacturer(struct bfa_ioc *ioc, char *manufacturer)
  1838. {
  1839. memset(manufacturer, 0, BFA_ADAPTER_MFG_NAME_LEN);
  1840. memcpy(manufacturer, BFA_MFG_NAME, BFA_ADAPTER_MFG_NAME_LEN);
  1841. }
  1842. static void
  1843. bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model)
  1844. {
  1845. struct bfi_ioc_attr *ioc_attr;
  1846. BUG_ON(!(model));
  1847. memset(model, 0, BFA_ADAPTER_MODEL_NAME_LEN);
  1848. ioc_attr = ioc->attr;
  1849. /**
  1850. * model name
  1851. */
  1852. snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN, "%s-%u",
  1853. BFA_MFG_NAME, ioc_attr->card_type);
  1854. }
  1855. static enum bfa_ioc_state
  1856. bfa_ioc_get_state(struct bfa_ioc *ioc)
  1857. {
  1858. enum bfa_iocpf_state iocpf_st;
  1859. enum bfa_ioc_state ioc_st = bfa_sm_to_state(ioc_sm_table, ioc->fsm);
  1860. if (ioc_st == BFA_IOC_ENABLING ||
  1861. ioc_st == BFA_IOC_FAIL || ioc_st == BFA_IOC_INITFAIL) {
  1862. iocpf_st = bfa_sm_to_state(iocpf_sm_table, ioc->iocpf.fsm);
  1863. switch (iocpf_st) {
  1864. case BFA_IOCPF_SEMWAIT:
  1865. ioc_st = BFA_IOC_SEMWAIT;
  1866. break;
  1867. case BFA_IOCPF_HWINIT:
  1868. ioc_st = BFA_IOC_HWINIT;
  1869. break;
  1870. case BFA_IOCPF_FWMISMATCH:
  1871. ioc_st = BFA_IOC_FWMISMATCH;
  1872. break;
  1873. case BFA_IOCPF_FAIL:
  1874. ioc_st = BFA_IOC_FAIL;
  1875. break;
  1876. case BFA_IOCPF_INITFAIL:
  1877. ioc_st = BFA_IOC_INITFAIL;
  1878. break;
  1879. default:
  1880. break;
  1881. }
  1882. }
  1883. return ioc_st;
  1884. }
  1885. void
  1886. bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr)
  1887. {
  1888. memset((void *)ioc_attr, 0, sizeof(struct bfa_ioc_attr));
  1889. ioc_attr->state = bfa_ioc_get_state(ioc);
  1890. ioc_attr->port_id = ioc->port_id;
  1891. ioc_attr->ioc_type = bfa_ioc_get_type(ioc);
  1892. bfa_ioc_get_adapter_attr(ioc, &ioc_attr->adapter_attr);
  1893. ioc_attr->pci_attr.device_id = ioc->pcidev.device_id;
  1894. ioc_attr->pci_attr.pcifn = ioc->pcidev.pci_func;
  1895. bfa_ioc_get_pci_chip_rev(ioc, ioc_attr->pci_attr.chip_rev);
  1896. }
  1897. /**
  1898. * WWN public
  1899. */
  1900. static u64
  1901. bfa_ioc_get_pwwn(struct bfa_ioc *ioc)
  1902. {
  1903. return ioc->attr->pwwn;
  1904. }
  1905. mac_t
  1906. bfa_nw_ioc_get_mac(struct bfa_ioc *ioc)
  1907. {
  1908. return ioc->attr->mac;
  1909. }
  1910. /**
  1911. * Firmware failure detected. Start recovery actions.
  1912. */
  1913. static void
  1914. bfa_ioc_recover(struct bfa_ioc *ioc)
  1915. {
  1916. pr_crit("Heart Beat of IOC has failed\n");
  1917. bfa_ioc_stats(ioc, ioc_hbfails);
  1918. bfa_ioc_stats_hb_count(ioc, ioc->hb_count);
  1919. bfa_fsm_send_event(ioc, IOC_E_HBFAIL);
  1920. }
  1921. static void
  1922. bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc)
  1923. {
  1924. if (bfa_ioc_get_type(ioc) == BFA_IOC_TYPE_LL)
  1925. return;
  1926. }
  1927. /**
  1928. * @dg hal_iocpf_pvt BFA IOC PF private functions
  1929. * @{
  1930. */
  1931. static void
  1932. bfa_iocpf_enable(struct bfa_ioc *ioc)
  1933. {
  1934. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_ENABLE);
  1935. }
  1936. static void
  1937. bfa_iocpf_disable(struct bfa_ioc *ioc)
  1938. {
  1939. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_DISABLE);
  1940. }
  1941. static void
  1942. bfa_iocpf_fail(struct bfa_ioc *ioc)
  1943. {
  1944. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FAIL);
  1945. }
  1946. static void
  1947. bfa_iocpf_initfail(struct bfa_ioc *ioc)
  1948. {
  1949. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_INITFAIL);
  1950. }
  1951. static void
  1952. bfa_iocpf_getattrfail(struct bfa_ioc *ioc)
  1953. {
  1954. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_GETATTRFAIL);
  1955. }
  1956. static void
  1957. bfa_iocpf_stop(struct bfa_ioc *ioc)
  1958. {
  1959. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
  1960. }
  1961. void
  1962. bfa_nw_iocpf_timeout(void *ioc_arg)
  1963. {
  1964. struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
  1965. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_TIMEOUT);
  1966. }
  1967. void
  1968. bfa_nw_iocpf_sem_timeout(void *ioc_arg)
  1969. {
  1970. struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
  1971. bfa_ioc_hw_sem_get(ioc);
  1972. }