setup.c 29 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274
  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/delay.h>
  18. #include <linux/usb/r8a66597.h>
  19. #include <linux/i2c.h>
  20. #include <linux/i2c/tsc2007.h>
  21. #include <linux/spi/spi.h>
  22. #include <linux/spi/sh_msiof.h>
  23. #include <linux/spi/mmc_spi.h>
  24. #include <linux/mmc/host.h>
  25. #include <linux/input.h>
  26. #include <linux/input/sh_keysc.h>
  27. #include <linux/mfd/sh_mobile_sdhi.h>
  28. #include <video/sh_mobile_lcdc.h>
  29. #include <sound/sh_fsi.h>
  30. #include <media/sh_mobile_ceu.h>
  31. #include <media/tw9910.h>
  32. #include <media/mt9t112.h>
  33. #include <asm/heartbeat.h>
  34. #include <asm/sh_eth.h>
  35. #include <asm/clock.h>
  36. #include <asm/suspend.h>
  37. #include <cpu/sh7724.h>
  38. /*
  39. * Address Interface BusWidth
  40. *-----------------------------------------
  41. * 0x0000_0000 uboot 16bit
  42. * 0x0004_0000 Linux romImage 16bit
  43. * 0x0014_0000 MTD for Linux 16bit
  44. * 0x0400_0000 Internal I/O 16/32bit
  45. * 0x0800_0000 DRAM 32bit
  46. * 0x1800_0000 MFI 16bit
  47. */
  48. /* SWITCH
  49. *------------------------------
  50. * DS2[1] = FlashROM write protect ON : write protect
  51. * OFF : No write protect
  52. * DS2[2] = RMII / TS, SCIF ON : RMII
  53. * OFF : TS, SCIF3
  54. * DS2[3] = Camera / Video ON : Camera
  55. * OFF : NTSC/PAL (IN)
  56. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  57. * OFF : SH7724 DV_CLK
  58. * DS2[6-7] = MMC / SD ON-OFF : SD
  59. * OFF-ON : MMC
  60. */
  61. /* Heartbeat */
  62. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  63. static struct heartbeat_data heartbeat_data = {
  64. .nr_bits = 4,
  65. .bit_pos = led_pos,
  66. };
  67. static struct resource heartbeat_resource = {
  68. .start = 0xA405012C, /* PTG */
  69. .end = 0xA405012E - 1,
  70. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  71. };
  72. static struct platform_device heartbeat_device = {
  73. .name = "heartbeat",
  74. .id = -1,
  75. .dev = {
  76. .platform_data = &heartbeat_data,
  77. },
  78. .num_resources = 1,
  79. .resource = &heartbeat_resource,
  80. };
  81. /* MTD */
  82. static struct mtd_partition nor_flash_partitions[] = {
  83. {
  84. .name = "boot loader",
  85. .offset = 0,
  86. .size = (5 * 1024 * 1024),
  87. .mask_flags = MTD_WRITEABLE, /* force read-only */
  88. }, {
  89. .name = "free-area",
  90. .offset = MTDPART_OFS_APPEND,
  91. .size = MTDPART_SIZ_FULL,
  92. },
  93. };
  94. static struct physmap_flash_data nor_flash_data = {
  95. .width = 2,
  96. .parts = nor_flash_partitions,
  97. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  98. };
  99. static struct resource nor_flash_resources[] = {
  100. [0] = {
  101. .name = "NOR Flash",
  102. .start = 0x00000000,
  103. .end = 0x03ffffff,
  104. .flags = IORESOURCE_MEM,
  105. }
  106. };
  107. static struct platform_device nor_flash_device = {
  108. .name = "physmap-flash",
  109. .resource = nor_flash_resources,
  110. .num_resources = ARRAY_SIZE(nor_flash_resources),
  111. .dev = {
  112. .platform_data = &nor_flash_data,
  113. },
  114. };
  115. /* SH Eth */
  116. #define SH_ETH_ADDR (0xA4600000)
  117. static struct resource sh_eth_resources[] = {
  118. [0] = {
  119. .start = SH_ETH_ADDR,
  120. .end = SH_ETH_ADDR + 0x1FC,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. [1] = {
  124. .start = 91,
  125. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  126. },
  127. };
  128. struct sh_eth_plat_data sh_eth_plat = {
  129. .phy = 0x1f, /* SMSC LAN8700 */
  130. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  131. .ether_link_active_low = 1
  132. };
  133. static struct platform_device sh_eth_device = {
  134. .name = "sh-eth",
  135. .id = 0,
  136. .dev = {
  137. .platform_data = &sh_eth_plat,
  138. },
  139. .num_resources = ARRAY_SIZE(sh_eth_resources),
  140. .resource = sh_eth_resources,
  141. .archdata = {
  142. .hwblk_id = HWBLK_ETHER,
  143. },
  144. };
  145. /* USB0 host */
  146. void usb0_port_power(int port, int power)
  147. {
  148. gpio_set_value(GPIO_PTB4, power);
  149. }
  150. static struct r8a66597_platdata usb0_host_data = {
  151. .on_chip = 1,
  152. .port_power = usb0_port_power,
  153. };
  154. static struct resource usb0_host_resources[] = {
  155. [0] = {
  156. .start = 0xa4d80000,
  157. .end = 0xa4d80124 - 1,
  158. .flags = IORESOURCE_MEM,
  159. },
  160. [1] = {
  161. .start = 65,
  162. .end = 65,
  163. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  164. },
  165. };
  166. static struct platform_device usb0_host_device = {
  167. .name = "r8a66597_hcd",
  168. .id = 0,
  169. .dev = {
  170. .dma_mask = NULL, /* not use dma */
  171. .coherent_dma_mask = 0xffffffff,
  172. .platform_data = &usb0_host_data,
  173. },
  174. .num_resources = ARRAY_SIZE(usb0_host_resources),
  175. .resource = usb0_host_resources,
  176. };
  177. /* USB1 host/function */
  178. void usb1_port_power(int port, int power)
  179. {
  180. gpio_set_value(GPIO_PTB5, power);
  181. }
  182. static struct r8a66597_platdata usb1_common_data = {
  183. .on_chip = 1,
  184. .port_power = usb1_port_power,
  185. };
  186. static struct resource usb1_common_resources[] = {
  187. [0] = {
  188. .start = 0xa4d90000,
  189. .end = 0xa4d90124 - 1,
  190. .flags = IORESOURCE_MEM,
  191. },
  192. [1] = {
  193. .start = 66,
  194. .end = 66,
  195. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  196. },
  197. };
  198. static struct platform_device usb1_common_device = {
  199. /* .name will be added in arch_setup */
  200. .id = 1,
  201. .dev = {
  202. .dma_mask = NULL, /* not use dma */
  203. .coherent_dma_mask = 0xffffffff,
  204. .platform_data = &usb1_common_data,
  205. },
  206. .num_resources = ARRAY_SIZE(usb1_common_resources),
  207. .resource = usb1_common_resources,
  208. };
  209. /* LCDC */
  210. static struct sh_mobile_lcdc_info lcdc_info = {
  211. .ch[0] = {
  212. .interface_type = RGB18,
  213. .chan = LCDC_CHAN_MAINLCD,
  214. .bpp = 16,
  215. .lcd_cfg = {
  216. .sync = 0, /* hsync and vsync are active low */
  217. },
  218. .lcd_size_cfg = { /* 7.0 inch */
  219. .width = 152,
  220. .height = 91,
  221. },
  222. .board_cfg = {
  223. },
  224. }
  225. };
  226. static struct resource lcdc_resources[] = {
  227. [0] = {
  228. .name = "LCDC",
  229. .start = 0xfe940000,
  230. .end = 0xfe942fff,
  231. .flags = IORESOURCE_MEM,
  232. },
  233. [1] = {
  234. .start = 106,
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. };
  238. static struct platform_device lcdc_device = {
  239. .name = "sh_mobile_lcdc_fb",
  240. .num_resources = ARRAY_SIZE(lcdc_resources),
  241. .resource = lcdc_resources,
  242. .dev = {
  243. .platform_data = &lcdc_info,
  244. },
  245. .archdata = {
  246. .hwblk_id = HWBLK_LCDC,
  247. },
  248. };
  249. /* CEU0 */
  250. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  251. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  252. };
  253. static struct resource ceu0_resources[] = {
  254. [0] = {
  255. .name = "CEU0",
  256. .start = 0xfe910000,
  257. .end = 0xfe91009f,
  258. .flags = IORESOURCE_MEM,
  259. },
  260. [1] = {
  261. .start = 52,
  262. .flags = IORESOURCE_IRQ,
  263. },
  264. [2] = {
  265. /* place holder for contiguous memory */
  266. },
  267. };
  268. static struct platform_device ceu0_device = {
  269. .name = "sh_mobile_ceu",
  270. .id = 0, /* "ceu0" clock */
  271. .num_resources = ARRAY_SIZE(ceu0_resources),
  272. .resource = ceu0_resources,
  273. .dev = {
  274. .platform_data = &sh_mobile_ceu0_info,
  275. },
  276. .archdata = {
  277. .hwblk_id = HWBLK_CEU0,
  278. },
  279. };
  280. /* CEU1 */
  281. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  282. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  283. };
  284. static struct resource ceu1_resources[] = {
  285. [0] = {
  286. .name = "CEU1",
  287. .start = 0xfe914000,
  288. .end = 0xfe91409f,
  289. .flags = IORESOURCE_MEM,
  290. },
  291. [1] = {
  292. .start = 63,
  293. .flags = IORESOURCE_IRQ,
  294. },
  295. [2] = {
  296. /* place holder for contiguous memory */
  297. },
  298. };
  299. static struct platform_device ceu1_device = {
  300. .name = "sh_mobile_ceu",
  301. .id = 1, /* "ceu1" clock */
  302. .num_resources = ARRAY_SIZE(ceu1_resources),
  303. .resource = ceu1_resources,
  304. .dev = {
  305. .platform_data = &sh_mobile_ceu1_info,
  306. },
  307. .archdata = {
  308. .hwblk_id = HWBLK_CEU1,
  309. },
  310. };
  311. /* I2C device */
  312. static struct i2c_board_info i2c0_devices[] = {
  313. {
  314. I2C_BOARD_INFO("da7210", 0x1a),
  315. },
  316. };
  317. static struct i2c_board_info i2c1_devices[] = {
  318. {
  319. I2C_BOARD_INFO("r2025sd", 0x32),
  320. },
  321. {
  322. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  323. .irq = 33,
  324. }
  325. };
  326. /* KEYSC */
  327. static struct sh_keysc_info keysc_info = {
  328. .mode = SH_KEYSC_MODE_1,
  329. .scan_timing = 3,
  330. .delay = 50,
  331. .kycr2_delay = 100,
  332. .keycodes = { KEY_1, 0, 0, 0, 0,
  333. KEY_2, 0, 0, 0, 0,
  334. KEY_3, 0, 0, 0, 0,
  335. KEY_4, 0, 0, 0, 0,
  336. KEY_5, 0, 0, 0, 0,
  337. KEY_6, 0, 0, 0, 0, },
  338. };
  339. static struct resource keysc_resources[] = {
  340. [0] = {
  341. .name = "KEYSC",
  342. .start = 0x044b0000,
  343. .end = 0x044b000f,
  344. .flags = IORESOURCE_MEM,
  345. },
  346. [1] = {
  347. .start = 79,
  348. .flags = IORESOURCE_IRQ,
  349. },
  350. };
  351. static struct platform_device keysc_device = {
  352. .name = "sh_keysc",
  353. .id = 0, /* keysc0 clock */
  354. .num_resources = ARRAY_SIZE(keysc_resources),
  355. .resource = keysc_resources,
  356. .dev = {
  357. .platform_data = &keysc_info,
  358. },
  359. .archdata = {
  360. .hwblk_id = HWBLK_KEYSC,
  361. },
  362. };
  363. /* TouchScreen */
  364. #define IRQ0 32
  365. static int ts_get_pendown_state(void)
  366. {
  367. int val = 0;
  368. gpio_free(GPIO_FN_INTC_IRQ0);
  369. gpio_request(GPIO_PTZ0, NULL);
  370. gpio_direction_input(GPIO_PTZ0);
  371. val = gpio_get_value(GPIO_PTZ0);
  372. gpio_free(GPIO_PTZ0);
  373. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  374. return val ? 0 : 1;
  375. }
  376. static int ts_init(void)
  377. {
  378. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  379. return 0;
  380. }
  381. struct tsc2007_platform_data tsc2007_info = {
  382. .model = 2007,
  383. .x_plate_ohms = 180,
  384. .get_pendown_state = ts_get_pendown_state,
  385. .init_platform_hw = ts_init,
  386. };
  387. static struct i2c_board_info ts_i2c_clients = {
  388. I2C_BOARD_INFO("tsc2007", 0x48),
  389. .type = "tsc2007",
  390. .platform_data = &tsc2007_info,
  391. .irq = IRQ0,
  392. };
  393. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  394. /* SHDI0 */
  395. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  396. {
  397. gpio_set_value(GPIO_PTB6, state);
  398. }
  399. static struct sh_mobile_sdhi_info sdhi0_info = {
  400. .set_pwr = sdhi0_set_pwr,
  401. };
  402. static struct resource sdhi0_resources[] = {
  403. [0] = {
  404. .name = "SDHI0",
  405. .start = 0x04ce0000,
  406. .end = 0x04ce01ff,
  407. .flags = IORESOURCE_MEM,
  408. },
  409. [1] = {
  410. .start = 100,
  411. .flags = IORESOURCE_IRQ,
  412. },
  413. };
  414. static struct platform_device sdhi0_device = {
  415. .name = "sh_mobile_sdhi",
  416. .num_resources = ARRAY_SIZE(sdhi0_resources),
  417. .resource = sdhi0_resources,
  418. .id = 0,
  419. .dev = {
  420. .platform_data = &sdhi0_info,
  421. },
  422. .archdata = {
  423. .hwblk_id = HWBLK_SDHI0,
  424. },
  425. };
  426. /* SHDI1 */
  427. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  428. {
  429. gpio_set_value(GPIO_PTB7, state);
  430. }
  431. static struct sh_mobile_sdhi_info sdhi1_info = {
  432. .set_pwr = sdhi1_set_pwr,
  433. };
  434. static struct resource sdhi1_resources[] = {
  435. [0] = {
  436. .name = "SDHI1",
  437. .start = 0x04cf0000,
  438. .end = 0x04cf01ff,
  439. .flags = IORESOURCE_MEM,
  440. },
  441. [1] = {
  442. .start = 23,
  443. .flags = IORESOURCE_IRQ,
  444. },
  445. };
  446. static struct platform_device sdhi1_device = {
  447. .name = "sh_mobile_sdhi",
  448. .num_resources = ARRAY_SIZE(sdhi1_resources),
  449. .resource = sdhi1_resources,
  450. .id = 1,
  451. .dev = {
  452. .platform_data = &sdhi1_info,
  453. },
  454. .archdata = {
  455. .hwblk_id = HWBLK_SDHI1,
  456. },
  457. };
  458. #else
  459. /* MMC SPI */
  460. static int mmc_spi_get_ro(struct device *dev)
  461. {
  462. return gpio_get_value(GPIO_PTY6);
  463. }
  464. static int mmc_spi_get_cd(struct device *dev)
  465. {
  466. return !gpio_get_value(GPIO_PTY7);
  467. }
  468. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  469. {
  470. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  471. }
  472. static struct mmc_spi_platform_data mmc_spi_info = {
  473. .get_ro = mmc_spi_get_ro,
  474. .get_cd = mmc_spi_get_cd,
  475. .caps = MMC_CAP_NEEDS_POLL,
  476. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  477. .setpower = mmc_spi_setpower,
  478. };
  479. static struct spi_board_info spi_bus[] = {
  480. {
  481. .modalias = "mmc_spi",
  482. .platform_data = &mmc_spi_info,
  483. .max_speed_hz = 5000000,
  484. .mode = SPI_MODE_0,
  485. .controller_data = (void *) GPIO_PTM4,
  486. },
  487. };
  488. /* MSIOF0 */
  489. static struct sh_msiof_spi_info msiof0_data = {
  490. .num_chipselect = 1,
  491. };
  492. static struct resource msiof0_resources[] = {
  493. [0] = {
  494. .name = "MSIOF0",
  495. .start = 0xa4c40000,
  496. .end = 0xa4c40063,
  497. .flags = IORESOURCE_MEM,
  498. },
  499. [1] = {
  500. .start = 84,
  501. .flags = IORESOURCE_IRQ,
  502. },
  503. };
  504. static struct platform_device msiof0_device = {
  505. .name = "spi_sh_msiof",
  506. .id = 0, /* MSIOF0 */
  507. .dev = {
  508. .platform_data = &msiof0_data,
  509. },
  510. .num_resources = ARRAY_SIZE(msiof0_resources),
  511. .resource = msiof0_resources,
  512. .archdata = {
  513. .hwblk_id = HWBLK_MSIOF0,
  514. },
  515. };
  516. #endif
  517. /* I2C Video/Camera */
  518. static struct i2c_board_info i2c_camera[] = {
  519. {
  520. I2C_BOARD_INFO("tw9910", 0x45),
  521. },
  522. {
  523. /* 1st camera */
  524. I2C_BOARD_INFO("mt9t112", 0x3c),
  525. },
  526. {
  527. /* 2nd camera */
  528. I2C_BOARD_INFO("mt9t112", 0x3c),
  529. },
  530. };
  531. /* tw9910 */
  532. static int tw9910_power(struct device *dev, int mode)
  533. {
  534. int val = mode ? 0 : 1;
  535. gpio_set_value(GPIO_PTU2, val);
  536. if (mode)
  537. mdelay(100);
  538. return 0;
  539. }
  540. static struct tw9910_video_info tw9910_info = {
  541. .buswidth = SOCAM_DATAWIDTH_8,
  542. .mpout = TW9910_MPO_FIELD,
  543. };
  544. static struct soc_camera_link tw9910_link = {
  545. .i2c_adapter_id = 0,
  546. .bus_id = 1,
  547. .power = tw9910_power,
  548. .board_info = &i2c_camera[0],
  549. .module_name = "tw9910",
  550. .priv = &tw9910_info,
  551. };
  552. /* mt9t112 */
  553. static int mt9t112_power1(struct device *dev, int mode)
  554. {
  555. gpio_set_value(GPIO_PTA3, mode);
  556. if (mode)
  557. mdelay(100);
  558. return 0;
  559. }
  560. static struct mt9t112_camera_info mt9t112_info1 = {
  561. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  562. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  563. };
  564. static struct soc_camera_link mt9t112_link1 = {
  565. .i2c_adapter_id = 0,
  566. .power = mt9t112_power1,
  567. .bus_id = 0,
  568. .board_info = &i2c_camera[1],
  569. .module_name = "mt9t112",
  570. .priv = &mt9t112_info1,
  571. };
  572. static int mt9t112_power2(struct device *dev, int mode)
  573. {
  574. gpio_set_value(GPIO_PTA4, mode);
  575. if (mode)
  576. mdelay(100);
  577. return 0;
  578. }
  579. static struct mt9t112_camera_info mt9t112_info2 = {
  580. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  581. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  582. };
  583. static struct soc_camera_link mt9t112_link2 = {
  584. .i2c_adapter_id = 1,
  585. .power = mt9t112_power2,
  586. .bus_id = 1,
  587. .board_info = &i2c_camera[2],
  588. .module_name = "mt9t112",
  589. .priv = &mt9t112_info2,
  590. };
  591. static struct platform_device camera_devices[] = {
  592. {
  593. .name = "soc-camera-pdrv",
  594. .id = 0,
  595. .dev = {
  596. .platform_data = &tw9910_link,
  597. },
  598. },
  599. {
  600. .name = "soc-camera-pdrv",
  601. .id = 1,
  602. .dev = {
  603. .platform_data = &mt9t112_link1,
  604. },
  605. },
  606. {
  607. .name = "soc-camera-pdrv",
  608. .id = 2,
  609. .dev = {
  610. .platform_data = &mt9t112_link2,
  611. },
  612. },
  613. };
  614. /* FSI */
  615. /*
  616. * FSI-B use external clock which came from da7210.
  617. * So, we should change parent of fsi
  618. */
  619. #define FCLKBCR 0xa415000c
  620. static void fsimck_init(struct clk *clk)
  621. {
  622. u32 status = __raw_readl(clk->enable_reg);
  623. /* use external clock */
  624. status &= ~0x000000ff;
  625. status |= 0x00000080;
  626. __raw_writel(status, clk->enable_reg);
  627. }
  628. static struct clk_ops fsimck_clk_ops = {
  629. .init = fsimck_init,
  630. };
  631. static struct clk fsimckb_clk = {
  632. .ops = &fsimck_clk_ops,
  633. .enable_reg = (void __iomem *)FCLKBCR,
  634. .rate = 0, /* unknown */
  635. };
  636. struct sh_fsi_platform_info fsi_info = {
  637. .portb_flags = SH_FSI_BRS_INV |
  638. SH_FSI_OUT_SLAVE_MODE |
  639. SH_FSI_IN_SLAVE_MODE |
  640. SH_FSI_OFMT(I2S) |
  641. SH_FSI_IFMT(I2S),
  642. };
  643. static struct resource fsi_resources[] = {
  644. [0] = {
  645. .name = "FSI",
  646. .start = 0xFE3C0000,
  647. .end = 0xFE3C021d,
  648. .flags = IORESOURCE_MEM,
  649. },
  650. [1] = {
  651. .start = 108,
  652. .flags = IORESOURCE_IRQ,
  653. },
  654. };
  655. static struct platform_device fsi_device = {
  656. .name = "sh_fsi",
  657. .id = 0,
  658. .num_resources = ARRAY_SIZE(fsi_resources),
  659. .resource = fsi_resources,
  660. .dev = {
  661. .platform_data = &fsi_info,
  662. },
  663. .archdata = {
  664. .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
  665. },
  666. };
  667. /* IrDA */
  668. static struct resource irda_resources[] = {
  669. [0] = {
  670. .name = "IrDA",
  671. .start = 0xA45D0000,
  672. .end = 0xA45D0049,
  673. .flags = IORESOURCE_MEM,
  674. },
  675. [1] = {
  676. .start = 20,
  677. .flags = IORESOURCE_IRQ,
  678. },
  679. };
  680. static struct platform_device irda_device = {
  681. .name = "sh_sir",
  682. .num_resources = ARRAY_SIZE(irda_resources),
  683. .resource = irda_resources,
  684. };
  685. #include <media/ak881x.h>
  686. #include <media/sh_vou.h>
  687. struct ak881x_pdata ak881x_pdata = {
  688. .flags = AK881X_IF_MODE_SLAVE,
  689. };
  690. static struct i2c_board_info ak8813 = {
  691. I2C_BOARD_INFO("ak8813", 0x20),
  692. .platform_data = &ak881x_pdata,
  693. };
  694. struct sh_vou_pdata sh_vou_pdata = {
  695. .bus_fmt = SH_VOU_BUS_8BIT,
  696. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  697. .board_info = &ak8813,
  698. .i2c_adap = 0,
  699. .module_name = "ak881x",
  700. };
  701. static struct resource sh_vou_resources[] = {
  702. [0] = {
  703. .start = 0xfe960000,
  704. .end = 0xfe962043,
  705. .flags = IORESOURCE_MEM,
  706. },
  707. [1] = {
  708. .start = 55,
  709. .flags = IORESOURCE_IRQ,
  710. },
  711. };
  712. static struct platform_device vou_device = {
  713. .name = "sh-vou",
  714. .id = -1,
  715. .num_resources = ARRAY_SIZE(sh_vou_resources),
  716. .resource = sh_vou_resources,
  717. .dev = {
  718. .platform_data = &sh_vou_pdata,
  719. },
  720. .archdata = {
  721. .hwblk_id = HWBLK_VOU,
  722. },
  723. };
  724. static struct platform_device *ecovec_devices[] __initdata = {
  725. &heartbeat_device,
  726. &nor_flash_device,
  727. &sh_eth_device,
  728. &usb0_host_device,
  729. &usb1_common_device,
  730. &lcdc_device,
  731. &ceu0_device,
  732. &ceu1_device,
  733. &keysc_device,
  734. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  735. &sdhi0_device,
  736. &sdhi1_device,
  737. #else
  738. &msiof0_device,
  739. #endif
  740. &camera_devices[0],
  741. &camera_devices[1],
  742. &camera_devices[2],
  743. &fsi_device,
  744. &irda_device,
  745. &vou_device,
  746. };
  747. #ifdef CONFIG_I2C
  748. #define EEPROM_ADDR 0x50
  749. static u8 mac_read(struct i2c_adapter *a, u8 command)
  750. {
  751. struct i2c_msg msg[2];
  752. u8 buf;
  753. int ret;
  754. msg[0].addr = EEPROM_ADDR;
  755. msg[0].flags = 0;
  756. msg[0].len = 1;
  757. msg[0].buf = &command;
  758. msg[1].addr = EEPROM_ADDR;
  759. msg[1].flags = I2C_M_RD;
  760. msg[1].len = 1;
  761. msg[1].buf = &buf;
  762. ret = i2c_transfer(a, msg, 2);
  763. if (ret < 0) {
  764. printk(KERN_ERR "error %d\n", ret);
  765. buf = 0xff;
  766. }
  767. return buf;
  768. }
  769. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  770. {
  771. struct i2c_adapter *a = i2c_get_adapter(1);
  772. int i;
  773. if (!a) {
  774. pr_err("can not get I2C 1\n");
  775. return;
  776. }
  777. /* read MAC address frome EEPROM */
  778. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  779. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  780. msleep(10);
  781. }
  782. i2c_put_adapter(a);
  783. }
  784. #else
  785. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  786. {
  787. pr_err("unable to read sh_eth MAC address\n");
  788. }
  789. #endif
  790. #define PORT_HIZA 0xA4050158
  791. #define IODRIVEA 0xA405018A
  792. extern char ecovec24_sdram_enter_start;
  793. extern char ecovec24_sdram_enter_end;
  794. extern char ecovec24_sdram_leave_start;
  795. extern char ecovec24_sdram_leave_end;
  796. static int __init arch_setup(void)
  797. {
  798. struct clk *clk;
  799. /* register board specific self-refresh code */
  800. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  801. SUSP_SH_RSTANDBY,
  802. &ecovec24_sdram_enter_start,
  803. &ecovec24_sdram_enter_end,
  804. &ecovec24_sdram_leave_start,
  805. &ecovec24_sdram_leave_end);
  806. /* enable STATUS0, STATUS2 and PDSTATUS */
  807. gpio_request(GPIO_FN_STATUS0, NULL);
  808. gpio_request(GPIO_FN_STATUS2, NULL);
  809. gpio_request(GPIO_FN_PDSTATUS, NULL);
  810. /* enable SCIFA0 */
  811. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  812. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  813. /* enable debug LED */
  814. gpio_request(GPIO_PTG0, NULL);
  815. gpio_request(GPIO_PTG1, NULL);
  816. gpio_request(GPIO_PTG2, NULL);
  817. gpio_request(GPIO_PTG3, NULL);
  818. gpio_direction_output(GPIO_PTG0, 0);
  819. gpio_direction_output(GPIO_PTG1, 0);
  820. gpio_direction_output(GPIO_PTG2, 0);
  821. gpio_direction_output(GPIO_PTG3, 0);
  822. __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  823. /* enable SH-Eth */
  824. gpio_request(GPIO_PTA1, NULL);
  825. gpio_direction_output(GPIO_PTA1, 1);
  826. mdelay(20);
  827. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  828. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  829. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  830. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  831. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  832. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  833. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  834. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  835. gpio_request(GPIO_FN_MDIO, NULL);
  836. gpio_request(GPIO_FN_MDC, NULL);
  837. gpio_request(GPIO_FN_LNKSTA, NULL);
  838. /* enable USB */
  839. __raw_writew(0x0000, 0xA4D80000);
  840. __raw_writew(0x0000, 0xA4D90000);
  841. gpio_request(GPIO_PTB3, NULL);
  842. gpio_request(GPIO_PTB4, NULL);
  843. gpio_request(GPIO_PTB5, NULL);
  844. gpio_direction_input(GPIO_PTB3);
  845. gpio_direction_output(GPIO_PTB4, 0);
  846. gpio_direction_output(GPIO_PTB5, 0);
  847. __raw_writew(0x0600, 0xa40501d4);
  848. __raw_writew(0x0600, 0xa4050192);
  849. if (gpio_get_value(GPIO_PTB3)) {
  850. printk(KERN_INFO "USB1 function is selected\n");
  851. usb1_common_device.name = "r8a66597_udc";
  852. } else {
  853. printk(KERN_INFO "USB1 host is selected\n");
  854. usb1_common_device.name = "r8a66597_hcd";
  855. }
  856. /* enable LCDC */
  857. gpio_request(GPIO_FN_LCDD23, NULL);
  858. gpio_request(GPIO_FN_LCDD22, NULL);
  859. gpio_request(GPIO_FN_LCDD21, NULL);
  860. gpio_request(GPIO_FN_LCDD20, NULL);
  861. gpio_request(GPIO_FN_LCDD19, NULL);
  862. gpio_request(GPIO_FN_LCDD18, NULL);
  863. gpio_request(GPIO_FN_LCDD17, NULL);
  864. gpio_request(GPIO_FN_LCDD16, NULL);
  865. gpio_request(GPIO_FN_LCDD15, NULL);
  866. gpio_request(GPIO_FN_LCDD14, NULL);
  867. gpio_request(GPIO_FN_LCDD13, NULL);
  868. gpio_request(GPIO_FN_LCDD12, NULL);
  869. gpio_request(GPIO_FN_LCDD11, NULL);
  870. gpio_request(GPIO_FN_LCDD10, NULL);
  871. gpio_request(GPIO_FN_LCDD9, NULL);
  872. gpio_request(GPIO_FN_LCDD8, NULL);
  873. gpio_request(GPIO_FN_LCDD7, NULL);
  874. gpio_request(GPIO_FN_LCDD6, NULL);
  875. gpio_request(GPIO_FN_LCDD5, NULL);
  876. gpio_request(GPIO_FN_LCDD4, NULL);
  877. gpio_request(GPIO_FN_LCDD3, NULL);
  878. gpio_request(GPIO_FN_LCDD2, NULL);
  879. gpio_request(GPIO_FN_LCDD1, NULL);
  880. gpio_request(GPIO_FN_LCDD0, NULL);
  881. gpio_request(GPIO_FN_LCDDISP, NULL);
  882. gpio_request(GPIO_FN_LCDHSYN, NULL);
  883. gpio_request(GPIO_FN_LCDDCK, NULL);
  884. gpio_request(GPIO_FN_LCDVSYN, NULL);
  885. gpio_request(GPIO_FN_LCDDON, NULL);
  886. gpio_request(GPIO_FN_LCDLCLK, NULL);
  887. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  888. gpio_request(GPIO_PTE6, NULL);
  889. gpio_request(GPIO_PTU1, NULL);
  890. gpio_request(GPIO_PTR1, NULL);
  891. gpio_request(GPIO_PTA2, NULL);
  892. gpio_direction_input(GPIO_PTE6);
  893. gpio_direction_output(GPIO_PTU1, 0);
  894. gpio_direction_output(GPIO_PTR1, 0);
  895. gpio_direction_output(GPIO_PTA2, 0);
  896. /* I/O buffer drive ability is high */
  897. __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  898. if (gpio_get_value(GPIO_PTE6)) {
  899. /* DVI */
  900. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  901. lcdc_info.ch[0].clock_divider = 1,
  902. lcdc_info.ch[0].lcd_cfg.name = "DVI";
  903. lcdc_info.ch[0].lcd_cfg.xres = 1280;
  904. lcdc_info.ch[0].lcd_cfg.yres = 720;
  905. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  906. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  907. lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
  908. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  909. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  910. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  911. gpio_set_value(GPIO_PTA2, 1);
  912. gpio_set_value(GPIO_PTU1, 1);
  913. } else {
  914. /* Panel */
  915. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  916. lcdc_info.ch[0].clock_divider = 2,
  917. lcdc_info.ch[0].lcd_cfg.name = "Panel";
  918. lcdc_info.ch[0].lcd_cfg.xres = 800;
  919. lcdc_info.ch[0].lcd_cfg.yres = 480;
  920. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  921. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  922. lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
  923. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  924. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  925. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  926. gpio_set_value(GPIO_PTR1, 1);
  927. /* FIXME
  928. *
  929. * LCDDON control is needed for Panel,
  930. * but current sh_mobile_lcdc driver doesn't control it.
  931. * It is temporary correspondence
  932. */
  933. gpio_request(GPIO_PTF4, NULL);
  934. gpio_direction_output(GPIO_PTF4, 1);
  935. /* enable TouchScreen */
  936. i2c_register_board_info(0, &ts_i2c_clients, 1);
  937. set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  938. }
  939. /* enable CEU0 */
  940. gpio_request(GPIO_FN_VIO0_D15, NULL);
  941. gpio_request(GPIO_FN_VIO0_D14, NULL);
  942. gpio_request(GPIO_FN_VIO0_D13, NULL);
  943. gpio_request(GPIO_FN_VIO0_D12, NULL);
  944. gpio_request(GPIO_FN_VIO0_D11, NULL);
  945. gpio_request(GPIO_FN_VIO0_D10, NULL);
  946. gpio_request(GPIO_FN_VIO0_D9, NULL);
  947. gpio_request(GPIO_FN_VIO0_D8, NULL);
  948. gpio_request(GPIO_FN_VIO0_D7, NULL);
  949. gpio_request(GPIO_FN_VIO0_D6, NULL);
  950. gpio_request(GPIO_FN_VIO0_D5, NULL);
  951. gpio_request(GPIO_FN_VIO0_D4, NULL);
  952. gpio_request(GPIO_FN_VIO0_D3, NULL);
  953. gpio_request(GPIO_FN_VIO0_D2, NULL);
  954. gpio_request(GPIO_FN_VIO0_D1, NULL);
  955. gpio_request(GPIO_FN_VIO0_D0, NULL);
  956. gpio_request(GPIO_FN_VIO0_VD, NULL);
  957. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  958. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  959. gpio_request(GPIO_FN_VIO0_HD, NULL);
  960. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  961. /* enable CEU1 */
  962. gpio_request(GPIO_FN_VIO1_D7, NULL);
  963. gpio_request(GPIO_FN_VIO1_D6, NULL);
  964. gpio_request(GPIO_FN_VIO1_D5, NULL);
  965. gpio_request(GPIO_FN_VIO1_D4, NULL);
  966. gpio_request(GPIO_FN_VIO1_D3, NULL);
  967. gpio_request(GPIO_FN_VIO1_D2, NULL);
  968. gpio_request(GPIO_FN_VIO1_D1, NULL);
  969. gpio_request(GPIO_FN_VIO1_D0, NULL);
  970. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  971. gpio_request(GPIO_FN_VIO1_HD, NULL);
  972. gpio_request(GPIO_FN_VIO1_VD, NULL);
  973. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  974. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  975. /* enable KEYSC */
  976. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  977. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  978. gpio_request(GPIO_FN_KEYOUT3, NULL);
  979. gpio_request(GPIO_FN_KEYOUT2, NULL);
  980. gpio_request(GPIO_FN_KEYOUT1, NULL);
  981. gpio_request(GPIO_FN_KEYOUT0, NULL);
  982. gpio_request(GPIO_FN_KEYIN0, NULL);
  983. /* enable user debug switch */
  984. gpio_request(GPIO_PTR0, NULL);
  985. gpio_request(GPIO_PTR4, NULL);
  986. gpio_request(GPIO_PTR5, NULL);
  987. gpio_request(GPIO_PTR6, NULL);
  988. gpio_direction_input(GPIO_PTR0);
  989. gpio_direction_input(GPIO_PTR4);
  990. gpio_direction_input(GPIO_PTR5);
  991. gpio_direction_input(GPIO_PTR6);
  992. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  993. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  994. gpio_request(GPIO_FN_SDHI0CD, NULL);
  995. gpio_request(GPIO_FN_SDHI0WP, NULL);
  996. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  997. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  998. gpio_request(GPIO_FN_SDHI0D3, NULL);
  999. gpio_request(GPIO_FN_SDHI0D2, NULL);
  1000. gpio_request(GPIO_FN_SDHI0D1, NULL);
  1001. gpio_request(GPIO_FN_SDHI0D0, NULL);
  1002. gpio_request(GPIO_PTB6, NULL);
  1003. gpio_direction_output(GPIO_PTB6, 0);
  1004. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  1005. gpio_request(GPIO_FN_SDHI1CD, NULL);
  1006. gpio_request(GPIO_FN_SDHI1WP, NULL);
  1007. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  1008. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  1009. gpio_request(GPIO_FN_SDHI1D3, NULL);
  1010. gpio_request(GPIO_FN_SDHI1D2, NULL);
  1011. gpio_request(GPIO_FN_SDHI1D1, NULL);
  1012. gpio_request(GPIO_FN_SDHI1D0, NULL);
  1013. gpio_request(GPIO_PTB7, NULL);
  1014. gpio_direction_output(GPIO_PTB7, 0);
  1015. /* I/O buffer drive ability is high for SDHI1 */
  1016. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1017. #else
  1018. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  1019. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  1020. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  1021. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  1022. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  1023. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  1024. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  1025. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  1026. gpio_request(GPIO_PTY6, NULL); /* write protect */
  1027. gpio_direction_input(GPIO_PTY6);
  1028. gpio_request(GPIO_PTY7, NULL); /* card detect */
  1029. gpio_direction_input(GPIO_PTY7);
  1030. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  1031. #endif
  1032. /* enable Video */
  1033. gpio_request(GPIO_PTU2, NULL);
  1034. gpio_direction_output(GPIO_PTU2, 1);
  1035. /* enable Camera */
  1036. gpio_request(GPIO_PTA3, NULL);
  1037. gpio_request(GPIO_PTA4, NULL);
  1038. gpio_direction_output(GPIO_PTA3, 0);
  1039. gpio_direction_output(GPIO_PTA4, 0);
  1040. /* enable FSI */
  1041. gpio_request(GPIO_FN_FSIMCKB, NULL);
  1042. gpio_request(GPIO_FN_FSIIBSD, NULL);
  1043. gpio_request(GPIO_FN_FSIOBSD, NULL);
  1044. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  1045. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  1046. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  1047. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  1048. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  1049. /* set SPU2 clock to 83.4 MHz */
  1050. clk = clk_get(NULL, "spu_clk");
  1051. if (clk) {
  1052. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  1053. clk_put(clk);
  1054. }
  1055. /* change parent of FSI B */
  1056. clk = clk_get(NULL, "fsib_clk");
  1057. if (clk) {
  1058. clk_register(&fsimckb_clk);
  1059. clk_set_parent(clk, &fsimckb_clk);
  1060. clk_set_rate(clk, 11000);
  1061. clk_set_rate(&fsimckb_clk, 11000);
  1062. clk_put(clk);
  1063. }
  1064. gpio_request(GPIO_PTU0, NULL);
  1065. gpio_direction_output(GPIO_PTU0, 0);
  1066. mdelay(20);
  1067. /* enable motion sensor */
  1068. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  1069. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  1070. /* set VPU clock to 166 MHz */
  1071. clk = clk_get(NULL, "vpu_clk");
  1072. if (clk) {
  1073. clk_set_rate(clk, clk_round_rate(clk, 166000000));
  1074. clk_put(clk);
  1075. }
  1076. /* enable IrDA */
  1077. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  1078. gpio_request(GPIO_FN_IRDA_IN, NULL);
  1079. gpio_request(GPIO_PTU5, NULL);
  1080. gpio_direction_output(GPIO_PTU5, 0);
  1081. /* enable I2C device */
  1082. i2c_register_board_info(0, i2c0_devices,
  1083. ARRAY_SIZE(i2c0_devices));
  1084. i2c_register_board_info(1, i2c1_devices,
  1085. ARRAY_SIZE(i2c1_devices));
  1086. /* VOU */
  1087. gpio_request(GPIO_FN_DV_D15, NULL);
  1088. gpio_request(GPIO_FN_DV_D14, NULL);
  1089. gpio_request(GPIO_FN_DV_D13, NULL);
  1090. gpio_request(GPIO_FN_DV_D12, NULL);
  1091. gpio_request(GPIO_FN_DV_D11, NULL);
  1092. gpio_request(GPIO_FN_DV_D10, NULL);
  1093. gpio_request(GPIO_FN_DV_D9, NULL);
  1094. gpio_request(GPIO_FN_DV_D8, NULL);
  1095. gpio_request(GPIO_FN_DV_CLKI, NULL);
  1096. gpio_request(GPIO_FN_DV_CLK, NULL);
  1097. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  1098. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  1099. /* AK8813 power / reset sequence */
  1100. gpio_request(GPIO_PTG4, NULL);
  1101. gpio_request(GPIO_PTU3, NULL);
  1102. /* Reset */
  1103. gpio_direction_output(GPIO_PTG4, 0);
  1104. /* Power down */
  1105. gpio_direction_output(GPIO_PTU3, 1);
  1106. udelay(10);
  1107. /* Power up, reset */
  1108. gpio_set_value(GPIO_PTU3, 0);
  1109. udelay(10);
  1110. /* Remove reset */
  1111. gpio_set_value(GPIO_PTG4, 1);
  1112. return platform_add_devices(ecovec_devices,
  1113. ARRAY_SIZE(ecovec_devices));
  1114. }
  1115. arch_initcall(arch_setup);
  1116. static int __init devices_setup(void)
  1117. {
  1118. sh_eth_init(&sh_eth_plat);
  1119. return 0;
  1120. }
  1121. device_initcall(devices_setup);
  1122. static struct sh_machine_vector mv_ecovec __initmv = {
  1123. .mv_name = "R0P7724 (EcoVec)",
  1124. };