mpc8379_mds.dts 8.8 KB

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  1. /*
  2. * MPC8379E MDS Device Tree Source
  3. *
  4. * Copyright 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "fsl,mpc8379emds";
  14. compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. aliases {
  18. ethernet0 = &enet0;
  19. ethernet1 = &enet1;
  20. serial0 = &serial0;
  21. serial1 = &serial1;
  22. pci0 = &pci0;
  23. };
  24. cpus {
  25. #address-cells = <1>;
  26. #size-cells = <0>;
  27. PowerPC,8379@0 {
  28. device_type = "cpu";
  29. reg = <0x0>;
  30. d-cache-line-size = <32>;
  31. i-cache-line-size = <32>;
  32. d-cache-size = <32768>;
  33. i-cache-size = <32768>;
  34. timebase-frequency = <0>;
  35. bus-frequency = <0>;
  36. clock-frequency = <0>;
  37. };
  38. };
  39. memory {
  40. device_type = "memory";
  41. reg = <0x00000000 0x20000000>; // 512MB at 0
  42. };
  43. localbus@e0005000 {
  44. #address-cells = <2>;
  45. #size-cells = <1>;
  46. compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
  47. reg = <0xe0005000 0x1000>;
  48. interrupts = <77 0x8>;
  49. interrupt-parent = <&ipic>;
  50. // booting from NOR flash
  51. ranges = <0 0x0 0xfe000000 0x02000000
  52. 1 0x0 0xf8000000 0x00008000
  53. 3 0x0 0xe0600000 0x00008000>;
  54. flash@0,0 {
  55. #address-cells = <1>;
  56. #size-cells = <1>;
  57. compatible = "cfi-flash";
  58. reg = <0 0x0 0x2000000>;
  59. bank-width = <2>;
  60. device-width = <1>;
  61. u-boot@0 {
  62. reg = <0x0 0x100000>;
  63. read-only;
  64. };
  65. fs@100000 {
  66. reg = <0x100000 0x800000>;
  67. };
  68. kernel@1d00000 {
  69. reg = <0x1d00000 0x200000>;
  70. };
  71. dtb@1f00000 {
  72. reg = <0x1f00000 0x100000>;
  73. };
  74. };
  75. bcsr@1,0 {
  76. reg = <1 0x0 0x8000>;
  77. compatible = "fsl,mpc837xmds-bcsr";
  78. };
  79. nand@3,0 {
  80. #address-cells = <1>;
  81. #size-cells = <1>;
  82. compatible = "fsl,mpc8379-fcm-nand",
  83. "fsl,elbc-fcm-nand";
  84. reg = <3 0x0 0x8000>;
  85. u-boot@0 {
  86. reg = <0x0 0x100000>;
  87. read-only;
  88. };
  89. kernel@100000 {
  90. reg = <0x100000 0x300000>;
  91. };
  92. fs@400000 {
  93. reg = <0x400000 0x1c00000>;
  94. };
  95. };
  96. };
  97. soc@e0000000 {
  98. #address-cells = <1>;
  99. #size-cells = <1>;
  100. device_type = "soc";
  101. compatible = "simple-bus";
  102. ranges = <0x0 0xe0000000 0x00100000>;
  103. reg = <0xe0000000 0x00000200>;
  104. bus-frequency = <0>;
  105. wdt@200 {
  106. compatible = "mpc83xx_wdt";
  107. reg = <0x200 0x100>;
  108. };
  109. i2c@3000 {
  110. #address-cells = <1>;
  111. #size-cells = <0>;
  112. cell-index = <0>;
  113. compatible = "fsl-i2c";
  114. reg = <0x3000 0x100>;
  115. interrupts = <14 0x8>;
  116. interrupt-parent = <&ipic>;
  117. dfsrr;
  118. };
  119. i2c@3100 {
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. cell-index = <1>;
  123. compatible = "fsl-i2c";
  124. reg = <0x3100 0x100>;
  125. interrupts = <15 0x8>;
  126. interrupt-parent = <&ipic>;
  127. dfsrr;
  128. };
  129. spi@7000 {
  130. cell-index = <0>;
  131. compatible = "fsl,spi";
  132. reg = <0x7000 0x1000>;
  133. interrupts = <16 0x8>;
  134. interrupt-parent = <&ipic>;
  135. mode = "cpu";
  136. };
  137. dma@82a8 {
  138. #address-cells = <1>;
  139. #size-cells = <1>;
  140. compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
  141. reg = <0x82a8 4>;
  142. ranges = <0 0x8100 0x1a8>;
  143. interrupt-parent = <&ipic>;
  144. interrupts = <71 8>;
  145. cell-index = <0>;
  146. dma-channel@0 {
  147. compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
  148. reg = <0 0x80>;
  149. cell-index = <0>;
  150. interrupt-parent = <&ipic>;
  151. interrupts = <71 8>;
  152. };
  153. dma-channel@80 {
  154. compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
  155. reg = <0x80 0x80>;
  156. cell-index = <1>;
  157. interrupt-parent = <&ipic>;
  158. interrupts = <71 8>;
  159. };
  160. dma-channel@100 {
  161. compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
  162. reg = <0x100 0x80>;
  163. cell-index = <2>;
  164. interrupt-parent = <&ipic>;
  165. interrupts = <71 8>;
  166. };
  167. dma-channel@180 {
  168. compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
  169. reg = <0x180 0x28>;
  170. cell-index = <3>;
  171. interrupt-parent = <&ipic>;
  172. interrupts = <71 8>;
  173. };
  174. };
  175. usb@23000 {
  176. compatible = "fsl-usb2-dr";
  177. reg = <0x23000 0x1000>;
  178. #address-cells = <1>;
  179. #size-cells = <0>;
  180. interrupt-parent = <&ipic>;
  181. interrupts = <38 0x8>;
  182. dr_mode = "host";
  183. phy_type = "ulpi";
  184. };
  185. mdio@24520 {
  186. #address-cells = <1>;
  187. #size-cells = <0>;
  188. compatible = "fsl,gianfar-mdio";
  189. reg = <0x24520 0x20>;
  190. phy2: ethernet-phy@2 {
  191. interrupt-parent = <&ipic>;
  192. interrupts = <17 0x8>;
  193. reg = <0x2>;
  194. device_type = "ethernet-phy";
  195. };
  196. phy3: ethernet-phy@3 {
  197. interrupt-parent = <&ipic>;
  198. interrupts = <18 0x8>;
  199. reg = <0x3>;
  200. device_type = "ethernet-phy";
  201. };
  202. };
  203. enet0: ethernet@24000 {
  204. cell-index = <0>;
  205. device_type = "network";
  206. model = "eTSEC";
  207. compatible = "gianfar";
  208. reg = <0x24000 0x1000>;
  209. local-mac-address = [ 00 00 00 00 00 00 ];
  210. interrupts = <32 0x8 33 0x8 34 0x8>;
  211. phy-connection-type = "mii";
  212. interrupt-parent = <&ipic>;
  213. phy-handle = <&phy2>;
  214. };
  215. enet1: ethernet@25000 {
  216. cell-index = <1>;
  217. device_type = "network";
  218. model = "eTSEC";
  219. compatible = "gianfar";
  220. reg = <0x25000 0x1000>;
  221. local-mac-address = [ 00 00 00 00 00 00 ];
  222. interrupts = <35 0x8 36 0x8 37 0x8>;
  223. phy-connection-type = "mii";
  224. interrupt-parent = <&ipic>;
  225. phy-handle = <&phy3>;
  226. };
  227. serial0: serial@4500 {
  228. cell-index = <0>;
  229. device_type = "serial";
  230. compatible = "ns16550";
  231. reg = <0x4500 0x100>;
  232. clock-frequency = <0>;
  233. interrupts = <9 0x8>;
  234. interrupt-parent = <&ipic>;
  235. };
  236. serial1: serial@4600 {
  237. cell-index = <1>;
  238. device_type = "serial";
  239. compatible = "ns16550";
  240. reg = <0x4600 0x100>;
  241. clock-frequency = <0>;
  242. interrupts = <10 0x8>;
  243. interrupt-parent = <&ipic>;
  244. };
  245. crypto@30000 {
  246. compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
  247. "fsl,sec2.1", "fsl,sec2.0";
  248. reg = <0x30000 0x10000>;
  249. interrupts = <11 0x8>;
  250. interrupt-parent = <&ipic>;
  251. fsl,num-channels = <4>;
  252. fsl,channel-fifo-len = <24>;
  253. fsl,exec-units-mask = <0x9fe>;
  254. fsl,descriptor-types-mask = <0x3ab0ebf>;
  255. };
  256. sdhc@2e000 {
  257. model = "eSDHC";
  258. compatible = "fsl,esdhc";
  259. reg = <0x2e000 0x1000>;
  260. interrupts = <42 0x8>;
  261. interrupt-parent = <&ipic>;
  262. };
  263. sata@18000 {
  264. compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
  265. reg = <0x18000 0x1000>;
  266. interrupts = <44 0x8>;
  267. interrupt-parent = <&ipic>;
  268. };
  269. sata@19000 {
  270. compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
  271. reg = <0x19000 0x1000>;
  272. interrupts = <45 0x8>;
  273. interrupt-parent = <&ipic>;
  274. };
  275. sata@1a000 {
  276. compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
  277. reg = <0x1a000 0x1000>;
  278. interrupts = <46 0x8>;
  279. interrupt-parent = <&ipic>;
  280. };
  281. sata@1b000 {
  282. compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
  283. reg = <0x1b000 0x1000>;
  284. interrupts = <47 0x8>;
  285. interrupt-parent = <&ipic>;
  286. };
  287. /* IPIC
  288. * interrupts cell = <intr #, sense>
  289. * sense values match linux IORESOURCE_IRQ_* defines:
  290. * sense == 8: Level, low assertion
  291. * sense == 2: Edge, high-to-low change
  292. */
  293. ipic: pic@700 {
  294. compatible = "fsl,ipic";
  295. interrupt-controller;
  296. #address-cells = <0>;
  297. #interrupt-cells = <2>;
  298. reg = <0x700 0x100>;
  299. };
  300. };
  301. pci0: pci@e0008500 {
  302. cell-index = <0>;
  303. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  304. interrupt-map = <
  305. /* IDSEL 0x11 */
  306. 0x8800 0x0 0x0 0x1 &ipic 20 0x8
  307. 0x8800 0x0 0x0 0x2 &ipic 21 0x8
  308. 0x8800 0x0 0x0 0x3 &ipic 22 0x8
  309. 0x8800 0x0 0x0 0x4 &ipic 23 0x8
  310. /* IDSEL 0x12 */
  311. 0x9000 0x0 0x0 0x1 &ipic 22 0x8
  312. 0x9000 0x0 0x0 0x2 &ipic 23 0x8
  313. 0x9000 0x0 0x0 0x3 &ipic 20 0x8
  314. 0x9000 0x0 0x0 0x4 &ipic 21 0x8
  315. /* IDSEL 0x13 */
  316. 0x9800 0x0 0x0 0x1 &ipic 23 0x8
  317. 0x9800 0x0 0x0 0x2 &ipic 20 0x8
  318. 0x9800 0x0 0x0 0x3 &ipic 21 0x8
  319. 0x9800 0x0 0x0 0x4 &ipic 22 0x8
  320. /* IDSEL 0x15 */
  321. 0xa800 0x0 0x0 0x1 &ipic 20 0x8
  322. 0xa800 0x0 0x0 0x2 &ipic 21 0x8
  323. 0xa800 0x0 0x0 0x3 &ipic 22 0x8
  324. 0xa800 0x0 0x0 0x4 &ipic 23 0x8
  325. /* IDSEL 0x16 */
  326. 0xb000 0x0 0x0 0x1 &ipic 23 0x8
  327. 0xb000 0x0 0x0 0x2 &ipic 20 0x8
  328. 0xb000 0x0 0x0 0x3 &ipic 21 0x8
  329. 0xb000 0x0 0x0 0x4 &ipic 22 0x8
  330. /* IDSEL 0x17 */
  331. 0xb800 0x0 0x0 0x1 &ipic 22 0x8
  332. 0xb800 0x0 0x0 0x2 &ipic 23 0x8
  333. 0xb800 0x0 0x0 0x3 &ipic 20 0x8
  334. 0xb800 0x0 0x0 0x4 &ipic 21 0x8
  335. /* IDSEL 0x18 */
  336. 0xc000 0x0 0x0 0x1 &ipic 21 0x8
  337. 0xc000 0x0 0x0 0x2 &ipic 22 0x8
  338. 0xc000 0x0 0x0 0x3 &ipic 23 0x8
  339. 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
  340. interrupt-parent = <&ipic>;
  341. interrupts = <66 0x8>;
  342. bus-range = <0x0 0x0>;
  343. ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
  344. 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
  345. 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
  346. clock-frequency = <0>;
  347. #interrupt-cells = <1>;
  348. #size-cells = <2>;
  349. #address-cells = <3>;
  350. reg = <0xe0008500 0x100>;
  351. compatible = "fsl,mpc8349-pci";
  352. device_type = "pci";
  353. };
  354. };