nuc900-ac97.c 10 KB

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  1. /*
  2. * Copyright (c) 2009-2010 Nuvoton technology corporation.
  3. *
  4. * Wan ZongShun <mcuos.com@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation;version 2 of the License.
  9. *
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/slab.h>
  14. #include <linux/device.h>
  15. #include <linux/delay.h>
  16. #include <linux/mutex.h>
  17. #include <linux/suspend.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/initval.h>
  21. #include <sound/soc.h>
  22. #include <linux/clk.h>
  23. #include <mach/mfp.h>
  24. #include "nuc900-audio.h"
  25. static DEFINE_MUTEX(ac97_mutex);
  26. struct nuc900_audio *nuc900_ac97_data;
  27. static int nuc900_checkready(void)
  28. {
  29. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  30. if (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS0) & CODEC_READY))
  31. return -EPERM;
  32. return 0;
  33. }
  34. /* AC97 controller reads codec register */
  35. static unsigned short nuc900_ac97_read(struct snd_ac97 *ac97,
  36. unsigned short reg)
  37. {
  38. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  39. unsigned long timeout = 0x10000, val;
  40. mutex_lock(&ac97_mutex);
  41. val = nuc900_checkready();
  42. if (!!val) {
  43. dev_err(nuc900_audio->dev, "AC97 codec is not ready\n");
  44. goto out;
  45. }
  46. /* set the R_WB bit and write register index */
  47. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, R_WB | reg);
  48. /* set the valid frame bit and valid slots */
  49. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  50. val |= (VALID_FRAME | SLOT1_VALID);
  51. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val);
  52. udelay(100);
  53. /* polling the AC_R_FINISH */
  54. while (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON) & AC_R_FINISH)
  55. && timeout--)
  56. mdelay(1);
  57. if (!timeout) {
  58. dev_err(nuc900_audio->dev, "AC97 read register time out !\n");
  59. val = -EPERM;
  60. goto out;
  61. }
  62. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0) ;
  63. val &= ~SLOT1_VALID;
  64. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val);
  65. if (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS1) >> 2 != reg) {
  66. dev_err(nuc900_audio->dev,
  67. "R_INDEX of REG_ACTL_ACIS1 not match!\n");
  68. }
  69. udelay(100);
  70. val = (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS2) & 0xFFFF);
  71. out:
  72. mutex_unlock(&ac97_mutex);
  73. return val;
  74. }
  75. /* AC97 controller writes to codec register */
  76. static void nuc900_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  77. unsigned short val)
  78. {
  79. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  80. unsigned long tmp, timeout = 0x10000;
  81. mutex_lock(&ac97_mutex);
  82. tmp = nuc900_checkready();
  83. if (!!tmp)
  84. dev_err(nuc900_audio->dev, "AC97 codec is not ready\n");
  85. /* clear the R_WB bit and write register index */
  86. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, reg);
  87. /* write register value */
  88. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS2, val);
  89. /* set the valid frame bit and valid slots */
  90. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  91. tmp |= SLOT1_VALID | SLOT2_VALID | VALID_FRAME;
  92. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
  93. udelay(100);
  94. /* polling the AC_W_FINISH */
  95. while ((AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON) & AC_W_FINISH)
  96. && timeout--)
  97. mdelay(1);
  98. if (!timeout)
  99. dev_err(nuc900_audio->dev, "AC97 write register time out !\n");
  100. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  101. tmp &= ~(SLOT1_VALID | SLOT2_VALID);
  102. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
  103. mutex_unlock(&ac97_mutex);
  104. }
  105. static void nuc900_ac97_warm_reset(struct snd_ac97 *ac97)
  106. {
  107. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  108. unsigned long val;
  109. mutex_lock(&ac97_mutex);
  110. /* warm reset AC 97 */
  111. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON);
  112. val |= AC_W_RES;
  113. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val);
  114. udelay(100);
  115. val = nuc900_checkready();
  116. if (!!val)
  117. dev_err(nuc900_audio->dev, "AC97 codec is not ready\n");
  118. mutex_unlock(&ac97_mutex);
  119. }
  120. static void nuc900_ac97_cold_reset(struct snd_ac97 *ac97)
  121. {
  122. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  123. unsigned long val;
  124. mutex_lock(&ac97_mutex);
  125. /* reset Audio Controller */
  126. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  127. val |= ACTL_RESET_BIT;
  128. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  129. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  130. val &= (~ACTL_RESET_BIT);
  131. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  132. /* reset AC-link interface */
  133. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  134. val |= AC_RESET;
  135. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  136. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  137. val &= ~AC_RESET;
  138. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  139. /* cold reset AC 97 */
  140. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON);
  141. val |= AC_C_RES;
  142. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val);
  143. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON);
  144. val &= (~AC_C_RES);
  145. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val);
  146. udelay(100);
  147. mutex_unlock(&ac97_mutex);
  148. }
  149. /* AC97 controller operations */
  150. struct snd_ac97_bus_ops soc_ac97_ops = {
  151. .read = nuc900_ac97_read,
  152. .write = nuc900_ac97_write,
  153. .reset = nuc900_ac97_cold_reset,
  154. .warm_reset = nuc900_ac97_warm_reset,
  155. }
  156. EXPORT_SYMBOL_GPL(soc_ac97_ops);
  157. static int nuc900_ac97_trigger(struct snd_pcm_substream *substream,
  158. int cmd, struct snd_soc_dai *dai)
  159. {
  160. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  161. int ret;
  162. unsigned long val, tmp;
  163. ret = 0;
  164. switch (cmd) {
  165. case SNDRV_PCM_TRIGGER_START:
  166. case SNDRV_PCM_TRIGGER_RESUME:
  167. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  168. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  169. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  170. tmp |= (SLOT3_VALID | SLOT4_VALID | VALID_FRAME);
  171. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
  172. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_PSR);
  173. tmp |= (P_DMA_END_IRQ | P_DMA_MIDDLE_IRQ);
  174. AUDIO_WRITE(nuc900_audio->mmio + ACTL_PSR, tmp);
  175. val |= AC_PLAY;
  176. } else {
  177. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_RSR);
  178. tmp |= (R_DMA_END_IRQ | R_DMA_MIDDLE_IRQ);
  179. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RSR, tmp);
  180. val |= AC_RECORD;
  181. }
  182. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  183. break;
  184. case SNDRV_PCM_TRIGGER_STOP:
  185. case SNDRV_PCM_TRIGGER_SUSPEND:
  186. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  187. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  188. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  189. tmp &= ~(SLOT3_VALID | SLOT4_VALID);
  190. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
  191. AUDIO_WRITE(nuc900_audio->mmio + ACTL_PSR, RESET_PRSR);
  192. val &= ~AC_PLAY;
  193. } else {
  194. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RSR, RESET_PRSR);
  195. val &= ~AC_RECORD;
  196. }
  197. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  198. break;
  199. default:
  200. ret = -EINVAL;
  201. }
  202. return ret;
  203. }
  204. static int nuc900_ac97_probe(struct platform_device *pdev,
  205. struct snd_soc_dai *dai)
  206. {
  207. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  208. unsigned long val;
  209. mutex_lock(&ac97_mutex);
  210. /* enable unit clock */
  211. clk_enable(nuc900_audio->clk);
  212. /* enable audio controller and AC-link interface */
  213. val = AUDIO_READ(nuc900_audio->mmio + ACTL_CON);
  214. val |= (IIS_AC_PIN_SEL | ACLINK_EN);
  215. AUDIO_WRITE(nuc900_audio->mmio + ACTL_CON, val);
  216. mutex_unlock(&ac97_mutex);
  217. return 0;
  218. }
  219. static void nuc900_ac97_remove(struct platform_device *pdev,
  220. struct snd_soc_dai *dai)
  221. {
  222. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  223. clk_disable(nuc900_audio->clk);
  224. }
  225. static struct snd_soc_dai_ops nuc900_ac97_dai_ops = {
  226. .trigger = nuc900_ac97_trigger,
  227. };
  228. static struct snd_soc_dai_driver nuc900_ac97_dai = {
  229. .probe = nuc900_ac97_probe,
  230. .remove = nuc900_ac97_remove,
  231. .ac97_control = 1,
  232. .playback = {
  233. .rates = SNDRV_PCM_RATE_8000_48000,
  234. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  235. .channels_min = 1,
  236. .channels_max = 2,
  237. },
  238. .capture = {
  239. .rates = SNDRV_PCM_RATE_8000_48000,
  240. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  241. .channels_min = 1,
  242. .channels_max = 2,
  243. },
  244. .ops = &nuc900_ac97_dai_ops,
  245. }
  246. static int __devinit nuc900_ac97_drvprobe(struct platform_device *pdev)
  247. {
  248. struct nuc900_audio *nuc900_audio;
  249. int ret;
  250. if (nuc900_ac97_data)
  251. return -EBUSY;
  252. nuc900_audio = kzalloc(sizeof(struct nuc900_audio), GFP_KERNEL);
  253. if (!nuc900_audio)
  254. return -ENOMEM;
  255. spin_lock_init(&nuc900_audio->lock);
  256. nuc900_audio->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  257. if (!nuc900_audio->res) {
  258. ret = -ENODEV;
  259. goto out0;
  260. }
  261. if (!request_mem_region(nuc900_audio->res->start,
  262. resource_size(nuc900_audio->res), pdev->name)) {
  263. ret = -EBUSY;
  264. goto out0;
  265. }
  266. nuc900_audio->mmio = ioremap(nuc900_audio->res->start,
  267. resource_size(nuc900_audio->res));
  268. if (!nuc900_audio->mmio) {
  269. ret = -ENOMEM;
  270. goto out1;
  271. }
  272. nuc900_audio->clk = clk_get(&pdev->dev, NULL);
  273. if (IS_ERR(nuc900_audio->clk)) {
  274. ret = PTR_ERR(nuc900_audio->clk);
  275. goto out2;
  276. }
  277. nuc900_audio->irq_num = platform_get_irq(pdev, 0);
  278. if (!nuc900_audio->irq_num) {
  279. ret = -EBUSY;
  280. goto out2;
  281. }
  282. nuc900_ac97_data = nuc900_audio;
  283. ret = snd_soc_register_dai(&pdev->dev, &nuc900_ac97_dai);
  284. if (ret)
  285. goto out3;
  286. mfp_set_groupg(nuc900_audio->dev); /* enbale ac97 multifunction pin*/
  287. return 0;
  288. out3:
  289. clk_put(nuc900_audio->clk);
  290. out2:
  291. iounmap(nuc900_audio->mmio);
  292. out1:
  293. release_mem_region(nuc900_audio->res->start,
  294. resource_size(nuc900_audio->res));
  295. out0:
  296. kfree(nuc900_audio);
  297. return ret;
  298. }
  299. static int __devexit nuc900_ac97_drvremove(struct platform_device *pdev)
  300. {
  301. snd_soc_unregister_dai(&pdev->dev);
  302. clk_put(nuc900_ac97_data->clk);
  303. iounmap(nuc900_ac97_data->mmio);
  304. release_mem_region(nuc900_ac97_data->res->start,
  305. resource_size(nuc900_ac97_data->res));
  306. kfree(nuc900_ac97_data);
  307. nuc900_ac97_data = NULL;
  308. return 0;
  309. }
  310. static struct platform_driver nuc900_ac97_driver = {
  311. .driver = {
  312. .name = "nuc900-ac97",
  313. .owner = THIS_MODULE,
  314. },
  315. .probe = nuc900_ac97_drvprobe,
  316. .remove = __devexit_p(nuc900_ac97_drvremove),
  317. };
  318. static int __init nuc900_ac97_init(void)
  319. {
  320. return platform_driver_register(&nuc900_ac97_driver);
  321. }
  322. static void __exit nuc900_ac97_exit(void)
  323. {
  324. platform_driver_unregister(&nuc900_ac97_driver);
  325. }
  326. module_init(nuc900_ac97_init);
  327. module_exit(nuc900_ac97_exit);
  328. MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
  329. MODULE_DESCRIPTION("NUC900 AC97 SoC driver!");
  330. MODULE_LICENSE("GPL");
  331. MODULE_ALIAS("platform:nuc900-ac97");