wm8960.c 29 KB

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  1. /*
  2. * wm8960.c -- WM8960 ALSA SoC Audio driver
  3. *
  4. * Author: Liam Girdwood
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/init.h>
  13. #include <linux/delay.h>
  14. #include <linux/pm.h>
  15. #include <linux/i2c.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include <sound/soc-dapm.h>
  23. #include <sound/initval.h>
  24. #include <sound/tlv.h>
  25. #include <sound/wm8960.h>
  26. #include "wm8960.h"
  27. #define AUDIO_NAME "wm8960"
  28. /* R25 - Power 1 */
  29. #define WM8960_VMID_MASK 0x180
  30. #define WM8960_VREF 0x40
  31. /* R26 - Power 2 */
  32. #define WM8960_PWR2_LOUT1 0x40
  33. #define WM8960_PWR2_ROUT1 0x20
  34. #define WM8960_PWR2_OUT3 0x02
  35. /* R28 - Anti-pop 1 */
  36. #define WM8960_POBCTRL 0x80
  37. #define WM8960_BUFDCOPEN 0x10
  38. #define WM8960_BUFIOEN 0x08
  39. #define WM8960_SOFT_ST 0x04
  40. #define WM8960_HPSTBY 0x01
  41. /* R29 - Anti-pop 2 */
  42. #define WM8960_DISOP 0x40
  43. #define WM8960_DRES_MASK 0x30
  44. /*
  45. * wm8960 register cache
  46. * We can't read the WM8960 register space when we are
  47. * using 2 wire for device control, so we cache them instead.
  48. */
  49. static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
  50. 0x0097, 0x0097, 0x0000, 0x0000,
  51. 0x0000, 0x0008, 0x0000, 0x000a,
  52. 0x01c0, 0x0000, 0x00ff, 0x00ff,
  53. 0x0000, 0x0000, 0x0000, 0x0000,
  54. 0x0000, 0x007b, 0x0100, 0x0032,
  55. 0x0000, 0x00c3, 0x00c3, 0x01c0,
  56. 0x0000, 0x0000, 0x0000, 0x0000,
  57. 0x0000, 0x0000, 0x0000, 0x0000,
  58. 0x0100, 0x0100, 0x0050, 0x0050,
  59. 0x0050, 0x0050, 0x0000, 0x0000,
  60. 0x0000, 0x0000, 0x0040, 0x0000,
  61. 0x0000, 0x0050, 0x0050, 0x0000,
  62. 0x0002, 0x0037, 0x004d, 0x0080,
  63. 0x0008, 0x0031, 0x0026, 0x00e9,
  64. };
  65. struct wm8960_priv {
  66. u16 reg_cache[WM8960_CACHEREGNUM];
  67. enum snd_soc_control_type control_type;
  68. void *control_data;
  69. int (*set_bias_level)(struct snd_soc_codec *,
  70. enum snd_soc_bias_level level);
  71. struct snd_soc_dapm_widget *lout1;
  72. struct snd_soc_dapm_widget *rout1;
  73. struct snd_soc_dapm_widget *out3;
  74. bool deemph;
  75. int playback_fs;
  76. };
  77. #define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
  78. /* enumerated controls */
  79. static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
  80. "Right Inverted", "Stereo Inversion"};
  81. static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
  82. static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
  83. static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
  84. static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
  85. static const struct soc_enum wm8960_enum[] = {
  86. SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
  87. SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
  88. SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
  89. SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
  90. SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
  91. SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
  92. };
  93. static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
  94. static int wm8960_set_deemph(struct snd_soc_codec *codec)
  95. {
  96. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  97. int val, i, best;
  98. /* If we're using deemphasis select the nearest available sample
  99. * rate.
  100. */
  101. if (wm8960->deemph) {
  102. best = 1;
  103. for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
  104. if (abs(deemph_settings[i] - wm8960->playback_fs) <
  105. abs(deemph_settings[best] - wm8960->playback_fs))
  106. best = i;
  107. }
  108. val = best << 1;
  109. } else {
  110. val = 0;
  111. }
  112. dev_dbg(codec->dev, "Set deemphasis %d\n", val);
  113. return snd_soc_update_bits(codec, WM8960_DACCTL1,
  114. 0x6, val);
  115. }
  116. static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
  117. struct snd_ctl_elem_value *ucontrol)
  118. {
  119. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  120. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  121. return wm8960->deemph;
  122. }
  123. static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
  124. struct snd_ctl_elem_value *ucontrol)
  125. {
  126. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  127. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  128. int deemph = ucontrol->value.enumerated.item[0];
  129. if (deemph > 1)
  130. return -EINVAL;
  131. wm8960->deemph = deemph;
  132. return wm8960_set_deemph(codec);
  133. }
  134. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
  135. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
  136. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
  137. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  138. static const struct snd_kcontrol_new wm8960_snd_controls[] = {
  139. SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
  140. 0, 63, 0, adc_tlv),
  141. SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
  142. 6, 1, 0),
  143. SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
  144. 7, 1, 0),
  145. SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
  146. 0, 255, 0, dac_tlv),
  147. SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
  148. 0, 127, 0, out_tlv),
  149. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
  150. 7, 1, 0),
  151. SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
  152. 0, 127, 0, out_tlv),
  153. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
  154. 7, 1, 0),
  155. SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
  156. SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
  157. SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
  158. SOC_ENUM("ADC Polarity", wm8960_enum[0]),
  159. SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
  160. SOC_ENUM("DAC Polarity", wm8960_enum[2]),
  161. SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
  162. wm8960_get_deemph, wm8960_put_deemph),
  163. SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
  164. SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
  165. SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
  166. SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
  167. SOC_ENUM("ALC Function", wm8960_enum[4]),
  168. SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
  169. SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
  170. SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
  171. SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
  172. SOC_ENUM("ALC Mode", wm8960_enum[5]),
  173. SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
  174. SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
  175. SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
  176. SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
  177. SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
  178. 0, 127, 0),
  179. SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
  180. WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
  181. SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
  182. WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
  183. SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
  184. WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
  185. SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
  186. WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
  187. };
  188. static const struct snd_kcontrol_new wm8960_lin_boost[] = {
  189. SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
  190. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
  191. SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
  192. };
  193. static const struct snd_kcontrol_new wm8960_lin[] = {
  194. SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
  195. };
  196. static const struct snd_kcontrol_new wm8960_rin_boost[] = {
  197. SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
  198. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
  199. SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
  200. };
  201. static const struct snd_kcontrol_new wm8960_rin[] = {
  202. SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
  203. };
  204. static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
  205. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
  206. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
  207. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
  208. };
  209. static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
  210. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
  211. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
  212. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
  213. };
  214. static const struct snd_kcontrol_new wm8960_mono_out[] = {
  215. SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
  216. SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
  217. };
  218. static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
  219. SND_SOC_DAPM_INPUT("LINPUT1"),
  220. SND_SOC_DAPM_INPUT("RINPUT1"),
  221. SND_SOC_DAPM_INPUT("LINPUT2"),
  222. SND_SOC_DAPM_INPUT("RINPUT2"),
  223. SND_SOC_DAPM_INPUT("LINPUT3"),
  224. SND_SOC_DAPM_INPUT("RINPUT3"),
  225. SND_SOC_DAPM_MICBIAS("MICB", WM8960_POWER1, 1, 0),
  226. SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
  227. wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
  228. SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
  229. wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
  230. SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
  231. wm8960_lin, ARRAY_SIZE(wm8960_lin)),
  232. SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
  233. wm8960_rin, ARRAY_SIZE(wm8960_rin)),
  234. SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
  235. SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
  236. SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
  237. SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
  238. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
  239. &wm8960_loutput_mixer[0],
  240. ARRAY_SIZE(wm8960_loutput_mixer)),
  241. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
  242. &wm8960_routput_mixer[0],
  243. ARRAY_SIZE(wm8960_routput_mixer)),
  244. SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
  245. SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
  246. SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
  247. SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
  248. SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
  249. SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
  250. SND_SOC_DAPM_OUTPUT("SPK_LP"),
  251. SND_SOC_DAPM_OUTPUT("SPK_LN"),
  252. SND_SOC_DAPM_OUTPUT("HP_L"),
  253. SND_SOC_DAPM_OUTPUT("HP_R"),
  254. SND_SOC_DAPM_OUTPUT("SPK_RP"),
  255. SND_SOC_DAPM_OUTPUT("SPK_RN"),
  256. SND_SOC_DAPM_OUTPUT("OUT3"),
  257. };
  258. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
  259. SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
  260. &wm8960_mono_out[0],
  261. ARRAY_SIZE(wm8960_mono_out)),
  262. };
  263. /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
  264. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
  265. SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
  266. };
  267. static const struct snd_soc_dapm_route audio_paths[] = {
  268. { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
  269. { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
  270. { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
  271. { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
  272. { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
  273. { "Left Input Mixer", NULL, "LINPUT2" },
  274. { "Left Input Mixer", NULL, "LINPUT3" },
  275. { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
  276. { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
  277. { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
  278. { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
  279. { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
  280. { "Right Input Mixer", NULL, "RINPUT2" },
  281. { "Right Input Mixer", NULL, "LINPUT3" },
  282. { "Left ADC", NULL, "Left Input Mixer" },
  283. { "Right ADC", NULL, "Right Input Mixer" },
  284. { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
  285. { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
  286. { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
  287. { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
  288. { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
  289. { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
  290. { "LOUT1 PGA", NULL, "Left Output Mixer" },
  291. { "ROUT1 PGA", NULL, "Right Output Mixer" },
  292. { "HP_L", NULL, "LOUT1 PGA" },
  293. { "HP_R", NULL, "ROUT1 PGA" },
  294. { "Left Speaker PGA", NULL, "Left Output Mixer" },
  295. { "Right Speaker PGA", NULL, "Right Output Mixer" },
  296. { "Left Speaker Output", NULL, "Left Speaker PGA" },
  297. { "Right Speaker Output", NULL, "Right Speaker PGA" },
  298. { "SPK_LN", NULL, "Left Speaker Output" },
  299. { "SPK_LP", NULL, "Left Speaker Output" },
  300. { "SPK_RN", NULL, "Right Speaker Output" },
  301. { "SPK_RP", NULL, "Right Speaker Output" },
  302. };
  303. static const struct snd_soc_dapm_route audio_paths_out3[] = {
  304. { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
  305. { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
  306. { "OUT3", NULL, "Mono Output Mixer", }
  307. };
  308. static const struct snd_soc_dapm_route audio_paths_capless[] = {
  309. { "HP_L", NULL, "OUT3 VMID" },
  310. { "HP_R", NULL, "OUT3 VMID" },
  311. { "OUT3 VMID", NULL, "Left Output Mixer" },
  312. { "OUT3 VMID", NULL, "Right Output Mixer" },
  313. };
  314. static int wm8960_add_widgets(struct snd_soc_codec *codec)
  315. {
  316. struct wm8960_data *pdata = codec->dev->platform_data;
  317. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  318. struct snd_soc_dapm_widget *w;
  319. snd_soc_dapm_new_controls(codec, wm8960_dapm_widgets,
  320. ARRAY_SIZE(wm8960_dapm_widgets));
  321. snd_soc_dapm_add_routes(codec, audio_paths, ARRAY_SIZE(audio_paths));
  322. /* In capless mode OUT3 is used to provide VMID for the
  323. * headphone outputs, otherwise it is used as a mono mixer.
  324. */
  325. if (pdata && pdata->capless) {
  326. snd_soc_dapm_new_controls(codec, wm8960_dapm_widgets_capless,
  327. ARRAY_SIZE(wm8960_dapm_widgets_capless));
  328. snd_soc_dapm_add_routes(codec, audio_paths_capless,
  329. ARRAY_SIZE(audio_paths_capless));
  330. } else {
  331. snd_soc_dapm_new_controls(codec, wm8960_dapm_widgets_out3,
  332. ARRAY_SIZE(wm8960_dapm_widgets_out3));
  333. snd_soc_dapm_add_routes(codec, audio_paths_out3,
  334. ARRAY_SIZE(audio_paths_out3));
  335. }
  336. /* We need to power up the headphone output stage out of
  337. * sequence for capless mode. To save scanning the widget
  338. * list each time to find the desired power state do so now
  339. * and save the result.
  340. */
  341. list_for_each_entry(w, &codec->dapm_widgets, list) {
  342. if (strcmp(w->name, "LOUT1 PGA") == 0)
  343. wm8960->lout1 = w;
  344. if (strcmp(w->name, "ROUT1 PGA") == 0)
  345. wm8960->rout1 = w;
  346. if (strcmp(w->name, "OUT3 VMID") == 0)
  347. wm8960->out3 = w;
  348. }
  349. return 0;
  350. }
  351. static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
  352. unsigned int fmt)
  353. {
  354. struct snd_soc_codec *codec = codec_dai->codec;
  355. u16 iface = 0;
  356. /* set master/slave audio interface */
  357. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  358. case SND_SOC_DAIFMT_CBM_CFM:
  359. iface |= 0x0040;
  360. break;
  361. case SND_SOC_DAIFMT_CBS_CFS:
  362. break;
  363. default:
  364. return -EINVAL;
  365. }
  366. /* interface format */
  367. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  368. case SND_SOC_DAIFMT_I2S:
  369. iface |= 0x0002;
  370. break;
  371. case SND_SOC_DAIFMT_RIGHT_J:
  372. break;
  373. case SND_SOC_DAIFMT_LEFT_J:
  374. iface |= 0x0001;
  375. break;
  376. case SND_SOC_DAIFMT_DSP_A:
  377. iface |= 0x0003;
  378. break;
  379. case SND_SOC_DAIFMT_DSP_B:
  380. iface |= 0x0013;
  381. break;
  382. default:
  383. return -EINVAL;
  384. }
  385. /* clock inversion */
  386. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  387. case SND_SOC_DAIFMT_NB_NF:
  388. break;
  389. case SND_SOC_DAIFMT_IB_IF:
  390. iface |= 0x0090;
  391. break;
  392. case SND_SOC_DAIFMT_IB_NF:
  393. iface |= 0x0080;
  394. break;
  395. case SND_SOC_DAIFMT_NB_IF:
  396. iface |= 0x0010;
  397. break;
  398. default:
  399. return -EINVAL;
  400. }
  401. /* set iface */
  402. snd_soc_write(codec, WM8960_IFACE1, iface);
  403. return 0;
  404. }
  405. static struct {
  406. int rate;
  407. unsigned int val;
  408. } alc_rates[] = {
  409. { 48000, 0 },
  410. { 44100, 0 },
  411. { 32000, 1 },
  412. { 22050, 2 },
  413. { 24000, 2 },
  414. { 16000, 3 },
  415. { 11250, 4 },
  416. { 12000, 4 },
  417. { 8000, 5 },
  418. };
  419. static int wm8960_hw_params(struct snd_pcm_substream *substream,
  420. struct snd_pcm_hw_params *params,
  421. struct snd_soc_dai *dai)
  422. {
  423. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  424. struct snd_soc_codec *codec = rtd->codec;
  425. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  426. u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
  427. int i;
  428. /* bit size */
  429. switch (params_format(params)) {
  430. case SNDRV_PCM_FORMAT_S16_LE:
  431. break;
  432. case SNDRV_PCM_FORMAT_S20_3LE:
  433. iface |= 0x0004;
  434. break;
  435. case SNDRV_PCM_FORMAT_S24_LE:
  436. iface |= 0x0008;
  437. break;
  438. }
  439. /* Update filters for the new rate */
  440. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  441. wm8960->playback_fs = params_rate(params);
  442. wm8960_set_deemph(codec);
  443. } else {
  444. for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
  445. if (alc_rates[i].rate == params_rate(params))
  446. snd_soc_update_bits(codec,
  447. WM8960_ADDCTL3, 0x7,
  448. alc_rates[i].val);
  449. }
  450. /* set iface */
  451. snd_soc_write(codec, WM8960_IFACE1, iface);
  452. return 0;
  453. }
  454. static int wm8960_mute(struct snd_soc_dai *dai, int mute)
  455. {
  456. struct snd_soc_codec *codec = dai->codec;
  457. u16 mute_reg = snd_soc_read(codec, WM8960_DACCTL1) & 0xfff7;
  458. if (mute)
  459. snd_soc_write(codec, WM8960_DACCTL1, mute_reg | 0x8);
  460. else
  461. snd_soc_write(codec, WM8960_DACCTL1, mute_reg);
  462. return 0;
  463. }
  464. static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
  465. enum snd_soc_bias_level level)
  466. {
  467. u16 reg;
  468. switch (level) {
  469. case SND_SOC_BIAS_ON:
  470. break;
  471. case SND_SOC_BIAS_PREPARE:
  472. /* Set VMID to 2x50k */
  473. reg = snd_soc_read(codec, WM8960_POWER1);
  474. reg &= ~0x180;
  475. reg |= 0x80;
  476. snd_soc_write(codec, WM8960_POWER1, reg);
  477. break;
  478. case SND_SOC_BIAS_STANDBY:
  479. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  480. /* Enable anti-pop features */
  481. snd_soc_write(codec, WM8960_APOP1,
  482. WM8960_POBCTRL | WM8960_SOFT_ST |
  483. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  484. /* Enable & ramp VMID at 2x50k */
  485. reg = snd_soc_read(codec, WM8960_POWER1);
  486. reg |= 0x80;
  487. snd_soc_write(codec, WM8960_POWER1, reg);
  488. msleep(100);
  489. /* Enable VREF */
  490. snd_soc_write(codec, WM8960_POWER1, reg | WM8960_VREF);
  491. /* Disable anti-pop features */
  492. snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
  493. }
  494. /* Set VMID to 2x250k */
  495. reg = snd_soc_read(codec, WM8960_POWER1);
  496. reg &= ~0x180;
  497. reg |= 0x100;
  498. snd_soc_write(codec, WM8960_POWER1, reg);
  499. break;
  500. case SND_SOC_BIAS_OFF:
  501. /* Enable anti-pop features */
  502. snd_soc_write(codec, WM8960_APOP1,
  503. WM8960_POBCTRL | WM8960_SOFT_ST |
  504. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  505. /* Disable VMID and VREF, let them discharge */
  506. snd_soc_write(codec, WM8960_POWER1, 0);
  507. msleep(600);
  508. break;
  509. }
  510. codec->bias_level = level;
  511. return 0;
  512. }
  513. static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
  514. enum snd_soc_bias_level level)
  515. {
  516. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  517. int reg;
  518. switch (level) {
  519. case SND_SOC_BIAS_ON:
  520. break;
  521. case SND_SOC_BIAS_PREPARE:
  522. switch (codec->bias_level) {
  523. case SND_SOC_BIAS_STANDBY:
  524. /* Enable anti pop mode */
  525. snd_soc_update_bits(codec, WM8960_APOP1,
  526. WM8960_POBCTRL | WM8960_SOFT_ST |
  527. WM8960_BUFDCOPEN,
  528. WM8960_POBCTRL | WM8960_SOFT_ST |
  529. WM8960_BUFDCOPEN);
  530. /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
  531. reg = 0;
  532. if (wm8960->lout1 && wm8960->lout1->power)
  533. reg |= WM8960_PWR2_LOUT1;
  534. if (wm8960->rout1 && wm8960->rout1->power)
  535. reg |= WM8960_PWR2_ROUT1;
  536. if (wm8960->out3 && wm8960->out3->power)
  537. reg |= WM8960_PWR2_OUT3;
  538. snd_soc_update_bits(codec, WM8960_POWER2,
  539. WM8960_PWR2_LOUT1 |
  540. WM8960_PWR2_ROUT1 |
  541. WM8960_PWR2_OUT3, reg);
  542. /* Enable VMID at 2*50k */
  543. snd_soc_update_bits(codec, WM8960_POWER1,
  544. WM8960_VMID_MASK, 0x80);
  545. /* Ramp */
  546. msleep(100);
  547. /* Enable VREF */
  548. snd_soc_update_bits(codec, WM8960_POWER1,
  549. WM8960_VREF, WM8960_VREF);
  550. msleep(100);
  551. break;
  552. case SND_SOC_BIAS_ON:
  553. /* Enable anti-pop mode */
  554. snd_soc_update_bits(codec, WM8960_APOP1,
  555. WM8960_POBCTRL | WM8960_SOFT_ST |
  556. WM8960_BUFDCOPEN,
  557. WM8960_POBCTRL | WM8960_SOFT_ST |
  558. WM8960_BUFDCOPEN);
  559. /* Disable VMID and VREF */
  560. snd_soc_update_bits(codec, WM8960_POWER1,
  561. WM8960_VREF | WM8960_VMID_MASK, 0);
  562. break;
  563. default:
  564. break;
  565. }
  566. break;
  567. case SND_SOC_BIAS_STANDBY:
  568. switch (codec->bias_level) {
  569. case SND_SOC_BIAS_PREPARE:
  570. /* Disable HP discharge */
  571. snd_soc_update_bits(codec, WM8960_APOP2,
  572. WM8960_DISOP | WM8960_DRES_MASK,
  573. 0);
  574. /* Disable anti-pop features */
  575. snd_soc_update_bits(codec, WM8960_APOP1,
  576. WM8960_POBCTRL | WM8960_SOFT_ST |
  577. WM8960_BUFDCOPEN,
  578. WM8960_POBCTRL | WM8960_SOFT_ST |
  579. WM8960_BUFDCOPEN);
  580. break;
  581. default:
  582. break;
  583. }
  584. break;
  585. case SND_SOC_BIAS_OFF:
  586. break;
  587. }
  588. codec->bias_level = level;
  589. return 0;
  590. }
  591. /* PLL divisors */
  592. struct _pll_div {
  593. u32 pre_div:1;
  594. u32 n:4;
  595. u32 k:24;
  596. };
  597. /* The size in bits of the pll divide multiplied by 10
  598. * to allow rounding later */
  599. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  600. static int pll_factors(unsigned int source, unsigned int target,
  601. struct _pll_div *pll_div)
  602. {
  603. unsigned long long Kpart;
  604. unsigned int K, Ndiv, Nmod;
  605. pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
  606. /* Scale up target to PLL operating frequency */
  607. target *= 4;
  608. Ndiv = target / source;
  609. if (Ndiv < 6) {
  610. source >>= 1;
  611. pll_div->pre_div = 1;
  612. Ndiv = target / source;
  613. } else
  614. pll_div->pre_div = 0;
  615. if ((Ndiv < 6) || (Ndiv > 12)) {
  616. pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
  617. return -EINVAL;
  618. }
  619. pll_div->n = Ndiv;
  620. Nmod = target % source;
  621. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  622. do_div(Kpart, source);
  623. K = Kpart & 0xFFFFFFFF;
  624. /* Check if we need to round */
  625. if ((K % 10) >= 5)
  626. K += 5;
  627. /* Move down to proper range now rounding is done */
  628. K /= 10;
  629. pll_div->k = K;
  630. pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
  631. pll_div->n, pll_div->k, pll_div->pre_div);
  632. return 0;
  633. }
  634. static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  635. int source, unsigned int freq_in, unsigned int freq_out)
  636. {
  637. struct snd_soc_codec *codec = codec_dai->codec;
  638. u16 reg;
  639. static struct _pll_div pll_div;
  640. int ret;
  641. if (freq_in && freq_out) {
  642. ret = pll_factors(freq_in, freq_out, &pll_div);
  643. if (ret != 0)
  644. return ret;
  645. }
  646. /* Disable the PLL: even if we are changing the frequency the
  647. * PLL needs to be disabled while we do so. */
  648. snd_soc_write(codec, WM8960_CLOCK1,
  649. snd_soc_read(codec, WM8960_CLOCK1) & ~1);
  650. snd_soc_write(codec, WM8960_POWER2,
  651. snd_soc_read(codec, WM8960_POWER2) & ~1);
  652. if (!freq_in || !freq_out)
  653. return 0;
  654. reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
  655. reg |= pll_div.pre_div << 4;
  656. reg |= pll_div.n;
  657. if (pll_div.k) {
  658. reg |= 0x20;
  659. snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
  660. snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
  661. snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
  662. }
  663. snd_soc_write(codec, WM8960_PLL1, reg);
  664. /* Turn it on */
  665. snd_soc_write(codec, WM8960_POWER2,
  666. snd_soc_read(codec, WM8960_POWER2) | 1);
  667. msleep(250);
  668. snd_soc_write(codec, WM8960_CLOCK1,
  669. snd_soc_read(codec, WM8960_CLOCK1) | 1);
  670. return 0;
  671. }
  672. static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  673. int div_id, int div)
  674. {
  675. struct snd_soc_codec *codec = codec_dai->codec;
  676. u16 reg;
  677. switch (div_id) {
  678. case WM8960_SYSCLKDIV:
  679. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
  680. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  681. break;
  682. case WM8960_DACDIV:
  683. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
  684. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  685. break;
  686. case WM8960_OPCLKDIV:
  687. reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
  688. snd_soc_write(codec, WM8960_PLL1, reg | div);
  689. break;
  690. case WM8960_DCLKDIV:
  691. reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
  692. snd_soc_write(codec, WM8960_CLOCK2, reg | div);
  693. break;
  694. case WM8960_TOCLKSEL:
  695. reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
  696. snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
  697. break;
  698. default:
  699. return -EINVAL;
  700. }
  701. return 0;
  702. }
  703. static int wm8960_set_bias_level(struct snd_soc_codec *codec,
  704. enum snd_soc_bias_level level)
  705. {
  706. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  707. return wm8960->set_bias_level(codec, level);
  708. }
  709. #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
  710. #define WM8960_FORMATS \
  711. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  712. SNDRV_PCM_FMTBIT_S24_LE)
  713. static struct snd_soc_dai_ops wm8960_dai_ops = {
  714. .hw_params = wm8960_hw_params,
  715. .digital_mute = wm8960_mute,
  716. .set_fmt = wm8960_set_dai_fmt,
  717. .set_clkdiv = wm8960_set_dai_clkdiv,
  718. .set_pll = wm8960_set_dai_pll,
  719. };
  720. static struct snd_soc_dai_driver wm8960_dai = {
  721. .name = "wm8960-hifi",
  722. .playback = {
  723. .stream_name = "Playback",
  724. .channels_min = 1,
  725. .channels_max = 2,
  726. .rates = WM8960_RATES,
  727. .formats = WM8960_FORMATS,},
  728. .capture = {
  729. .stream_name = "Capture",
  730. .channels_min = 1,
  731. .channels_max = 2,
  732. .rates = WM8960_RATES,
  733. .formats = WM8960_FORMATS,},
  734. .ops = &wm8960_dai_ops,
  735. .symmetric_rates = 1,
  736. };
  737. static int wm8960_suspend(struct snd_soc_codec *codec, pm_message_t state)
  738. {
  739. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  740. wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
  741. return 0;
  742. }
  743. static int wm8960_resume(struct snd_soc_codec *codec)
  744. {
  745. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  746. int i;
  747. u8 data[2];
  748. u16 *cache = codec->reg_cache;
  749. /* Sync reg_cache with the hardware */
  750. for (i = 0; i < ARRAY_SIZE(wm8960_reg); i++) {
  751. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  752. data[1] = cache[i] & 0x00ff;
  753. codec->hw_write(codec->control_data, data, 2);
  754. }
  755. wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  756. return 0;
  757. }
  758. static int wm8960_probe(struct snd_soc_codec *codec)
  759. {
  760. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  761. struct wm8960_data *pdata = dev_get_platdata(codec->dev);
  762. int ret;
  763. u16 reg;
  764. wm8960->set_bias_level = wm8960_set_bias_level_out3;
  765. codec->control_data = wm8960->control_data;
  766. if (!pdata) {
  767. dev_warn(codec->dev, "No platform data supplied\n");
  768. } else {
  769. if (pdata->dres > WM8960_DRES_MAX) {
  770. dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
  771. pdata->dres = 0;
  772. }
  773. if (pdata->capless)
  774. wm8960->set_bias_level = wm8960_set_bias_level_capless;
  775. }
  776. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
  777. if (ret < 0) {
  778. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  779. return ret;
  780. }
  781. ret = wm8960_reset(codec);
  782. if (ret < 0) {
  783. dev_err(codec->dev, "Failed to issue reset\n");
  784. return ret;
  785. }
  786. wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  787. /* Latch the update bits */
  788. reg = snd_soc_read(codec, WM8960_LINVOL);
  789. snd_soc_write(codec, WM8960_LINVOL, reg | 0x100);
  790. reg = snd_soc_read(codec, WM8960_RINVOL);
  791. snd_soc_write(codec, WM8960_RINVOL, reg | 0x100);
  792. reg = snd_soc_read(codec, WM8960_LADC);
  793. snd_soc_write(codec, WM8960_LADC, reg | 0x100);
  794. reg = snd_soc_read(codec, WM8960_RADC);
  795. snd_soc_write(codec, WM8960_RADC, reg | 0x100);
  796. reg = snd_soc_read(codec, WM8960_LDAC);
  797. snd_soc_write(codec, WM8960_LDAC, reg | 0x100);
  798. reg = snd_soc_read(codec, WM8960_RDAC);
  799. snd_soc_write(codec, WM8960_RDAC, reg | 0x100);
  800. reg = snd_soc_read(codec, WM8960_LOUT1);
  801. snd_soc_write(codec, WM8960_LOUT1, reg | 0x100);
  802. reg = snd_soc_read(codec, WM8960_ROUT1);
  803. snd_soc_write(codec, WM8960_ROUT1, reg | 0x100);
  804. reg = snd_soc_read(codec, WM8960_LOUT2);
  805. snd_soc_write(codec, WM8960_LOUT2, reg | 0x100);
  806. reg = snd_soc_read(codec, WM8960_ROUT2);
  807. snd_soc_write(codec, WM8960_ROUT2, reg | 0x100);
  808. snd_soc_add_controls(codec, wm8960_snd_controls,
  809. ARRAY_SIZE(wm8960_snd_controls));
  810. wm8960_add_widgets(codec);
  811. return 0;
  812. }
  813. /* power down chip */
  814. static int wm8960_remove(struct snd_soc_codec *codec)
  815. {
  816. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  817. wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
  818. return 0;
  819. }
  820. static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
  821. .probe = wm8960_probe,
  822. .remove = wm8960_remove,
  823. .suspend = wm8960_suspend,
  824. .resume = wm8960_resume,
  825. .set_bias_level = wm8960_set_bias_level,
  826. .reg_cache_size = ARRAY_SIZE(wm8960_reg),
  827. .reg_word_size = sizeof(u16),
  828. .reg_cache_default = wm8960_reg,
  829. };
  830. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  831. static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
  832. const struct i2c_device_id *id)
  833. {
  834. struct wm8960_priv *wm8960;
  835. int ret;
  836. wm8960 = kzalloc(sizeof(struct wm8960_priv), GFP_KERNEL);
  837. if (wm8960 == NULL)
  838. return -ENOMEM;
  839. i2c_set_clientdata(i2c, wm8960);
  840. wm8960->control_data = i2c;
  841. ret = snd_soc_register_codec(&i2c->dev,
  842. &soc_codec_dev_wm8960, &wm8960_dai, 1);
  843. if (ret < 0)
  844. kfree(wm8960);
  845. return ret;
  846. }
  847. static __devexit int wm8960_i2c_remove(struct i2c_client *client)
  848. {
  849. snd_soc_unregister_codec(&client->dev);
  850. kfree(i2c_get_clientdata(client));
  851. return 0;
  852. }
  853. static const struct i2c_device_id wm8960_i2c_id[] = {
  854. { "wm8960", 0 },
  855. { }
  856. };
  857. MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
  858. static struct i2c_driver wm8960_i2c_driver = {
  859. .driver = {
  860. .name = "wm8960-codec",
  861. .owner = THIS_MODULE,
  862. },
  863. .probe = wm8960_i2c_probe,
  864. .remove = __devexit_p(wm8960_i2c_remove),
  865. .id_table = wm8960_i2c_id,
  866. };
  867. #endif
  868. static int __init wm8960_modinit(void)
  869. {
  870. int ret = 0;
  871. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  872. ret = i2c_add_driver(&wm8960_i2c_driver);
  873. if (ret != 0) {
  874. printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
  875. ret);
  876. }
  877. #endif
  878. return ret;
  879. }
  880. module_init(wm8960_modinit);
  881. static void __exit wm8960_exit(void)
  882. {
  883. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  884. i2c_del_driver(&wm8960_i2c_driver);
  885. #endif
  886. }
  887. module_exit(wm8960_exit);
  888. MODULE_DESCRIPTION("ASoC WM8960 driver");
  889. MODULE_AUTHOR("Liam Girdwood");
  890. MODULE_LICENSE("GPL");