wm8523.c 14 KB

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  1. /*
  2. * wm8523.c -- WM8523 ALSA SoC Audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/slab.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include "wm8523.h"
  30. #define WM8523_NUM_SUPPLIES 2
  31. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  32. "AVDD",
  33. "LINEVDD",
  34. };
  35. #define WM8523_NUM_RATES 7
  36. /* codec private data */
  37. struct wm8523_priv {
  38. enum snd_soc_control_type control_type;
  39. u16 reg_cache[WM8523_REGISTER_COUNT];
  40. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  41. unsigned int sysclk;
  42. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  43. struct snd_pcm_hw_constraint_list rate_constraint;
  44. };
  45. static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
  46. 0x8523, /* R0 - DEVICE_ID */
  47. 0x0001, /* R1 - REVISION */
  48. 0x0000, /* R2 - PSCTRL1 */
  49. 0x1812, /* R3 - AIF_CTRL1 */
  50. 0x0000, /* R4 - AIF_CTRL2 */
  51. 0x0001, /* R5 - DAC_CTRL3 */
  52. 0x0190, /* R6 - DAC_GAINL */
  53. 0x0190, /* R7 - DAC_GAINR */
  54. 0x0000, /* R8 - ZERO_DETECT */
  55. };
  56. static int wm8523_volatile_register(unsigned int reg)
  57. {
  58. switch (reg) {
  59. case WM8523_DEVICE_ID:
  60. case WM8523_REVISION:
  61. return 1;
  62. default:
  63. return 0;
  64. }
  65. }
  66. static int wm8523_reset(struct snd_soc_codec *codec)
  67. {
  68. return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
  69. }
  70. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  71. static const char *wm8523_zd_count_text[] = {
  72. "1024",
  73. "2048",
  74. };
  75. static const struct soc_enum wm8523_zc_count =
  76. SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
  77. static const struct snd_kcontrol_new wm8523_snd_controls[] = {
  78. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  79. 0, 448, 0, dac_tlv),
  80. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  81. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  82. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  83. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  84. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  85. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  86. };
  87. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  88. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  89. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  90. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  91. };
  92. static const struct snd_soc_dapm_route intercon[] = {
  93. { "LINEVOUTL", NULL, "DAC" },
  94. { "LINEVOUTR", NULL, "DAC" },
  95. };
  96. static int wm8523_add_widgets(struct snd_soc_codec *codec)
  97. {
  98. snd_soc_dapm_new_controls(codec, wm8523_dapm_widgets,
  99. ARRAY_SIZE(wm8523_dapm_widgets));
  100. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  101. return 0;
  102. }
  103. static struct {
  104. int value;
  105. int ratio;
  106. } lrclk_ratios[WM8523_NUM_RATES] = {
  107. { 1, 128 },
  108. { 2, 192 },
  109. { 3, 256 },
  110. { 4, 384 },
  111. { 5, 512 },
  112. { 6, 768 },
  113. { 7, 1152 },
  114. };
  115. static int wm8523_startup(struct snd_pcm_substream *substream,
  116. struct snd_soc_dai *dai)
  117. {
  118. struct snd_soc_codec *codec = dai->codec;
  119. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  120. /* The set of sample rates that can be supported depends on the
  121. * MCLK supplied to the CODEC - enforce this.
  122. */
  123. if (!wm8523->sysclk) {
  124. dev_err(codec->dev,
  125. "No MCLK configured, call set_sysclk() on init\n");
  126. return -EINVAL;
  127. }
  128. snd_pcm_hw_constraint_list(substream->runtime, 0,
  129. SNDRV_PCM_HW_PARAM_RATE,
  130. &wm8523->rate_constraint);
  131. return 0;
  132. }
  133. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  134. struct snd_pcm_hw_params *params,
  135. struct snd_soc_dai *dai)
  136. {
  137. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  138. struct snd_soc_codec *codec = rtd->codec;
  139. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  140. int i;
  141. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  142. u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
  143. /* Find a supported LRCLK ratio */
  144. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  145. if (wm8523->sysclk / params_rate(params) ==
  146. lrclk_ratios[i].ratio)
  147. break;
  148. }
  149. /* Should never happen, should be handled by constraints */
  150. if (i == ARRAY_SIZE(lrclk_ratios)) {
  151. dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
  152. wm8523->sysclk / params_rate(params));
  153. return -EINVAL;
  154. }
  155. aifctrl2 &= ~WM8523_SR_MASK;
  156. aifctrl2 |= lrclk_ratios[i].value;
  157. aifctrl1 &= ~WM8523_WL_MASK;
  158. switch (params_format(params)) {
  159. case SNDRV_PCM_FORMAT_S16_LE:
  160. break;
  161. case SNDRV_PCM_FORMAT_S20_3LE:
  162. aifctrl1 |= 0x8;
  163. break;
  164. case SNDRV_PCM_FORMAT_S24_LE:
  165. aifctrl1 |= 0x10;
  166. break;
  167. case SNDRV_PCM_FORMAT_S32_LE:
  168. aifctrl1 |= 0x18;
  169. break;
  170. }
  171. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  172. snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
  173. return 0;
  174. }
  175. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  176. int clk_id, unsigned int freq, int dir)
  177. {
  178. struct snd_soc_codec *codec = codec_dai->codec;
  179. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  180. unsigned int val;
  181. int i;
  182. wm8523->sysclk = freq;
  183. wm8523->rate_constraint.count = 0;
  184. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  185. val = freq / lrclk_ratios[i].ratio;
  186. /* Check that it's a standard rate since core can't
  187. * cope with others and having the odd rates confuses
  188. * constraint matching.
  189. */
  190. switch (val) {
  191. case 8000:
  192. case 11025:
  193. case 16000:
  194. case 22050:
  195. case 32000:
  196. case 44100:
  197. case 48000:
  198. case 64000:
  199. case 88200:
  200. case 96000:
  201. case 176400:
  202. case 192000:
  203. dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
  204. val);
  205. wm8523->rate_constraint_list[i] = val;
  206. wm8523->rate_constraint.count++;
  207. break;
  208. default:
  209. dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
  210. val);
  211. }
  212. }
  213. /* Need at least one supported rate... */
  214. if (wm8523->rate_constraint.count == 0)
  215. return -EINVAL;
  216. return 0;
  217. }
  218. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  219. unsigned int fmt)
  220. {
  221. struct snd_soc_codec *codec = codec_dai->codec;
  222. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  223. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  224. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  225. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  226. case SND_SOC_DAIFMT_CBM_CFM:
  227. aifctrl1 |= WM8523_AIF_MSTR;
  228. break;
  229. case SND_SOC_DAIFMT_CBS_CFS:
  230. break;
  231. default:
  232. return -EINVAL;
  233. }
  234. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  235. case SND_SOC_DAIFMT_I2S:
  236. aifctrl1 |= 0x0002;
  237. break;
  238. case SND_SOC_DAIFMT_RIGHT_J:
  239. break;
  240. case SND_SOC_DAIFMT_LEFT_J:
  241. aifctrl1 |= 0x0001;
  242. break;
  243. case SND_SOC_DAIFMT_DSP_A:
  244. aifctrl1 |= 0x0003;
  245. break;
  246. case SND_SOC_DAIFMT_DSP_B:
  247. aifctrl1 |= 0x0023;
  248. break;
  249. default:
  250. return -EINVAL;
  251. }
  252. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  253. case SND_SOC_DAIFMT_NB_NF:
  254. break;
  255. case SND_SOC_DAIFMT_IB_IF:
  256. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  257. break;
  258. case SND_SOC_DAIFMT_IB_NF:
  259. aifctrl1 |= WM8523_BCLK_INV;
  260. break;
  261. case SND_SOC_DAIFMT_NB_IF:
  262. aifctrl1 |= WM8523_LRCLK_INV;
  263. break;
  264. default:
  265. return -EINVAL;
  266. }
  267. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  268. return 0;
  269. }
  270. static int wm8523_set_bias_level(struct snd_soc_codec *codec,
  271. enum snd_soc_bias_level level)
  272. {
  273. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  274. int ret, i;
  275. switch (level) {
  276. case SND_SOC_BIAS_ON:
  277. break;
  278. case SND_SOC_BIAS_PREPARE:
  279. /* Full power on */
  280. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  281. WM8523_SYS_ENA_MASK, 3);
  282. break;
  283. case SND_SOC_BIAS_STANDBY:
  284. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  285. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  286. wm8523->supplies);
  287. if (ret != 0) {
  288. dev_err(codec->dev,
  289. "Failed to enable supplies: %d\n",
  290. ret);
  291. return ret;
  292. }
  293. /* Initial power up */
  294. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  295. WM8523_SYS_ENA_MASK, 1);
  296. /* Sync back default/cached values */
  297. for (i = WM8523_AIF_CTRL1;
  298. i < WM8523_MAX_REGISTER; i++)
  299. snd_soc_write(codec, i, wm8523->reg_cache[i]);
  300. msleep(100);
  301. }
  302. /* Power up to mute */
  303. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  304. WM8523_SYS_ENA_MASK, 2);
  305. break;
  306. case SND_SOC_BIAS_OFF:
  307. /* The chip runs through the power down sequence for us. */
  308. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  309. WM8523_SYS_ENA_MASK, 0);
  310. msleep(100);
  311. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  312. wm8523->supplies);
  313. break;
  314. }
  315. codec->bias_level = level;
  316. return 0;
  317. }
  318. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  319. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  320. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  321. static struct snd_soc_dai_ops wm8523_dai_ops = {
  322. .startup = wm8523_startup,
  323. .hw_params = wm8523_hw_params,
  324. .set_sysclk = wm8523_set_dai_sysclk,
  325. .set_fmt = wm8523_set_dai_fmt,
  326. };
  327. static struct snd_soc_dai_driver wm8523_dai = {
  328. .name = "wm8523-hifi",
  329. .playback = {
  330. .stream_name = "Playback",
  331. .channels_min = 2, /* Mono modes not yet supported */
  332. .channels_max = 2,
  333. .rates = WM8523_RATES,
  334. .formats = WM8523_FORMATS,
  335. },
  336. .ops = &wm8523_dai_ops,
  337. };
  338. #ifdef CONFIG_PM
  339. static int wm8523_suspend(struct snd_soc_codec *codec, pm_message_t state)
  340. {
  341. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  342. return 0;
  343. }
  344. static int wm8523_resume(struct snd_soc_codec *codec)
  345. {
  346. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  347. return 0;
  348. }
  349. #else
  350. #define wm8523_suspend NULL
  351. #define wm8523_resume NULL
  352. #endif
  353. static int wm8523_probe(struct snd_soc_codec *codec)
  354. {
  355. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  356. int ret, i;
  357. codec->hw_write = (hw_write_t)i2c_master_send;
  358. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  359. wm8523->rate_constraint.count =
  360. ARRAY_SIZE(wm8523->rate_constraint_list);
  361. ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
  362. if (ret != 0) {
  363. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  364. return ret;
  365. }
  366. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  367. wm8523->supplies[i].supply = wm8523_supply_names[i];
  368. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
  369. wm8523->supplies);
  370. if (ret != 0) {
  371. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  372. return ret;
  373. }
  374. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  375. wm8523->supplies);
  376. if (ret != 0) {
  377. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  378. goto err_get;
  379. }
  380. ret = snd_soc_read(codec, WM8523_DEVICE_ID);
  381. if (ret < 0) {
  382. dev_err(codec->dev, "Failed to read ID register\n");
  383. goto err_enable;
  384. }
  385. if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
  386. dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
  387. ret = -EINVAL;
  388. goto err_enable;
  389. }
  390. ret = snd_soc_read(codec, WM8523_REVISION);
  391. if (ret < 0) {
  392. dev_err(codec->dev, "Failed to read revision register\n");
  393. goto err_enable;
  394. }
  395. dev_info(codec->dev, "revision %c\n",
  396. (ret & WM8523_CHIP_REV_MASK) + 'A');
  397. ret = wm8523_reset(codec);
  398. if (ret < 0) {
  399. dev_err(codec->dev, "Failed to issue reset\n");
  400. goto err_enable;
  401. }
  402. /* Change some default settings - latch VU and enable ZC */
  403. wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
  404. wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
  405. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  406. /* Bias level configuration will have done an extra enable */
  407. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  408. snd_soc_add_controls(codec, wm8523_snd_controls,
  409. ARRAY_SIZE(wm8523_snd_controls));
  410. wm8523_add_widgets(codec);
  411. return 0;
  412. err_enable:
  413. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  414. err_get:
  415. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  416. return ret;
  417. }
  418. static int wm8523_remove(struct snd_soc_codec *codec)
  419. {
  420. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  421. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  422. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  423. return 0;
  424. }
  425. static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
  426. .probe = wm8523_probe,
  427. .remove = wm8523_remove,
  428. .suspend = wm8523_suspend,
  429. .resume = wm8523_resume,
  430. .set_bias_level = wm8523_set_bias_level,
  431. .reg_cache_size = WM8523_REGISTER_COUNT,
  432. .reg_word_size = sizeof(u16),
  433. .reg_cache_default = wm8523_reg,
  434. .volatile_register = wm8523_volatile_register,
  435. };
  436. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  437. static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
  438. const struct i2c_device_id *id)
  439. {
  440. struct wm8523_priv *wm8523;
  441. int ret;
  442. wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
  443. if (wm8523 == NULL)
  444. return -ENOMEM;
  445. i2c_set_clientdata(i2c, wm8523);
  446. wm8523->control_type = SND_SOC_I2C;
  447. ret = snd_soc_register_codec(&i2c->dev,
  448. &soc_codec_dev_wm8523, &wm8523_dai, 1);
  449. if (ret < 0)
  450. kfree(wm8523);
  451. return ret;
  452. }
  453. static __devexit int wm8523_i2c_remove(struct i2c_client *client)
  454. {
  455. snd_soc_unregister_codec(&client->dev);
  456. kfree(i2c_get_clientdata(client));
  457. return 0;
  458. }
  459. static const struct i2c_device_id wm8523_i2c_id[] = {
  460. { "wm8523", 0 },
  461. { }
  462. };
  463. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  464. static struct i2c_driver wm8523_i2c_driver = {
  465. .driver = {
  466. .name = "wm8523-codec",
  467. .owner = THIS_MODULE,
  468. },
  469. .probe = wm8523_i2c_probe,
  470. .remove = __devexit_p(wm8523_i2c_remove),
  471. .id_table = wm8523_i2c_id,
  472. };
  473. #endif
  474. static int __init wm8523_modinit(void)
  475. {
  476. int ret;
  477. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  478. ret = i2c_add_driver(&wm8523_i2c_driver);
  479. if (ret != 0) {
  480. printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
  481. ret);
  482. }
  483. #endif
  484. return 0;
  485. }
  486. module_init(wm8523_modinit);
  487. static void __exit wm8523_exit(void)
  488. {
  489. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  490. i2c_del_driver(&wm8523_i2c_driver);
  491. #endif
  492. }
  493. module_exit(wm8523_exit);
  494. MODULE_DESCRIPTION("ASoC WM8523 driver");
  495. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  496. MODULE_LICENSE("GPL");