hpsa.c 114 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <asm/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. /* define the PCI info for the cards we can control */
  72. static const struct pci_device_id hpsa_pci_device_id[] = {
  73. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  74. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  75. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  76. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  86. #define PCI_DEVICE_ID_HP_CISSF 0x333f
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x333F},
  88. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  89. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  90. {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  91. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  92. {0,}
  93. };
  94. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  95. /* board_id = Subsystem Device ID & Vendor ID
  96. * product = Marketing Name for the board
  97. * access = Address of the struct of function pointers
  98. */
  99. static struct board_type products[] = {
  100. {0x3241103C, "Smart Array P212", &SA5_access},
  101. {0x3243103C, "Smart Array P410", &SA5_access},
  102. {0x3245103C, "Smart Array P410i", &SA5_access},
  103. {0x3247103C, "Smart Array P411", &SA5_access},
  104. {0x3249103C, "Smart Array P812", &SA5_access},
  105. {0x324a103C, "Smart Array P712m", &SA5_access},
  106. {0x324b103C, "Smart Array P711m", &SA5_access},
  107. {0x3233103C, "StorageWorks P1210m", &SA5_access},
  108. {0x333F103C, "StorageWorks P1210m", &SA5_access},
  109. {0x3250103C, "Smart Array", &SA5_access},
  110. {0x3250113C, "Smart Array", &SA5_access},
  111. {0x3250123C, "Smart Array", &SA5_access},
  112. {0x3250133C, "Smart Array", &SA5_access},
  113. {0x3250143C, "Smart Array", &SA5_access},
  114. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  115. };
  116. static int number_of_controllers;
  117. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  118. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  119. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  120. static void start_io(struct ctlr_info *h);
  121. #ifdef CONFIG_COMPAT
  122. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  123. #endif
  124. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  125. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  126. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  127. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  128. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  129. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  130. int cmd_type);
  131. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  132. static void hpsa_scan_start(struct Scsi_Host *);
  133. static int hpsa_scan_finished(struct Scsi_Host *sh,
  134. unsigned long elapsed_time);
  135. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  136. int qdepth, int reason);
  137. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  138. static int hpsa_slave_alloc(struct scsi_device *sdev);
  139. static void hpsa_slave_destroy(struct scsi_device *sdev);
  140. static ssize_t raid_level_show(struct device *dev,
  141. struct device_attribute *attr, char *buf);
  142. static ssize_t lunid_show(struct device *dev,
  143. struct device_attribute *attr, char *buf);
  144. static ssize_t unique_id_show(struct device *dev,
  145. struct device_attribute *attr, char *buf);
  146. static ssize_t host_show_firmware_revision(struct device *dev,
  147. struct device_attribute *attr, char *buf);
  148. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  149. static ssize_t host_store_rescan(struct device *dev,
  150. struct device_attribute *attr, const char *buf, size_t count);
  151. static int check_for_unit_attention(struct ctlr_info *h,
  152. struct CommandList *c);
  153. static void check_ioctl_unit_attention(struct ctlr_info *h,
  154. struct CommandList *c);
  155. /* performant mode helper functions */
  156. static void calc_bucket_map(int *bucket, int num_buckets,
  157. int nsgs, int *bucket_map);
  158. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  159. static inline u32 next_command(struct ctlr_info *h);
  160. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  161. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  162. u64 *cfg_offset);
  163. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  164. unsigned long *memory_bar);
  165. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  166. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  167. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  168. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  169. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  170. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  171. host_show_firmware_revision, NULL);
  172. static struct device_attribute *hpsa_sdev_attrs[] = {
  173. &dev_attr_raid_level,
  174. &dev_attr_lunid,
  175. &dev_attr_unique_id,
  176. NULL,
  177. };
  178. static struct device_attribute *hpsa_shost_attrs[] = {
  179. &dev_attr_rescan,
  180. &dev_attr_firmware_revision,
  181. NULL,
  182. };
  183. static struct scsi_host_template hpsa_driver_template = {
  184. .module = THIS_MODULE,
  185. .name = "hpsa",
  186. .proc_name = "hpsa",
  187. .queuecommand = hpsa_scsi_queue_command,
  188. .scan_start = hpsa_scan_start,
  189. .scan_finished = hpsa_scan_finished,
  190. .change_queue_depth = hpsa_change_queue_depth,
  191. .this_id = -1,
  192. .use_clustering = ENABLE_CLUSTERING,
  193. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  194. .ioctl = hpsa_ioctl,
  195. .slave_alloc = hpsa_slave_alloc,
  196. .slave_destroy = hpsa_slave_destroy,
  197. #ifdef CONFIG_COMPAT
  198. .compat_ioctl = hpsa_compat_ioctl,
  199. #endif
  200. .sdev_attrs = hpsa_sdev_attrs,
  201. .shost_attrs = hpsa_shost_attrs,
  202. };
  203. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  204. {
  205. unsigned long *priv = shost_priv(sdev->host);
  206. return (struct ctlr_info *) *priv;
  207. }
  208. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  209. {
  210. unsigned long *priv = shost_priv(sh);
  211. return (struct ctlr_info *) *priv;
  212. }
  213. static int check_for_unit_attention(struct ctlr_info *h,
  214. struct CommandList *c)
  215. {
  216. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  217. return 0;
  218. switch (c->err_info->SenseInfo[12]) {
  219. case STATE_CHANGED:
  220. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  221. "detected, command retried\n", h->ctlr);
  222. break;
  223. case LUN_FAILED:
  224. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  225. "detected, action required\n", h->ctlr);
  226. break;
  227. case REPORT_LUNS_CHANGED:
  228. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  229. "changed, action required\n", h->ctlr);
  230. /*
  231. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  232. */
  233. break;
  234. case POWER_OR_RESET:
  235. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  236. "or device reset detected\n", h->ctlr);
  237. break;
  238. case UNIT_ATTENTION_CLEARED:
  239. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  240. "cleared by another initiator\n", h->ctlr);
  241. break;
  242. default:
  243. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  244. "unit attention detected\n", h->ctlr);
  245. break;
  246. }
  247. return 1;
  248. }
  249. static ssize_t host_store_rescan(struct device *dev,
  250. struct device_attribute *attr,
  251. const char *buf, size_t count)
  252. {
  253. struct ctlr_info *h;
  254. struct Scsi_Host *shost = class_to_shost(dev);
  255. h = shost_to_hba(shost);
  256. hpsa_scan_start(h->scsi_host);
  257. return count;
  258. }
  259. static ssize_t host_show_firmware_revision(struct device *dev,
  260. struct device_attribute *attr, char *buf)
  261. {
  262. struct ctlr_info *h;
  263. struct Scsi_Host *shost = class_to_shost(dev);
  264. unsigned char *fwrev;
  265. h = shost_to_hba(shost);
  266. if (!h->hba_inquiry_data)
  267. return 0;
  268. fwrev = &h->hba_inquiry_data[32];
  269. return snprintf(buf, 20, "%c%c%c%c\n",
  270. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  271. }
  272. /* Enqueuing and dequeuing functions for cmdlists. */
  273. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  274. {
  275. hlist_add_head(&c->list, list);
  276. }
  277. static inline u32 next_command(struct ctlr_info *h)
  278. {
  279. u32 a;
  280. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  281. return h->access.command_completed(h);
  282. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  283. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  284. (h->reply_pool_head)++;
  285. h->commands_outstanding--;
  286. } else {
  287. a = FIFO_EMPTY;
  288. }
  289. /* Check for wraparound */
  290. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  291. h->reply_pool_head = h->reply_pool;
  292. h->reply_pool_wraparound ^= 1;
  293. }
  294. return a;
  295. }
  296. /* set_performant_mode: Modify the tag for cciss performant
  297. * set bit 0 for pull model, bits 3-1 for block fetch
  298. * register number
  299. */
  300. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  301. {
  302. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  303. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  304. }
  305. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  306. struct CommandList *c)
  307. {
  308. unsigned long flags;
  309. set_performant_mode(h, c);
  310. spin_lock_irqsave(&h->lock, flags);
  311. addQ(&h->reqQ, c);
  312. h->Qdepth++;
  313. start_io(h);
  314. spin_unlock_irqrestore(&h->lock, flags);
  315. }
  316. static inline void removeQ(struct CommandList *c)
  317. {
  318. if (WARN_ON(hlist_unhashed(&c->list)))
  319. return;
  320. hlist_del_init(&c->list);
  321. }
  322. static inline int is_hba_lunid(unsigned char scsi3addr[])
  323. {
  324. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  325. }
  326. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  327. {
  328. return (scsi3addr[3] & 0xC0) == 0x40;
  329. }
  330. static inline int is_scsi_rev_5(struct ctlr_info *h)
  331. {
  332. if (!h->hba_inquiry_data)
  333. return 0;
  334. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  335. return 1;
  336. return 0;
  337. }
  338. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  339. "UNKNOWN"
  340. };
  341. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  342. static ssize_t raid_level_show(struct device *dev,
  343. struct device_attribute *attr, char *buf)
  344. {
  345. ssize_t l = 0;
  346. unsigned char rlevel;
  347. struct ctlr_info *h;
  348. struct scsi_device *sdev;
  349. struct hpsa_scsi_dev_t *hdev;
  350. unsigned long flags;
  351. sdev = to_scsi_device(dev);
  352. h = sdev_to_hba(sdev);
  353. spin_lock_irqsave(&h->lock, flags);
  354. hdev = sdev->hostdata;
  355. if (!hdev) {
  356. spin_unlock_irqrestore(&h->lock, flags);
  357. return -ENODEV;
  358. }
  359. /* Is this even a logical drive? */
  360. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  361. spin_unlock_irqrestore(&h->lock, flags);
  362. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  363. return l;
  364. }
  365. rlevel = hdev->raid_level;
  366. spin_unlock_irqrestore(&h->lock, flags);
  367. if (rlevel > RAID_UNKNOWN)
  368. rlevel = RAID_UNKNOWN;
  369. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  370. return l;
  371. }
  372. static ssize_t lunid_show(struct device *dev,
  373. struct device_attribute *attr, char *buf)
  374. {
  375. struct ctlr_info *h;
  376. struct scsi_device *sdev;
  377. struct hpsa_scsi_dev_t *hdev;
  378. unsigned long flags;
  379. unsigned char lunid[8];
  380. sdev = to_scsi_device(dev);
  381. h = sdev_to_hba(sdev);
  382. spin_lock_irqsave(&h->lock, flags);
  383. hdev = sdev->hostdata;
  384. if (!hdev) {
  385. spin_unlock_irqrestore(&h->lock, flags);
  386. return -ENODEV;
  387. }
  388. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  389. spin_unlock_irqrestore(&h->lock, flags);
  390. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  391. lunid[0], lunid[1], lunid[2], lunid[3],
  392. lunid[4], lunid[5], lunid[6], lunid[7]);
  393. }
  394. static ssize_t unique_id_show(struct device *dev,
  395. struct device_attribute *attr, char *buf)
  396. {
  397. struct ctlr_info *h;
  398. struct scsi_device *sdev;
  399. struct hpsa_scsi_dev_t *hdev;
  400. unsigned long flags;
  401. unsigned char sn[16];
  402. sdev = to_scsi_device(dev);
  403. h = sdev_to_hba(sdev);
  404. spin_lock_irqsave(&h->lock, flags);
  405. hdev = sdev->hostdata;
  406. if (!hdev) {
  407. spin_unlock_irqrestore(&h->lock, flags);
  408. return -ENODEV;
  409. }
  410. memcpy(sn, hdev->device_id, sizeof(sn));
  411. spin_unlock_irqrestore(&h->lock, flags);
  412. return snprintf(buf, 16 * 2 + 2,
  413. "%02X%02X%02X%02X%02X%02X%02X%02X"
  414. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  415. sn[0], sn[1], sn[2], sn[3],
  416. sn[4], sn[5], sn[6], sn[7],
  417. sn[8], sn[9], sn[10], sn[11],
  418. sn[12], sn[13], sn[14], sn[15]);
  419. }
  420. static int hpsa_find_target_lun(struct ctlr_info *h,
  421. unsigned char scsi3addr[], int bus, int *target, int *lun)
  422. {
  423. /* finds an unused bus, target, lun for a new physical device
  424. * assumes h->devlock is held
  425. */
  426. int i, found = 0;
  427. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  428. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  429. for (i = 0; i < h->ndevices; i++) {
  430. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  431. set_bit(h->dev[i]->target, lun_taken);
  432. }
  433. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  434. if (!test_bit(i, lun_taken)) {
  435. /* *bus = 1; */
  436. *target = i;
  437. *lun = 0;
  438. found = 1;
  439. break;
  440. }
  441. }
  442. return !found;
  443. }
  444. /* Add an entry into h->dev[] array. */
  445. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  446. struct hpsa_scsi_dev_t *device,
  447. struct hpsa_scsi_dev_t *added[], int *nadded)
  448. {
  449. /* assumes h->devlock is held */
  450. int n = h->ndevices;
  451. int i;
  452. unsigned char addr1[8], addr2[8];
  453. struct hpsa_scsi_dev_t *sd;
  454. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  455. dev_err(&h->pdev->dev, "too many devices, some will be "
  456. "inaccessible.\n");
  457. return -1;
  458. }
  459. /* physical devices do not have lun or target assigned until now. */
  460. if (device->lun != -1)
  461. /* Logical device, lun is already assigned. */
  462. goto lun_assigned;
  463. /* If this device a non-zero lun of a multi-lun device
  464. * byte 4 of the 8-byte LUN addr will contain the logical
  465. * unit no, zero otherise.
  466. */
  467. if (device->scsi3addr[4] == 0) {
  468. /* This is not a non-zero lun of a multi-lun device */
  469. if (hpsa_find_target_lun(h, device->scsi3addr,
  470. device->bus, &device->target, &device->lun) != 0)
  471. return -1;
  472. goto lun_assigned;
  473. }
  474. /* This is a non-zero lun of a multi-lun device.
  475. * Search through our list and find the device which
  476. * has the same 8 byte LUN address, excepting byte 4.
  477. * Assign the same bus and target for this new LUN.
  478. * Use the logical unit number from the firmware.
  479. */
  480. memcpy(addr1, device->scsi3addr, 8);
  481. addr1[4] = 0;
  482. for (i = 0; i < n; i++) {
  483. sd = h->dev[i];
  484. memcpy(addr2, sd->scsi3addr, 8);
  485. addr2[4] = 0;
  486. /* differ only in byte 4? */
  487. if (memcmp(addr1, addr2, 8) == 0) {
  488. device->bus = sd->bus;
  489. device->target = sd->target;
  490. device->lun = device->scsi3addr[4];
  491. break;
  492. }
  493. }
  494. if (device->lun == -1) {
  495. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  496. " suspect firmware bug or unsupported hardware "
  497. "configuration.\n");
  498. return -1;
  499. }
  500. lun_assigned:
  501. h->dev[n] = device;
  502. h->ndevices++;
  503. added[*nadded] = device;
  504. (*nadded)++;
  505. /* initially, (before registering with scsi layer) we don't
  506. * know our hostno and we don't want to print anything first
  507. * time anyway (the scsi layer's inquiries will show that info)
  508. */
  509. /* if (hostno != -1) */
  510. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  511. scsi_device_type(device->devtype), hostno,
  512. device->bus, device->target, device->lun);
  513. return 0;
  514. }
  515. /* Replace an entry from h->dev[] array. */
  516. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  517. int entry, struct hpsa_scsi_dev_t *new_entry,
  518. struct hpsa_scsi_dev_t *added[], int *nadded,
  519. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  520. {
  521. /* assumes h->devlock is held */
  522. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  523. removed[*nremoved] = h->dev[entry];
  524. (*nremoved)++;
  525. h->dev[entry] = new_entry;
  526. added[*nadded] = new_entry;
  527. (*nadded)++;
  528. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  529. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  530. new_entry->target, new_entry->lun);
  531. }
  532. /* Remove an entry from h->dev[] array. */
  533. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  534. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  535. {
  536. /* assumes h->devlock is held */
  537. int i;
  538. struct hpsa_scsi_dev_t *sd;
  539. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  540. sd = h->dev[entry];
  541. removed[*nremoved] = h->dev[entry];
  542. (*nremoved)++;
  543. for (i = entry; i < h->ndevices-1; i++)
  544. h->dev[i] = h->dev[i+1];
  545. h->ndevices--;
  546. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  547. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  548. sd->lun);
  549. }
  550. #define SCSI3ADDR_EQ(a, b) ( \
  551. (a)[7] == (b)[7] && \
  552. (a)[6] == (b)[6] && \
  553. (a)[5] == (b)[5] && \
  554. (a)[4] == (b)[4] && \
  555. (a)[3] == (b)[3] && \
  556. (a)[2] == (b)[2] && \
  557. (a)[1] == (b)[1] && \
  558. (a)[0] == (b)[0])
  559. static void fixup_botched_add(struct ctlr_info *h,
  560. struct hpsa_scsi_dev_t *added)
  561. {
  562. /* called when scsi_add_device fails in order to re-adjust
  563. * h->dev[] to match the mid layer's view.
  564. */
  565. unsigned long flags;
  566. int i, j;
  567. spin_lock_irqsave(&h->lock, flags);
  568. for (i = 0; i < h->ndevices; i++) {
  569. if (h->dev[i] == added) {
  570. for (j = i; j < h->ndevices-1; j++)
  571. h->dev[j] = h->dev[j+1];
  572. h->ndevices--;
  573. break;
  574. }
  575. }
  576. spin_unlock_irqrestore(&h->lock, flags);
  577. kfree(added);
  578. }
  579. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  580. struct hpsa_scsi_dev_t *dev2)
  581. {
  582. if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
  583. (dev1->lun != -1 && dev2->lun != -1)) &&
  584. dev1->devtype != 0x0C)
  585. return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
  586. /* we compare everything except lun and target as these
  587. * are not yet assigned. Compare parts likely
  588. * to differ first
  589. */
  590. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  591. sizeof(dev1->scsi3addr)) != 0)
  592. return 0;
  593. if (memcmp(dev1->device_id, dev2->device_id,
  594. sizeof(dev1->device_id)) != 0)
  595. return 0;
  596. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  597. return 0;
  598. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  599. return 0;
  600. if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
  601. return 0;
  602. if (dev1->devtype != dev2->devtype)
  603. return 0;
  604. if (dev1->raid_level != dev2->raid_level)
  605. return 0;
  606. if (dev1->bus != dev2->bus)
  607. return 0;
  608. return 1;
  609. }
  610. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  611. * and return needle location in *index. If scsi3addr matches, but not
  612. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  613. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  614. */
  615. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  616. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  617. int *index)
  618. {
  619. int i;
  620. #define DEVICE_NOT_FOUND 0
  621. #define DEVICE_CHANGED 1
  622. #define DEVICE_SAME 2
  623. for (i = 0; i < haystack_size; i++) {
  624. if (haystack[i] == NULL) /* previously removed. */
  625. continue;
  626. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  627. *index = i;
  628. if (device_is_the_same(needle, haystack[i]))
  629. return DEVICE_SAME;
  630. else
  631. return DEVICE_CHANGED;
  632. }
  633. }
  634. *index = -1;
  635. return DEVICE_NOT_FOUND;
  636. }
  637. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  638. struct hpsa_scsi_dev_t *sd[], int nsds)
  639. {
  640. /* sd contains scsi3 addresses and devtypes, and inquiry
  641. * data. This function takes what's in sd to be the current
  642. * reality and updates h->dev[] to reflect that reality.
  643. */
  644. int i, entry, device_change, changes = 0;
  645. struct hpsa_scsi_dev_t *csd;
  646. unsigned long flags;
  647. struct hpsa_scsi_dev_t **added, **removed;
  648. int nadded, nremoved;
  649. struct Scsi_Host *sh = NULL;
  650. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  651. GFP_KERNEL);
  652. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  653. GFP_KERNEL);
  654. if (!added || !removed) {
  655. dev_warn(&h->pdev->dev, "out of memory in "
  656. "adjust_hpsa_scsi_table\n");
  657. goto free_and_out;
  658. }
  659. spin_lock_irqsave(&h->devlock, flags);
  660. /* find any devices in h->dev[] that are not in
  661. * sd[] and remove them from h->dev[], and for any
  662. * devices which have changed, remove the old device
  663. * info and add the new device info.
  664. */
  665. i = 0;
  666. nremoved = 0;
  667. nadded = 0;
  668. while (i < h->ndevices) {
  669. csd = h->dev[i];
  670. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  671. if (device_change == DEVICE_NOT_FOUND) {
  672. changes++;
  673. hpsa_scsi_remove_entry(h, hostno, i,
  674. removed, &nremoved);
  675. continue; /* remove ^^^, hence i not incremented */
  676. } else if (device_change == DEVICE_CHANGED) {
  677. changes++;
  678. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  679. added, &nadded, removed, &nremoved);
  680. /* Set it to NULL to prevent it from being freed
  681. * at the bottom of hpsa_update_scsi_devices()
  682. */
  683. sd[entry] = NULL;
  684. }
  685. i++;
  686. }
  687. /* Now, make sure every device listed in sd[] is also
  688. * listed in h->dev[], adding them if they aren't found
  689. */
  690. for (i = 0; i < nsds; i++) {
  691. if (!sd[i]) /* if already added above. */
  692. continue;
  693. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  694. h->ndevices, &entry);
  695. if (device_change == DEVICE_NOT_FOUND) {
  696. changes++;
  697. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  698. added, &nadded) != 0)
  699. break;
  700. sd[i] = NULL; /* prevent from being freed later. */
  701. } else if (device_change == DEVICE_CHANGED) {
  702. /* should never happen... */
  703. changes++;
  704. dev_warn(&h->pdev->dev,
  705. "device unexpectedly changed.\n");
  706. /* but if it does happen, we just ignore that device */
  707. }
  708. }
  709. spin_unlock_irqrestore(&h->devlock, flags);
  710. /* Don't notify scsi mid layer of any changes the first time through
  711. * (or if there are no changes) scsi_scan_host will do it later the
  712. * first time through.
  713. */
  714. if (hostno == -1 || !changes)
  715. goto free_and_out;
  716. sh = h->scsi_host;
  717. /* Notify scsi mid layer of any removed devices */
  718. for (i = 0; i < nremoved; i++) {
  719. struct scsi_device *sdev =
  720. scsi_device_lookup(sh, removed[i]->bus,
  721. removed[i]->target, removed[i]->lun);
  722. if (sdev != NULL) {
  723. scsi_remove_device(sdev);
  724. scsi_device_put(sdev);
  725. } else {
  726. /* We don't expect to get here.
  727. * future cmds to this device will get selection
  728. * timeout as if the device was gone.
  729. */
  730. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  731. " for removal.", hostno, removed[i]->bus,
  732. removed[i]->target, removed[i]->lun);
  733. }
  734. kfree(removed[i]);
  735. removed[i] = NULL;
  736. }
  737. /* Notify scsi mid layer of any added devices */
  738. for (i = 0; i < nadded; i++) {
  739. if (scsi_add_device(sh, added[i]->bus,
  740. added[i]->target, added[i]->lun) == 0)
  741. continue;
  742. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  743. "device not added.\n", hostno, added[i]->bus,
  744. added[i]->target, added[i]->lun);
  745. /* now we have to remove it from h->dev,
  746. * since it didn't get added to scsi mid layer
  747. */
  748. fixup_botched_add(h, added[i]);
  749. }
  750. free_and_out:
  751. kfree(added);
  752. kfree(removed);
  753. }
  754. /*
  755. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  756. * Assume's h->devlock is held.
  757. */
  758. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  759. int bus, int target, int lun)
  760. {
  761. int i;
  762. struct hpsa_scsi_dev_t *sd;
  763. for (i = 0; i < h->ndevices; i++) {
  764. sd = h->dev[i];
  765. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  766. return sd;
  767. }
  768. return NULL;
  769. }
  770. /* link sdev->hostdata to our per-device structure. */
  771. static int hpsa_slave_alloc(struct scsi_device *sdev)
  772. {
  773. struct hpsa_scsi_dev_t *sd;
  774. unsigned long flags;
  775. struct ctlr_info *h;
  776. h = sdev_to_hba(sdev);
  777. spin_lock_irqsave(&h->devlock, flags);
  778. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  779. sdev_id(sdev), sdev->lun);
  780. if (sd != NULL)
  781. sdev->hostdata = sd;
  782. spin_unlock_irqrestore(&h->devlock, flags);
  783. return 0;
  784. }
  785. static void hpsa_slave_destroy(struct scsi_device *sdev)
  786. {
  787. /* nothing to do. */
  788. }
  789. static void hpsa_scsi_setup(struct ctlr_info *h)
  790. {
  791. h->ndevices = 0;
  792. h->scsi_host = NULL;
  793. spin_lock_init(&h->devlock);
  794. }
  795. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  796. {
  797. int i;
  798. if (!h->cmd_sg_list)
  799. return;
  800. for (i = 0; i < h->nr_cmds; i++) {
  801. kfree(h->cmd_sg_list[i]);
  802. h->cmd_sg_list[i] = NULL;
  803. }
  804. kfree(h->cmd_sg_list);
  805. h->cmd_sg_list = NULL;
  806. }
  807. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  808. {
  809. int i;
  810. if (h->chainsize <= 0)
  811. return 0;
  812. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  813. GFP_KERNEL);
  814. if (!h->cmd_sg_list)
  815. return -ENOMEM;
  816. for (i = 0; i < h->nr_cmds; i++) {
  817. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  818. h->chainsize, GFP_KERNEL);
  819. if (!h->cmd_sg_list[i])
  820. goto clean;
  821. }
  822. return 0;
  823. clean:
  824. hpsa_free_sg_chain_blocks(h);
  825. return -ENOMEM;
  826. }
  827. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  828. struct CommandList *c)
  829. {
  830. struct SGDescriptor *chain_sg, *chain_block;
  831. u64 temp64;
  832. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  833. chain_block = h->cmd_sg_list[c->cmdindex];
  834. chain_sg->Ext = HPSA_SG_CHAIN;
  835. chain_sg->Len = sizeof(*chain_sg) *
  836. (c->Header.SGTotal - h->max_cmd_sg_entries);
  837. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  838. PCI_DMA_TODEVICE);
  839. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  840. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  841. }
  842. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  843. struct CommandList *c)
  844. {
  845. struct SGDescriptor *chain_sg;
  846. union u64bit temp64;
  847. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  848. return;
  849. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  850. temp64.val32.lower = chain_sg->Addr.lower;
  851. temp64.val32.upper = chain_sg->Addr.upper;
  852. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  853. }
  854. static void complete_scsi_command(struct CommandList *cp,
  855. int timeout, u32 tag)
  856. {
  857. struct scsi_cmnd *cmd;
  858. struct ctlr_info *h;
  859. struct ErrorInfo *ei;
  860. unsigned char sense_key;
  861. unsigned char asc; /* additional sense code */
  862. unsigned char ascq; /* additional sense code qualifier */
  863. ei = cp->err_info;
  864. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  865. h = cp->h;
  866. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  867. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  868. hpsa_unmap_sg_chain_block(h, cp);
  869. cmd->result = (DID_OK << 16); /* host byte */
  870. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  871. cmd->result |= ei->ScsiStatus;
  872. /* copy the sense data whether we need to or not. */
  873. memcpy(cmd->sense_buffer, ei->SenseInfo,
  874. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  875. SCSI_SENSE_BUFFERSIZE :
  876. ei->SenseLen);
  877. scsi_set_resid(cmd, ei->ResidualCnt);
  878. if (ei->CommandStatus == 0) {
  879. cmd->scsi_done(cmd);
  880. cmd_free(h, cp);
  881. return;
  882. }
  883. /* an error has occurred */
  884. switch (ei->CommandStatus) {
  885. case CMD_TARGET_STATUS:
  886. if (ei->ScsiStatus) {
  887. /* Get sense key */
  888. sense_key = 0xf & ei->SenseInfo[2];
  889. /* Get additional sense code */
  890. asc = ei->SenseInfo[12];
  891. /* Get addition sense code qualifier */
  892. ascq = ei->SenseInfo[13];
  893. }
  894. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  895. if (check_for_unit_attention(h, cp)) {
  896. cmd->result = DID_SOFT_ERROR << 16;
  897. break;
  898. }
  899. if (sense_key == ILLEGAL_REQUEST) {
  900. /*
  901. * SCSI REPORT_LUNS is commonly unsupported on
  902. * Smart Array. Suppress noisy complaint.
  903. */
  904. if (cp->Request.CDB[0] == REPORT_LUNS)
  905. break;
  906. /* If ASC/ASCQ indicate Logical Unit
  907. * Not Supported condition,
  908. */
  909. if ((asc == 0x25) && (ascq == 0x0)) {
  910. dev_warn(&h->pdev->dev, "cp %p "
  911. "has check condition\n", cp);
  912. break;
  913. }
  914. }
  915. if (sense_key == NOT_READY) {
  916. /* If Sense is Not Ready, Logical Unit
  917. * Not ready, Manual Intervention
  918. * required
  919. */
  920. if ((asc == 0x04) && (ascq == 0x03)) {
  921. dev_warn(&h->pdev->dev, "cp %p "
  922. "has check condition: unit "
  923. "not ready, manual "
  924. "intervention required\n", cp);
  925. break;
  926. }
  927. }
  928. if (sense_key == ABORTED_COMMAND) {
  929. /* Aborted command is retryable */
  930. dev_warn(&h->pdev->dev, "cp %p "
  931. "has check condition: aborted command: "
  932. "ASC: 0x%x, ASCQ: 0x%x\n",
  933. cp, asc, ascq);
  934. cmd->result = DID_SOFT_ERROR << 16;
  935. break;
  936. }
  937. /* Must be some other type of check condition */
  938. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  939. "unknown type: "
  940. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  941. "Returning result: 0x%x, "
  942. "cmd=[%02x %02x %02x %02x %02x "
  943. "%02x %02x %02x %02x %02x %02x "
  944. "%02x %02x %02x %02x %02x]\n",
  945. cp, sense_key, asc, ascq,
  946. cmd->result,
  947. cmd->cmnd[0], cmd->cmnd[1],
  948. cmd->cmnd[2], cmd->cmnd[3],
  949. cmd->cmnd[4], cmd->cmnd[5],
  950. cmd->cmnd[6], cmd->cmnd[7],
  951. cmd->cmnd[8], cmd->cmnd[9],
  952. cmd->cmnd[10], cmd->cmnd[11],
  953. cmd->cmnd[12], cmd->cmnd[13],
  954. cmd->cmnd[14], cmd->cmnd[15]);
  955. break;
  956. }
  957. /* Problem was not a check condition
  958. * Pass it up to the upper layers...
  959. */
  960. if (ei->ScsiStatus) {
  961. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  962. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  963. "Returning result: 0x%x\n",
  964. cp, ei->ScsiStatus,
  965. sense_key, asc, ascq,
  966. cmd->result);
  967. } else { /* scsi status is zero??? How??? */
  968. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  969. "Returning no connection.\n", cp),
  970. /* Ordinarily, this case should never happen,
  971. * but there is a bug in some released firmware
  972. * revisions that allows it to happen if, for
  973. * example, a 4100 backplane loses power and
  974. * the tape drive is in it. We assume that
  975. * it's a fatal error of some kind because we
  976. * can't show that it wasn't. We will make it
  977. * look like selection timeout since that is
  978. * the most common reason for this to occur,
  979. * and it's severe enough.
  980. */
  981. cmd->result = DID_NO_CONNECT << 16;
  982. }
  983. break;
  984. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  985. break;
  986. case CMD_DATA_OVERRUN:
  987. dev_warn(&h->pdev->dev, "cp %p has"
  988. " completed with data overrun "
  989. "reported\n", cp);
  990. break;
  991. case CMD_INVALID: {
  992. /* print_bytes(cp, sizeof(*cp), 1, 0);
  993. print_cmd(cp); */
  994. /* We get CMD_INVALID if you address a non-existent device
  995. * instead of a selection timeout (no response). You will
  996. * see this if you yank out a drive, then try to access it.
  997. * This is kind of a shame because it means that any other
  998. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  999. * missing target. */
  1000. cmd->result = DID_NO_CONNECT << 16;
  1001. }
  1002. break;
  1003. case CMD_PROTOCOL_ERR:
  1004. dev_warn(&h->pdev->dev, "cp %p has "
  1005. "protocol error \n", cp);
  1006. break;
  1007. case CMD_HARDWARE_ERR:
  1008. cmd->result = DID_ERROR << 16;
  1009. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1010. break;
  1011. case CMD_CONNECTION_LOST:
  1012. cmd->result = DID_ERROR << 16;
  1013. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1014. break;
  1015. case CMD_ABORTED:
  1016. cmd->result = DID_ABORT << 16;
  1017. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1018. cp, ei->ScsiStatus);
  1019. break;
  1020. case CMD_ABORT_FAILED:
  1021. cmd->result = DID_ERROR << 16;
  1022. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1023. break;
  1024. case CMD_UNSOLICITED_ABORT:
  1025. cmd->result = DID_RESET << 16;
  1026. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1027. "abort\n", cp);
  1028. break;
  1029. case CMD_TIMEOUT:
  1030. cmd->result = DID_TIME_OUT << 16;
  1031. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1032. break;
  1033. default:
  1034. cmd->result = DID_ERROR << 16;
  1035. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1036. cp, ei->CommandStatus);
  1037. }
  1038. cmd->scsi_done(cmd);
  1039. cmd_free(h, cp);
  1040. }
  1041. static int hpsa_scsi_detect(struct ctlr_info *h)
  1042. {
  1043. struct Scsi_Host *sh;
  1044. int error;
  1045. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1046. if (sh == NULL)
  1047. goto fail;
  1048. sh->io_port = 0;
  1049. sh->n_io_port = 0;
  1050. sh->this_id = -1;
  1051. sh->max_channel = 3;
  1052. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1053. sh->max_lun = HPSA_MAX_LUN;
  1054. sh->max_id = HPSA_MAX_LUN;
  1055. sh->can_queue = h->nr_cmds;
  1056. sh->cmd_per_lun = h->nr_cmds;
  1057. sh->sg_tablesize = h->maxsgentries;
  1058. h->scsi_host = sh;
  1059. sh->hostdata[0] = (unsigned long) h;
  1060. sh->irq = h->intr[PERF_MODE_INT];
  1061. sh->unique_id = sh->irq;
  1062. error = scsi_add_host(sh, &h->pdev->dev);
  1063. if (error)
  1064. goto fail_host_put;
  1065. scsi_scan_host(sh);
  1066. return 0;
  1067. fail_host_put:
  1068. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1069. " failed for controller %d\n", h->ctlr);
  1070. scsi_host_put(sh);
  1071. return error;
  1072. fail:
  1073. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1074. " failed for controller %d\n", h->ctlr);
  1075. return -ENOMEM;
  1076. }
  1077. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1078. struct CommandList *c, int sg_used, int data_direction)
  1079. {
  1080. int i;
  1081. union u64bit addr64;
  1082. for (i = 0; i < sg_used; i++) {
  1083. addr64.val32.lower = c->SG[i].Addr.lower;
  1084. addr64.val32.upper = c->SG[i].Addr.upper;
  1085. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1086. data_direction);
  1087. }
  1088. }
  1089. static void hpsa_map_one(struct pci_dev *pdev,
  1090. struct CommandList *cp,
  1091. unsigned char *buf,
  1092. size_t buflen,
  1093. int data_direction)
  1094. {
  1095. u64 addr64;
  1096. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1097. cp->Header.SGList = 0;
  1098. cp->Header.SGTotal = 0;
  1099. return;
  1100. }
  1101. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1102. cp->SG[0].Addr.lower =
  1103. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1104. cp->SG[0].Addr.upper =
  1105. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1106. cp->SG[0].Len = buflen;
  1107. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1108. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1109. }
  1110. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1111. struct CommandList *c)
  1112. {
  1113. DECLARE_COMPLETION_ONSTACK(wait);
  1114. c->waiting = &wait;
  1115. enqueue_cmd_and_start_io(h, c);
  1116. wait_for_completion(&wait);
  1117. }
  1118. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1119. struct CommandList *c, int data_direction)
  1120. {
  1121. int retry_count = 0;
  1122. do {
  1123. memset(c->err_info, 0, sizeof(c->err_info));
  1124. hpsa_scsi_do_simple_cmd_core(h, c);
  1125. retry_count++;
  1126. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1127. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1128. }
  1129. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1130. {
  1131. struct ErrorInfo *ei;
  1132. struct device *d = &cp->h->pdev->dev;
  1133. ei = cp->err_info;
  1134. switch (ei->CommandStatus) {
  1135. case CMD_TARGET_STATUS:
  1136. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1137. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1138. ei->ScsiStatus);
  1139. if (ei->ScsiStatus == 0)
  1140. dev_warn(d, "SCSI status is abnormally zero. "
  1141. "(probably indicates selection timeout "
  1142. "reported incorrectly due to a known "
  1143. "firmware bug, circa July, 2001.)\n");
  1144. break;
  1145. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1146. dev_info(d, "UNDERRUN\n");
  1147. break;
  1148. case CMD_DATA_OVERRUN:
  1149. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1150. break;
  1151. case CMD_INVALID: {
  1152. /* controller unfortunately reports SCSI passthru's
  1153. * to non-existent targets as invalid commands.
  1154. */
  1155. dev_warn(d, "cp %p is reported invalid (probably means "
  1156. "target device no longer present)\n", cp);
  1157. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1158. print_cmd(cp); */
  1159. }
  1160. break;
  1161. case CMD_PROTOCOL_ERR:
  1162. dev_warn(d, "cp %p has protocol error \n", cp);
  1163. break;
  1164. case CMD_HARDWARE_ERR:
  1165. /* cmd->result = DID_ERROR << 16; */
  1166. dev_warn(d, "cp %p had hardware error\n", cp);
  1167. break;
  1168. case CMD_CONNECTION_LOST:
  1169. dev_warn(d, "cp %p had connection lost\n", cp);
  1170. break;
  1171. case CMD_ABORTED:
  1172. dev_warn(d, "cp %p was aborted\n", cp);
  1173. break;
  1174. case CMD_ABORT_FAILED:
  1175. dev_warn(d, "cp %p reports abort failed\n", cp);
  1176. break;
  1177. case CMD_UNSOLICITED_ABORT:
  1178. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1179. break;
  1180. case CMD_TIMEOUT:
  1181. dev_warn(d, "cp %p timed out\n", cp);
  1182. break;
  1183. default:
  1184. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1185. ei->CommandStatus);
  1186. }
  1187. }
  1188. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1189. unsigned char page, unsigned char *buf,
  1190. unsigned char bufsize)
  1191. {
  1192. int rc = IO_OK;
  1193. struct CommandList *c;
  1194. struct ErrorInfo *ei;
  1195. c = cmd_special_alloc(h);
  1196. if (c == NULL) { /* trouble... */
  1197. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1198. return -ENOMEM;
  1199. }
  1200. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1201. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1202. ei = c->err_info;
  1203. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1204. hpsa_scsi_interpret_error(c);
  1205. rc = -1;
  1206. }
  1207. cmd_special_free(h, c);
  1208. return rc;
  1209. }
  1210. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1211. {
  1212. int rc = IO_OK;
  1213. struct CommandList *c;
  1214. struct ErrorInfo *ei;
  1215. c = cmd_special_alloc(h);
  1216. if (c == NULL) { /* trouble... */
  1217. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1218. return -ENOMEM;
  1219. }
  1220. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1221. hpsa_scsi_do_simple_cmd_core(h, c);
  1222. /* no unmap needed here because no data xfer. */
  1223. ei = c->err_info;
  1224. if (ei->CommandStatus != 0) {
  1225. hpsa_scsi_interpret_error(c);
  1226. rc = -1;
  1227. }
  1228. cmd_special_free(h, c);
  1229. return rc;
  1230. }
  1231. static void hpsa_get_raid_level(struct ctlr_info *h,
  1232. unsigned char *scsi3addr, unsigned char *raid_level)
  1233. {
  1234. int rc;
  1235. unsigned char *buf;
  1236. *raid_level = RAID_UNKNOWN;
  1237. buf = kzalloc(64, GFP_KERNEL);
  1238. if (!buf)
  1239. return;
  1240. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1241. if (rc == 0)
  1242. *raid_level = buf[8];
  1243. if (*raid_level > RAID_UNKNOWN)
  1244. *raid_level = RAID_UNKNOWN;
  1245. kfree(buf);
  1246. return;
  1247. }
  1248. /* Get the device id from inquiry page 0x83 */
  1249. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1250. unsigned char *device_id, int buflen)
  1251. {
  1252. int rc;
  1253. unsigned char *buf;
  1254. if (buflen > 16)
  1255. buflen = 16;
  1256. buf = kzalloc(64, GFP_KERNEL);
  1257. if (!buf)
  1258. return -1;
  1259. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1260. if (rc == 0)
  1261. memcpy(device_id, &buf[8], buflen);
  1262. kfree(buf);
  1263. return rc != 0;
  1264. }
  1265. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1266. struct ReportLUNdata *buf, int bufsize,
  1267. int extended_response)
  1268. {
  1269. int rc = IO_OK;
  1270. struct CommandList *c;
  1271. unsigned char scsi3addr[8];
  1272. struct ErrorInfo *ei;
  1273. c = cmd_special_alloc(h);
  1274. if (c == NULL) { /* trouble... */
  1275. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1276. return -1;
  1277. }
  1278. /* address the controller */
  1279. memset(scsi3addr, 0, sizeof(scsi3addr));
  1280. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1281. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1282. if (extended_response)
  1283. c->Request.CDB[1] = extended_response;
  1284. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1285. ei = c->err_info;
  1286. if (ei->CommandStatus != 0 &&
  1287. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1288. hpsa_scsi_interpret_error(c);
  1289. rc = -1;
  1290. }
  1291. cmd_special_free(h, c);
  1292. return rc;
  1293. }
  1294. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1295. struct ReportLUNdata *buf,
  1296. int bufsize, int extended_response)
  1297. {
  1298. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1299. }
  1300. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1301. struct ReportLUNdata *buf, int bufsize)
  1302. {
  1303. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1304. }
  1305. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1306. int bus, int target, int lun)
  1307. {
  1308. device->bus = bus;
  1309. device->target = target;
  1310. device->lun = lun;
  1311. }
  1312. static int hpsa_update_device_info(struct ctlr_info *h,
  1313. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1314. {
  1315. #define OBDR_TAPE_INQ_SIZE 49
  1316. unsigned char *inq_buff;
  1317. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1318. if (!inq_buff)
  1319. goto bail_out;
  1320. /* Do an inquiry to the device to see what it is. */
  1321. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1322. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1323. /* Inquiry failed (msg printed already) */
  1324. dev_err(&h->pdev->dev,
  1325. "hpsa_update_device_info: inquiry failed\n");
  1326. goto bail_out;
  1327. }
  1328. this_device->devtype = (inq_buff[0] & 0x1f);
  1329. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1330. memcpy(this_device->vendor, &inq_buff[8],
  1331. sizeof(this_device->vendor));
  1332. memcpy(this_device->model, &inq_buff[16],
  1333. sizeof(this_device->model));
  1334. memcpy(this_device->revision, &inq_buff[32],
  1335. sizeof(this_device->revision));
  1336. memset(this_device->device_id, 0,
  1337. sizeof(this_device->device_id));
  1338. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1339. sizeof(this_device->device_id));
  1340. if (this_device->devtype == TYPE_DISK &&
  1341. is_logical_dev_addr_mode(scsi3addr))
  1342. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1343. else
  1344. this_device->raid_level = RAID_UNKNOWN;
  1345. kfree(inq_buff);
  1346. return 0;
  1347. bail_out:
  1348. kfree(inq_buff);
  1349. return 1;
  1350. }
  1351. static unsigned char *msa2xxx_model[] = {
  1352. "MSA2012",
  1353. "MSA2024",
  1354. "MSA2312",
  1355. "MSA2324",
  1356. NULL,
  1357. };
  1358. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1359. {
  1360. int i;
  1361. for (i = 0; msa2xxx_model[i]; i++)
  1362. if (strncmp(device->model, msa2xxx_model[i],
  1363. strlen(msa2xxx_model[i])) == 0)
  1364. return 1;
  1365. return 0;
  1366. }
  1367. /* Helper function to assign bus, target, lun mapping of devices.
  1368. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1369. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1370. * Logical drive target and lun are assigned at this time, but
  1371. * physical device lun and target assignment are deferred (assigned
  1372. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1373. */
  1374. static void figure_bus_target_lun(struct ctlr_info *h,
  1375. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1376. struct hpsa_scsi_dev_t *device)
  1377. {
  1378. u32 lunid;
  1379. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1380. /* logical device */
  1381. if (unlikely(is_scsi_rev_5(h))) {
  1382. /* p1210m, logical drives lun assignments
  1383. * match SCSI REPORT LUNS data.
  1384. */
  1385. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1386. *bus = 0;
  1387. *target = 0;
  1388. *lun = (lunid & 0x3fff) + 1;
  1389. } else {
  1390. /* not p1210m... */
  1391. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1392. if (is_msa2xxx(h, device)) {
  1393. /* msa2xxx way, put logicals on bus 1
  1394. * and match target/lun numbers box
  1395. * reports.
  1396. */
  1397. *bus = 1;
  1398. *target = (lunid >> 16) & 0x3fff;
  1399. *lun = lunid & 0x00ff;
  1400. } else {
  1401. /* Traditional smart array way. */
  1402. *bus = 0;
  1403. *lun = 0;
  1404. *target = lunid & 0x3fff;
  1405. }
  1406. }
  1407. } else {
  1408. /* physical device */
  1409. if (is_hba_lunid(lunaddrbytes))
  1410. if (unlikely(is_scsi_rev_5(h))) {
  1411. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1412. *target = 0;
  1413. *lun = 0;
  1414. return;
  1415. } else
  1416. *bus = 3; /* traditional smartarray */
  1417. else
  1418. *bus = 2; /* physical disk */
  1419. *target = -1;
  1420. *lun = -1; /* we will fill these in later. */
  1421. }
  1422. }
  1423. /*
  1424. * If there is no lun 0 on a target, linux won't find any devices.
  1425. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1426. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1427. * it for some reason. *tmpdevice is the target we're adding,
  1428. * this_device is a pointer into the current element of currentsd[]
  1429. * that we're building up in update_scsi_devices(), below.
  1430. * lunzerobits is a bitmap that tracks which targets already have a
  1431. * lun 0 assigned.
  1432. * Returns 1 if an enclosure was added, 0 if not.
  1433. */
  1434. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1435. struct hpsa_scsi_dev_t *tmpdevice,
  1436. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1437. int bus, int target, int lun, unsigned long lunzerobits[],
  1438. int *nmsa2xxx_enclosures)
  1439. {
  1440. unsigned char scsi3addr[8];
  1441. if (test_bit(target, lunzerobits))
  1442. return 0; /* There is already a lun 0 on this target. */
  1443. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1444. return 0; /* It's the logical targets that may lack lun 0. */
  1445. if (!is_msa2xxx(h, tmpdevice))
  1446. return 0; /* It's only the MSA2xxx that have this problem. */
  1447. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1448. return 0;
  1449. if (is_hba_lunid(scsi3addr))
  1450. return 0; /* Don't add the RAID controller here. */
  1451. if (is_scsi_rev_5(h))
  1452. return 0; /* p1210m doesn't need to do this. */
  1453. #define MAX_MSA2XXX_ENCLOSURES 32
  1454. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1455. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1456. "enclosures exceeded. Check your hardware "
  1457. "configuration.");
  1458. return 0;
  1459. }
  1460. memset(scsi3addr, 0, 8);
  1461. scsi3addr[3] = target;
  1462. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1463. return 0;
  1464. (*nmsa2xxx_enclosures)++;
  1465. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1466. set_bit(target, lunzerobits);
  1467. return 1;
  1468. }
  1469. /*
  1470. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1471. * logdev. The number of luns in physdev and logdev are returned in
  1472. * *nphysicals and *nlogicals, respectively.
  1473. * Returns 0 on success, -1 otherwise.
  1474. */
  1475. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1476. int reportlunsize,
  1477. struct ReportLUNdata *physdev, u32 *nphysicals,
  1478. struct ReportLUNdata *logdev, u32 *nlogicals)
  1479. {
  1480. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1481. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1482. return -1;
  1483. }
  1484. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1485. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1486. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1487. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1488. *nphysicals - HPSA_MAX_PHYS_LUN);
  1489. *nphysicals = HPSA_MAX_PHYS_LUN;
  1490. }
  1491. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1492. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1493. return -1;
  1494. }
  1495. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1496. /* Reject Logicals in excess of our max capability. */
  1497. if (*nlogicals > HPSA_MAX_LUN) {
  1498. dev_warn(&h->pdev->dev,
  1499. "maximum logical LUNs (%d) exceeded. "
  1500. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1501. *nlogicals - HPSA_MAX_LUN);
  1502. *nlogicals = HPSA_MAX_LUN;
  1503. }
  1504. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1505. dev_warn(&h->pdev->dev,
  1506. "maximum logical + physical LUNs (%d) exceeded. "
  1507. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1508. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1509. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1510. }
  1511. return 0;
  1512. }
  1513. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1514. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1515. struct ReportLUNdata *logdev_list)
  1516. {
  1517. /* Helper function, figure out where the LUN ID info is coming from
  1518. * given index i, lists of physical and logical devices, where in
  1519. * the list the raid controller is supposed to appear (first or last)
  1520. */
  1521. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1522. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1523. if (i == raid_ctlr_position)
  1524. return RAID_CTLR_LUNID;
  1525. if (i < logicals_start)
  1526. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1527. if (i < last_device)
  1528. return &logdev_list->LUN[i - nphysicals -
  1529. (raid_ctlr_position == 0)][0];
  1530. BUG();
  1531. return NULL;
  1532. }
  1533. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1534. {
  1535. /* the idea here is we could get notified
  1536. * that some devices have changed, so we do a report
  1537. * physical luns and report logical luns cmd, and adjust
  1538. * our list of devices accordingly.
  1539. *
  1540. * The scsi3addr's of devices won't change so long as the
  1541. * adapter is not reset. That means we can rescan and
  1542. * tell which devices we already know about, vs. new
  1543. * devices, vs. disappearing devices.
  1544. */
  1545. struct ReportLUNdata *physdev_list = NULL;
  1546. struct ReportLUNdata *logdev_list = NULL;
  1547. unsigned char *inq_buff = NULL;
  1548. u32 nphysicals = 0;
  1549. u32 nlogicals = 0;
  1550. u32 ndev_allocated = 0;
  1551. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1552. int ncurrent = 0;
  1553. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1554. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1555. int bus, target, lun;
  1556. int raid_ctlr_position;
  1557. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1558. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1559. GFP_KERNEL);
  1560. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1561. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1562. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1563. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1564. if (!currentsd || !physdev_list || !logdev_list ||
  1565. !inq_buff || !tmpdevice) {
  1566. dev_err(&h->pdev->dev, "out of memory\n");
  1567. goto out;
  1568. }
  1569. memset(lunzerobits, 0, sizeof(lunzerobits));
  1570. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1571. logdev_list, &nlogicals))
  1572. goto out;
  1573. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1574. * but each of them 4 times through different paths. The plus 1
  1575. * is for the RAID controller.
  1576. */
  1577. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1578. /* Allocate the per device structures */
  1579. for (i = 0; i < ndevs_to_allocate; i++) {
  1580. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1581. if (!currentsd[i]) {
  1582. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1583. __FILE__, __LINE__);
  1584. goto out;
  1585. }
  1586. ndev_allocated++;
  1587. }
  1588. if (unlikely(is_scsi_rev_5(h)))
  1589. raid_ctlr_position = 0;
  1590. else
  1591. raid_ctlr_position = nphysicals + nlogicals;
  1592. /* adjust our table of devices */
  1593. nmsa2xxx_enclosures = 0;
  1594. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1595. u8 *lunaddrbytes;
  1596. /* Figure out where the LUN ID info is coming from */
  1597. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1598. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1599. /* skip masked physical devices. */
  1600. if (lunaddrbytes[3] & 0xC0 &&
  1601. i < nphysicals + (raid_ctlr_position == 0))
  1602. continue;
  1603. /* Get device type, vendor, model, device id */
  1604. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1605. continue; /* skip it if we can't talk to it. */
  1606. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1607. tmpdevice);
  1608. this_device = currentsd[ncurrent];
  1609. /*
  1610. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1611. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1612. * is nonetheless an enclosure device there. We have to
  1613. * present that otherwise linux won't find anything if
  1614. * there is no lun 0.
  1615. */
  1616. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1617. lunaddrbytes, bus, target, lun, lunzerobits,
  1618. &nmsa2xxx_enclosures)) {
  1619. ncurrent++;
  1620. this_device = currentsd[ncurrent];
  1621. }
  1622. *this_device = *tmpdevice;
  1623. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1624. switch (this_device->devtype) {
  1625. case TYPE_ROM: {
  1626. /* We don't *really* support actual CD-ROM devices,
  1627. * just "One Button Disaster Recovery" tape drive
  1628. * which temporarily pretends to be a CD-ROM drive.
  1629. * So we check that the device is really an OBDR tape
  1630. * device by checking for "$DR-10" in bytes 43-48 of
  1631. * the inquiry data.
  1632. */
  1633. char obdr_sig[7];
  1634. #define OBDR_TAPE_SIG "$DR-10"
  1635. strncpy(obdr_sig, &inq_buff[43], 6);
  1636. obdr_sig[6] = '\0';
  1637. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1638. /* Not OBDR device, ignore it. */
  1639. break;
  1640. }
  1641. ncurrent++;
  1642. break;
  1643. case TYPE_DISK:
  1644. if (i < nphysicals)
  1645. break;
  1646. ncurrent++;
  1647. break;
  1648. case TYPE_TAPE:
  1649. case TYPE_MEDIUM_CHANGER:
  1650. ncurrent++;
  1651. break;
  1652. case TYPE_RAID:
  1653. /* Only present the Smartarray HBA as a RAID controller.
  1654. * If it's a RAID controller other than the HBA itself
  1655. * (an external RAID controller, MSA500 or similar)
  1656. * don't present it.
  1657. */
  1658. if (!is_hba_lunid(lunaddrbytes))
  1659. break;
  1660. ncurrent++;
  1661. break;
  1662. default:
  1663. break;
  1664. }
  1665. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1666. break;
  1667. }
  1668. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1669. out:
  1670. kfree(tmpdevice);
  1671. for (i = 0; i < ndev_allocated; i++)
  1672. kfree(currentsd[i]);
  1673. kfree(currentsd);
  1674. kfree(inq_buff);
  1675. kfree(physdev_list);
  1676. kfree(logdev_list);
  1677. }
  1678. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1679. * dma mapping and fills in the scatter gather entries of the
  1680. * hpsa command, cp.
  1681. */
  1682. static int hpsa_scatter_gather(struct ctlr_info *h,
  1683. struct CommandList *cp,
  1684. struct scsi_cmnd *cmd)
  1685. {
  1686. unsigned int len;
  1687. struct scatterlist *sg;
  1688. u64 addr64;
  1689. int use_sg, i, sg_index, chained;
  1690. struct SGDescriptor *curr_sg;
  1691. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1692. use_sg = scsi_dma_map(cmd);
  1693. if (use_sg < 0)
  1694. return use_sg;
  1695. if (!use_sg)
  1696. goto sglist_finished;
  1697. curr_sg = cp->SG;
  1698. chained = 0;
  1699. sg_index = 0;
  1700. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1701. if (i == h->max_cmd_sg_entries - 1 &&
  1702. use_sg > h->max_cmd_sg_entries) {
  1703. chained = 1;
  1704. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1705. sg_index = 0;
  1706. }
  1707. addr64 = (u64) sg_dma_address(sg);
  1708. len = sg_dma_len(sg);
  1709. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1710. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1711. curr_sg->Len = len;
  1712. curr_sg->Ext = 0; /* we are not chaining */
  1713. curr_sg++;
  1714. }
  1715. if (use_sg + chained > h->maxSG)
  1716. h->maxSG = use_sg + chained;
  1717. if (chained) {
  1718. cp->Header.SGList = h->max_cmd_sg_entries;
  1719. cp->Header.SGTotal = (u16) (use_sg + 1);
  1720. hpsa_map_sg_chain_block(h, cp);
  1721. return 0;
  1722. }
  1723. sglist_finished:
  1724. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1725. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1726. return 0;
  1727. }
  1728. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1729. void (*done)(struct scsi_cmnd *))
  1730. {
  1731. struct ctlr_info *h;
  1732. struct hpsa_scsi_dev_t *dev;
  1733. unsigned char scsi3addr[8];
  1734. struct CommandList *c;
  1735. unsigned long flags;
  1736. /* Get the ptr to our adapter structure out of cmd->host. */
  1737. h = sdev_to_hba(cmd->device);
  1738. dev = cmd->device->hostdata;
  1739. if (!dev) {
  1740. cmd->result = DID_NO_CONNECT << 16;
  1741. done(cmd);
  1742. return 0;
  1743. }
  1744. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1745. /* Need a lock as this is being allocated from the pool */
  1746. spin_lock_irqsave(&h->lock, flags);
  1747. c = cmd_alloc(h);
  1748. spin_unlock_irqrestore(&h->lock, flags);
  1749. if (c == NULL) { /* trouble... */
  1750. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1751. return SCSI_MLQUEUE_HOST_BUSY;
  1752. }
  1753. /* Fill in the command list header */
  1754. cmd->scsi_done = done; /* save this for use by completion code */
  1755. /* save c in case we have to abort it */
  1756. cmd->host_scribble = (unsigned char *) c;
  1757. c->cmd_type = CMD_SCSI;
  1758. c->scsi_cmd = cmd;
  1759. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1760. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1761. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1762. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1763. /* Fill in the request block... */
  1764. c->Request.Timeout = 0;
  1765. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1766. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1767. c->Request.CDBLen = cmd->cmd_len;
  1768. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1769. c->Request.Type.Type = TYPE_CMD;
  1770. c->Request.Type.Attribute = ATTR_SIMPLE;
  1771. switch (cmd->sc_data_direction) {
  1772. case DMA_TO_DEVICE:
  1773. c->Request.Type.Direction = XFER_WRITE;
  1774. break;
  1775. case DMA_FROM_DEVICE:
  1776. c->Request.Type.Direction = XFER_READ;
  1777. break;
  1778. case DMA_NONE:
  1779. c->Request.Type.Direction = XFER_NONE;
  1780. break;
  1781. case DMA_BIDIRECTIONAL:
  1782. /* This can happen if a buggy application does a scsi passthru
  1783. * and sets both inlen and outlen to non-zero. ( see
  1784. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1785. */
  1786. c->Request.Type.Direction = XFER_RSVD;
  1787. /* This is technically wrong, and hpsa controllers should
  1788. * reject it with CMD_INVALID, which is the most correct
  1789. * response, but non-fibre backends appear to let it
  1790. * slide by, and give the same results as if this field
  1791. * were set correctly. Either way is acceptable for
  1792. * our purposes here.
  1793. */
  1794. break;
  1795. default:
  1796. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1797. cmd->sc_data_direction);
  1798. BUG();
  1799. break;
  1800. }
  1801. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1802. cmd_free(h, c);
  1803. return SCSI_MLQUEUE_HOST_BUSY;
  1804. }
  1805. enqueue_cmd_and_start_io(h, c);
  1806. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1807. return 0;
  1808. }
  1809. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1810. static void hpsa_scan_start(struct Scsi_Host *sh)
  1811. {
  1812. struct ctlr_info *h = shost_to_hba(sh);
  1813. unsigned long flags;
  1814. /* wait until any scan already in progress is finished. */
  1815. while (1) {
  1816. spin_lock_irqsave(&h->scan_lock, flags);
  1817. if (h->scan_finished)
  1818. break;
  1819. spin_unlock_irqrestore(&h->scan_lock, flags);
  1820. wait_event(h->scan_wait_queue, h->scan_finished);
  1821. /* Note: We don't need to worry about a race between this
  1822. * thread and driver unload because the midlayer will
  1823. * have incremented the reference count, so unload won't
  1824. * happen if we're in here.
  1825. */
  1826. }
  1827. h->scan_finished = 0; /* mark scan as in progress */
  1828. spin_unlock_irqrestore(&h->scan_lock, flags);
  1829. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1830. spin_lock_irqsave(&h->scan_lock, flags);
  1831. h->scan_finished = 1; /* mark scan as finished. */
  1832. wake_up_all(&h->scan_wait_queue);
  1833. spin_unlock_irqrestore(&h->scan_lock, flags);
  1834. }
  1835. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1836. unsigned long elapsed_time)
  1837. {
  1838. struct ctlr_info *h = shost_to_hba(sh);
  1839. unsigned long flags;
  1840. int finished;
  1841. spin_lock_irqsave(&h->scan_lock, flags);
  1842. finished = h->scan_finished;
  1843. spin_unlock_irqrestore(&h->scan_lock, flags);
  1844. return finished;
  1845. }
  1846. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1847. int qdepth, int reason)
  1848. {
  1849. struct ctlr_info *h = sdev_to_hba(sdev);
  1850. if (reason != SCSI_QDEPTH_DEFAULT)
  1851. return -ENOTSUPP;
  1852. if (qdepth < 1)
  1853. qdepth = 1;
  1854. else
  1855. if (qdepth > h->nr_cmds)
  1856. qdepth = h->nr_cmds;
  1857. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1858. return sdev->queue_depth;
  1859. }
  1860. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1861. {
  1862. /* we are being forcibly unloaded, and may not refuse. */
  1863. scsi_remove_host(h->scsi_host);
  1864. scsi_host_put(h->scsi_host);
  1865. h->scsi_host = NULL;
  1866. }
  1867. static int hpsa_register_scsi(struct ctlr_info *h)
  1868. {
  1869. int rc;
  1870. rc = hpsa_scsi_detect(h);
  1871. if (rc != 0)
  1872. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1873. " hpsa_scsi_detect(), rc is %d\n", rc);
  1874. return rc;
  1875. }
  1876. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1877. unsigned char lunaddr[])
  1878. {
  1879. int rc = 0;
  1880. int count = 0;
  1881. int waittime = 1; /* seconds */
  1882. struct CommandList *c;
  1883. c = cmd_special_alloc(h);
  1884. if (!c) {
  1885. dev_warn(&h->pdev->dev, "out of memory in "
  1886. "wait_for_device_to_become_ready.\n");
  1887. return IO_ERROR;
  1888. }
  1889. /* Send test unit ready until device ready, or give up. */
  1890. while (count < HPSA_TUR_RETRY_LIMIT) {
  1891. /* Wait for a bit. do this first, because if we send
  1892. * the TUR right away, the reset will just abort it.
  1893. */
  1894. msleep(1000 * waittime);
  1895. count++;
  1896. /* Increase wait time with each try, up to a point. */
  1897. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1898. waittime = waittime * 2;
  1899. /* Send the Test Unit Ready */
  1900. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1901. hpsa_scsi_do_simple_cmd_core(h, c);
  1902. /* no unmap needed here because no data xfer. */
  1903. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1904. break;
  1905. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1906. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1907. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1908. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1909. break;
  1910. dev_warn(&h->pdev->dev, "waiting %d secs "
  1911. "for device to become ready.\n", waittime);
  1912. rc = 1; /* device not ready. */
  1913. }
  1914. if (rc)
  1915. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1916. else
  1917. dev_warn(&h->pdev->dev, "device is ready.\n");
  1918. cmd_special_free(h, c);
  1919. return rc;
  1920. }
  1921. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1922. * complaining. Doing a host- or bus-reset can't do anything good here.
  1923. */
  1924. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1925. {
  1926. int rc;
  1927. struct ctlr_info *h;
  1928. struct hpsa_scsi_dev_t *dev;
  1929. /* find the controller to which the command to be aborted was sent */
  1930. h = sdev_to_hba(scsicmd->device);
  1931. if (h == NULL) /* paranoia */
  1932. return FAILED;
  1933. dev = scsicmd->device->hostdata;
  1934. if (!dev) {
  1935. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1936. "device lookup failed.\n");
  1937. return FAILED;
  1938. }
  1939. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1940. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1941. /* send a reset to the SCSI LUN which the command was sent to */
  1942. rc = hpsa_send_reset(h, dev->scsi3addr);
  1943. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1944. return SUCCESS;
  1945. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1946. return FAILED;
  1947. }
  1948. /*
  1949. * For operations that cannot sleep, a command block is allocated at init,
  1950. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1951. * which ones are free or in use. Lock must be held when calling this.
  1952. * cmd_free() is the complement.
  1953. */
  1954. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1955. {
  1956. struct CommandList *c;
  1957. int i;
  1958. union u64bit temp64;
  1959. dma_addr_t cmd_dma_handle, err_dma_handle;
  1960. do {
  1961. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1962. if (i == h->nr_cmds)
  1963. return NULL;
  1964. } while (test_and_set_bit
  1965. (i & (BITS_PER_LONG - 1),
  1966. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1967. c = h->cmd_pool + i;
  1968. memset(c, 0, sizeof(*c));
  1969. cmd_dma_handle = h->cmd_pool_dhandle
  1970. + i * sizeof(*c);
  1971. c->err_info = h->errinfo_pool + i;
  1972. memset(c->err_info, 0, sizeof(*c->err_info));
  1973. err_dma_handle = h->errinfo_pool_dhandle
  1974. + i * sizeof(*c->err_info);
  1975. h->nr_allocs++;
  1976. c->cmdindex = i;
  1977. INIT_HLIST_NODE(&c->list);
  1978. c->busaddr = (u32) cmd_dma_handle;
  1979. temp64.val = (u64) err_dma_handle;
  1980. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1981. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1982. c->ErrDesc.Len = sizeof(*c->err_info);
  1983. c->h = h;
  1984. return c;
  1985. }
  1986. /* For operations that can wait for kmalloc to possibly sleep,
  1987. * this routine can be called. Lock need not be held to call
  1988. * cmd_special_alloc. cmd_special_free() is the complement.
  1989. */
  1990. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1991. {
  1992. struct CommandList *c;
  1993. union u64bit temp64;
  1994. dma_addr_t cmd_dma_handle, err_dma_handle;
  1995. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  1996. if (c == NULL)
  1997. return NULL;
  1998. memset(c, 0, sizeof(*c));
  1999. c->cmdindex = -1;
  2000. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2001. &err_dma_handle);
  2002. if (c->err_info == NULL) {
  2003. pci_free_consistent(h->pdev,
  2004. sizeof(*c), c, cmd_dma_handle);
  2005. return NULL;
  2006. }
  2007. memset(c->err_info, 0, sizeof(*c->err_info));
  2008. INIT_HLIST_NODE(&c->list);
  2009. c->busaddr = (u32) cmd_dma_handle;
  2010. temp64.val = (u64) err_dma_handle;
  2011. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2012. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2013. c->ErrDesc.Len = sizeof(*c->err_info);
  2014. c->h = h;
  2015. return c;
  2016. }
  2017. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2018. {
  2019. int i;
  2020. i = c - h->cmd_pool;
  2021. clear_bit(i & (BITS_PER_LONG - 1),
  2022. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2023. h->nr_frees++;
  2024. }
  2025. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2026. {
  2027. union u64bit temp64;
  2028. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2029. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2030. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2031. c->err_info, (dma_addr_t) temp64.val);
  2032. pci_free_consistent(h->pdev, sizeof(*c),
  2033. c, (dma_addr_t) c->busaddr);
  2034. }
  2035. #ifdef CONFIG_COMPAT
  2036. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2037. {
  2038. IOCTL32_Command_struct __user *arg32 =
  2039. (IOCTL32_Command_struct __user *) arg;
  2040. IOCTL_Command_struct arg64;
  2041. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2042. int err;
  2043. u32 cp;
  2044. err = 0;
  2045. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2046. sizeof(arg64.LUN_info));
  2047. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2048. sizeof(arg64.Request));
  2049. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2050. sizeof(arg64.error_info));
  2051. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2052. err |= get_user(cp, &arg32->buf);
  2053. arg64.buf = compat_ptr(cp);
  2054. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2055. if (err)
  2056. return -EFAULT;
  2057. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2058. if (err)
  2059. return err;
  2060. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2061. sizeof(arg32->error_info));
  2062. if (err)
  2063. return -EFAULT;
  2064. return err;
  2065. }
  2066. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2067. int cmd, void *arg)
  2068. {
  2069. BIG_IOCTL32_Command_struct __user *arg32 =
  2070. (BIG_IOCTL32_Command_struct __user *) arg;
  2071. BIG_IOCTL_Command_struct arg64;
  2072. BIG_IOCTL_Command_struct __user *p =
  2073. compat_alloc_user_space(sizeof(arg64));
  2074. int err;
  2075. u32 cp;
  2076. err = 0;
  2077. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2078. sizeof(arg64.LUN_info));
  2079. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2080. sizeof(arg64.Request));
  2081. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2082. sizeof(arg64.error_info));
  2083. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2084. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2085. err |= get_user(cp, &arg32->buf);
  2086. arg64.buf = compat_ptr(cp);
  2087. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2088. if (err)
  2089. return -EFAULT;
  2090. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2091. if (err)
  2092. return err;
  2093. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2094. sizeof(arg32->error_info));
  2095. if (err)
  2096. return -EFAULT;
  2097. return err;
  2098. }
  2099. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2100. {
  2101. switch (cmd) {
  2102. case CCISS_GETPCIINFO:
  2103. case CCISS_GETINTINFO:
  2104. case CCISS_SETINTINFO:
  2105. case CCISS_GETNODENAME:
  2106. case CCISS_SETNODENAME:
  2107. case CCISS_GETHEARTBEAT:
  2108. case CCISS_GETBUSTYPES:
  2109. case CCISS_GETFIRMVER:
  2110. case CCISS_GETDRIVVER:
  2111. case CCISS_REVALIDVOLS:
  2112. case CCISS_DEREGDISK:
  2113. case CCISS_REGNEWDISK:
  2114. case CCISS_REGNEWD:
  2115. case CCISS_RESCANDISK:
  2116. case CCISS_GETLUNINFO:
  2117. return hpsa_ioctl(dev, cmd, arg);
  2118. case CCISS_PASSTHRU32:
  2119. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2120. case CCISS_BIG_PASSTHRU32:
  2121. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2122. default:
  2123. return -ENOIOCTLCMD;
  2124. }
  2125. }
  2126. #endif
  2127. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2128. {
  2129. struct hpsa_pci_info pciinfo;
  2130. if (!argp)
  2131. return -EINVAL;
  2132. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2133. pciinfo.bus = h->pdev->bus->number;
  2134. pciinfo.dev_fn = h->pdev->devfn;
  2135. pciinfo.board_id = h->board_id;
  2136. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2137. return -EFAULT;
  2138. return 0;
  2139. }
  2140. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2141. {
  2142. DriverVer_type DriverVer;
  2143. unsigned char vmaj, vmin, vsubmin;
  2144. int rc;
  2145. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2146. &vmaj, &vmin, &vsubmin);
  2147. if (rc != 3) {
  2148. dev_info(&h->pdev->dev, "driver version string '%s' "
  2149. "unrecognized.", HPSA_DRIVER_VERSION);
  2150. vmaj = 0;
  2151. vmin = 0;
  2152. vsubmin = 0;
  2153. }
  2154. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2155. if (!argp)
  2156. return -EINVAL;
  2157. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2158. return -EFAULT;
  2159. return 0;
  2160. }
  2161. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2162. {
  2163. IOCTL_Command_struct iocommand;
  2164. struct CommandList *c;
  2165. char *buff = NULL;
  2166. union u64bit temp64;
  2167. if (!argp)
  2168. return -EINVAL;
  2169. if (!capable(CAP_SYS_RAWIO))
  2170. return -EPERM;
  2171. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2172. return -EFAULT;
  2173. if ((iocommand.buf_size < 1) &&
  2174. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2175. return -EINVAL;
  2176. }
  2177. if (iocommand.buf_size > 0) {
  2178. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2179. if (buff == NULL)
  2180. return -EFAULT;
  2181. }
  2182. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2183. /* Copy the data into the buffer we created */
  2184. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  2185. kfree(buff);
  2186. return -EFAULT;
  2187. }
  2188. } else
  2189. memset(buff, 0, iocommand.buf_size);
  2190. c = cmd_special_alloc(h);
  2191. if (c == NULL) {
  2192. kfree(buff);
  2193. return -ENOMEM;
  2194. }
  2195. /* Fill in the command type */
  2196. c->cmd_type = CMD_IOCTL_PEND;
  2197. /* Fill in Command Header */
  2198. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2199. if (iocommand.buf_size > 0) { /* buffer to fill */
  2200. c->Header.SGList = 1;
  2201. c->Header.SGTotal = 1;
  2202. } else { /* no buffers to fill */
  2203. c->Header.SGList = 0;
  2204. c->Header.SGTotal = 0;
  2205. }
  2206. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2207. /* use the kernel address the cmd block for tag */
  2208. c->Header.Tag.lower = c->busaddr;
  2209. /* Fill in Request block */
  2210. memcpy(&c->Request, &iocommand.Request,
  2211. sizeof(c->Request));
  2212. /* Fill in the scatter gather information */
  2213. if (iocommand.buf_size > 0) {
  2214. temp64.val = pci_map_single(h->pdev, buff,
  2215. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2216. c->SG[0].Addr.lower = temp64.val32.lower;
  2217. c->SG[0].Addr.upper = temp64.val32.upper;
  2218. c->SG[0].Len = iocommand.buf_size;
  2219. c->SG[0].Ext = 0; /* we are not chaining*/
  2220. }
  2221. hpsa_scsi_do_simple_cmd_core(h, c);
  2222. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2223. check_ioctl_unit_attention(h, c);
  2224. /* Copy the error information out */
  2225. memcpy(&iocommand.error_info, c->err_info,
  2226. sizeof(iocommand.error_info));
  2227. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2228. kfree(buff);
  2229. cmd_special_free(h, c);
  2230. return -EFAULT;
  2231. }
  2232. if (iocommand.Request.Type.Direction == XFER_READ) {
  2233. /* Copy the data out of the buffer we created */
  2234. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2235. kfree(buff);
  2236. cmd_special_free(h, c);
  2237. return -EFAULT;
  2238. }
  2239. }
  2240. kfree(buff);
  2241. cmd_special_free(h, c);
  2242. return 0;
  2243. }
  2244. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2245. {
  2246. BIG_IOCTL_Command_struct *ioc;
  2247. struct CommandList *c;
  2248. unsigned char **buff = NULL;
  2249. int *buff_size = NULL;
  2250. union u64bit temp64;
  2251. BYTE sg_used = 0;
  2252. int status = 0;
  2253. int i;
  2254. u32 left;
  2255. u32 sz;
  2256. BYTE __user *data_ptr;
  2257. if (!argp)
  2258. return -EINVAL;
  2259. if (!capable(CAP_SYS_RAWIO))
  2260. return -EPERM;
  2261. ioc = (BIG_IOCTL_Command_struct *)
  2262. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2263. if (!ioc) {
  2264. status = -ENOMEM;
  2265. goto cleanup1;
  2266. }
  2267. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2268. status = -EFAULT;
  2269. goto cleanup1;
  2270. }
  2271. if ((ioc->buf_size < 1) &&
  2272. (ioc->Request.Type.Direction != XFER_NONE)) {
  2273. status = -EINVAL;
  2274. goto cleanup1;
  2275. }
  2276. /* Check kmalloc limits using all SGs */
  2277. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2278. status = -EINVAL;
  2279. goto cleanup1;
  2280. }
  2281. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2282. status = -EINVAL;
  2283. goto cleanup1;
  2284. }
  2285. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2286. if (!buff) {
  2287. status = -ENOMEM;
  2288. goto cleanup1;
  2289. }
  2290. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2291. if (!buff_size) {
  2292. status = -ENOMEM;
  2293. goto cleanup1;
  2294. }
  2295. left = ioc->buf_size;
  2296. data_ptr = ioc->buf;
  2297. while (left) {
  2298. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2299. buff_size[sg_used] = sz;
  2300. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2301. if (buff[sg_used] == NULL) {
  2302. status = -ENOMEM;
  2303. goto cleanup1;
  2304. }
  2305. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2306. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2307. status = -ENOMEM;
  2308. goto cleanup1;
  2309. }
  2310. } else
  2311. memset(buff[sg_used], 0, sz);
  2312. left -= sz;
  2313. data_ptr += sz;
  2314. sg_used++;
  2315. }
  2316. c = cmd_special_alloc(h);
  2317. if (c == NULL) {
  2318. status = -ENOMEM;
  2319. goto cleanup1;
  2320. }
  2321. c->cmd_type = CMD_IOCTL_PEND;
  2322. c->Header.ReplyQueue = 0;
  2323. if (ioc->buf_size > 0) {
  2324. c->Header.SGList = sg_used;
  2325. c->Header.SGTotal = sg_used;
  2326. } else {
  2327. c->Header.SGList = 0;
  2328. c->Header.SGTotal = 0;
  2329. }
  2330. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2331. c->Header.Tag.lower = c->busaddr;
  2332. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2333. if (ioc->buf_size > 0) {
  2334. int i;
  2335. for (i = 0; i < sg_used; i++) {
  2336. temp64.val = pci_map_single(h->pdev, buff[i],
  2337. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2338. c->SG[i].Addr.lower = temp64.val32.lower;
  2339. c->SG[i].Addr.upper = temp64.val32.upper;
  2340. c->SG[i].Len = buff_size[i];
  2341. /* we are not chaining */
  2342. c->SG[i].Ext = 0;
  2343. }
  2344. }
  2345. hpsa_scsi_do_simple_cmd_core(h, c);
  2346. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2347. check_ioctl_unit_attention(h, c);
  2348. /* Copy the error information out */
  2349. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2350. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2351. cmd_special_free(h, c);
  2352. status = -EFAULT;
  2353. goto cleanup1;
  2354. }
  2355. if (ioc->Request.Type.Direction == XFER_READ) {
  2356. /* Copy the data out of the buffer we created */
  2357. BYTE __user *ptr = ioc->buf;
  2358. for (i = 0; i < sg_used; i++) {
  2359. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2360. cmd_special_free(h, c);
  2361. status = -EFAULT;
  2362. goto cleanup1;
  2363. }
  2364. ptr += buff_size[i];
  2365. }
  2366. }
  2367. cmd_special_free(h, c);
  2368. status = 0;
  2369. cleanup1:
  2370. if (buff) {
  2371. for (i = 0; i < sg_used; i++)
  2372. kfree(buff[i]);
  2373. kfree(buff);
  2374. }
  2375. kfree(buff_size);
  2376. kfree(ioc);
  2377. return status;
  2378. }
  2379. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2380. struct CommandList *c)
  2381. {
  2382. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2383. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2384. (void) check_for_unit_attention(h, c);
  2385. }
  2386. /*
  2387. * ioctl
  2388. */
  2389. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2390. {
  2391. struct ctlr_info *h;
  2392. void __user *argp = (void __user *)arg;
  2393. h = sdev_to_hba(dev);
  2394. switch (cmd) {
  2395. case CCISS_DEREGDISK:
  2396. case CCISS_REGNEWDISK:
  2397. case CCISS_REGNEWD:
  2398. hpsa_scan_start(h->scsi_host);
  2399. return 0;
  2400. case CCISS_GETPCIINFO:
  2401. return hpsa_getpciinfo_ioctl(h, argp);
  2402. case CCISS_GETDRIVVER:
  2403. return hpsa_getdrivver_ioctl(h, argp);
  2404. case CCISS_PASSTHRU:
  2405. return hpsa_passthru_ioctl(h, argp);
  2406. case CCISS_BIG_PASSTHRU:
  2407. return hpsa_big_passthru_ioctl(h, argp);
  2408. default:
  2409. return -ENOTTY;
  2410. }
  2411. }
  2412. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2413. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2414. int cmd_type)
  2415. {
  2416. int pci_dir = XFER_NONE;
  2417. c->cmd_type = CMD_IOCTL_PEND;
  2418. c->Header.ReplyQueue = 0;
  2419. if (buff != NULL && size > 0) {
  2420. c->Header.SGList = 1;
  2421. c->Header.SGTotal = 1;
  2422. } else {
  2423. c->Header.SGList = 0;
  2424. c->Header.SGTotal = 0;
  2425. }
  2426. c->Header.Tag.lower = c->busaddr;
  2427. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2428. c->Request.Type.Type = cmd_type;
  2429. if (cmd_type == TYPE_CMD) {
  2430. switch (cmd) {
  2431. case HPSA_INQUIRY:
  2432. /* are we trying to read a vital product page */
  2433. if (page_code != 0) {
  2434. c->Request.CDB[1] = 0x01;
  2435. c->Request.CDB[2] = page_code;
  2436. }
  2437. c->Request.CDBLen = 6;
  2438. c->Request.Type.Attribute = ATTR_SIMPLE;
  2439. c->Request.Type.Direction = XFER_READ;
  2440. c->Request.Timeout = 0;
  2441. c->Request.CDB[0] = HPSA_INQUIRY;
  2442. c->Request.CDB[4] = size & 0xFF;
  2443. break;
  2444. case HPSA_REPORT_LOG:
  2445. case HPSA_REPORT_PHYS:
  2446. /* Talking to controller so It's a physical command
  2447. mode = 00 target = 0. Nothing to write.
  2448. */
  2449. c->Request.CDBLen = 12;
  2450. c->Request.Type.Attribute = ATTR_SIMPLE;
  2451. c->Request.Type.Direction = XFER_READ;
  2452. c->Request.Timeout = 0;
  2453. c->Request.CDB[0] = cmd;
  2454. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2455. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2456. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2457. c->Request.CDB[9] = size & 0xFF;
  2458. break;
  2459. case HPSA_CACHE_FLUSH:
  2460. c->Request.CDBLen = 12;
  2461. c->Request.Type.Attribute = ATTR_SIMPLE;
  2462. c->Request.Type.Direction = XFER_WRITE;
  2463. c->Request.Timeout = 0;
  2464. c->Request.CDB[0] = BMIC_WRITE;
  2465. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2466. break;
  2467. case TEST_UNIT_READY:
  2468. c->Request.CDBLen = 6;
  2469. c->Request.Type.Attribute = ATTR_SIMPLE;
  2470. c->Request.Type.Direction = XFER_NONE;
  2471. c->Request.Timeout = 0;
  2472. break;
  2473. default:
  2474. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2475. BUG();
  2476. return;
  2477. }
  2478. } else if (cmd_type == TYPE_MSG) {
  2479. switch (cmd) {
  2480. case HPSA_DEVICE_RESET_MSG:
  2481. c->Request.CDBLen = 16;
  2482. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2483. c->Request.Type.Attribute = ATTR_SIMPLE;
  2484. c->Request.Type.Direction = XFER_NONE;
  2485. c->Request.Timeout = 0; /* Don't time out */
  2486. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2487. c->Request.CDB[1] = 0x03; /* Reset target above */
  2488. /* If bytes 4-7 are zero, it means reset the */
  2489. /* LunID device */
  2490. c->Request.CDB[4] = 0x00;
  2491. c->Request.CDB[5] = 0x00;
  2492. c->Request.CDB[6] = 0x00;
  2493. c->Request.CDB[7] = 0x00;
  2494. break;
  2495. default:
  2496. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2497. cmd);
  2498. BUG();
  2499. }
  2500. } else {
  2501. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2502. BUG();
  2503. }
  2504. switch (c->Request.Type.Direction) {
  2505. case XFER_READ:
  2506. pci_dir = PCI_DMA_FROMDEVICE;
  2507. break;
  2508. case XFER_WRITE:
  2509. pci_dir = PCI_DMA_TODEVICE;
  2510. break;
  2511. case XFER_NONE:
  2512. pci_dir = PCI_DMA_NONE;
  2513. break;
  2514. default:
  2515. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2516. }
  2517. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2518. return;
  2519. }
  2520. /*
  2521. * Map (physical) PCI mem into (virtual) kernel space
  2522. */
  2523. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2524. {
  2525. ulong page_base = ((ulong) base) & PAGE_MASK;
  2526. ulong page_offs = ((ulong) base) - page_base;
  2527. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2528. return page_remapped ? (page_remapped + page_offs) : NULL;
  2529. }
  2530. /* Takes cmds off the submission queue and sends them to the hardware,
  2531. * then puts them on the queue of cmds waiting for completion.
  2532. */
  2533. static void start_io(struct ctlr_info *h)
  2534. {
  2535. struct CommandList *c;
  2536. while (!hlist_empty(&h->reqQ)) {
  2537. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2538. /* can't do anything if fifo is full */
  2539. if ((h->access.fifo_full(h))) {
  2540. dev_warn(&h->pdev->dev, "fifo full\n");
  2541. break;
  2542. }
  2543. /* Get the first entry from the Request Q */
  2544. removeQ(c);
  2545. h->Qdepth--;
  2546. /* Tell the controller execute command */
  2547. h->access.submit_command(h, c);
  2548. /* Put job onto the completed Q */
  2549. addQ(&h->cmpQ, c);
  2550. }
  2551. }
  2552. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2553. {
  2554. return h->access.command_completed(h);
  2555. }
  2556. static inline bool interrupt_pending(struct ctlr_info *h)
  2557. {
  2558. return h->access.intr_pending(h);
  2559. }
  2560. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2561. {
  2562. return (h->access.intr_pending(h) == 0) ||
  2563. (h->interrupts_enabled == 0);
  2564. }
  2565. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2566. u32 raw_tag)
  2567. {
  2568. if (unlikely(tag_index >= h->nr_cmds)) {
  2569. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2570. return 1;
  2571. }
  2572. return 0;
  2573. }
  2574. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2575. {
  2576. removeQ(c);
  2577. if (likely(c->cmd_type == CMD_SCSI))
  2578. complete_scsi_command(c, 0, raw_tag);
  2579. else if (c->cmd_type == CMD_IOCTL_PEND)
  2580. complete(c->waiting);
  2581. }
  2582. static inline u32 hpsa_tag_contains_index(u32 tag)
  2583. {
  2584. #define DIRECT_LOOKUP_BIT 0x10
  2585. return tag & DIRECT_LOOKUP_BIT;
  2586. }
  2587. static inline u32 hpsa_tag_to_index(u32 tag)
  2588. {
  2589. #define DIRECT_LOOKUP_SHIFT 5
  2590. return tag >> DIRECT_LOOKUP_SHIFT;
  2591. }
  2592. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2593. {
  2594. #define HPSA_ERROR_BITS 0x03
  2595. return tag & ~HPSA_ERROR_BITS;
  2596. }
  2597. /* process completion of an indexed ("direct lookup") command */
  2598. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2599. u32 raw_tag)
  2600. {
  2601. u32 tag_index;
  2602. struct CommandList *c;
  2603. tag_index = hpsa_tag_to_index(raw_tag);
  2604. if (bad_tag(h, tag_index, raw_tag))
  2605. return next_command(h);
  2606. c = h->cmd_pool + tag_index;
  2607. finish_cmd(c, raw_tag);
  2608. return next_command(h);
  2609. }
  2610. /* process completion of a non-indexed command */
  2611. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2612. u32 raw_tag)
  2613. {
  2614. u32 tag;
  2615. struct CommandList *c = NULL;
  2616. struct hlist_node *tmp;
  2617. tag = hpsa_tag_discard_error_bits(raw_tag);
  2618. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2619. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2620. finish_cmd(c, raw_tag);
  2621. return next_command(h);
  2622. }
  2623. }
  2624. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2625. return next_command(h);
  2626. }
  2627. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2628. {
  2629. struct ctlr_info *h = dev_id;
  2630. unsigned long flags;
  2631. u32 raw_tag;
  2632. if (interrupt_not_for_us(h))
  2633. return IRQ_NONE;
  2634. spin_lock_irqsave(&h->lock, flags);
  2635. while (interrupt_pending(h)) {
  2636. raw_tag = get_next_completion(h);
  2637. while (raw_tag != FIFO_EMPTY) {
  2638. if (hpsa_tag_contains_index(raw_tag))
  2639. raw_tag = process_indexed_cmd(h, raw_tag);
  2640. else
  2641. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2642. }
  2643. }
  2644. spin_unlock_irqrestore(&h->lock, flags);
  2645. return IRQ_HANDLED;
  2646. }
  2647. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2648. {
  2649. struct ctlr_info *h = dev_id;
  2650. unsigned long flags;
  2651. u32 raw_tag;
  2652. spin_lock_irqsave(&h->lock, flags);
  2653. raw_tag = get_next_completion(h);
  2654. while (raw_tag != FIFO_EMPTY) {
  2655. if (hpsa_tag_contains_index(raw_tag))
  2656. raw_tag = process_indexed_cmd(h, raw_tag);
  2657. else
  2658. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2659. }
  2660. spin_unlock_irqrestore(&h->lock, flags);
  2661. return IRQ_HANDLED;
  2662. }
  2663. /* Send a message CDB to the firmware. */
  2664. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2665. unsigned char type)
  2666. {
  2667. struct Command {
  2668. struct CommandListHeader CommandHeader;
  2669. struct RequestBlock Request;
  2670. struct ErrDescriptor ErrorDescriptor;
  2671. };
  2672. struct Command *cmd;
  2673. static const size_t cmd_sz = sizeof(*cmd) +
  2674. sizeof(cmd->ErrorDescriptor);
  2675. dma_addr_t paddr64;
  2676. uint32_t paddr32, tag;
  2677. void __iomem *vaddr;
  2678. int i, err;
  2679. vaddr = pci_ioremap_bar(pdev, 0);
  2680. if (vaddr == NULL)
  2681. return -ENOMEM;
  2682. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2683. * CCISS commands, so they must be allocated from the lower 4GiB of
  2684. * memory.
  2685. */
  2686. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2687. if (err) {
  2688. iounmap(vaddr);
  2689. return -ENOMEM;
  2690. }
  2691. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2692. if (cmd == NULL) {
  2693. iounmap(vaddr);
  2694. return -ENOMEM;
  2695. }
  2696. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2697. * although there's no guarantee, we assume that the address is at
  2698. * least 4-byte aligned (most likely, it's page-aligned).
  2699. */
  2700. paddr32 = paddr64;
  2701. cmd->CommandHeader.ReplyQueue = 0;
  2702. cmd->CommandHeader.SGList = 0;
  2703. cmd->CommandHeader.SGTotal = 0;
  2704. cmd->CommandHeader.Tag.lower = paddr32;
  2705. cmd->CommandHeader.Tag.upper = 0;
  2706. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2707. cmd->Request.CDBLen = 16;
  2708. cmd->Request.Type.Type = TYPE_MSG;
  2709. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2710. cmd->Request.Type.Direction = XFER_NONE;
  2711. cmd->Request.Timeout = 0; /* Don't time out */
  2712. cmd->Request.CDB[0] = opcode;
  2713. cmd->Request.CDB[1] = type;
  2714. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2715. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2716. cmd->ErrorDescriptor.Addr.upper = 0;
  2717. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2718. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2719. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2720. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2721. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2722. break;
  2723. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2724. }
  2725. iounmap(vaddr);
  2726. /* we leak the DMA buffer here ... no choice since the controller could
  2727. * still complete the command.
  2728. */
  2729. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2730. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2731. opcode, type);
  2732. return -ETIMEDOUT;
  2733. }
  2734. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2735. if (tag & HPSA_ERROR_BIT) {
  2736. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2737. opcode, type);
  2738. return -EIO;
  2739. }
  2740. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2741. opcode, type);
  2742. return 0;
  2743. }
  2744. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2745. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2746. static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
  2747. {
  2748. /* the #defines are stolen from drivers/pci/msi.h. */
  2749. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  2750. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  2751. int pos;
  2752. u16 control = 0;
  2753. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  2754. if (pos) {
  2755. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2756. if (control & PCI_MSI_FLAGS_ENABLE) {
  2757. dev_info(&pdev->dev, "resetting MSI\n");
  2758. pci_write_config_word(pdev, msi_control_reg(pos),
  2759. control & ~PCI_MSI_FLAGS_ENABLE);
  2760. }
  2761. }
  2762. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  2763. if (pos) {
  2764. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2765. if (control & PCI_MSIX_FLAGS_ENABLE) {
  2766. dev_info(&pdev->dev, "resetting MSI-X\n");
  2767. pci_write_config_word(pdev, msi_control_reg(pos),
  2768. control & ~PCI_MSIX_FLAGS_ENABLE);
  2769. }
  2770. }
  2771. return 0;
  2772. }
  2773. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2774. void * __iomem vaddr, bool use_doorbell)
  2775. {
  2776. u16 pmcsr;
  2777. int pos;
  2778. if (use_doorbell) {
  2779. /* For everything after the P600, the PCI power state method
  2780. * of resetting the controller doesn't work, so we have this
  2781. * other way using the doorbell register.
  2782. */
  2783. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2784. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  2785. msleep(1000);
  2786. } else { /* Try to do it the PCI power state way */
  2787. /* Quoting from the Open CISS Specification: "The Power
  2788. * Management Control/Status Register (CSR) controls the power
  2789. * state of the device. The normal operating state is D0,
  2790. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2791. * the controller, place the interface device in D3 then to D0,
  2792. * this causes a secondary PCI reset which will reset the
  2793. * controller." */
  2794. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2795. if (pos == 0) {
  2796. dev_err(&pdev->dev,
  2797. "hpsa_reset_controller: "
  2798. "PCI PM not supported\n");
  2799. return -ENODEV;
  2800. }
  2801. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2802. /* enter the D3hot power management state */
  2803. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2804. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2805. pmcsr |= PCI_D3hot;
  2806. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2807. msleep(500);
  2808. /* enter the D0 power management state */
  2809. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2810. pmcsr |= PCI_D0;
  2811. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2812. msleep(500);
  2813. }
  2814. return 0;
  2815. }
  2816. /* This does a hard reset of the controller using PCI power management
  2817. * states or the using the doorbell register.
  2818. */
  2819. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2820. {
  2821. u16 saved_config_space[32];
  2822. u64 cfg_offset;
  2823. u32 cfg_base_addr;
  2824. u64 cfg_base_addr_index;
  2825. void __iomem *vaddr;
  2826. unsigned long paddr;
  2827. u32 misc_fw_support, active_transport;
  2828. int rc, i;
  2829. struct CfgTable __iomem *cfgtable;
  2830. bool use_doorbell;
  2831. u32 board_id;
  2832. /* For controllers as old as the P600, this is very nearly
  2833. * the same thing as
  2834. *
  2835. * pci_save_state(pci_dev);
  2836. * pci_set_power_state(pci_dev, PCI_D3hot);
  2837. * pci_set_power_state(pci_dev, PCI_D0);
  2838. * pci_restore_state(pci_dev);
  2839. *
  2840. * but we can't use these nice canned kernel routines on
  2841. * kexec, because they also check the MSI/MSI-X state in PCI
  2842. * configuration space and do the wrong thing when it is
  2843. * set/cleared. Also, the pci_save/restore_state functions
  2844. * violate the ordering requirements for restoring the
  2845. * configuration space from the CCISS document (see the
  2846. * comment below). So we roll our own ....
  2847. *
  2848. * For controllers newer than the P600, the pci power state
  2849. * method of resetting doesn't work so we have another way
  2850. * using the doorbell register.
  2851. */
  2852. /* Exclude 640x boards. These are two pci devices in one slot
  2853. * which share a battery backed cache module. One controls the
  2854. * cache, the other accesses the cache through the one that controls
  2855. * it. If we reset the one controlling the cache, the other will
  2856. * likely not be happy. Just forbid resetting this conjoined mess.
  2857. * The 640x isn't really supported by hpsa anyway.
  2858. */
  2859. hpsa_lookup_board_id(pdev, &board_id);
  2860. if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
  2861. return -ENOTSUPP;
  2862. for (i = 0; i < 32; i++)
  2863. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  2864. /* find the first memory BAR, so we can find the cfg table */
  2865. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  2866. if (rc)
  2867. return rc;
  2868. vaddr = remap_pci_mem(paddr, 0x250);
  2869. if (!vaddr)
  2870. return -ENOMEM;
  2871. /* find cfgtable in order to check if reset via doorbell is supported */
  2872. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  2873. &cfg_base_addr_index, &cfg_offset);
  2874. if (rc)
  2875. goto unmap_vaddr;
  2876. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2877. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  2878. if (!cfgtable) {
  2879. rc = -ENOMEM;
  2880. goto unmap_vaddr;
  2881. }
  2882. /* If reset via doorbell register is supported, use that. */
  2883. misc_fw_support = readl(&cfgtable->misc_fw_support);
  2884. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  2885. /* The doorbell reset seems to cause lockups on some Smart
  2886. * Arrays (e.g. P410, P410i, maybe others). Until this is
  2887. * fixed or at least isolated, avoid the doorbell reset.
  2888. */
  2889. use_doorbell = 0;
  2890. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  2891. if (rc)
  2892. goto unmap_cfgtable;
  2893. /* Restore the PCI configuration space. The Open CISS
  2894. * Specification says, "Restore the PCI Configuration
  2895. * Registers, offsets 00h through 60h. It is important to
  2896. * restore the command register, 16-bits at offset 04h,
  2897. * last. Do not restore the configuration status register,
  2898. * 16-bits at offset 06h." Note that the offset is 2*i.
  2899. */
  2900. for (i = 0; i < 32; i++) {
  2901. if (i == 2 || i == 3)
  2902. continue;
  2903. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  2904. }
  2905. wmb();
  2906. pci_write_config_word(pdev, 4, saved_config_space[2]);
  2907. /* Some devices (notably the HP Smart Array 5i Controller)
  2908. need a little pause here */
  2909. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  2910. /* Controller should be in simple mode at this point. If it's not,
  2911. * It means we're on one of those controllers which doesn't support
  2912. * the doorbell reset method and on which the PCI power management reset
  2913. * method doesn't work (P800, for example.)
  2914. * In those cases, pretend the reset worked and hope for the best.
  2915. */
  2916. active_transport = readl(&cfgtable->TransportActive);
  2917. if (active_transport & PERFORMANT_MODE) {
  2918. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  2919. " proceeding anyway.\n");
  2920. rc = -ENOTSUPP;
  2921. }
  2922. unmap_cfgtable:
  2923. iounmap(cfgtable);
  2924. unmap_vaddr:
  2925. iounmap(vaddr);
  2926. return rc;
  2927. }
  2928. /*
  2929. * We cannot read the structure directly, for portability we must use
  2930. * the io functions.
  2931. * This is for debug only.
  2932. */
  2933. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2934. {
  2935. #ifdef HPSA_DEBUG
  2936. int i;
  2937. char temp_name[17];
  2938. dev_info(dev, "Controller Configuration information\n");
  2939. dev_info(dev, "------------------------------------\n");
  2940. for (i = 0; i < 4; i++)
  2941. temp_name[i] = readb(&(tb->Signature[i]));
  2942. temp_name[4] = '\0';
  2943. dev_info(dev, " Signature = %s\n", temp_name);
  2944. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2945. dev_info(dev, " Transport methods supported = 0x%x\n",
  2946. readl(&(tb->TransportSupport)));
  2947. dev_info(dev, " Transport methods active = 0x%x\n",
  2948. readl(&(tb->TransportActive)));
  2949. dev_info(dev, " Requested transport Method = 0x%x\n",
  2950. readl(&(tb->HostWrite.TransportRequest)));
  2951. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2952. readl(&(tb->HostWrite.CoalIntDelay)));
  2953. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2954. readl(&(tb->HostWrite.CoalIntCount)));
  2955. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2956. readl(&(tb->CmdsOutMax)));
  2957. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2958. for (i = 0; i < 16; i++)
  2959. temp_name[i] = readb(&(tb->ServerName[i]));
  2960. temp_name[16] = '\0';
  2961. dev_info(dev, " Server Name = %s\n", temp_name);
  2962. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2963. readl(&(tb->HeartBeat)));
  2964. #endif /* HPSA_DEBUG */
  2965. }
  2966. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2967. {
  2968. int i, offset, mem_type, bar_type;
  2969. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2970. return 0;
  2971. offset = 0;
  2972. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2973. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2974. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2975. offset += 4;
  2976. else {
  2977. mem_type = pci_resource_flags(pdev, i) &
  2978. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2979. switch (mem_type) {
  2980. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2981. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2982. offset += 4; /* 32 bit */
  2983. break;
  2984. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2985. offset += 8;
  2986. break;
  2987. default: /* reserved in PCI 2.2 */
  2988. dev_warn(&pdev->dev,
  2989. "base address is invalid\n");
  2990. return -1;
  2991. break;
  2992. }
  2993. }
  2994. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2995. return i + 1;
  2996. }
  2997. return -1;
  2998. }
  2999. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3000. * controllers that are capable. If not, we use IO-APIC mode.
  3001. */
  3002. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3003. {
  3004. #ifdef CONFIG_PCI_MSI
  3005. int err;
  3006. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3007. {0, 2}, {0, 3}
  3008. };
  3009. /* Some boards advertise MSI but don't really support it */
  3010. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3011. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3012. goto default_int_mode;
  3013. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3014. dev_info(&h->pdev->dev, "MSIX\n");
  3015. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3016. if (!err) {
  3017. h->intr[0] = hpsa_msix_entries[0].vector;
  3018. h->intr[1] = hpsa_msix_entries[1].vector;
  3019. h->intr[2] = hpsa_msix_entries[2].vector;
  3020. h->intr[3] = hpsa_msix_entries[3].vector;
  3021. h->msix_vector = 1;
  3022. return;
  3023. }
  3024. if (err > 0) {
  3025. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3026. "available\n", err);
  3027. goto default_int_mode;
  3028. } else {
  3029. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3030. err);
  3031. goto default_int_mode;
  3032. }
  3033. }
  3034. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3035. dev_info(&h->pdev->dev, "MSI\n");
  3036. if (!pci_enable_msi(h->pdev))
  3037. h->msi_vector = 1;
  3038. else
  3039. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3040. }
  3041. default_int_mode:
  3042. #endif /* CONFIG_PCI_MSI */
  3043. /* if we get here we're going to use the default interrupt mode */
  3044. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3045. }
  3046. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3047. {
  3048. int i;
  3049. u32 subsystem_vendor_id, subsystem_device_id;
  3050. subsystem_vendor_id = pdev->subsystem_vendor;
  3051. subsystem_device_id = pdev->subsystem_device;
  3052. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3053. subsystem_vendor_id;
  3054. for (i = 0; i < ARRAY_SIZE(products); i++)
  3055. if (*board_id == products[i].board_id)
  3056. return i;
  3057. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3058. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3059. !hpsa_allow_any) {
  3060. dev_warn(&pdev->dev, "unrecognized board ID: "
  3061. "0x%08x, ignoring.\n", *board_id);
  3062. return -ENODEV;
  3063. }
  3064. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3065. }
  3066. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3067. {
  3068. u16 command;
  3069. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3070. return ((command & PCI_COMMAND_MEMORY) == 0);
  3071. }
  3072. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3073. unsigned long *memory_bar)
  3074. {
  3075. int i;
  3076. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3077. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3078. /* addressing mode bits already removed */
  3079. *memory_bar = pci_resource_start(pdev, i);
  3080. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3081. *memory_bar);
  3082. return 0;
  3083. }
  3084. dev_warn(&pdev->dev, "no memory BAR found\n");
  3085. return -ENODEV;
  3086. }
  3087. static int __devinit hpsa_wait_for_board_ready(struct ctlr_info *h)
  3088. {
  3089. int i;
  3090. u32 scratchpad;
  3091. for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
  3092. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3093. if (scratchpad == HPSA_FIRMWARE_READY)
  3094. return 0;
  3095. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3096. }
  3097. dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
  3098. return -ENODEV;
  3099. }
  3100. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3101. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3102. u64 *cfg_offset)
  3103. {
  3104. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3105. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3106. *cfg_base_addr &= (u32) 0x0000ffff;
  3107. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3108. if (*cfg_base_addr_index == -1) {
  3109. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3110. return -ENODEV;
  3111. }
  3112. return 0;
  3113. }
  3114. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3115. {
  3116. u64 cfg_offset;
  3117. u32 cfg_base_addr;
  3118. u64 cfg_base_addr_index;
  3119. u32 trans_offset;
  3120. int rc;
  3121. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3122. &cfg_base_addr_index, &cfg_offset);
  3123. if (rc)
  3124. return rc;
  3125. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3126. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3127. if (!h->cfgtable)
  3128. return -ENOMEM;
  3129. /* Find performant mode table. */
  3130. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3131. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3132. cfg_base_addr_index)+cfg_offset+trans_offset,
  3133. sizeof(*h->transtable));
  3134. if (!h->transtable)
  3135. return -ENOMEM;
  3136. return 0;
  3137. }
  3138. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3139. {
  3140. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3141. if (h->max_commands < 16) {
  3142. dev_warn(&h->pdev->dev, "Controller reports "
  3143. "max supported commands of %d, an obvious lie. "
  3144. "Using 16. Ensure that firmware is up to date.\n",
  3145. h->max_commands);
  3146. h->max_commands = 16;
  3147. }
  3148. }
  3149. /* Interrogate the hardware for some limits:
  3150. * max commands, max SG elements without chaining, and with chaining,
  3151. * SG chain block size, etc.
  3152. */
  3153. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3154. {
  3155. hpsa_get_max_perf_mode_cmds(h);
  3156. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3157. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3158. /*
  3159. * Limit in-command s/g elements to 32 save dma'able memory.
  3160. * Howvever spec says if 0, use 31
  3161. */
  3162. h->max_cmd_sg_entries = 31;
  3163. if (h->maxsgentries > 512) {
  3164. h->max_cmd_sg_entries = 32;
  3165. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3166. h->maxsgentries--; /* save one for chain pointer */
  3167. } else {
  3168. h->maxsgentries = 31; /* default to traditional values */
  3169. h->chainsize = 0;
  3170. }
  3171. }
  3172. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3173. {
  3174. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3175. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3176. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3177. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3178. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3179. return false;
  3180. }
  3181. return true;
  3182. }
  3183. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3184. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3185. {
  3186. #ifdef CONFIG_X86
  3187. u32 prefetch;
  3188. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3189. prefetch |= 0x100;
  3190. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3191. #endif
  3192. }
  3193. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3194. * in a prefetch beyond physical memory.
  3195. */
  3196. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3197. {
  3198. u32 dma_prefetch;
  3199. if (h->board_id != 0x3225103C)
  3200. return;
  3201. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3202. dma_prefetch |= 0x8000;
  3203. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3204. }
  3205. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3206. {
  3207. int i;
  3208. /* under certain very rare conditions, this can take awhile.
  3209. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3210. * as we enter this code.)
  3211. */
  3212. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3213. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3214. break;
  3215. /* delay and try again */
  3216. msleep(10);
  3217. }
  3218. }
  3219. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3220. {
  3221. u32 trans_support;
  3222. trans_support = readl(&(h->cfgtable->TransportSupport));
  3223. if (!(trans_support & SIMPLE_MODE))
  3224. return -ENOTSUPP;
  3225. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3226. /* Update the field, and then ring the doorbell */
  3227. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3228. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3229. hpsa_wait_for_mode_change_ack(h);
  3230. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3231. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3232. dev_warn(&h->pdev->dev,
  3233. "unable to get board into simple mode\n");
  3234. return -ENODEV;
  3235. }
  3236. return 0;
  3237. }
  3238. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3239. {
  3240. int prod_index, err;
  3241. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3242. if (prod_index < 0)
  3243. return -ENODEV;
  3244. h->product_name = products[prod_index].product_name;
  3245. h->access = *(products[prod_index].access);
  3246. if (hpsa_board_disabled(h->pdev)) {
  3247. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3248. return -ENODEV;
  3249. }
  3250. err = pci_enable_device(h->pdev);
  3251. if (err) {
  3252. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3253. return err;
  3254. }
  3255. err = pci_request_regions(h->pdev, "hpsa");
  3256. if (err) {
  3257. dev_err(&h->pdev->dev,
  3258. "cannot obtain PCI resources, aborting\n");
  3259. return err;
  3260. }
  3261. hpsa_interrupt_mode(h);
  3262. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3263. if (err)
  3264. goto err_out_free_res;
  3265. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3266. if (!h->vaddr) {
  3267. err = -ENOMEM;
  3268. goto err_out_free_res;
  3269. }
  3270. err = hpsa_wait_for_board_ready(h);
  3271. if (err)
  3272. goto err_out_free_res;
  3273. err = hpsa_find_cfgtables(h);
  3274. if (err)
  3275. goto err_out_free_res;
  3276. hpsa_find_board_params(h);
  3277. if (!hpsa_CISS_signature_present(h)) {
  3278. err = -ENODEV;
  3279. goto err_out_free_res;
  3280. }
  3281. hpsa_enable_scsi_prefetch(h);
  3282. hpsa_p600_dma_prefetch_quirk(h);
  3283. err = hpsa_enter_simple_mode(h);
  3284. if (err)
  3285. goto err_out_free_res;
  3286. return 0;
  3287. err_out_free_res:
  3288. if (h->transtable)
  3289. iounmap(h->transtable);
  3290. if (h->cfgtable)
  3291. iounmap(h->cfgtable);
  3292. if (h->vaddr)
  3293. iounmap(h->vaddr);
  3294. /*
  3295. * Deliberately omit pci_disable_device(): it does something nasty to
  3296. * Smart Array controllers that pci_enable_device does not undo
  3297. */
  3298. pci_release_regions(h->pdev);
  3299. return err;
  3300. }
  3301. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3302. {
  3303. int rc;
  3304. #define HBA_INQUIRY_BYTE_COUNT 64
  3305. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3306. if (!h->hba_inquiry_data)
  3307. return;
  3308. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3309. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3310. if (rc != 0) {
  3311. kfree(h->hba_inquiry_data);
  3312. h->hba_inquiry_data = NULL;
  3313. }
  3314. }
  3315. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3316. {
  3317. int rc, i;
  3318. if (!reset_devices)
  3319. return 0;
  3320. /* Reset the controller with a PCI power-cycle or via doorbell */
  3321. rc = hpsa_kdump_hard_reset_controller(pdev);
  3322. /* -ENOTSUPP here means we cannot reset the controller
  3323. * but it's already (and still) up and running in
  3324. * "performant mode". Or, it might be 640x, which can't reset
  3325. * due to concerns about shared bbwc between 6402/6404 pair.
  3326. */
  3327. if (rc == -ENOTSUPP)
  3328. return 0; /* just try to do the kdump anyhow. */
  3329. if (rc)
  3330. return -ENODEV;
  3331. if (hpsa_reset_msi(pdev))
  3332. return -ENODEV;
  3333. /* Now try to get the controller to respond to a no-op */
  3334. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3335. if (hpsa_noop(pdev) == 0)
  3336. break;
  3337. else
  3338. dev_warn(&pdev->dev, "no-op failed%s\n",
  3339. (i < 11 ? "; re-trying" : ""));
  3340. }
  3341. return 0;
  3342. }
  3343. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3344. const struct pci_device_id *ent)
  3345. {
  3346. int dac, rc;
  3347. struct ctlr_info *h;
  3348. if (number_of_controllers == 0)
  3349. printk(KERN_INFO DRIVER_NAME "\n");
  3350. rc = hpsa_init_reset_devices(pdev);
  3351. if (rc)
  3352. return rc;
  3353. /* Command structures must be aligned on a 32-byte boundary because
  3354. * the 5 lower bits of the address are used by the hardware. and by
  3355. * the driver. See comments in hpsa.h for more info.
  3356. */
  3357. #define COMMANDLIST_ALIGNMENT 32
  3358. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3359. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3360. if (!h)
  3361. return -ENOMEM;
  3362. h->pdev = pdev;
  3363. h->busy_initializing = 1;
  3364. INIT_HLIST_HEAD(&h->cmpQ);
  3365. INIT_HLIST_HEAD(&h->reqQ);
  3366. rc = hpsa_pci_init(h);
  3367. if (rc != 0)
  3368. goto clean1;
  3369. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3370. h->ctlr = number_of_controllers;
  3371. number_of_controllers++;
  3372. /* configure PCI DMA stuff */
  3373. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3374. if (rc == 0) {
  3375. dac = 1;
  3376. } else {
  3377. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3378. if (rc == 0) {
  3379. dac = 0;
  3380. } else {
  3381. dev_err(&pdev->dev, "no suitable DMA available\n");
  3382. goto clean1;
  3383. }
  3384. }
  3385. /* make sure the board interrupts are off */
  3386. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3387. if (h->msix_vector || h->msi_vector)
  3388. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
  3389. IRQF_DISABLED, h->devname, h);
  3390. else
  3391. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
  3392. IRQF_DISABLED, h->devname, h);
  3393. if (rc) {
  3394. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3395. h->intr[PERF_MODE_INT], h->devname);
  3396. goto clean2;
  3397. }
  3398. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3399. h->devname, pdev->device,
  3400. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3401. h->cmd_pool_bits =
  3402. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3403. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3404. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3405. h->nr_cmds * sizeof(*h->cmd_pool),
  3406. &(h->cmd_pool_dhandle));
  3407. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3408. h->nr_cmds * sizeof(*h->errinfo_pool),
  3409. &(h->errinfo_pool_dhandle));
  3410. if ((h->cmd_pool_bits == NULL)
  3411. || (h->cmd_pool == NULL)
  3412. || (h->errinfo_pool == NULL)) {
  3413. dev_err(&pdev->dev, "out of memory");
  3414. rc = -ENOMEM;
  3415. goto clean4;
  3416. }
  3417. if (hpsa_allocate_sg_chain_blocks(h))
  3418. goto clean4;
  3419. spin_lock_init(&h->lock);
  3420. spin_lock_init(&h->scan_lock);
  3421. init_waitqueue_head(&h->scan_wait_queue);
  3422. h->scan_finished = 1; /* no scan currently in progress */
  3423. pci_set_drvdata(pdev, h);
  3424. memset(h->cmd_pool_bits, 0,
  3425. ((h->nr_cmds + BITS_PER_LONG -
  3426. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3427. hpsa_scsi_setup(h);
  3428. /* Turn the interrupts on so we can service requests */
  3429. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3430. hpsa_put_ctlr_into_performant_mode(h);
  3431. hpsa_hba_inquiry(h);
  3432. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3433. h->busy_initializing = 0;
  3434. return 1;
  3435. clean4:
  3436. hpsa_free_sg_chain_blocks(h);
  3437. kfree(h->cmd_pool_bits);
  3438. if (h->cmd_pool)
  3439. pci_free_consistent(h->pdev,
  3440. h->nr_cmds * sizeof(struct CommandList),
  3441. h->cmd_pool, h->cmd_pool_dhandle);
  3442. if (h->errinfo_pool)
  3443. pci_free_consistent(h->pdev,
  3444. h->nr_cmds * sizeof(struct ErrorInfo),
  3445. h->errinfo_pool,
  3446. h->errinfo_pool_dhandle);
  3447. free_irq(h->intr[PERF_MODE_INT], h);
  3448. clean2:
  3449. clean1:
  3450. h->busy_initializing = 0;
  3451. kfree(h);
  3452. return rc;
  3453. }
  3454. static void hpsa_flush_cache(struct ctlr_info *h)
  3455. {
  3456. char *flush_buf;
  3457. struct CommandList *c;
  3458. flush_buf = kzalloc(4, GFP_KERNEL);
  3459. if (!flush_buf)
  3460. return;
  3461. c = cmd_special_alloc(h);
  3462. if (!c) {
  3463. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3464. goto out_of_memory;
  3465. }
  3466. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3467. RAID_CTLR_LUNID, TYPE_CMD);
  3468. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3469. if (c->err_info->CommandStatus != 0)
  3470. dev_warn(&h->pdev->dev,
  3471. "error flushing cache on controller\n");
  3472. cmd_special_free(h, c);
  3473. out_of_memory:
  3474. kfree(flush_buf);
  3475. }
  3476. static void hpsa_shutdown(struct pci_dev *pdev)
  3477. {
  3478. struct ctlr_info *h;
  3479. h = pci_get_drvdata(pdev);
  3480. /* Turn board interrupts off and send the flush cache command
  3481. * sendcmd will turn off interrupt, and send the flush...
  3482. * To write all data in the battery backed cache to disks
  3483. */
  3484. hpsa_flush_cache(h);
  3485. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3486. free_irq(h->intr[PERF_MODE_INT], h);
  3487. #ifdef CONFIG_PCI_MSI
  3488. if (h->msix_vector)
  3489. pci_disable_msix(h->pdev);
  3490. else if (h->msi_vector)
  3491. pci_disable_msi(h->pdev);
  3492. #endif /* CONFIG_PCI_MSI */
  3493. }
  3494. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3495. {
  3496. struct ctlr_info *h;
  3497. if (pci_get_drvdata(pdev) == NULL) {
  3498. dev_err(&pdev->dev, "unable to remove device \n");
  3499. return;
  3500. }
  3501. h = pci_get_drvdata(pdev);
  3502. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3503. hpsa_shutdown(pdev);
  3504. iounmap(h->vaddr);
  3505. iounmap(h->transtable);
  3506. iounmap(h->cfgtable);
  3507. hpsa_free_sg_chain_blocks(h);
  3508. pci_free_consistent(h->pdev,
  3509. h->nr_cmds * sizeof(struct CommandList),
  3510. h->cmd_pool, h->cmd_pool_dhandle);
  3511. pci_free_consistent(h->pdev,
  3512. h->nr_cmds * sizeof(struct ErrorInfo),
  3513. h->errinfo_pool, h->errinfo_pool_dhandle);
  3514. pci_free_consistent(h->pdev, h->reply_pool_size,
  3515. h->reply_pool, h->reply_pool_dhandle);
  3516. kfree(h->cmd_pool_bits);
  3517. kfree(h->blockFetchTable);
  3518. kfree(h->hba_inquiry_data);
  3519. /*
  3520. * Deliberately omit pci_disable_device(): it does something nasty to
  3521. * Smart Array controllers that pci_enable_device does not undo
  3522. */
  3523. pci_release_regions(pdev);
  3524. pci_set_drvdata(pdev, NULL);
  3525. kfree(h);
  3526. }
  3527. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3528. __attribute__((unused)) pm_message_t state)
  3529. {
  3530. return -ENOSYS;
  3531. }
  3532. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3533. {
  3534. return -ENOSYS;
  3535. }
  3536. static struct pci_driver hpsa_pci_driver = {
  3537. .name = "hpsa",
  3538. .probe = hpsa_init_one,
  3539. .remove = __devexit_p(hpsa_remove_one),
  3540. .id_table = hpsa_pci_device_id, /* id_table */
  3541. .shutdown = hpsa_shutdown,
  3542. .suspend = hpsa_suspend,
  3543. .resume = hpsa_resume,
  3544. };
  3545. /* Fill in bucket_map[], given nsgs (the max number of
  3546. * scatter gather elements supported) and bucket[],
  3547. * which is an array of 8 integers. The bucket[] array
  3548. * contains 8 different DMA transfer sizes (in 16
  3549. * byte increments) which the controller uses to fetch
  3550. * commands. This function fills in bucket_map[], which
  3551. * maps a given number of scatter gather elements to one of
  3552. * the 8 DMA transfer sizes. The point of it is to allow the
  3553. * controller to only do as much DMA as needed to fetch the
  3554. * command, with the DMA transfer size encoded in the lower
  3555. * bits of the command address.
  3556. */
  3557. static void calc_bucket_map(int bucket[], int num_buckets,
  3558. int nsgs, int *bucket_map)
  3559. {
  3560. int i, j, b, size;
  3561. /* even a command with 0 SGs requires 4 blocks */
  3562. #define MINIMUM_TRANSFER_BLOCKS 4
  3563. #define NUM_BUCKETS 8
  3564. /* Note, bucket_map must have nsgs+1 entries. */
  3565. for (i = 0; i <= nsgs; i++) {
  3566. /* Compute size of a command with i SG entries */
  3567. size = i + MINIMUM_TRANSFER_BLOCKS;
  3568. b = num_buckets; /* Assume the biggest bucket */
  3569. /* Find the bucket that is just big enough */
  3570. for (j = 0; j < 8; j++) {
  3571. if (bucket[j] >= size) {
  3572. b = j;
  3573. break;
  3574. }
  3575. }
  3576. /* for a command with i SG entries, use bucket b. */
  3577. bucket_map[i] = b;
  3578. }
  3579. }
  3580. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3581. {
  3582. int i;
  3583. unsigned long register_value;
  3584. /* This is a bit complicated. There are 8 registers on
  3585. * the controller which we write to to tell it 8 different
  3586. * sizes of commands which there may be. It's a way of
  3587. * reducing the DMA done to fetch each command. Encoded into
  3588. * each command's tag are 3 bits which communicate to the controller
  3589. * which of the eight sizes that command fits within. The size of
  3590. * each command depends on how many scatter gather entries there are.
  3591. * Each SG entry requires 16 bytes. The eight registers are programmed
  3592. * with the number of 16-byte blocks a command of that size requires.
  3593. * The smallest command possible requires 5 such 16 byte blocks.
  3594. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3595. * blocks. Note, this only extends to the SG entries contained
  3596. * within the command block, and does not extend to chained blocks
  3597. * of SG elements. bft[] contains the eight values we write to
  3598. * the registers. They are not evenly distributed, but have more
  3599. * sizes for small commands, and fewer sizes for larger commands.
  3600. */
  3601. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3602. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3603. /* 5 = 1 s/g entry or 4k
  3604. * 6 = 2 s/g entry or 8k
  3605. * 8 = 4 s/g entry or 16k
  3606. * 10 = 6 s/g entry or 24k
  3607. */
  3608. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3609. /* Controller spec: zero out this buffer. */
  3610. memset(h->reply_pool, 0, h->reply_pool_size);
  3611. h->reply_pool_head = h->reply_pool;
  3612. bft[7] = h->max_sg_entries + 4;
  3613. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3614. for (i = 0; i < 8; i++)
  3615. writel(bft[i], &h->transtable->BlockFetch[i]);
  3616. /* size of controller ring buffer */
  3617. writel(h->max_commands, &h->transtable->RepQSize);
  3618. writel(1, &h->transtable->RepQCount);
  3619. writel(0, &h->transtable->RepQCtrAddrLow32);
  3620. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3621. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3622. writel(0, &h->transtable->RepQAddr0High32);
  3623. writel(CFGTBL_Trans_Performant,
  3624. &(h->cfgtable->HostWrite.TransportRequest));
  3625. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3626. hpsa_wait_for_mode_change_ack(h);
  3627. register_value = readl(&(h->cfgtable->TransportActive));
  3628. if (!(register_value & CFGTBL_Trans_Performant)) {
  3629. dev_warn(&h->pdev->dev, "unable to get board into"
  3630. " performant mode\n");
  3631. return;
  3632. }
  3633. }
  3634. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3635. {
  3636. u32 trans_support;
  3637. trans_support = readl(&(h->cfgtable->TransportSupport));
  3638. if (!(trans_support & PERFORMANT_MODE))
  3639. return;
  3640. hpsa_get_max_perf_mode_cmds(h);
  3641. h->max_sg_entries = 32;
  3642. /* Performant mode ring buffer and supporting data structures */
  3643. h->reply_pool_size = h->max_commands * sizeof(u64);
  3644. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3645. &(h->reply_pool_dhandle));
  3646. /* Need a block fetch table for performant mode */
  3647. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3648. sizeof(u32)), GFP_KERNEL);
  3649. if ((h->reply_pool == NULL)
  3650. || (h->blockFetchTable == NULL))
  3651. goto clean_up;
  3652. hpsa_enter_performant_mode(h);
  3653. /* Change the access methods to the performant access methods */
  3654. h->access = SA5_performant_access;
  3655. h->transMethod = CFGTBL_Trans_Performant;
  3656. return;
  3657. clean_up:
  3658. if (h->reply_pool)
  3659. pci_free_consistent(h->pdev, h->reply_pool_size,
  3660. h->reply_pool, h->reply_pool_dhandle);
  3661. kfree(h->blockFetchTable);
  3662. }
  3663. /*
  3664. * This is it. Register the PCI driver information for the cards we control
  3665. * the OS will call our registered routines when it finds one of our cards.
  3666. */
  3667. static int __init hpsa_init(void)
  3668. {
  3669. return pci_register_driver(&hpsa_pci_driver);
  3670. }
  3671. static void __exit hpsa_cleanup(void)
  3672. {
  3673. pci_unregister_driver(&hpsa_pci_driver);
  3674. }
  3675. module_init(hpsa_init);
  3676. module_exit(hpsa_cleanup);