setup.c 31 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mfd/sh_mobile_sdhi.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/mmc/sh_mmcif.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/delay.h>
  21. #include <linux/usb/r8a66597.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c/tsc2007.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/spi/sh_msiof.h>
  26. #include <linux/spi/mmc_spi.h>
  27. #include <linux/input.h>
  28. #include <linux/input/sh_keysc.h>
  29. #include <video/sh_mobile_lcdc.h>
  30. #include <sound/sh_fsi.h>
  31. #include <media/sh_mobile_ceu.h>
  32. #include <media/tw9910.h>
  33. #include <media/mt9t112.h>
  34. #include <asm/heartbeat.h>
  35. #include <asm/sh_eth.h>
  36. #include <asm/clock.h>
  37. #include <asm/suspend.h>
  38. #include <cpu/sh7724.h>
  39. /*
  40. * Address Interface BusWidth
  41. *-----------------------------------------
  42. * 0x0000_0000 uboot 16bit
  43. * 0x0004_0000 Linux romImage 16bit
  44. * 0x0014_0000 MTD for Linux 16bit
  45. * 0x0400_0000 Internal I/O 16/32bit
  46. * 0x0800_0000 DRAM 32bit
  47. * 0x1800_0000 MFI 16bit
  48. */
  49. /* SWITCH
  50. *------------------------------
  51. * DS2[1] = FlashROM write protect ON : write protect
  52. * OFF : No write protect
  53. * DS2[2] = RMII / TS, SCIF ON : RMII
  54. * OFF : TS, SCIF3
  55. * DS2[3] = Camera / Video ON : Camera
  56. * OFF : NTSC/PAL (IN)
  57. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  58. * OFF : SH7724 DV_CLK
  59. * DS2[6-7] = MMC / SD ON-OFF : SD
  60. * OFF-ON : MMC
  61. */
  62. /* Heartbeat */
  63. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  64. static struct heartbeat_data heartbeat_data = {
  65. .nr_bits = 4,
  66. .bit_pos = led_pos,
  67. };
  68. static struct resource heartbeat_resource = {
  69. .start = 0xA405012C, /* PTG */
  70. .end = 0xA405012E - 1,
  71. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  72. };
  73. static struct platform_device heartbeat_device = {
  74. .name = "heartbeat",
  75. .id = -1,
  76. .dev = {
  77. .platform_data = &heartbeat_data,
  78. },
  79. .num_resources = 1,
  80. .resource = &heartbeat_resource,
  81. };
  82. /* MTD */
  83. static struct mtd_partition nor_flash_partitions[] = {
  84. {
  85. .name = "boot loader",
  86. .offset = 0,
  87. .size = (5 * 1024 * 1024),
  88. .mask_flags = MTD_WRITEABLE, /* force read-only */
  89. }, {
  90. .name = "free-area",
  91. .offset = MTDPART_OFS_APPEND,
  92. .size = MTDPART_SIZ_FULL,
  93. },
  94. };
  95. static struct physmap_flash_data nor_flash_data = {
  96. .width = 2,
  97. .parts = nor_flash_partitions,
  98. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  99. };
  100. static struct resource nor_flash_resources[] = {
  101. [0] = {
  102. .name = "NOR Flash",
  103. .start = 0x00000000,
  104. .end = 0x03ffffff,
  105. .flags = IORESOURCE_MEM,
  106. }
  107. };
  108. static struct platform_device nor_flash_device = {
  109. .name = "physmap-flash",
  110. .resource = nor_flash_resources,
  111. .num_resources = ARRAY_SIZE(nor_flash_resources),
  112. .dev = {
  113. .platform_data = &nor_flash_data,
  114. },
  115. };
  116. /* SH Eth */
  117. #define SH_ETH_ADDR (0xA4600000)
  118. static struct resource sh_eth_resources[] = {
  119. [0] = {
  120. .start = SH_ETH_ADDR,
  121. .end = SH_ETH_ADDR + 0x1FC,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. [1] = {
  125. .start = 91,
  126. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  127. },
  128. };
  129. static struct sh_eth_plat_data sh_eth_plat = {
  130. .phy = 0x1f, /* SMSC LAN8700 */
  131. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  132. .ether_link_active_low = 1
  133. };
  134. static struct platform_device sh_eth_device = {
  135. .name = "sh-eth",
  136. .id = 0,
  137. .dev = {
  138. .platform_data = &sh_eth_plat,
  139. },
  140. .num_resources = ARRAY_SIZE(sh_eth_resources),
  141. .resource = sh_eth_resources,
  142. .archdata = {
  143. .hwblk_id = HWBLK_ETHER,
  144. },
  145. };
  146. /* USB0 host */
  147. static void usb0_port_power(int port, int power)
  148. {
  149. gpio_set_value(GPIO_PTB4, power);
  150. }
  151. static struct r8a66597_platdata usb0_host_data = {
  152. .on_chip = 1,
  153. .port_power = usb0_port_power,
  154. };
  155. static struct resource usb0_host_resources[] = {
  156. [0] = {
  157. .start = 0xa4d80000,
  158. .end = 0xa4d80124 - 1,
  159. .flags = IORESOURCE_MEM,
  160. },
  161. [1] = {
  162. .start = 65,
  163. .end = 65,
  164. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  165. },
  166. };
  167. static struct platform_device usb0_host_device = {
  168. .name = "r8a66597_hcd",
  169. .id = 0,
  170. .dev = {
  171. .dma_mask = NULL, /* not use dma */
  172. .coherent_dma_mask = 0xffffffff,
  173. .platform_data = &usb0_host_data,
  174. },
  175. .num_resources = ARRAY_SIZE(usb0_host_resources),
  176. .resource = usb0_host_resources,
  177. };
  178. /* USB1 host/function */
  179. static void usb1_port_power(int port, int power)
  180. {
  181. gpio_set_value(GPIO_PTB5, power);
  182. }
  183. static struct r8a66597_platdata usb1_common_data = {
  184. .on_chip = 1,
  185. .port_power = usb1_port_power,
  186. };
  187. static struct resource usb1_common_resources[] = {
  188. [0] = {
  189. .start = 0xa4d90000,
  190. .end = 0xa4d90124 - 1,
  191. .flags = IORESOURCE_MEM,
  192. },
  193. [1] = {
  194. .start = 66,
  195. .end = 66,
  196. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  197. },
  198. };
  199. static struct platform_device usb1_common_device = {
  200. /* .name will be added in arch_setup */
  201. .id = 1,
  202. .dev = {
  203. .dma_mask = NULL, /* not use dma */
  204. .coherent_dma_mask = 0xffffffff,
  205. .platform_data = &usb1_common_data,
  206. },
  207. .num_resources = ARRAY_SIZE(usb1_common_resources),
  208. .resource = usb1_common_resources,
  209. };
  210. /* LCDC */
  211. const static struct fb_videomode ecovec_lcd_modes[] = {
  212. {
  213. .name = "Panel",
  214. .xres = 800,
  215. .yres = 480,
  216. .left_margin = 220,
  217. .right_margin = 110,
  218. .hsync_len = 70,
  219. .upper_margin = 20,
  220. .lower_margin = 5,
  221. .vsync_len = 5,
  222. .sync = 0, /* hsync and vsync are active low */
  223. },
  224. };
  225. const static struct fb_videomode ecovec_dvi_modes[] = {
  226. {
  227. .name = "DVI",
  228. .xres = 1280,
  229. .yres = 720,
  230. .left_margin = 220,
  231. .right_margin = 110,
  232. .hsync_len = 40,
  233. .upper_margin = 20,
  234. .lower_margin = 5,
  235. .vsync_len = 5,
  236. .sync = 0, /* hsync and vsync are active low */
  237. },
  238. };
  239. static struct sh_mobile_lcdc_info lcdc_info = {
  240. .ch[0] = {
  241. .interface_type = RGB18,
  242. .chan = LCDC_CHAN_MAINLCD,
  243. .bpp = 16,
  244. .lcd_size_cfg = { /* 7.0 inch */
  245. .width = 152,
  246. .height = 91,
  247. },
  248. .board_cfg = {
  249. },
  250. }
  251. };
  252. static struct resource lcdc_resources[] = {
  253. [0] = {
  254. .name = "LCDC",
  255. .start = 0xfe940000,
  256. .end = 0xfe942fff,
  257. .flags = IORESOURCE_MEM,
  258. },
  259. [1] = {
  260. .start = 106,
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. };
  264. static struct platform_device lcdc_device = {
  265. .name = "sh_mobile_lcdc_fb",
  266. .num_resources = ARRAY_SIZE(lcdc_resources),
  267. .resource = lcdc_resources,
  268. .dev = {
  269. .platform_data = &lcdc_info,
  270. },
  271. .archdata = {
  272. .hwblk_id = HWBLK_LCDC,
  273. },
  274. };
  275. /* CEU0 */
  276. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  277. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  278. };
  279. static struct resource ceu0_resources[] = {
  280. [0] = {
  281. .name = "CEU0",
  282. .start = 0xfe910000,
  283. .end = 0xfe91009f,
  284. .flags = IORESOURCE_MEM,
  285. },
  286. [1] = {
  287. .start = 52,
  288. .flags = IORESOURCE_IRQ,
  289. },
  290. [2] = {
  291. /* place holder for contiguous memory */
  292. },
  293. };
  294. static struct platform_device ceu0_device = {
  295. .name = "sh_mobile_ceu",
  296. .id = 0, /* "ceu0" clock */
  297. .num_resources = ARRAY_SIZE(ceu0_resources),
  298. .resource = ceu0_resources,
  299. .dev = {
  300. .platform_data = &sh_mobile_ceu0_info,
  301. },
  302. .archdata = {
  303. .hwblk_id = HWBLK_CEU0,
  304. },
  305. };
  306. /* CEU1 */
  307. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  308. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  309. };
  310. static struct resource ceu1_resources[] = {
  311. [0] = {
  312. .name = "CEU1",
  313. .start = 0xfe914000,
  314. .end = 0xfe91409f,
  315. .flags = IORESOURCE_MEM,
  316. },
  317. [1] = {
  318. .start = 63,
  319. .flags = IORESOURCE_IRQ,
  320. },
  321. [2] = {
  322. /* place holder for contiguous memory */
  323. },
  324. };
  325. static struct platform_device ceu1_device = {
  326. .name = "sh_mobile_ceu",
  327. .id = 1, /* "ceu1" clock */
  328. .num_resources = ARRAY_SIZE(ceu1_resources),
  329. .resource = ceu1_resources,
  330. .dev = {
  331. .platform_data = &sh_mobile_ceu1_info,
  332. },
  333. .archdata = {
  334. .hwblk_id = HWBLK_CEU1,
  335. },
  336. };
  337. /* I2C device */
  338. static struct i2c_board_info i2c0_devices[] = {
  339. {
  340. I2C_BOARD_INFO("da7210", 0x1a),
  341. },
  342. };
  343. static struct i2c_board_info i2c1_devices[] = {
  344. {
  345. I2C_BOARD_INFO("r2025sd", 0x32),
  346. },
  347. {
  348. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  349. .irq = 33,
  350. }
  351. };
  352. /* KEYSC */
  353. static struct sh_keysc_info keysc_info = {
  354. .mode = SH_KEYSC_MODE_1,
  355. .scan_timing = 3,
  356. .delay = 50,
  357. .kycr2_delay = 100,
  358. .keycodes = { KEY_1, 0, 0, 0, 0,
  359. KEY_2, 0, 0, 0, 0,
  360. KEY_3, 0, 0, 0, 0,
  361. KEY_4, 0, 0, 0, 0,
  362. KEY_5, 0, 0, 0, 0,
  363. KEY_6, 0, 0, 0, 0, },
  364. };
  365. static struct resource keysc_resources[] = {
  366. [0] = {
  367. .name = "KEYSC",
  368. .start = 0x044b0000,
  369. .end = 0x044b000f,
  370. .flags = IORESOURCE_MEM,
  371. },
  372. [1] = {
  373. .start = 79,
  374. .flags = IORESOURCE_IRQ,
  375. },
  376. };
  377. static struct platform_device keysc_device = {
  378. .name = "sh_keysc",
  379. .id = 0, /* keysc0 clock */
  380. .num_resources = ARRAY_SIZE(keysc_resources),
  381. .resource = keysc_resources,
  382. .dev = {
  383. .platform_data = &keysc_info,
  384. },
  385. .archdata = {
  386. .hwblk_id = HWBLK_KEYSC,
  387. },
  388. };
  389. /* TouchScreen */
  390. #define IRQ0 32
  391. static int ts_get_pendown_state(void)
  392. {
  393. int val = 0;
  394. gpio_free(GPIO_FN_INTC_IRQ0);
  395. gpio_request(GPIO_PTZ0, NULL);
  396. gpio_direction_input(GPIO_PTZ0);
  397. val = gpio_get_value(GPIO_PTZ0);
  398. gpio_free(GPIO_PTZ0);
  399. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  400. return val ? 0 : 1;
  401. }
  402. static int ts_init(void)
  403. {
  404. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  405. return 0;
  406. }
  407. static struct tsc2007_platform_data tsc2007_info = {
  408. .model = 2007,
  409. .x_plate_ohms = 180,
  410. .get_pendown_state = ts_get_pendown_state,
  411. .init_platform_hw = ts_init,
  412. };
  413. static struct i2c_board_info ts_i2c_clients = {
  414. I2C_BOARD_INFO("tsc2007", 0x48),
  415. .type = "tsc2007",
  416. .platform_data = &tsc2007_info,
  417. .irq = IRQ0,
  418. };
  419. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  420. /* SDHI0 */
  421. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  422. {
  423. gpio_set_value(GPIO_PTB6, state);
  424. }
  425. static struct sh_mobile_sdhi_info sdhi0_info = {
  426. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  427. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  428. .set_pwr = sdhi0_set_pwr,
  429. };
  430. static struct resource sdhi0_resources[] = {
  431. [0] = {
  432. .name = "SDHI0",
  433. .start = 0x04ce0000,
  434. .end = 0x04ce01ff,
  435. .flags = IORESOURCE_MEM,
  436. },
  437. [1] = {
  438. .start = 100,
  439. .flags = IORESOURCE_IRQ,
  440. },
  441. };
  442. static struct platform_device sdhi0_device = {
  443. .name = "sh_mobile_sdhi",
  444. .num_resources = ARRAY_SIZE(sdhi0_resources),
  445. .resource = sdhi0_resources,
  446. .id = 0,
  447. .dev = {
  448. .platform_data = &sdhi0_info,
  449. },
  450. .archdata = {
  451. .hwblk_id = HWBLK_SDHI0,
  452. },
  453. };
  454. #if !defined(CONFIG_MMC_SH_MMCIF)
  455. /* SDHI1 */
  456. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  457. {
  458. gpio_set_value(GPIO_PTB7, state);
  459. }
  460. static struct sh_mobile_sdhi_info sdhi1_info = {
  461. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  462. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  463. .set_pwr = sdhi1_set_pwr,
  464. };
  465. static struct resource sdhi1_resources[] = {
  466. [0] = {
  467. .name = "SDHI1",
  468. .start = 0x04cf0000,
  469. .end = 0x04cf01ff,
  470. .flags = IORESOURCE_MEM,
  471. },
  472. [1] = {
  473. .start = 23,
  474. .flags = IORESOURCE_IRQ,
  475. },
  476. };
  477. static struct platform_device sdhi1_device = {
  478. .name = "sh_mobile_sdhi",
  479. .num_resources = ARRAY_SIZE(sdhi1_resources),
  480. .resource = sdhi1_resources,
  481. .id = 1,
  482. .dev = {
  483. .platform_data = &sdhi1_info,
  484. },
  485. .archdata = {
  486. .hwblk_id = HWBLK_SDHI1,
  487. },
  488. };
  489. #endif /* CONFIG_MMC_SH_MMCIF */
  490. #else
  491. /* MMC SPI */
  492. static int mmc_spi_get_ro(struct device *dev)
  493. {
  494. return gpio_get_value(GPIO_PTY6);
  495. }
  496. static int mmc_spi_get_cd(struct device *dev)
  497. {
  498. return !gpio_get_value(GPIO_PTY7);
  499. }
  500. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  501. {
  502. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  503. }
  504. static struct mmc_spi_platform_data mmc_spi_info = {
  505. .get_ro = mmc_spi_get_ro,
  506. .get_cd = mmc_spi_get_cd,
  507. .caps = MMC_CAP_NEEDS_POLL,
  508. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  509. .setpower = mmc_spi_setpower,
  510. };
  511. static struct spi_board_info spi_bus[] = {
  512. {
  513. .modalias = "mmc_spi",
  514. .platform_data = &mmc_spi_info,
  515. .max_speed_hz = 5000000,
  516. .mode = SPI_MODE_0,
  517. .controller_data = (void *) GPIO_PTM4,
  518. },
  519. };
  520. /* MSIOF0 */
  521. static struct sh_msiof_spi_info msiof0_data = {
  522. .num_chipselect = 1,
  523. };
  524. static struct resource msiof0_resources[] = {
  525. [0] = {
  526. .name = "MSIOF0",
  527. .start = 0xa4c40000,
  528. .end = 0xa4c40063,
  529. .flags = IORESOURCE_MEM,
  530. },
  531. [1] = {
  532. .start = 84,
  533. .flags = IORESOURCE_IRQ,
  534. },
  535. };
  536. static struct platform_device msiof0_device = {
  537. .name = "spi_sh_msiof",
  538. .id = 0, /* MSIOF0 */
  539. .dev = {
  540. .platform_data = &msiof0_data,
  541. },
  542. .num_resources = ARRAY_SIZE(msiof0_resources),
  543. .resource = msiof0_resources,
  544. .archdata = {
  545. .hwblk_id = HWBLK_MSIOF0,
  546. },
  547. };
  548. #endif
  549. /* I2C Video/Camera */
  550. static struct i2c_board_info i2c_camera[] = {
  551. {
  552. I2C_BOARD_INFO("tw9910", 0x45),
  553. },
  554. {
  555. /* 1st camera */
  556. I2C_BOARD_INFO("mt9t112", 0x3c),
  557. },
  558. {
  559. /* 2nd camera */
  560. I2C_BOARD_INFO("mt9t112", 0x3c),
  561. },
  562. };
  563. /* tw9910 */
  564. static int tw9910_power(struct device *dev, int mode)
  565. {
  566. int val = mode ? 0 : 1;
  567. gpio_set_value(GPIO_PTU2, val);
  568. if (mode)
  569. mdelay(100);
  570. return 0;
  571. }
  572. static struct tw9910_video_info tw9910_info = {
  573. .buswidth = SOCAM_DATAWIDTH_8,
  574. .mpout = TW9910_MPO_FIELD,
  575. };
  576. static struct soc_camera_link tw9910_link = {
  577. .i2c_adapter_id = 0,
  578. .bus_id = 1,
  579. .power = tw9910_power,
  580. .board_info = &i2c_camera[0],
  581. .priv = &tw9910_info,
  582. };
  583. /* mt9t112 */
  584. static int mt9t112_power1(struct device *dev, int mode)
  585. {
  586. gpio_set_value(GPIO_PTA3, mode);
  587. if (mode)
  588. mdelay(100);
  589. return 0;
  590. }
  591. static struct mt9t112_camera_info mt9t112_info1 = {
  592. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  593. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  594. };
  595. static struct soc_camera_link mt9t112_link1 = {
  596. .i2c_adapter_id = 0,
  597. .power = mt9t112_power1,
  598. .bus_id = 0,
  599. .board_info = &i2c_camera[1],
  600. .priv = &mt9t112_info1,
  601. };
  602. static int mt9t112_power2(struct device *dev, int mode)
  603. {
  604. gpio_set_value(GPIO_PTA4, mode);
  605. if (mode)
  606. mdelay(100);
  607. return 0;
  608. }
  609. static struct mt9t112_camera_info mt9t112_info2 = {
  610. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  611. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  612. };
  613. static struct soc_camera_link mt9t112_link2 = {
  614. .i2c_adapter_id = 1,
  615. .power = mt9t112_power2,
  616. .bus_id = 1,
  617. .board_info = &i2c_camera[2],
  618. .priv = &mt9t112_info2,
  619. };
  620. static struct platform_device camera_devices[] = {
  621. {
  622. .name = "soc-camera-pdrv",
  623. .id = 0,
  624. .dev = {
  625. .platform_data = &tw9910_link,
  626. },
  627. },
  628. {
  629. .name = "soc-camera-pdrv",
  630. .id = 1,
  631. .dev = {
  632. .platform_data = &mt9t112_link1,
  633. },
  634. },
  635. {
  636. .name = "soc-camera-pdrv",
  637. .id = 2,
  638. .dev = {
  639. .platform_data = &mt9t112_link2,
  640. },
  641. },
  642. };
  643. /* FSI */
  644. /*
  645. * FSI-B use external clock which came from da7210.
  646. * So, we should change parent of fsi
  647. */
  648. #define FCLKBCR 0xa415000c
  649. static void fsimck_init(struct clk *clk)
  650. {
  651. u32 status = __raw_readl(clk->enable_reg);
  652. /* use external clock */
  653. status &= ~0x000000ff;
  654. status |= 0x00000080;
  655. __raw_writel(status, clk->enable_reg);
  656. }
  657. static struct clk_ops fsimck_clk_ops = {
  658. .init = fsimck_init,
  659. };
  660. static struct clk fsimckb_clk = {
  661. .ops = &fsimck_clk_ops,
  662. .enable_reg = (void __iomem *)FCLKBCR,
  663. .rate = 0, /* unknown */
  664. };
  665. static struct sh_fsi_platform_info fsi_info = {
  666. .portb_flags = SH_FSI_BRS_INV |
  667. SH_FSI_OUT_SLAVE_MODE |
  668. SH_FSI_IN_SLAVE_MODE |
  669. SH_FSI_OFMT(I2S) |
  670. SH_FSI_IFMT(I2S),
  671. };
  672. static struct resource fsi_resources[] = {
  673. [0] = {
  674. .name = "FSI",
  675. .start = 0xFE3C0000,
  676. .end = 0xFE3C021d,
  677. .flags = IORESOURCE_MEM,
  678. },
  679. [1] = {
  680. .start = 108,
  681. .flags = IORESOURCE_IRQ,
  682. },
  683. };
  684. static struct platform_device fsi_device = {
  685. .name = "sh_fsi",
  686. .id = 0,
  687. .num_resources = ARRAY_SIZE(fsi_resources),
  688. .resource = fsi_resources,
  689. .dev = {
  690. .platform_data = &fsi_info,
  691. },
  692. .archdata = {
  693. .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
  694. },
  695. };
  696. /* IrDA */
  697. static struct resource irda_resources[] = {
  698. [0] = {
  699. .name = "IrDA",
  700. .start = 0xA45D0000,
  701. .end = 0xA45D0049,
  702. .flags = IORESOURCE_MEM,
  703. },
  704. [1] = {
  705. .start = 20,
  706. .flags = IORESOURCE_IRQ,
  707. },
  708. };
  709. static struct platform_device irda_device = {
  710. .name = "sh_sir",
  711. .num_resources = ARRAY_SIZE(irda_resources),
  712. .resource = irda_resources,
  713. };
  714. #include <media/ak881x.h>
  715. #include <media/sh_vou.h>
  716. static struct ak881x_pdata ak881x_pdata = {
  717. .flags = AK881X_IF_MODE_SLAVE,
  718. };
  719. static struct i2c_board_info ak8813 = {
  720. I2C_BOARD_INFO("ak8813", 0x20),
  721. .platform_data = &ak881x_pdata,
  722. };
  723. static struct sh_vou_pdata sh_vou_pdata = {
  724. .bus_fmt = SH_VOU_BUS_8BIT,
  725. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  726. .board_info = &ak8813,
  727. .i2c_adap = 0,
  728. };
  729. static struct resource sh_vou_resources[] = {
  730. [0] = {
  731. .start = 0xfe960000,
  732. .end = 0xfe962043,
  733. .flags = IORESOURCE_MEM,
  734. },
  735. [1] = {
  736. .start = 55,
  737. .flags = IORESOURCE_IRQ,
  738. },
  739. };
  740. static struct platform_device vou_device = {
  741. .name = "sh-vou",
  742. .id = -1,
  743. .num_resources = ARRAY_SIZE(sh_vou_resources),
  744. .resource = sh_vou_resources,
  745. .dev = {
  746. .platform_data = &sh_vou_pdata,
  747. },
  748. .archdata = {
  749. .hwblk_id = HWBLK_VOU,
  750. },
  751. };
  752. #if defined(CONFIG_MMC_SH_MMCIF)
  753. /* SH_MMCIF */
  754. static void mmcif_set_pwr(struct platform_device *pdev, int state)
  755. {
  756. gpio_set_value(GPIO_PTB7, state);
  757. }
  758. static void mmcif_down_pwr(struct platform_device *pdev)
  759. {
  760. gpio_set_value(GPIO_PTB7, 0);
  761. }
  762. static struct resource sh_mmcif_resources[] = {
  763. [0] = {
  764. .name = "SH_MMCIF",
  765. .start = 0xA4CA0000,
  766. .end = 0xA4CA00FF,
  767. .flags = IORESOURCE_MEM,
  768. },
  769. [1] = {
  770. /* MMC2I */
  771. .start = 29,
  772. .flags = IORESOURCE_IRQ,
  773. },
  774. [2] = {
  775. /* MMC3I */
  776. .start = 30,
  777. .flags = IORESOURCE_IRQ,
  778. },
  779. };
  780. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  781. .set_pwr = mmcif_set_pwr,
  782. .down_pwr = mmcif_down_pwr,
  783. .sup_pclk = 0, /* SH7724: Max Pclk/2 */
  784. .caps = MMC_CAP_4_BIT_DATA |
  785. MMC_CAP_8_BIT_DATA |
  786. MMC_CAP_NEEDS_POLL,
  787. .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
  788. };
  789. static struct platform_device sh_mmcif_device = {
  790. .name = "sh_mmcif",
  791. .id = 0,
  792. .dev = {
  793. .platform_data = &sh_mmcif_plat,
  794. },
  795. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  796. .resource = sh_mmcif_resources,
  797. };
  798. #endif
  799. static struct platform_device *ecovec_devices[] __initdata = {
  800. &heartbeat_device,
  801. &nor_flash_device,
  802. &sh_eth_device,
  803. &usb0_host_device,
  804. &usb1_common_device,
  805. &lcdc_device,
  806. &ceu0_device,
  807. &ceu1_device,
  808. &keysc_device,
  809. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  810. &sdhi0_device,
  811. #if !defined(CONFIG_MMC_SH_MMCIF)
  812. &sdhi1_device,
  813. #endif
  814. #else
  815. &msiof0_device,
  816. #endif
  817. &camera_devices[0],
  818. &camera_devices[1],
  819. &camera_devices[2],
  820. &fsi_device,
  821. &irda_device,
  822. &vou_device,
  823. #if defined(CONFIG_MMC_SH_MMCIF)
  824. &sh_mmcif_device,
  825. #endif
  826. };
  827. #ifdef CONFIG_I2C
  828. #define EEPROM_ADDR 0x50
  829. static u8 mac_read(struct i2c_adapter *a, u8 command)
  830. {
  831. struct i2c_msg msg[2];
  832. u8 buf;
  833. int ret;
  834. msg[0].addr = EEPROM_ADDR;
  835. msg[0].flags = 0;
  836. msg[0].len = 1;
  837. msg[0].buf = &command;
  838. msg[1].addr = EEPROM_ADDR;
  839. msg[1].flags = I2C_M_RD;
  840. msg[1].len = 1;
  841. msg[1].buf = &buf;
  842. ret = i2c_transfer(a, msg, 2);
  843. if (ret < 0) {
  844. printk(KERN_ERR "error %d\n", ret);
  845. buf = 0xff;
  846. }
  847. return buf;
  848. }
  849. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  850. {
  851. struct i2c_adapter *a = i2c_get_adapter(1);
  852. int i;
  853. if (!a) {
  854. pr_err("can not get I2C 1\n");
  855. return;
  856. }
  857. /* read MAC address frome EEPROM */
  858. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  859. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  860. msleep(10);
  861. }
  862. i2c_put_adapter(a);
  863. }
  864. #else
  865. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  866. {
  867. pr_err("unable to read sh_eth MAC address\n");
  868. }
  869. #endif
  870. #define PORT_HIZA 0xA4050158
  871. #define IODRIVEA 0xA405018A
  872. extern char ecovec24_sdram_enter_start;
  873. extern char ecovec24_sdram_enter_end;
  874. extern char ecovec24_sdram_leave_start;
  875. extern char ecovec24_sdram_leave_end;
  876. static int __init arch_setup(void)
  877. {
  878. struct clk *clk;
  879. /* register board specific self-refresh code */
  880. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  881. SUSP_SH_RSTANDBY,
  882. &ecovec24_sdram_enter_start,
  883. &ecovec24_sdram_enter_end,
  884. &ecovec24_sdram_leave_start,
  885. &ecovec24_sdram_leave_end);
  886. /* enable STATUS0, STATUS2 and PDSTATUS */
  887. gpio_request(GPIO_FN_STATUS0, NULL);
  888. gpio_request(GPIO_FN_STATUS2, NULL);
  889. gpio_request(GPIO_FN_PDSTATUS, NULL);
  890. /* enable SCIFA0 */
  891. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  892. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  893. /* enable debug LED */
  894. gpio_request(GPIO_PTG0, NULL);
  895. gpio_request(GPIO_PTG1, NULL);
  896. gpio_request(GPIO_PTG2, NULL);
  897. gpio_request(GPIO_PTG3, NULL);
  898. gpio_direction_output(GPIO_PTG0, 0);
  899. gpio_direction_output(GPIO_PTG1, 0);
  900. gpio_direction_output(GPIO_PTG2, 0);
  901. gpio_direction_output(GPIO_PTG3, 0);
  902. __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  903. /* enable SH-Eth */
  904. gpio_request(GPIO_PTA1, NULL);
  905. gpio_direction_output(GPIO_PTA1, 1);
  906. mdelay(20);
  907. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  908. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  909. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  910. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  911. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  912. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  913. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  914. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  915. gpio_request(GPIO_FN_MDIO, NULL);
  916. gpio_request(GPIO_FN_MDC, NULL);
  917. gpio_request(GPIO_FN_LNKSTA, NULL);
  918. /* enable USB */
  919. __raw_writew(0x0000, 0xA4D80000);
  920. __raw_writew(0x0000, 0xA4D90000);
  921. gpio_request(GPIO_PTB3, NULL);
  922. gpio_request(GPIO_PTB4, NULL);
  923. gpio_request(GPIO_PTB5, NULL);
  924. gpio_direction_input(GPIO_PTB3);
  925. gpio_direction_output(GPIO_PTB4, 0);
  926. gpio_direction_output(GPIO_PTB5, 0);
  927. __raw_writew(0x0600, 0xa40501d4);
  928. __raw_writew(0x0600, 0xa4050192);
  929. if (gpio_get_value(GPIO_PTB3)) {
  930. printk(KERN_INFO "USB1 function is selected\n");
  931. usb1_common_device.name = "r8a66597_udc";
  932. } else {
  933. printk(KERN_INFO "USB1 host is selected\n");
  934. usb1_common_device.name = "r8a66597_hcd";
  935. }
  936. /* enable LCDC */
  937. gpio_request(GPIO_FN_LCDD23, NULL);
  938. gpio_request(GPIO_FN_LCDD22, NULL);
  939. gpio_request(GPIO_FN_LCDD21, NULL);
  940. gpio_request(GPIO_FN_LCDD20, NULL);
  941. gpio_request(GPIO_FN_LCDD19, NULL);
  942. gpio_request(GPIO_FN_LCDD18, NULL);
  943. gpio_request(GPIO_FN_LCDD17, NULL);
  944. gpio_request(GPIO_FN_LCDD16, NULL);
  945. gpio_request(GPIO_FN_LCDD15, NULL);
  946. gpio_request(GPIO_FN_LCDD14, NULL);
  947. gpio_request(GPIO_FN_LCDD13, NULL);
  948. gpio_request(GPIO_FN_LCDD12, NULL);
  949. gpio_request(GPIO_FN_LCDD11, NULL);
  950. gpio_request(GPIO_FN_LCDD10, NULL);
  951. gpio_request(GPIO_FN_LCDD9, NULL);
  952. gpio_request(GPIO_FN_LCDD8, NULL);
  953. gpio_request(GPIO_FN_LCDD7, NULL);
  954. gpio_request(GPIO_FN_LCDD6, NULL);
  955. gpio_request(GPIO_FN_LCDD5, NULL);
  956. gpio_request(GPIO_FN_LCDD4, NULL);
  957. gpio_request(GPIO_FN_LCDD3, NULL);
  958. gpio_request(GPIO_FN_LCDD2, NULL);
  959. gpio_request(GPIO_FN_LCDD1, NULL);
  960. gpio_request(GPIO_FN_LCDD0, NULL);
  961. gpio_request(GPIO_FN_LCDDISP, NULL);
  962. gpio_request(GPIO_FN_LCDHSYN, NULL);
  963. gpio_request(GPIO_FN_LCDDCK, NULL);
  964. gpio_request(GPIO_FN_LCDVSYN, NULL);
  965. gpio_request(GPIO_FN_LCDDON, NULL);
  966. gpio_request(GPIO_FN_LCDLCLK, NULL);
  967. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  968. gpio_request(GPIO_PTE6, NULL);
  969. gpio_request(GPIO_PTU1, NULL);
  970. gpio_request(GPIO_PTR1, NULL);
  971. gpio_request(GPIO_PTA2, NULL);
  972. gpio_direction_input(GPIO_PTE6);
  973. gpio_direction_output(GPIO_PTU1, 0);
  974. gpio_direction_output(GPIO_PTR1, 0);
  975. gpio_direction_output(GPIO_PTA2, 0);
  976. /* I/O buffer drive ability is high */
  977. __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  978. if (gpio_get_value(GPIO_PTE6)) {
  979. /* DVI */
  980. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  981. lcdc_info.ch[0].clock_divider = 1;
  982. lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
  983. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
  984. gpio_set_value(GPIO_PTA2, 1);
  985. gpio_set_value(GPIO_PTU1, 1);
  986. } else {
  987. /* Panel */
  988. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  989. lcdc_info.ch[0].clock_divider = 2;
  990. lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
  991. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
  992. gpio_set_value(GPIO_PTR1, 1);
  993. /* FIXME
  994. *
  995. * LCDDON control is needed for Panel,
  996. * but current sh_mobile_lcdc driver doesn't control it.
  997. * It is temporary correspondence
  998. */
  999. gpio_request(GPIO_PTF4, NULL);
  1000. gpio_direction_output(GPIO_PTF4, 1);
  1001. /* enable TouchScreen */
  1002. i2c_register_board_info(0, &ts_i2c_clients, 1);
  1003. set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  1004. }
  1005. /* enable CEU0 */
  1006. gpio_request(GPIO_FN_VIO0_D15, NULL);
  1007. gpio_request(GPIO_FN_VIO0_D14, NULL);
  1008. gpio_request(GPIO_FN_VIO0_D13, NULL);
  1009. gpio_request(GPIO_FN_VIO0_D12, NULL);
  1010. gpio_request(GPIO_FN_VIO0_D11, NULL);
  1011. gpio_request(GPIO_FN_VIO0_D10, NULL);
  1012. gpio_request(GPIO_FN_VIO0_D9, NULL);
  1013. gpio_request(GPIO_FN_VIO0_D8, NULL);
  1014. gpio_request(GPIO_FN_VIO0_D7, NULL);
  1015. gpio_request(GPIO_FN_VIO0_D6, NULL);
  1016. gpio_request(GPIO_FN_VIO0_D5, NULL);
  1017. gpio_request(GPIO_FN_VIO0_D4, NULL);
  1018. gpio_request(GPIO_FN_VIO0_D3, NULL);
  1019. gpio_request(GPIO_FN_VIO0_D2, NULL);
  1020. gpio_request(GPIO_FN_VIO0_D1, NULL);
  1021. gpio_request(GPIO_FN_VIO0_D0, NULL);
  1022. gpio_request(GPIO_FN_VIO0_VD, NULL);
  1023. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  1024. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  1025. gpio_request(GPIO_FN_VIO0_HD, NULL);
  1026. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  1027. /* enable CEU1 */
  1028. gpio_request(GPIO_FN_VIO1_D7, NULL);
  1029. gpio_request(GPIO_FN_VIO1_D6, NULL);
  1030. gpio_request(GPIO_FN_VIO1_D5, NULL);
  1031. gpio_request(GPIO_FN_VIO1_D4, NULL);
  1032. gpio_request(GPIO_FN_VIO1_D3, NULL);
  1033. gpio_request(GPIO_FN_VIO1_D2, NULL);
  1034. gpio_request(GPIO_FN_VIO1_D1, NULL);
  1035. gpio_request(GPIO_FN_VIO1_D0, NULL);
  1036. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  1037. gpio_request(GPIO_FN_VIO1_HD, NULL);
  1038. gpio_request(GPIO_FN_VIO1_VD, NULL);
  1039. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  1040. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  1041. /* enable KEYSC */
  1042. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  1043. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  1044. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1045. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1046. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1047. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1048. gpio_request(GPIO_FN_KEYIN0, NULL);
  1049. /* enable user debug switch */
  1050. gpio_request(GPIO_PTR0, NULL);
  1051. gpio_request(GPIO_PTR4, NULL);
  1052. gpio_request(GPIO_PTR5, NULL);
  1053. gpio_request(GPIO_PTR6, NULL);
  1054. gpio_direction_input(GPIO_PTR0);
  1055. gpio_direction_input(GPIO_PTR4);
  1056. gpio_direction_input(GPIO_PTR5);
  1057. gpio_direction_input(GPIO_PTR6);
  1058. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  1059. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  1060. gpio_request(GPIO_FN_SDHI0CD, NULL);
  1061. gpio_request(GPIO_FN_SDHI0WP, NULL);
  1062. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  1063. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  1064. gpio_request(GPIO_FN_SDHI0D3, NULL);
  1065. gpio_request(GPIO_FN_SDHI0D2, NULL);
  1066. gpio_request(GPIO_FN_SDHI0D1, NULL);
  1067. gpio_request(GPIO_FN_SDHI0D0, NULL);
  1068. gpio_request(GPIO_PTB6, NULL);
  1069. gpio_direction_output(GPIO_PTB6, 0);
  1070. #if !defined(CONFIG_MMC_SH_MMCIF)
  1071. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  1072. gpio_request(GPIO_FN_SDHI1CD, NULL);
  1073. gpio_request(GPIO_FN_SDHI1WP, NULL);
  1074. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  1075. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  1076. gpio_request(GPIO_FN_SDHI1D3, NULL);
  1077. gpio_request(GPIO_FN_SDHI1D2, NULL);
  1078. gpio_request(GPIO_FN_SDHI1D1, NULL);
  1079. gpio_request(GPIO_FN_SDHI1D0, NULL);
  1080. gpio_request(GPIO_PTB7, NULL);
  1081. gpio_direction_output(GPIO_PTB7, 0);
  1082. /* I/O buffer drive ability is high for SDHI1 */
  1083. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1084. #endif /* CONFIG_MMC_SH_MMCIF */
  1085. #else
  1086. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  1087. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  1088. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  1089. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  1090. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  1091. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  1092. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  1093. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  1094. gpio_request(GPIO_PTY6, NULL); /* write protect */
  1095. gpio_direction_input(GPIO_PTY6);
  1096. gpio_request(GPIO_PTY7, NULL); /* card detect */
  1097. gpio_direction_input(GPIO_PTY7);
  1098. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  1099. #endif
  1100. /* enable Video */
  1101. gpio_request(GPIO_PTU2, NULL);
  1102. gpio_direction_output(GPIO_PTU2, 1);
  1103. /* enable Camera */
  1104. gpio_request(GPIO_PTA3, NULL);
  1105. gpio_request(GPIO_PTA4, NULL);
  1106. gpio_direction_output(GPIO_PTA3, 0);
  1107. gpio_direction_output(GPIO_PTA4, 0);
  1108. /* enable FSI */
  1109. gpio_request(GPIO_FN_FSIMCKB, NULL);
  1110. gpio_request(GPIO_FN_FSIIBSD, NULL);
  1111. gpio_request(GPIO_FN_FSIOBSD, NULL);
  1112. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  1113. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  1114. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  1115. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  1116. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  1117. /* set SPU2 clock to 83.4 MHz */
  1118. clk = clk_get(NULL, "spu_clk");
  1119. if (!IS_ERR(clk)) {
  1120. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  1121. clk_put(clk);
  1122. }
  1123. /* change parent of FSI B */
  1124. clk = clk_get(NULL, "fsib_clk");
  1125. if (!IS_ERR(clk)) {
  1126. clk_register(&fsimckb_clk);
  1127. clk_set_parent(clk, &fsimckb_clk);
  1128. clk_set_rate(clk, 11000);
  1129. clk_set_rate(&fsimckb_clk, 11000);
  1130. clk_put(clk);
  1131. }
  1132. gpio_request(GPIO_PTU0, NULL);
  1133. gpio_direction_output(GPIO_PTU0, 0);
  1134. mdelay(20);
  1135. /* enable motion sensor */
  1136. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  1137. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  1138. /* set VPU clock to 166 MHz */
  1139. clk = clk_get(NULL, "vpu_clk");
  1140. if (!IS_ERR(clk)) {
  1141. clk_set_rate(clk, clk_round_rate(clk, 166000000));
  1142. clk_put(clk);
  1143. }
  1144. /* enable IrDA */
  1145. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  1146. gpio_request(GPIO_FN_IRDA_IN, NULL);
  1147. gpio_request(GPIO_PTU5, NULL);
  1148. gpio_direction_output(GPIO_PTU5, 0);
  1149. #if defined(CONFIG_MMC_SH_MMCIF)
  1150. /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
  1151. gpio_request(GPIO_FN_MMC_D7, NULL);
  1152. gpio_request(GPIO_FN_MMC_D6, NULL);
  1153. gpio_request(GPIO_FN_MMC_D5, NULL);
  1154. gpio_request(GPIO_FN_MMC_D4, NULL);
  1155. gpio_request(GPIO_FN_MMC_D3, NULL);
  1156. gpio_request(GPIO_FN_MMC_D2, NULL);
  1157. gpio_request(GPIO_FN_MMC_D1, NULL);
  1158. gpio_request(GPIO_FN_MMC_D0, NULL);
  1159. gpio_request(GPIO_FN_MMC_CLK, NULL);
  1160. gpio_request(GPIO_FN_MMC_CMD, NULL);
  1161. gpio_request(GPIO_PTB7, NULL);
  1162. gpio_direction_output(GPIO_PTB7, 0);
  1163. /* I/O buffer drive ability is high for MMCIF */
  1164. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1165. #endif
  1166. /* enable I2C device */
  1167. i2c_register_board_info(0, i2c0_devices,
  1168. ARRAY_SIZE(i2c0_devices));
  1169. i2c_register_board_info(1, i2c1_devices,
  1170. ARRAY_SIZE(i2c1_devices));
  1171. /* VOU */
  1172. gpio_request(GPIO_FN_DV_D15, NULL);
  1173. gpio_request(GPIO_FN_DV_D14, NULL);
  1174. gpio_request(GPIO_FN_DV_D13, NULL);
  1175. gpio_request(GPIO_FN_DV_D12, NULL);
  1176. gpio_request(GPIO_FN_DV_D11, NULL);
  1177. gpio_request(GPIO_FN_DV_D10, NULL);
  1178. gpio_request(GPIO_FN_DV_D9, NULL);
  1179. gpio_request(GPIO_FN_DV_D8, NULL);
  1180. gpio_request(GPIO_FN_DV_CLKI, NULL);
  1181. gpio_request(GPIO_FN_DV_CLK, NULL);
  1182. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  1183. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  1184. /* AK8813 power / reset sequence */
  1185. gpio_request(GPIO_PTG4, NULL);
  1186. gpio_request(GPIO_PTU3, NULL);
  1187. /* Reset */
  1188. gpio_direction_output(GPIO_PTG4, 0);
  1189. /* Power down */
  1190. gpio_direction_output(GPIO_PTU3, 1);
  1191. udelay(10);
  1192. /* Power up, reset */
  1193. gpio_set_value(GPIO_PTU3, 0);
  1194. udelay(10);
  1195. /* Remove reset */
  1196. gpio_set_value(GPIO_PTG4, 1);
  1197. return platform_add_devices(ecovec_devices,
  1198. ARRAY_SIZE(ecovec_devices));
  1199. }
  1200. arch_initcall(arch_setup);
  1201. static int __init devices_setup(void)
  1202. {
  1203. sh_eth_init(&sh_eth_plat);
  1204. return 0;
  1205. }
  1206. device_initcall(devices_setup);
  1207. static struct sh_machine_vector mv_ecovec __initmv = {
  1208. .mv_name = "R0P7724 (EcoVec)",
  1209. };