time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/gfp.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/delay.h>
  40. #include <asm/s390_ext.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/timer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. /* change this if you have some constant time drift */
  49. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  50. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  51. u64 sched_clock_base_cc = -1; /* Force to data section. */
  52. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  53. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  54. /*
  55. * Scheduler clock - returns current time in nanosec units.
  56. */
  57. unsigned long long notrace sched_clock(void)
  58. {
  59. return (get_clock_monotonic() * 125) >> 9;
  60. }
  61. /*
  62. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  63. */
  64. unsigned long long monotonic_clock(void)
  65. {
  66. return sched_clock();
  67. }
  68. EXPORT_SYMBOL(monotonic_clock);
  69. void tod_to_timeval(__u64 todval, struct timespec *xt)
  70. {
  71. unsigned long long sec;
  72. sec = todval >> 12;
  73. do_div(sec, 1000000);
  74. xt->tv_sec = sec;
  75. todval -= (sec * 1000000) << 12;
  76. xt->tv_nsec = ((todval * 1000) >> 12);
  77. }
  78. EXPORT_SYMBOL(tod_to_timeval);
  79. void clock_comparator_work(void)
  80. {
  81. struct clock_event_device *cd;
  82. S390_lowcore.clock_comparator = -1ULL;
  83. set_clock_comparator(S390_lowcore.clock_comparator);
  84. cd = &__get_cpu_var(comparators);
  85. cd->event_handler(cd);
  86. }
  87. /*
  88. * Fixup the clock comparator.
  89. */
  90. static void fixup_clock_comparator(unsigned long long delta)
  91. {
  92. /* If nobody is waiting there's nothing to fix. */
  93. if (S390_lowcore.clock_comparator == -1ULL)
  94. return;
  95. S390_lowcore.clock_comparator += delta;
  96. set_clock_comparator(S390_lowcore.clock_comparator);
  97. }
  98. static int s390_next_event(unsigned long delta,
  99. struct clock_event_device *evt)
  100. {
  101. S390_lowcore.clock_comparator = get_clock() + delta;
  102. set_clock_comparator(S390_lowcore.clock_comparator);
  103. return 0;
  104. }
  105. static void s390_set_mode(enum clock_event_mode mode,
  106. struct clock_event_device *evt)
  107. {
  108. }
  109. /*
  110. * Set up lowcore and control register of the current cpu to
  111. * enable TOD clock and clock comparator interrupts.
  112. */
  113. void init_cpu_timer(void)
  114. {
  115. struct clock_event_device *cd;
  116. int cpu;
  117. S390_lowcore.clock_comparator = -1ULL;
  118. set_clock_comparator(S390_lowcore.clock_comparator);
  119. cpu = smp_processor_id();
  120. cd = &per_cpu(comparators, cpu);
  121. cd->name = "comparator";
  122. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  123. cd->mult = 16777;
  124. cd->shift = 12;
  125. cd->min_delta_ns = 1;
  126. cd->max_delta_ns = LONG_MAX;
  127. cd->rating = 400;
  128. cd->cpumask = cpumask_of(cpu);
  129. cd->set_next_event = s390_next_event;
  130. cd->set_mode = s390_set_mode;
  131. clockevents_register_device(cd);
  132. /* Enable clock comparator timer interrupt. */
  133. __ctl_set_bit(0,11);
  134. /* Always allow the timing alert external interrupt. */
  135. __ctl_set_bit(0, 4);
  136. }
  137. static void clock_comparator_interrupt(unsigned int ext_int_code,
  138. unsigned int param32,
  139. unsigned long param64)
  140. {
  141. if (S390_lowcore.clock_comparator == -1ULL)
  142. set_clock_comparator(S390_lowcore.clock_comparator);
  143. }
  144. static void etr_timing_alert(struct etr_irq_parm *);
  145. static void stp_timing_alert(struct stp_irq_parm *);
  146. static void timing_alert_interrupt(unsigned int ext_int_code,
  147. unsigned int param32, unsigned long param64)
  148. {
  149. if (param32 & 0x00c40000)
  150. etr_timing_alert((struct etr_irq_parm *) &param32);
  151. if (param32 & 0x00038000)
  152. stp_timing_alert((struct stp_irq_parm *) &param32);
  153. }
  154. static void etr_reset(void);
  155. static void stp_reset(void);
  156. void read_persistent_clock(struct timespec *ts)
  157. {
  158. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  159. }
  160. void read_boot_clock(struct timespec *ts)
  161. {
  162. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  163. }
  164. static cycle_t read_tod_clock(struct clocksource *cs)
  165. {
  166. return get_clock();
  167. }
  168. static struct clocksource clocksource_tod = {
  169. .name = "tod",
  170. .rating = 400,
  171. .read = read_tod_clock,
  172. .mask = -1ULL,
  173. .mult = 1000,
  174. .shift = 12,
  175. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  176. };
  177. struct clocksource * __init clocksource_default_clock(void)
  178. {
  179. return &clocksource_tod;
  180. }
  181. void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
  182. struct clocksource *clock, u32 mult)
  183. {
  184. if (clock != &clocksource_tod)
  185. return;
  186. /* Make userspace gettimeofday spin until we're done. */
  187. ++vdso_data->tb_update_count;
  188. smp_wmb();
  189. vdso_data->xtime_tod_stamp = clock->cycle_last;
  190. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  191. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  192. vdso_data->wtom_clock_sec = wtm->tv_sec;
  193. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  194. vdso_data->ntp_mult = mult;
  195. smp_wmb();
  196. ++vdso_data->tb_update_count;
  197. }
  198. extern struct timezone sys_tz;
  199. void update_vsyscall_tz(void)
  200. {
  201. /* Make userspace gettimeofday spin until we're done. */
  202. ++vdso_data->tb_update_count;
  203. smp_wmb();
  204. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  205. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  206. smp_wmb();
  207. ++vdso_data->tb_update_count;
  208. }
  209. /*
  210. * Initialize the TOD clock and the CPU timer of
  211. * the boot cpu.
  212. */
  213. void __init time_init(void)
  214. {
  215. /* Reset time synchronization interfaces. */
  216. etr_reset();
  217. stp_reset();
  218. /* request the clock comparator external interrupt */
  219. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  220. panic("Couldn't request external interrupt 0x1004");
  221. /* request the timing alert external interrupt */
  222. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  223. panic("Couldn't request external interrupt 0x1406");
  224. if (clocksource_register(&clocksource_tod) != 0)
  225. panic("Could not register TOD clock source");
  226. /* Enable TOD clock interrupts on the boot cpu. */
  227. init_cpu_timer();
  228. /* Enable cpu timer interrupts on the boot cpu. */
  229. vtime_init();
  230. }
  231. /*
  232. * The time is "clock". old is what we think the time is.
  233. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  234. * "delay" is an approximation how long the synchronization took. If
  235. * the time correction is positive, then "delay" is subtracted from
  236. * the time difference and only the remaining part is passed to ntp.
  237. */
  238. static unsigned long long adjust_time(unsigned long long old,
  239. unsigned long long clock,
  240. unsigned long long delay)
  241. {
  242. unsigned long long delta, ticks;
  243. struct timex adjust;
  244. if (clock > old) {
  245. /* It is later than we thought. */
  246. delta = ticks = clock - old;
  247. delta = ticks = (delta < delay) ? 0 : delta - delay;
  248. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  249. adjust.offset = ticks * (1000000 / HZ);
  250. } else {
  251. /* It is earlier than we thought. */
  252. delta = ticks = old - clock;
  253. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  254. delta = -delta;
  255. adjust.offset = -ticks * (1000000 / HZ);
  256. }
  257. sched_clock_base_cc += delta;
  258. if (adjust.offset != 0) {
  259. pr_notice("The ETR interface has adjusted the clock "
  260. "by %li microseconds\n", adjust.offset);
  261. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  262. do_adjtimex(&adjust);
  263. }
  264. return delta;
  265. }
  266. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  267. static DEFINE_MUTEX(clock_sync_mutex);
  268. static unsigned long clock_sync_flags;
  269. #define CLOCK_SYNC_HAS_ETR 0
  270. #define CLOCK_SYNC_HAS_STP 1
  271. #define CLOCK_SYNC_ETR 2
  272. #define CLOCK_SYNC_STP 3
  273. /*
  274. * The synchronous get_clock function. It will write the current clock
  275. * value to the clock pointer and return 0 if the clock is in sync with
  276. * the external time source. If the clock mode is local it will return
  277. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  278. * reference.
  279. */
  280. int get_sync_clock(unsigned long long *clock)
  281. {
  282. atomic_t *sw_ptr;
  283. unsigned int sw0, sw1;
  284. sw_ptr = &get_cpu_var(clock_sync_word);
  285. sw0 = atomic_read(sw_ptr);
  286. *clock = get_clock();
  287. sw1 = atomic_read(sw_ptr);
  288. put_cpu_var(clock_sync_word);
  289. if (sw0 == sw1 && (sw0 & 0x80000000U))
  290. /* Success: time is in sync. */
  291. return 0;
  292. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  293. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  294. return -ENOSYS;
  295. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  296. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  297. return -EACCES;
  298. return -EAGAIN;
  299. }
  300. EXPORT_SYMBOL(get_sync_clock);
  301. /*
  302. * Make get_sync_clock return -EAGAIN.
  303. */
  304. static void disable_sync_clock(void *dummy)
  305. {
  306. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  307. /*
  308. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  309. * fail until the sync bit is turned back on. In addition
  310. * increase the "sequence" counter to avoid the race of an
  311. * etr event and the complete recovery against get_sync_clock.
  312. */
  313. atomic_clear_mask(0x80000000, sw_ptr);
  314. atomic_inc(sw_ptr);
  315. }
  316. /*
  317. * Make get_sync_clock return 0 again.
  318. * Needs to be called from a context disabled for preemption.
  319. */
  320. static void enable_sync_clock(void)
  321. {
  322. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  323. atomic_set_mask(0x80000000, sw_ptr);
  324. }
  325. /*
  326. * Function to check if the clock is in sync.
  327. */
  328. static inline int check_sync_clock(void)
  329. {
  330. atomic_t *sw_ptr;
  331. int rc;
  332. sw_ptr = &get_cpu_var(clock_sync_word);
  333. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  334. put_cpu_var(clock_sync_word);
  335. return rc;
  336. }
  337. /* Single threaded workqueue used for etr and stp sync events */
  338. static struct workqueue_struct *time_sync_wq;
  339. static void __init time_init_wq(void)
  340. {
  341. if (time_sync_wq)
  342. return;
  343. time_sync_wq = create_singlethread_workqueue("timesync");
  344. }
  345. /*
  346. * External Time Reference (ETR) code.
  347. */
  348. static int etr_port0_online;
  349. static int etr_port1_online;
  350. static int etr_steai_available;
  351. static int __init early_parse_etr(char *p)
  352. {
  353. if (strncmp(p, "off", 3) == 0)
  354. etr_port0_online = etr_port1_online = 0;
  355. else if (strncmp(p, "port0", 5) == 0)
  356. etr_port0_online = 1;
  357. else if (strncmp(p, "port1", 5) == 0)
  358. etr_port1_online = 1;
  359. else if (strncmp(p, "on", 2) == 0)
  360. etr_port0_online = etr_port1_online = 1;
  361. return 0;
  362. }
  363. early_param("etr", early_parse_etr);
  364. enum etr_event {
  365. ETR_EVENT_PORT0_CHANGE,
  366. ETR_EVENT_PORT1_CHANGE,
  367. ETR_EVENT_PORT_ALERT,
  368. ETR_EVENT_SYNC_CHECK,
  369. ETR_EVENT_SWITCH_LOCAL,
  370. ETR_EVENT_UPDATE,
  371. };
  372. /*
  373. * Valid bit combinations of the eacr register are (x = don't care):
  374. * e0 e1 dp p0 p1 ea es sl
  375. * 0 0 x 0 0 0 0 0 initial, disabled state
  376. * 0 0 x 0 1 1 0 0 port 1 online
  377. * 0 0 x 1 0 1 0 0 port 0 online
  378. * 0 0 x 1 1 1 0 0 both ports online
  379. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  380. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  381. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  382. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  383. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  384. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  385. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  386. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  387. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  388. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  389. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  390. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  391. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  392. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  393. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  394. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  395. */
  396. static struct etr_eacr etr_eacr;
  397. static u64 etr_tolec; /* time of last eacr update */
  398. static struct etr_aib etr_port0;
  399. static int etr_port0_uptodate;
  400. static struct etr_aib etr_port1;
  401. static int etr_port1_uptodate;
  402. static unsigned long etr_events;
  403. static struct timer_list etr_timer;
  404. static void etr_timeout(unsigned long dummy);
  405. static void etr_work_fn(struct work_struct *work);
  406. static DEFINE_MUTEX(etr_work_mutex);
  407. static DECLARE_WORK(etr_work, etr_work_fn);
  408. /*
  409. * Reset ETR attachment.
  410. */
  411. static void etr_reset(void)
  412. {
  413. etr_eacr = (struct etr_eacr) {
  414. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  415. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  416. .es = 0, .sl = 0 };
  417. if (etr_setr(&etr_eacr) == 0) {
  418. etr_tolec = get_clock();
  419. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  420. if (etr_port0_online && etr_port1_online)
  421. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  422. } else if (etr_port0_online || etr_port1_online) {
  423. pr_warning("The real or virtual hardware system does "
  424. "not provide an ETR interface\n");
  425. etr_port0_online = etr_port1_online = 0;
  426. }
  427. }
  428. static int __init etr_init(void)
  429. {
  430. struct etr_aib aib;
  431. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  432. return 0;
  433. time_init_wq();
  434. /* Check if this machine has the steai instruction. */
  435. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  436. etr_steai_available = 1;
  437. setup_timer(&etr_timer, etr_timeout, 0UL);
  438. if (etr_port0_online) {
  439. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  440. queue_work(time_sync_wq, &etr_work);
  441. }
  442. if (etr_port1_online) {
  443. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  444. queue_work(time_sync_wq, &etr_work);
  445. }
  446. return 0;
  447. }
  448. arch_initcall(etr_init);
  449. /*
  450. * Two sorts of ETR machine checks. The architecture reads:
  451. * "When a machine-check niterruption occurs and if a switch-to-local or
  452. * ETR-sync-check interrupt request is pending but disabled, this pending
  453. * disabled interruption request is indicated and is cleared".
  454. * Which means that we can get etr_switch_to_local events from the machine
  455. * check handler although the interruption condition is disabled. Lovely..
  456. */
  457. /*
  458. * Switch to local machine check. This is called when the last usable
  459. * ETR port goes inactive. After switch to local the clock is not in sync.
  460. */
  461. void etr_switch_to_local(void)
  462. {
  463. if (!etr_eacr.sl)
  464. return;
  465. disable_sync_clock(NULL);
  466. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  467. etr_eacr.es = etr_eacr.sl = 0;
  468. etr_setr(&etr_eacr);
  469. queue_work(time_sync_wq, &etr_work);
  470. }
  471. }
  472. /*
  473. * ETR sync check machine check. This is called when the ETR OTE and the
  474. * local clock OTE are farther apart than the ETR sync check tolerance.
  475. * After a ETR sync check the clock is not in sync. The machine check
  476. * is broadcasted to all cpus at the same time.
  477. */
  478. void etr_sync_check(void)
  479. {
  480. if (!etr_eacr.es)
  481. return;
  482. disable_sync_clock(NULL);
  483. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  484. etr_eacr.es = 0;
  485. etr_setr(&etr_eacr);
  486. queue_work(time_sync_wq, &etr_work);
  487. }
  488. }
  489. /*
  490. * ETR timing alert. There are two causes:
  491. * 1) port state change, check the usability of the port
  492. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  493. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  494. * or ETR-data word 4 (edf4) has changed.
  495. */
  496. static void etr_timing_alert(struct etr_irq_parm *intparm)
  497. {
  498. if (intparm->pc0)
  499. /* ETR port 0 state change. */
  500. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  501. if (intparm->pc1)
  502. /* ETR port 1 state change. */
  503. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  504. if (intparm->eai)
  505. /*
  506. * ETR port alert on either port 0, 1 or both.
  507. * Both ports are not up-to-date now.
  508. */
  509. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  510. queue_work(time_sync_wq, &etr_work);
  511. }
  512. static void etr_timeout(unsigned long dummy)
  513. {
  514. set_bit(ETR_EVENT_UPDATE, &etr_events);
  515. queue_work(time_sync_wq, &etr_work);
  516. }
  517. /*
  518. * Check if the etr mode is pss.
  519. */
  520. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  521. {
  522. return eacr.es && !eacr.sl;
  523. }
  524. /*
  525. * Check if the etr mode is etr.
  526. */
  527. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  528. {
  529. return eacr.es && eacr.sl;
  530. }
  531. /*
  532. * Check if the port can be used for TOD synchronization.
  533. * For PPS mode the port has to receive OTEs. For ETR mode
  534. * the port has to receive OTEs, the ETR stepping bit has to
  535. * be zero and the validity bits for data frame 1, 2, and 3
  536. * have to be 1.
  537. */
  538. static int etr_port_valid(struct etr_aib *aib, int port)
  539. {
  540. unsigned int psc;
  541. /* Check that this port is receiving OTEs. */
  542. if (aib->tsp == 0)
  543. return 0;
  544. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  545. if (psc == etr_lpsc_pps_mode)
  546. return 1;
  547. if (psc == etr_lpsc_operational_step)
  548. return !aib->esw.y && aib->slsw.v1 &&
  549. aib->slsw.v2 && aib->slsw.v3;
  550. return 0;
  551. }
  552. /*
  553. * Check if two ports are on the same network.
  554. */
  555. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  556. {
  557. // FIXME: any other fields we have to compare?
  558. return aib1->edf1.net_id == aib2->edf1.net_id;
  559. }
  560. /*
  561. * Wrapper for etr_stei that converts physical port states
  562. * to logical port states to be consistent with the output
  563. * of stetr (see etr_psc vs. etr_lpsc).
  564. */
  565. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  566. {
  567. BUG_ON(etr_steai(aib, func) != 0);
  568. /* Convert port state to logical port state. */
  569. if (aib->esw.psc0 == 1)
  570. aib->esw.psc0 = 2;
  571. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  572. aib->esw.psc0 = 1;
  573. if (aib->esw.psc1 == 1)
  574. aib->esw.psc1 = 2;
  575. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  576. aib->esw.psc1 = 1;
  577. }
  578. /*
  579. * Check if the aib a2 is still connected to the same attachment as
  580. * aib a1, the etv values differ by one and a2 is valid.
  581. */
  582. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  583. {
  584. int state_a1, state_a2;
  585. /* Paranoia check: e0/e1 should better be the same. */
  586. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  587. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  588. return 0;
  589. /* Still connected to the same etr ? */
  590. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  591. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  592. if (state_a1 == etr_lpsc_operational_step) {
  593. if (state_a2 != etr_lpsc_operational_step ||
  594. a1->edf1.net_id != a2->edf1.net_id ||
  595. a1->edf1.etr_id != a2->edf1.etr_id ||
  596. a1->edf1.etr_pn != a2->edf1.etr_pn)
  597. return 0;
  598. } else if (state_a2 != etr_lpsc_pps_mode)
  599. return 0;
  600. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  601. if (a1->edf2.etv + 1 != a2->edf2.etv)
  602. return 0;
  603. if (!etr_port_valid(a2, p))
  604. return 0;
  605. return 1;
  606. }
  607. struct clock_sync_data {
  608. atomic_t cpus;
  609. int in_sync;
  610. unsigned long long fixup_cc;
  611. int etr_port;
  612. struct etr_aib *etr_aib;
  613. };
  614. static void clock_sync_cpu(struct clock_sync_data *sync)
  615. {
  616. atomic_dec(&sync->cpus);
  617. enable_sync_clock();
  618. /*
  619. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  620. * is called on all other cpus while the TOD clocks is stopped.
  621. * __udelay will stop the cpu on an enabled wait psw until the
  622. * TOD is running again.
  623. */
  624. while (sync->in_sync == 0) {
  625. __udelay(1);
  626. /*
  627. * A different cpu changes *in_sync. Therefore use
  628. * barrier() to force memory access.
  629. */
  630. barrier();
  631. }
  632. if (sync->in_sync != 1)
  633. /* Didn't work. Clear per-cpu in sync bit again. */
  634. disable_sync_clock(NULL);
  635. /*
  636. * This round of TOD syncing is done. Set the clock comparator
  637. * to the next tick and let the processor continue.
  638. */
  639. fixup_clock_comparator(sync->fixup_cc);
  640. }
  641. /*
  642. * Sync the TOD clock using the port refered to by aibp. This port
  643. * has to be enabled and the other port has to be disabled. The
  644. * last eacr update has to be more than 1.6 seconds in the past.
  645. */
  646. static int etr_sync_clock(void *data)
  647. {
  648. static int first;
  649. unsigned long long clock, old_clock, delay, delta;
  650. struct clock_sync_data *etr_sync;
  651. struct etr_aib *sync_port, *aib;
  652. int port;
  653. int rc;
  654. etr_sync = data;
  655. if (xchg(&first, 1) == 1) {
  656. /* Slave */
  657. clock_sync_cpu(etr_sync);
  658. return 0;
  659. }
  660. /* Wait until all other cpus entered the sync function. */
  661. while (atomic_read(&etr_sync->cpus) != 0)
  662. cpu_relax();
  663. port = etr_sync->etr_port;
  664. aib = etr_sync->etr_aib;
  665. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  666. enable_sync_clock();
  667. /* Set clock to next OTE. */
  668. __ctl_set_bit(14, 21);
  669. __ctl_set_bit(0, 29);
  670. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  671. old_clock = get_clock();
  672. if (set_clock(clock) == 0) {
  673. __udelay(1); /* Wait for the clock to start. */
  674. __ctl_clear_bit(0, 29);
  675. __ctl_clear_bit(14, 21);
  676. etr_stetr(aib);
  677. /* Adjust Linux timing variables. */
  678. delay = (unsigned long long)
  679. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  680. delta = adjust_time(old_clock, clock, delay);
  681. etr_sync->fixup_cc = delta;
  682. fixup_clock_comparator(delta);
  683. /* Verify that the clock is properly set. */
  684. if (!etr_aib_follows(sync_port, aib, port)) {
  685. /* Didn't work. */
  686. disable_sync_clock(NULL);
  687. etr_sync->in_sync = -EAGAIN;
  688. rc = -EAGAIN;
  689. } else {
  690. etr_sync->in_sync = 1;
  691. rc = 0;
  692. }
  693. } else {
  694. /* Could not set the clock ?!? */
  695. __ctl_clear_bit(0, 29);
  696. __ctl_clear_bit(14, 21);
  697. disable_sync_clock(NULL);
  698. etr_sync->in_sync = -EAGAIN;
  699. rc = -EAGAIN;
  700. }
  701. xchg(&first, 0);
  702. return rc;
  703. }
  704. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  705. {
  706. struct clock_sync_data etr_sync;
  707. struct etr_aib *sync_port;
  708. int follows;
  709. int rc;
  710. /* Check if the current aib is adjacent to the sync port aib. */
  711. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  712. follows = etr_aib_follows(sync_port, aib, port);
  713. memcpy(sync_port, aib, sizeof(*aib));
  714. if (!follows)
  715. return -EAGAIN;
  716. memset(&etr_sync, 0, sizeof(etr_sync));
  717. etr_sync.etr_aib = aib;
  718. etr_sync.etr_port = port;
  719. get_online_cpus();
  720. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  721. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  722. put_online_cpus();
  723. return rc;
  724. }
  725. /*
  726. * Handle the immediate effects of the different events.
  727. * The port change event is used for online/offline changes.
  728. */
  729. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  730. {
  731. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  732. eacr.es = 0;
  733. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  734. eacr.es = eacr.sl = 0;
  735. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  736. etr_port0_uptodate = etr_port1_uptodate = 0;
  737. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  738. if (eacr.e0)
  739. /*
  740. * Port change of an enabled port. We have to
  741. * assume that this can have caused an stepping
  742. * port switch.
  743. */
  744. etr_tolec = get_clock();
  745. eacr.p0 = etr_port0_online;
  746. if (!eacr.p0)
  747. eacr.e0 = 0;
  748. etr_port0_uptodate = 0;
  749. }
  750. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  751. if (eacr.e1)
  752. /*
  753. * Port change of an enabled port. We have to
  754. * assume that this can have caused an stepping
  755. * port switch.
  756. */
  757. etr_tolec = get_clock();
  758. eacr.p1 = etr_port1_online;
  759. if (!eacr.p1)
  760. eacr.e1 = 0;
  761. etr_port1_uptodate = 0;
  762. }
  763. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  764. return eacr;
  765. }
  766. /*
  767. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  768. * one of the ports needs an update.
  769. */
  770. static void etr_set_tolec_timeout(unsigned long long now)
  771. {
  772. unsigned long micros;
  773. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  774. (!etr_eacr.p1 || etr_port1_uptodate))
  775. return;
  776. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  777. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  778. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  779. }
  780. /*
  781. * Set up a time that expires after 1/2 second.
  782. */
  783. static void etr_set_sync_timeout(void)
  784. {
  785. mod_timer(&etr_timer, jiffies + HZ/2);
  786. }
  787. /*
  788. * Update the aib information for one or both ports.
  789. */
  790. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  791. struct etr_eacr eacr)
  792. {
  793. /* With both ports disabled the aib information is useless. */
  794. if (!eacr.e0 && !eacr.e1)
  795. return eacr;
  796. /* Update port0 or port1 with aib stored in etr_work_fn. */
  797. if (aib->esw.q == 0) {
  798. /* Information for port 0 stored. */
  799. if (eacr.p0 && !etr_port0_uptodate) {
  800. etr_port0 = *aib;
  801. if (etr_port0_online)
  802. etr_port0_uptodate = 1;
  803. }
  804. } else {
  805. /* Information for port 1 stored. */
  806. if (eacr.p1 && !etr_port1_uptodate) {
  807. etr_port1 = *aib;
  808. if (etr_port0_online)
  809. etr_port1_uptodate = 1;
  810. }
  811. }
  812. /*
  813. * Do not try to get the alternate port aib if the clock
  814. * is not in sync yet.
  815. */
  816. if (!eacr.es || !check_sync_clock())
  817. return eacr;
  818. /*
  819. * If steai is available we can get the information about
  820. * the other port immediately. If only stetr is available the
  821. * data-port bit toggle has to be used.
  822. */
  823. if (etr_steai_available) {
  824. if (eacr.p0 && !etr_port0_uptodate) {
  825. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  826. etr_port0_uptodate = 1;
  827. }
  828. if (eacr.p1 && !etr_port1_uptodate) {
  829. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  830. etr_port1_uptodate = 1;
  831. }
  832. } else {
  833. /*
  834. * One port was updated above, if the other
  835. * port is not uptodate toggle dp bit.
  836. */
  837. if ((eacr.p0 && !etr_port0_uptodate) ||
  838. (eacr.p1 && !etr_port1_uptodate))
  839. eacr.dp ^= 1;
  840. else
  841. eacr.dp = 0;
  842. }
  843. return eacr;
  844. }
  845. /*
  846. * Write new etr control register if it differs from the current one.
  847. * Return 1 if etr_tolec has been updated as well.
  848. */
  849. static void etr_update_eacr(struct etr_eacr eacr)
  850. {
  851. int dp_changed;
  852. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  853. /* No change, return. */
  854. return;
  855. /*
  856. * The disable of an active port of the change of the data port
  857. * bit can/will cause a change in the data port.
  858. */
  859. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  860. (etr_eacr.dp ^ eacr.dp) != 0;
  861. etr_eacr = eacr;
  862. etr_setr(&etr_eacr);
  863. if (dp_changed)
  864. etr_tolec = get_clock();
  865. }
  866. /*
  867. * ETR work. In this function you'll find the main logic. In
  868. * particular this is the only function that calls etr_update_eacr(),
  869. * it "controls" the etr control register.
  870. */
  871. static void etr_work_fn(struct work_struct *work)
  872. {
  873. unsigned long long now;
  874. struct etr_eacr eacr;
  875. struct etr_aib aib;
  876. int sync_port;
  877. /* prevent multiple execution. */
  878. mutex_lock(&etr_work_mutex);
  879. /* Create working copy of etr_eacr. */
  880. eacr = etr_eacr;
  881. /* Check for the different events and their immediate effects. */
  882. eacr = etr_handle_events(eacr);
  883. /* Check if ETR is supposed to be active. */
  884. eacr.ea = eacr.p0 || eacr.p1;
  885. if (!eacr.ea) {
  886. /* Both ports offline. Reset everything. */
  887. eacr.dp = eacr.es = eacr.sl = 0;
  888. on_each_cpu(disable_sync_clock, NULL, 1);
  889. del_timer_sync(&etr_timer);
  890. etr_update_eacr(eacr);
  891. goto out_unlock;
  892. }
  893. /* Store aib to get the current ETR status word. */
  894. BUG_ON(etr_stetr(&aib) != 0);
  895. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  896. now = get_clock();
  897. /*
  898. * Update the port information if the last stepping port change
  899. * or data port change is older than 1.6 seconds.
  900. */
  901. if (now >= etr_tolec + (1600000 << 12))
  902. eacr = etr_handle_update(&aib, eacr);
  903. /*
  904. * Select ports to enable. The prefered synchronization mode is PPS.
  905. * If a port can be enabled depends on a number of things:
  906. * 1) The port needs to be online and uptodate. A port is not
  907. * disabled just because it is not uptodate, but it is only
  908. * enabled if it is uptodate.
  909. * 2) The port needs to have the same mode (pps / etr).
  910. * 3) The port needs to be usable -> etr_port_valid() == 1
  911. * 4) To enable the second port the clock needs to be in sync.
  912. * 5) If both ports are useable and are ETR ports, the network id
  913. * has to be the same.
  914. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  915. */
  916. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  917. eacr.sl = 0;
  918. eacr.e0 = 1;
  919. if (!etr_mode_is_pps(etr_eacr))
  920. eacr.es = 0;
  921. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  922. eacr.e1 = 0;
  923. // FIXME: uptodate checks ?
  924. else if (etr_port0_uptodate && etr_port1_uptodate)
  925. eacr.e1 = 1;
  926. sync_port = (etr_port0_uptodate &&
  927. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  928. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  929. eacr.sl = 0;
  930. eacr.e0 = 0;
  931. eacr.e1 = 1;
  932. if (!etr_mode_is_pps(etr_eacr))
  933. eacr.es = 0;
  934. sync_port = (etr_port1_uptodate &&
  935. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  936. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  937. eacr.sl = 1;
  938. eacr.e0 = 1;
  939. if (!etr_mode_is_etr(etr_eacr))
  940. eacr.es = 0;
  941. if (!eacr.es || !eacr.p1 ||
  942. aib.esw.psc1 != etr_lpsc_operational_alt)
  943. eacr.e1 = 0;
  944. else if (etr_port0_uptodate && etr_port1_uptodate &&
  945. etr_compare_network(&etr_port0, &etr_port1))
  946. eacr.e1 = 1;
  947. sync_port = (etr_port0_uptodate &&
  948. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  949. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  950. eacr.sl = 1;
  951. eacr.e0 = 0;
  952. eacr.e1 = 1;
  953. if (!etr_mode_is_etr(etr_eacr))
  954. eacr.es = 0;
  955. sync_port = (etr_port1_uptodate &&
  956. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  957. } else {
  958. /* Both ports not usable. */
  959. eacr.es = eacr.sl = 0;
  960. sync_port = -1;
  961. }
  962. /*
  963. * If the clock is in sync just update the eacr and return.
  964. * If there is no valid sync port wait for a port update.
  965. */
  966. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  967. etr_update_eacr(eacr);
  968. etr_set_tolec_timeout(now);
  969. goto out_unlock;
  970. }
  971. /*
  972. * Prepare control register for clock syncing
  973. * (reset data port bit, set sync check control.
  974. */
  975. eacr.dp = 0;
  976. eacr.es = 1;
  977. /*
  978. * Update eacr and try to synchronize the clock. If the update
  979. * of eacr caused a stepping port switch (or if we have to
  980. * assume that a stepping port switch has occured) or the
  981. * clock syncing failed, reset the sync check control bit
  982. * and set up a timer to try again after 0.5 seconds
  983. */
  984. etr_update_eacr(eacr);
  985. if (now < etr_tolec + (1600000 << 12) ||
  986. etr_sync_clock_stop(&aib, sync_port) != 0) {
  987. /* Sync failed. Try again in 1/2 second. */
  988. eacr.es = 0;
  989. etr_update_eacr(eacr);
  990. etr_set_sync_timeout();
  991. } else
  992. etr_set_tolec_timeout(now);
  993. out_unlock:
  994. mutex_unlock(&etr_work_mutex);
  995. }
  996. /*
  997. * Sysfs interface functions
  998. */
  999. static struct sysdev_class etr_sysclass = {
  1000. .name = "etr",
  1001. };
  1002. static struct sys_device etr_port0_dev = {
  1003. .id = 0,
  1004. .cls = &etr_sysclass,
  1005. };
  1006. static struct sys_device etr_port1_dev = {
  1007. .id = 1,
  1008. .cls = &etr_sysclass,
  1009. };
  1010. /*
  1011. * ETR class attributes
  1012. */
  1013. static ssize_t etr_stepping_port_show(struct sysdev_class *class,
  1014. struct sysdev_class_attribute *attr,
  1015. char *buf)
  1016. {
  1017. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1018. }
  1019. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1020. static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
  1021. struct sysdev_class_attribute *attr,
  1022. char *buf)
  1023. {
  1024. char *mode_str;
  1025. if (etr_mode_is_pps(etr_eacr))
  1026. mode_str = "pps";
  1027. else if (etr_mode_is_etr(etr_eacr))
  1028. mode_str = "etr";
  1029. else
  1030. mode_str = "local";
  1031. return sprintf(buf, "%s\n", mode_str);
  1032. }
  1033. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1034. /*
  1035. * ETR port attributes
  1036. */
  1037. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1038. {
  1039. if (dev == &etr_port0_dev)
  1040. return etr_port0_online ? &etr_port0 : NULL;
  1041. else
  1042. return etr_port1_online ? &etr_port1 : NULL;
  1043. }
  1044. static ssize_t etr_online_show(struct sys_device *dev,
  1045. struct sysdev_attribute *attr,
  1046. char *buf)
  1047. {
  1048. unsigned int online;
  1049. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1050. return sprintf(buf, "%i\n", online);
  1051. }
  1052. static ssize_t etr_online_store(struct sys_device *dev,
  1053. struct sysdev_attribute *attr,
  1054. const char *buf, size_t count)
  1055. {
  1056. unsigned int value;
  1057. value = simple_strtoul(buf, NULL, 0);
  1058. if (value != 0 && value != 1)
  1059. return -EINVAL;
  1060. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1061. return -EOPNOTSUPP;
  1062. mutex_lock(&clock_sync_mutex);
  1063. if (dev == &etr_port0_dev) {
  1064. if (etr_port0_online == value)
  1065. goto out; /* Nothing to do. */
  1066. etr_port0_online = value;
  1067. if (etr_port0_online && etr_port1_online)
  1068. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1069. else
  1070. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1071. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1072. queue_work(time_sync_wq, &etr_work);
  1073. } else {
  1074. if (etr_port1_online == value)
  1075. goto out; /* Nothing to do. */
  1076. etr_port1_online = value;
  1077. if (etr_port0_online && etr_port1_online)
  1078. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1079. else
  1080. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1081. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1082. queue_work(time_sync_wq, &etr_work);
  1083. }
  1084. out:
  1085. mutex_unlock(&clock_sync_mutex);
  1086. return count;
  1087. }
  1088. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1089. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1090. struct sysdev_attribute *attr,
  1091. char *buf)
  1092. {
  1093. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1094. etr_eacr.e0 : etr_eacr.e1);
  1095. }
  1096. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1097. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1098. struct sysdev_attribute *attr, char *buf)
  1099. {
  1100. if (!etr_port0_online && !etr_port1_online)
  1101. /* Status word is not uptodate if both ports are offline. */
  1102. return -ENODATA;
  1103. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1104. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1105. }
  1106. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1107. static ssize_t etr_untuned_show(struct sys_device *dev,
  1108. struct sysdev_attribute *attr, char *buf)
  1109. {
  1110. struct etr_aib *aib = etr_aib_from_dev(dev);
  1111. if (!aib || !aib->slsw.v1)
  1112. return -ENODATA;
  1113. return sprintf(buf, "%i\n", aib->edf1.u);
  1114. }
  1115. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1116. static ssize_t etr_network_id_show(struct sys_device *dev,
  1117. struct sysdev_attribute *attr, char *buf)
  1118. {
  1119. struct etr_aib *aib = etr_aib_from_dev(dev);
  1120. if (!aib || !aib->slsw.v1)
  1121. return -ENODATA;
  1122. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1123. }
  1124. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1125. static ssize_t etr_id_show(struct sys_device *dev,
  1126. struct sysdev_attribute *attr, char *buf)
  1127. {
  1128. struct etr_aib *aib = etr_aib_from_dev(dev);
  1129. if (!aib || !aib->slsw.v1)
  1130. return -ENODATA;
  1131. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1132. }
  1133. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1134. static ssize_t etr_port_number_show(struct sys_device *dev,
  1135. struct sysdev_attribute *attr, char *buf)
  1136. {
  1137. struct etr_aib *aib = etr_aib_from_dev(dev);
  1138. if (!aib || !aib->slsw.v1)
  1139. return -ENODATA;
  1140. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1141. }
  1142. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1143. static ssize_t etr_coupled_show(struct sys_device *dev,
  1144. struct sysdev_attribute *attr, char *buf)
  1145. {
  1146. struct etr_aib *aib = etr_aib_from_dev(dev);
  1147. if (!aib || !aib->slsw.v3)
  1148. return -ENODATA;
  1149. return sprintf(buf, "%i\n", aib->edf3.c);
  1150. }
  1151. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1152. static ssize_t etr_local_time_show(struct sys_device *dev,
  1153. struct sysdev_attribute *attr, char *buf)
  1154. {
  1155. struct etr_aib *aib = etr_aib_from_dev(dev);
  1156. if (!aib || !aib->slsw.v3)
  1157. return -ENODATA;
  1158. return sprintf(buf, "%i\n", aib->edf3.blto);
  1159. }
  1160. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1161. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1162. struct sysdev_attribute *attr, char *buf)
  1163. {
  1164. struct etr_aib *aib = etr_aib_from_dev(dev);
  1165. if (!aib || !aib->slsw.v3)
  1166. return -ENODATA;
  1167. return sprintf(buf, "%i\n", aib->edf3.buo);
  1168. }
  1169. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1170. static struct sysdev_attribute *etr_port_attributes[] = {
  1171. &attr_online,
  1172. &attr_stepping_control,
  1173. &attr_state_code,
  1174. &attr_untuned,
  1175. &attr_network,
  1176. &attr_id,
  1177. &attr_port,
  1178. &attr_coupled,
  1179. &attr_local_time,
  1180. &attr_utc_offset,
  1181. NULL
  1182. };
  1183. static int __init etr_register_port(struct sys_device *dev)
  1184. {
  1185. struct sysdev_attribute **attr;
  1186. int rc;
  1187. rc = sysdev_register(dev);
  1188. if (rc)
  1189. goto out;
  1190. for (attr = etr_port_attributes; *attr; attr++) {
  1191. rc = sysdev_create_file(dev, *attr);
  1192. if (rc)
  1193. goto out_unreg;
  1194. }
  1195. return 0;
  1196. out_unreg:
  1197. for (; attr >= etr_port_attributes; attr--)
  1198. sysdev_remove_file(dev, *attr);
  1199. sysdev_unregister(dev);
  1200. out:
  1201. return rc;
  1202. }
  1203. static void __init etr_unregister_port(struct sys_device *dev)
  1204. {
  1205. struct sysdev_attribute **attr;
  1206. for (attr = etr_port_attributes; *attr; attr++)
  1207. sysdev_remove_file(dev, *attr);
  1208. sysdev_unregister(dev);
  1209. }
  1210. static int __init etr_init_sysfs(void)
  1211. {
  1212. int rc;
  1213. rc = sysdev_class_register(&etr_sysclass);
  1214. if (rc)
  1215. goto out;
  1216. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1217. if (rc)
  1218. goto out_unreg_class;
  1219. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1220. if (rc)
  1221. goto out_remove_stepping_port;
  1222. rc = etr_register_port(&etr_port0_dev);
  1223. if (rc)
  1224. goto out_remove_stepping_mode;
  1225. rc = etr_register_port(&etr_port1_dev);
  1226. if (rc)
  1227. goto out_remove_port0;
  1228. return 0;
  1229. out_remove_port0:
  1230. etr_unregister_port(&etr_port0_dev);
  1231. out_remove_stepping_mode:
  1232. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1233. out_remove_stepping_port:
  1234. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1235. out_unreg_class:
  1236. sysdev_class_unregister(&etr_sysclass);
  1237. out:
  1238. return rc;
  1239. }
  1240. device_initcall(etr_init_sysfs);
  1241. /*
  1242. * Server Time Protocol (STP) code.
  1243. */
  1244. static int stp_online;
  1245. static struct stp_sstpi stp_info;
  1246. static void *stp_page;
  1247. static void stp_work_fn(struct work_struct *work);
  1248. static DEFINE_MUTEX(stp_work_mutex);
  1249. static DECLARE_WORK(stp_work, stp_work_fn);
  1250. static struct timer_list stp_timer;
  1251. static int __init early_parse_stp(char *p)
  1252. {
  1253. if (strncmp(p, "off", 3) == 0)
  1254. stp_online = 0;
  1255. else if (strncmp(p, "on", 2) == 0)
  1256. stp_online = 1;
  1257. return 0;
  1258. }
  1259. early_param("stp", early_parse_stp);
  1260. /*
  1261. * Reset STP attachment.
  1262. */
  1263. static void __init stp_reset(void)
  1264. {
  1265. int rc;
  1266. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1267. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1268. if (rc == 0)
  1269. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1270. else if (stp_online) {
  1271. pr_warning("The real or virtual hardware system does "
  1272. "not provide an STP interface\n");
  1273. free_page((unsigned long) stp_page);
  1274. stp_page = NULL;
  1275. stp_online = 0;
  1276. }
  1277. }
  1278. static void stp_timeout(unsigned long dummy)
  1279. {
  1280. queue_work(time_sync_wq, &stp_work);
  1281. }
  1282. static int __init stp_init(void)
  1283. {
  1284. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1285. return 0;
  1286. setup_timer(&stp_timer, stp_timeout, 0UL);
  1287. time_init_wq();
  1288. if (!stp_online)
  1289. return 0;
  1290. queue_work(time_sync_wq, &stp_work);
  1291. return 0;
  1292. }
  1293. arch_initcall(stp_init);
  1294. /*
  1295. * STP timing alert. There are three causes:
  1296. * 1) timing status change
  1297. * 2) link availability change
  1298. * 3) time control parameter change
  1299. * In all three cases we are only interested in the clock source state.
  1300. * If a STP clock source is now available use it.
  1301. */
  1302. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1303. {
  1304. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1305. queue_work(time_sync_wq, &stp_work);
  1306. }
  1307. /*
  1308. * STP sync check machine check. This is called when the timing state
  1309. * changes from the synchronized state to the unsynchronized state.
  1310. * After a STP sync check the clock is not in sync. The machine check
  1311. * is broadcasted to all cpus at the same time.
  1312. */
  1313. void stp_sync_check(void)
  1314. {
  1315. disable_sync_clock(NULL);
  1316. queue_work(time_sync_wq, &stp_work);
  1317. }
  1318. /*
  1319. * STP island condition machine check. This is called when an attached
  1320. * server attempts to communicate over an STP link and the servers
  1321. * have matching CTN ids and have a valid stratum-1 configuration
  1322. * but the configurations do not match.
  1323. */
  1324. void stp_island_check(void)
  1325. {
  1326. disable_sync_clock(NULL);
  1327. queue_work(time_sync_wq, &stp_work);
  1328. }
  1329. static int stp_sync_clock(void *data)
  1330. {
  1331. static int first;
  1332. unsigned long long old_clock, delta;
  1333. struct clock_sync_data *stp_sync;
  1334. int rc;
  1335. stp_sync = data;
  1336. if (xchg(&first, 1) == 1) {
  1337. /* Slave */
  1338. clock_sync_cpu(stp_sync);
  1339. return 0;
  1340. }
  1341. /* Wait until all other cpus entered the sync function. */
  1342. while (atomic_read(&stp_sync->cpus) != 0)
  1343. cpu_relax();
  1344. enable_sync_clock();
  1345. rc = 0;
  1346. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1347. stp_info.todoff[2] || stp_info.todoff[3] ||
  1348. stp_info.tmd != 2) {
  1349. old_clock = get_clock();
  1350. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1351. if (rc == 0) {
  1352. delta = adjust_time(old_clock, get_clock(), 0);
  1353. fixup_clock_comparator(delta);
  1354. rc = chsc_sstpi(stp_page, &stp_info,
  1355. sizeof(struct stp_sstpi));
  1356. if (rc == 0 && stp_info.tmd != 2)
  1357. rc = -EAGAIN;
  1358. }
  1359. }
  1360. if (rc) {
  1361. disable_sync_clock(NULL);
  1362. stp_sync->in_sync = -EAGAIN;
  1363. } else
  1364. stp_sync->in_sync = 1;
  1365. xchg(&first, 0);
  1366. return 0;
  1367. }
  1368. /*
  1369. * STP work. Check for the STP state and take over the clock
  1370. * synchronization if the STP clock source is usable.
  1371. */
  1372. static void stp_work_fn(struct work_struct *work)
  1373. {
  1374. struct clock_sync_data stp_sync;
  1375. int rc;
  1376. /* prevent multiple execution. */
  1377. mutex_lock(&stp_work_mutex);
  1378. if (!stp_online) {
  1379. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1380. del_timer_sync(&stp_timer);
  1381. goto out_unlock;
  1382. }
  1383. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1384. if (rc)
  1385. goto out_unlock;
  1386. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1387. if (rc || stp_info.c == 0)
  1388. goto out_unlock;
  1389. /* Skip synchronization if the clock is already in sync. */
  1390. if (check_sync_clock())
  1391. goto out_unlock;
  1392. memset(&stp_sync, 0, sizeof(stp_sync));
  1393. get_online_cpus();
  1394. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1395. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1396. put_online_cpus();
  1397. if (!check_sync_clock())
  1398. /*
  1399. * There is a usable clock but the synchonization failed.
  1400. * Retry after a second.
  1401. */
  1402. mod_timer(&stp_timer, jiffies + HZ);
  1403. out_unlock:
  1404. mutex_unlock(&stp_work_mutex);
  1405. }
  1406. /*
  1407. * STP class sysfs interface functions
  1408. */
  1409. static struct sysdev_class stp_sysclass = {
  1410. .name = "stp",
  1411. };
  1412. static ssize_t stp_ctn_id_show(struct sysdev_class *class,
  1413. struct sysdev_class_attribute *attr,
  1414. char *buf)
  1415. {
  1416. if (!stp_online)
  1417. return -ENODATA;
  1418. return sprintf(buf, "%016llx\n",
  1419. *(unsigned long long *) stp_info.ctnid);
  1420. }
  1421. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1422. static ssize_t stp_ctn_type_show(struct sysdev_class *class,
  1423. struct sysdev_class_attribute *attr,
  1424. char *buf)
  1425. {
  1426. if (!stp_online)
  1427. return -ENODATA;
  1428. return sprintf(buf, "%i\n", stp_info.ctn);
  1429. }
  1430. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1431. static ssize_t stp_dst_offset_show(struct sysdev_class *class,
  1432. struct sysdev_class_attribute *attr,
  1433. char *buf)
  1434. {
  1435. if (!stp_online || !(stp_info.vbits & 0x2000))
  1436. return -ENODATA;
  1437. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1438. }
  1439. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1440. static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
  1441. struct sysdev_class_attribute *attr,
  1442. char *buf)
  1443. {
  1444. if (!stp_online || !(stp_info.vbits & 0x8000))
  1445. return -ENODATA;
  1446. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1447. }
  1448. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1449. static ssize_t stp_stratum_show(struct sysdev_class *class,
  1450. struct sysdev_class_attribute *attr,
  1451. char *buf)
  1452. {
  1453. if (!stp_online)
  1454. return -ENODATA;
  1455. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1456. }
  1457. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1458. static ssize_t stp_time_offset_show(struct sysdev_class *class,
  1459. struct sysdev_class_attribute *attr,
  1460. char *buf)
  1461. {
  1462. if (!stp_online || !(stp_info.vbits & 0x0800))
  1463. return -ENODATA;
  1464. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1465. }
  1466. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1467. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
  1468. struct sysdev_class_attribute *attr,
  1469. char *buf)
  1470. {
  1471. if (!stp_online || !(stp_info.vbits & 0x4000))
  1472. return -ENODATA;
  1473. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1474. }
  1475. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1476. stp_time_zone_offset_show, NULL);
  1477. static ssize_t stp_timing_mode_show(struct sysdev_class *class,
  1478. struct sysdev_class_attribute *attr,
  1479. char *buf)
  1480. {
  1481. if (!stp_online)
  1482. return -ENODATA;
  1483. return sprintf(buf, "%i\n", stp_info.tmd);
  1484. }
  1485. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1486. static ssize_t stp_timing_state_show(struct sysdev_class *class,
  1487. struct sysdev_class_attribute *attr,
  1488. char *buf)
  1489. {
  1490. if (!stp_online)
  1491. return -ENODATA;
  1492. return sprintf(buf, "%i\n", stp_info.tst);
  1493. }
  1494. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1495. static ssize_t stp_online_show(struct sysdev_class *class,
  1496. struct sysdev_class_attribute *attr,
  1497. char *buf)
  1498. {
  1499. return sprintf(buf, "%i\n", stp_online);
  1500. }
  1501. static ssize_t stp_online_store(struct sysdev_class *class,
  1502. struct sysdev_class_attribute *attr,
  1503. const char *buf, size_t count)
  1504. {
  1505. unsigned int value;
  1506. value = simple_strtoul(buf, NULL, 0);
  1507. if (value != 0 && value != 1)
  1508. return -EINVAL;
  1509. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1510. return -EOPNOTSUPP;
  1511. mutex_lock(&clock_sync_mutex);
  1512. stp_online = value;
  1513. if (stp_online)
  1514. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1515. else
  1516. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1517. queue_work(time_sync_wq, &stp_work);
  1518. mutex_unlock(&clock_sync_mutex);
  1519. return count;
  1520. }
  1521. /*
  1522. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1523. * stp/online but attr_online already exists in this file ..
  1524. */
  1525. static struct sysdev_class_attribute attr_stp_online = {
  1526. .attr = { .name = "online", .mode = 0600 },
  1527. .show = stp_online_show,
  1528. .store = stp_online_store,
  1529. };
  1530. static struct sysdev_class_attribute *stp_attributes[] = {
  1531. &attr_ctn_id,
  1532. &attr_ctn_type,
  1533. &attr_dst_offset,
  1534. &attr_leap_seconds,
  1535. &attr_stp_online,
  1536. &attr_stratum,
  1537. &attr_time_offset,
  1538. &attr_time_zone_offset,
  1539. &attr_timing_mode,
  1540. &attr_timing_state,
  1541. NULL
  1542. };
  1543. static int __init stp_init_sysfs(void)
  1544. {
  1545. struct sysdev_class_attribute **attr;
  1546. int rc;
  1547. rc = sysdev_class_register(&stp_sysclass);
  1548. if (rc)
  1549. goto out;
  1550. for (attr = stp_attributes; *attr; attr++) {
  1551. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1552. if (rc)
  1553. goto out_unreg;
  1554. }
  1555. return 0;
  1556. out_unreg:
  1557. for (; attr >= stp_attributes; attr--)
  1558. sysdev_class_remove_file(&stp_sysclass, *attr);
  1559. sysdev_class_unregister(&stp_sysclass);
  1560. out:
  1561. return rc;
  1562. }
  1563. device_initcall(stp_init_sysfs);